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vsmjtria.cpp: Allow comms to actually work so that game can be coined up properly from either side. (#8245)
* Added NMI acknowledge, fixed coin input polarity, fixed gal B display, fixed flip screen behaviour. * Added NVRAM clear using SW2. Machines promoted to working ------------------------- VS Mahjong Triangle [Angelo Salese, Vas Crabb]
This commit is contained in:
Angelo Salese
GitHub
parent
bc8a1315ca
commit
4098f3007d
@ -21,6 +21,7 @@ TODO:
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protection (in rmhaisei the failure is more explicit, in rmhaijin it's
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deviously delayed to a later part of the game).
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In themj the checks are patched out, maybe it's a bootleg?
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ETA: it uses IOX, which is shared with speedatk.cpp and srmp2.cpp as well.
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- some unknown reads and writes.
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@ -1,5 +1,5 @@
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// license:BSD-3-Clause
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// copyright-holders:
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// copyright-holders:Vas Crabb, Angelo Salese
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/*
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VS Mahjong Triangle (c) 1986 Dyna
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@ -10,13 +10,28 @@ Unmarked board with everything doubled up, to provide a versus experience with a
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CPU: 2x Z80
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RAM: 6x M5M5117P
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Sound: 2x AY-3-8910
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I/O: 2x 8255, 4x 8-dip banks, 1x single dip
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I/O: 2x 8255, 4x 8-dip banks, 1x single dip switch (at position 11m)
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OSC: 20MHz
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Notes:
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- Loosely based off rmhaihai.cpp.
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Changes needed for merging both implementations seems too trivial to warrant a
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driver merge, basically just the video HW, the CRTC (448x224 clocked at 20 MHz?)
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and a few I/O bits looks very similar, the odd screen size is also a thing in srmp2.cpp
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and probably other Seta HWs.
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- CPU seems a bit too slow when deciding about what tile to discard,
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it also takes a bit too much to sync when a player takes a tile from the pond in
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a VS play. It's most likely btanb unless a gameplay video proves otherwise;
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- Position 11m on PCB has a single slider switch.
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It is not read by the CPUs at all, but instead zaps the nearby NVRAM contents if active.
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TODO:
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- coins don't work (set to free play to test for now)
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- VS. feature communications aren't implemented
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- the hardware is based on the one in rmhaihai.cpp. Derive, merge or neither?
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- Upper byte of I/O access seems to be some extra comms state machine
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(i.e. it more or less mimic the commands that CPUs send between each other).
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Maybe just a debug port that is read thru external HW?
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- Pinpoint how HW reads the three lead-filled marked as SW1 (position 1b).
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It's located next to the key matrix, maybe just ext debugging?
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*/
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#include "emu.h"
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@ -36,13 +51,16 @@ namespace {
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class vsmjtria_state : public driver_device
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{
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public:
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vsmjtria_state(const machine_config &mconfig, device_type type, const char *tag) :
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driver_device(mconfig, type, tag),
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m_cpu(*this, "cpu%u", 0U),
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m_gfxdecode(*this, "gfxdecode%u", 0U),
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m_colorram(*this, "colorram%u", 0U),
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m_videoram(*this, "videoram%u", 0U),
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m_key{ { *this, "P1_KEY%u", 0U }, { *this, "P2_KEY%u", 0U } }
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vsmjtria_state(const machine_config &mconfig, device_type type, const char *tag)
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: driver_device(mconfig, type, tag)
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, m_cpu(*this, "cpu%u", 0U)
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, m_gfxdecode(*this, "gfxdecode%u", 0U)
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, m_colorram(*this, "colorram%u", 0U)
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, m_videoram(*this, "videoram%u", 0U)
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, m_key{ { *this, "P1_KEY%u", 0U }, { *this, "P2_KEY%u", 0U } }
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, m_nvram(*this, "nvram%u", 0U)
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, m_nvram_data(*this, "nvram%u", 0U)
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, m_sw2(*this, "SW2")
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{ }
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void vsmjtria(machine_config &config);
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@ -51,6 +69,7 @@ public:
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protected:
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virtual void machine_start() override;
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virtual void machine_reset() override;
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virtual void video_start() override;
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private:
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@ -59,11 +78,15 @@ private:
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required_shared_ptr_array<uint8_t, 2> m_colorram;
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required_shared_ptr_array<uint8_t, 2> m_videoram;
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required_ioport_array<5> m_key[2];
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required_device_array<nvram_device, 2> m_nvram;
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required_shared_ptr_array<u8, 2> m_nvram_data;
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required_ioport m_sw2;
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tilemap_t *m_bg_tilemap[2];
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uint8_t m_keyboard_cmd[2];
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template <uint8_t Which> void nmi_w(uint8_t data);
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template <uint8_t Which> void nmi_set_w(uint8_t data);
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template <uint8_t Which> void nmi_ack_w(uint8_t data);
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template <uint8_t Which> void ctrl_w(uint8_t data);
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template <uint8_t Which> uint8_t keyboard_r();
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template <uint8_t Which> void keyboard_w(uint8_t data);
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@ -79,51 +102,9 @@ private:
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void sub_io_map(address_map &map);
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};
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void vsmjtria_state::machine_start()
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{
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m_keyboard_cmd[0] = m_keyboard_cmd[1] = 0;
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save_item(NAME(m_keyboard_cmd));
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}
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template <uint8_t Which>
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void vsmjtria_state::nmi_w(uint8_t data)
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{
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m_cpu[Which]->pulse_input_line(INPUT_LINE_NMI, m_cpu[Which]->minimum_quantum_time());
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}
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template <uint8_t Which>
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void vsmjtria_state::ctrl_w(uint8_t data)
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{
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flip_screen_set(data & 0x01);
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// (data & 0x02) is switched on and off in service mode
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machine().bookkeeping().coin_lockout_w(0, ~data & 0x04);
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machine().bookkeeping().coin_counter_w(0, data & 0x08);
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}
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template <uint8_t Which>
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uint8_t vsmjtria_state::keyboard_r()
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{
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uint8_t data = 0x00;
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if (BIT(m_keyboard_cmd[Which], 0)) data |= m_key[Which][0]->read();
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if (BIT(m_keyboard_cmd[Which], 1)) data |= m_key[Which][1]->read();
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if (BIT(m_keyboard_cmd[Which], 2)) data |= m_key[Which][2]->read();
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if (BIT(m_keyboard_cmd[Which], 3)) data |= m_key[Which][3]->read();
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if (BIT(m_keyboard_cmd[Which], 4)) data |= m_key[Which][4]->read();
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return data;
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}
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template <uint8_t Which>
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void vsmjtria_state::keyboard_w(uint8_t data)
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{
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m_keyboard_cmd[Which] = data;
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}
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/*
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* Video section
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*/
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void vsmjtria_state::video_start()
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{
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@ -162,6 +143,57 @@ uint32_t vsmjtria_state::screen_update(screen_device &screen, bitmap_ind16 &bitm
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return 0;
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}
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/*
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* I/O
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*/
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template <uint8_t Which>
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void vsmjtria_state::nmi_set_w(uint8_t data)
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{
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m_cpu[Which]->set_input_line(INPUT_LINE_NMI, ASSERT_LINE);
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}
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template <uint8_t Which>
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void vsmjtria_state::nmi_ack_w(uint8_t data)
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{
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m_cpu[Which]->set_input_line(INPUT_LINE_NMI, CLEAR_LINE);
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}
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// TODO: flip screen and coin counter are actually never triggered, are they really connected for this HW?
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// (ctrl_w fn comes from rmhaihai.cpp assumption of being identical, it's most likely not present here)
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template <uint8_t Which>
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void vsmjtria_state::ctrl_w(uint8_t data)
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{
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// flip_screen_set(data & 0x01);
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m_bg_tilemap[Which]->set_flip((data & 1) ? (TILEMAP_FLIPY | TILEMAP_FLIPX) : 0);
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// (data & 0x02) is switched on and off in service mode
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machine().bookkeeping().coin_lockout_w(Which, ~data & 0x04);
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machine().bookkeeping().coin_counter_w(Which, data & 0x08);
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}
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template <uint8_t Which>
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uint8_t vsmjtria_state::keyboard_r()
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{
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uint8_t data = 0x00;
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for (int key_n = 0; key_n < 5; key_n ++ )
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{
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if (BIT(m_keyboard_cmd[Which], key_n))
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data |= m_key[Which][key_n]->read();
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}
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return data;
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}
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template <uint8_t Which>
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void vsmjtria_state::keyboard_w(uint8_t data)
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{
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// bits 6-5 are always set when accessed, unknown purpose
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// 0x60 (at boot only, not read back), then 0x61 -> 0x62 -> 0x64 -> 0x68 -> 0x70 and back to 0x61
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m_keyboard_cmd[Which] = data;
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}
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void vsmjtria_state::main_prg_map(address_map &map)
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{
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@ -169,18 +201,20 @@ void vsmjtria_state::main_prg_map(address_map &map)
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map(0xa000, 0xa7ff).ram().share("nvram0");
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map(0xa800, 0xafff).ram().w(FUNC(vsmjtria_state::colorram_w<0>)).share(m_colorram[0]);
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map(0xb000, 0xb7ff).ram().w(FUNC(vsmjtria_state::videoram_w<0>)).share(m_videoram[0]);
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map(0xc000, 0xdfff).rom();
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map(0xc000, 0xdfff).rom().region("cpu0", 0xa000);
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map(0xe000, 0xffff).rom();
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}
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void vsmjtria_state::main_io_map(address_map &map)
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{
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map(0x8000, 0x8003).rw("ppi0", FUNC(i8255_device::read), FUNC(i8255_device::write));
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map(0x8020, 0x8020).r("ay0", FUNC(ay8910_device::data_r));
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map(0x8020, 0x8021).w("ay0", FUNC(ay8910_device::address_data_w));
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map(0x8060, 0x8060).w(FUNC(vsmjtria_state::ctrl_w<0>));
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map(0x80c0, 0x80c0).w(FUNC(vsmjtria_state::nmi_w<1>));
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map(0x80e0, 0x80e0).r("latch1", FUNC(generic_latch_8_device::read)).w("latch0", FUNC(generic_latch_8_device::write));
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map.global_mask(0xff);
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map(0x00, 0x03).rw("ppi0", FUNC(i8255_device::read), FUNC(i8255_device::write));
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map(0x20, 0x20).r("ay0", FUNC(ay8910_device::data_r));
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map(0x20, 0x21).w("ay0", FUNC(ay8910_device::address_data_w));
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map(0x60, 0x60).w(FUNC(vsmjtria_state::ctrl_w<0>));
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map(0xa0, 0xa0).w(FUNC(vsmjtria_state::nmi_ack_w<0>));
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map(0xc0, 0xc0).w(FUNC(vsmjtria_state::nmi_set_w<1>));
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map(0xe0, 0xe0).r("latch1", FUNC(generic_latch_8_device::read)).w("latch0", FUNC(generic_latch_8_device::write));
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}
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void vsmjtria_state::sub_prg_map(address_map &map)
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@ -189,31 +223,35 @@ void vsmjtria_state::sub_prg_map(address_map &map)
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map(0xa000, 0xa7ff).ram().share("nvram1");
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map(0xa800, 0xafff).ram().w(FUNC(vsmjtria_state::colorram_w<1>)).share(m_colorram[1]);
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map(0xb000, 0xb7ff).ram().w(FUNC(vsmjtria_state::videoram_w<1>)).share(m_videoram[1]);
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map(0xc000, 0xdfff).rom();
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map(0xc000, 0xdfff).rom().region("cpu1", 0xa000);
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map(0xe000, 0xffff).rom();
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}
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void vsmjtria_state::sub_io_map(address_map &map)
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{
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map(0x8000, 0x8003).rw("ppi1", FUNC(i8255_device::read), FUNC(i8255_device::write));
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map(0x8020, 0x8020).r("ay1", FUNC(ay8910_device::data_r));
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map(0x8020, 0x8021).w("ay1", FUNC(ay8910_device::address_data_w));
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map(0x8060, 0x8060).w(FUNC(vsmjtria_state::ctrl_w<1>));
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map(0x80c0, 0x80c0).w(FUNC(vsmjtria_state::nmi_w<0>));
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map(0x80e0, 0x80e0).r("latch0", FUNC(generic_latch_8_device::read)).w("latch1", FUNC(generic_latch_8_device::write));
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map.global_mask(0xff);
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map(0x00, 0x03).rw("ppi1", FUNC(i8255_device::read), FUNC(i8255_device::write));
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map(0x20, 0x20).r("ay1", FUNC(ay8910_device::data_r));
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map(0x20, 0x21).w("ay1", FUNC(ay8910_device::address_data_w));
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map(0x60, 0x60).w(FUNC(vsmjtria_state::ctrl_w<1>));
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map(0xa0, 0xa0).w(FUNC(vsmjtria_state::nmi_ack_w<1>));
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map(0xc0, 0xc0).w(FUNC(vsmjtria_state::nmi_set_w<0>));
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map(0xe0, 0xe0).r("latch0", FUNC(generic_latch_8_device::read)).w("latch1", FUNC(generic_latch_8_device::write));
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}
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static INPUT_PORTS_START( vsmjtria )
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// TODO: deduplicate all inputs here
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// either use a C-style macro or device-ify
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PORT_START("P1_COIN")
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PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_COIN1 ) PORT_IMPULSE(1)
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PORT_BIT( 0x1e, IP_ACTIVE_HIGH, IPT_UNUSED ) // stored at A38F along with bit 0 - seems to be vestigial, bit 2 tested at 02D1, but result discarded
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PORT_BIT( 0xe0, IP_ACTIVE_HIGH, IPT_UNUSED ) // masked out after being read
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PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 )
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PORT_BIT( 0x1e, IP_ACTIVE_LOW, IPT_UNKNOWN ) // stored at A38F along with bit 0 - seems to be vestigial, bit 2 tested at 02D1, but result discarded
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PORT_BIT( 0xe0, IP_ACTIVE_LOW, IPT_UNUSED ) // masked out after being read
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PORT_START("P2_COIN")
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PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_COIN2 ) PORT_IMPULSE(1)
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PORT_BIT( 0x1e, IP_ACTIVE_HIGH, IPT_UNUSED ) // stored at A38F along with bit 0 - seems to be vestigial, bit 2 tested at 02D1, but result discarded
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PORT_BIT( 0xe0, IP_ACTIVE_HIGH, IPT_UNUSED ) // masked out after being read
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PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN2 )
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PORT_BIT( 0x1e, IP_ACTIVE_LOW, IPT_UNKNOWN ) // stored at A38F along with bit 0 - seems to be vestigial, bit 2 tested at 02D1, but result discarded
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PORT_BIT( 0xe0, IP_ACTIVE_LOW, IPT_UNUSED ) // masked out after being read
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PORT_START("P1_KEY0")
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PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_START1 ) PORT_NAME("P1 Single Start")
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@ -416,6 +454,13 @@ static INPUT_PORTS_START( vsmjtria )
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PORT_DIPNAME( 0x80, 0x80, "Unknown 4-7" )
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PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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// single slider switch, not read by CPU
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// grounds NVRAM contents, simulated in machine_reset fn
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PORT_START("SW2")
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PORT_DIPNAME( 0x01, 0x00, "Clear NVRAM at boot" )
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PORT_DIPSETTING( 0x00, DEF_STR( No ) )
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PORT_DIPSETTING( 0x01, DEF_STR( Yes ) )
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INPUT_PORTS_END
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@ -438,10 +483,31 @@ static GFXDECODE_START( gfx_vsmjtria_sub )
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GFXDECODE_ENTRY( "subgfx", 0, charlayout, 0, 32 )
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GFXDECODE_END
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void vsmjtria_state::machine_start()
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{
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m_keyboard_cmd[0] = m_keyboard_cmd[1] = 0;
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save_item(NAME(m_keyboard_cmd));
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}
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void vsmjtria_state::machine_reset()
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{
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if (m_sw2->read() & 1)
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{
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// Note: there's no direct setter in nvram_device that directly flushes contents for this case scenario
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for (auto &nvram : m_nvram_data)
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std::fill_n(&nvram[0], nvram.length(), 0);
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logerror("machine_reset: flush NVRAM contents\n");
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}
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}
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void vsmjtria_state::vsmjtria(machine_config &config)
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{
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config.set_perfect_quantum("cpu0"); // crude way to make comms work - does it have FIFOs rather than latches?
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// Both CPUs are LH0080A -> Z80A, nominally 4 MHz
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// Clock also controls sound tempo, which at /4 sounds too fast already.
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Z80(config, m_cpu[0], 20_MHz_XTAL / 5); // divider guessed
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m_cpu[0]->set_addrmap(AS_PROGRAM, &vsmjtria_state::main_prg_map);
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m_cpu[0]->set_addrmap(AS_IO, &vsmjtria_state::main_io_map);
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@ -452,8 +518,8 @@ void vsmjtria_state::vsmjtria(machine_config &config)
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m_cpu[1]->set_addrmap(AS_IO, &vsmjtria_state::sub_io_map);
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m_cpu[1]->set_vblank_int("rscreen", FUNC(vsmjtria_state::irq0_line_hold));
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NVRAM(config, "nvram0", nvram_device::DEFAULT_ALL_0);
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NVRAM(config, "nvram1", nvram_device::DEFAULT_ALL_0);
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NVRAM(config, m_nvram[0], nvram_device::DEFAULT_ALL_0);
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NVRAM(config, m_nvram[1], nvram_device::DEFAULT_ALL_0);
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GENERIC_LATCH_8(config, "latch0");
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GENERIC_LATCH_8(config, "latch1");
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@ -574,4 +640,4 @@ void vsmjtria_state::init_vsmjtria()
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} // Anonymous namespace
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GAME( 1986, vsmjtria, 0, vsmjtria, vsmjtria, vsmjtria_state, init_vsmjtria, ROT0, "Dyna", "VS Mahjong Triangle", MACHINE_NOT_WORKING | MACHINE_SUPPORTS_SAVE ) // puts Home Data in RAM? coins and CPU comms not working
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GAME( 1986, vsmjtria, 0, vsmjtria, vsmjtria, vsmjtria_state, init_vsmjtria, ROT0, "Dyna", "VS Mahjong Triangle", MACHINE_SUPPORTS_SAVE ) // puts Home Data in RAM?
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Reference in New Issue
Block a user