mirror of
https://github.com/holub/mame
synced 2025-05-22 21:58:57 +03:00
Rewrite of the Motorola DSP56k CPU core. (Andrew Gardner)
* Implemented tst, or, jsr, rti, tst2, and 2 new movec ops. * Added opbase handler to plygonet.c
This commit is contained in:
Andrew Gardner
parent
a30f534c52
commit
40a5d0c543
@ -181,13 +181,11 @@ static void decode_JJJF_table(UINT16 JJJ, UINT16 F, typed_pointer* src_ret, type
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static void decode_JJF_table(UINT16 JJ, UINT16 F, typed_pointer* src_ret, typed_pointer* dst_ret);
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static void decode_QQF_special_table(UINT16 QQ, UINT16 F, void **S1, void **S2, void **D);
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static void decode_RR_table(UINT16 RR, typed_pointer* ret);
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#ifdef UNUSED_FUNCTION
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static void decode_Z_table(UINT16 Z, typed_pointer* ret);
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#endif
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static void execute_m_table(int x, UINT16 m);
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static void execute_MM_table(UINT16 rnum, UINT16 MM);
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#ifdef UNUSED_FUNCTION
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static UINT16 execute_q_table(int x, UINT16 q);
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#ifdef UNUSED_FUNCTION
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static void execute_z_table(int x, UINT16 z);
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#endif
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static UINT16 assemble_address_from_Pppppp_table(UINT16 P, UINT16 ppppp);
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@ -1258,9 +1256,25 @@ static size_t dsp56k_op_rnd(const UINT16 op_byte, typed_pointer* d_register, UIN
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/* TST : .... .... 0010 F001 : A-218 */
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static size_t dsp56k_op_tst(const UINT16 op_byte, typed_pointer* d_register, UINT64* p_accum, UINT8* cycles)
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{
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typed_pointer D = {NULL, DT_LONG_WORD};
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decode_F_table(BITS(op_byte,0x0008), &D);
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*p_accum = *((UINT64*)D.addr);
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d_register->addr = D.addr;
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d_register->data_type = D.data_type;
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/* S L E U N Z V C */
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/* 0 * * * * * 0 0 */
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return 0;
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/* TODO: S, L, E, U */
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if ((*((UINT64*)D.addr)) & U64(0x0000008000000000)) N_bit_set(1); else N_bit_set(0);
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if ((*((UINT64*)D.addr)) == 0) Z_bit_set(1); else Z_bit_set(0);
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V_bit_set(0);
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C_bit_set(0);
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cycles += 2; /* TODO: + mv oscillator clock cycles */
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return 1;
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}
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/* INC : .... .... 0010 F010 : A-104 */
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@ -1283,11 +1297,29 @@ static size_t dsp56k_op_inc24(const UINT16 op_byte, typed_pointer* d_register, U
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/* OR : .... .... 0010 F1JJ : A-176 */
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static size_t dsp56k_op_or(const UINT16 op_byte, typed_pointer* d_register, UINT64* p_accum, UINT8* cycles)
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{
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typed_pointer S = {NULL, DT_BYTE};
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typed_pointer D = {NULL, DT_BYTE};
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decode_JJF_table(BITS(op_byte,0x0003), BITS(op_byte,0x0008), &S, &D);
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/* Save some data for the parallel move */
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*p_accum = *((UINT64*)D.addr);
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/* OR a word of S with A1|B1 */
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((PAIR64*)D.addr)->w.h = *((UINT16*)S.addr) | ((PAIR64*)D.addr)->w.h;
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d_register->addr = D.addr;
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d_register->data_type = D.data_type;
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/* S L E U N Z V C */
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/* * * - - ? ? 0 - */
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/* N - Set if bit 31 of the result is set. Cleared otherwise. */
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/* Z - Set if bits 16-31 of the result are zero. Cleared otherwise. */
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return 0;
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/* TODO: S, L */
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if ( *((UINT64*)D.addr) & U64(0x0000000080000000)) N_bit_set(1); else N_bit_set(0);
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if ((*((UINT64*)D.addr) & U64(0x00000000ffff0000)) == 0) Z_bit_set(1); else Z_bit_set(0);
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V_bit_set(0);
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cycles += 2; /* TODO: + mv oscillator cycles */
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return 1;
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}
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/* ASR : .... .... 0011 F000 : A-32 */
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@ -1540,7 +1572,10 @@ static size_t dsp56k_op_and(const UINT16 op_byte, typed_pointer* d_register, UIN
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/* AND a word of S with A1|B1 */
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((PAIR64*)D.addr)->w.h = *((UINT16*)S.addr) & ((PAIR64*)D.addr)->w.h;
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d_register->addr = D.addr;
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d_register->data_type = D.data_type;
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/* S L E U N Z V C */
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/* * * - - ? ? 0 - */
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/* TODO: S, L */
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@ -1913,9 +1948,9 @@ static size_t dsp56k_op_bcc_1(const UINT16 op, UINT8* cycles)
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INT16 offset = (INT16)assemble_address_from_6bit_signed_relative_short_address(BITS(op,0x003f));
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PC += 1;
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core.ppc = PC;
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PC += offset;
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change_pc(PC) ;
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cycles += 4;
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@ -2320,8 +2355,23 @@ static size_t dsp56k_op_jscc_1(const UINT16 op, UINT8* cycles)
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/* JSR : 0000 0001 0011 00-- xxxx xxxx xxxx xxxx : A-114 */
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static size_t dsp56k_op_jsr(const UINT16 op, const UINT16 op2, UINT8* cycles)
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{
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/* TODO: It says "signed" absolute offset. Weird. */
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UINT16 branchOffset = op2;
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/* TODO: Verify, since it's not in the docs, but it must be true */
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PC += 2;
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SP++;
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SSH = PC;
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SSL = SR;
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core.ppc = PC;
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PC = branchOffset;
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change_pc(PC);
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/* S L E U N Z V C */
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/* - - - - - - - - */
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cycles += 4; /* TODO: + jx oscillator cycles */
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return 0;
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}
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@ -2452,23 +2502,87 @@ static size_t dsp56k_op_movec(const UINT16 op, UINT8* cycles)
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/* MOVE(C) : 0011 1WDD DDD1 q0RR : A-144 */
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static size_t dsp56k_op_movec_1(const UINT16 op, UINT8* cycles)
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{
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UINT8 W;
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UINT16 memOffset;
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typed_pointer SD = {NULL, DT_BYTE};
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W = BITS(op,0x0400);
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decode_DDDDD_table(BITS(op,0x03e0), &SD);
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memOffset = execute_q_table(BITS(op,0x0003), BITS(op,0x0008));
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if (W)
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{
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/* Write D */
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UINT16 tempData = data_read_word_16le(WORD(memOffset));
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typed_pointer temp_src = { (void*)&tempData, DT_WORD };
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SetDestinationValue(temp_src, SD);
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}
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else
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{
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/* Read S */
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UINT16 tempData = *((UINT16*)SD.addr);
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typed_pointer temp_src = { (void*)&tempData, DT_WORD };
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SetDataMemoryValue(temp_src, WORD(memOffset));
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}
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/* S L E U N Z V C */
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/* * ? ? ? ? ? ? ? */
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/* All ? bits - If SR is specified as a destination operand, set according to the corresponding
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bit of the source operand. If SR is not specified as a destination operand, L is set if data
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limiting occurred. All ? bits are not affected otherwise.*/
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return 0;
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if (W && (SD.addr != &SR))
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{
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/* If you're writing to something other than the SR */
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/* TODO */
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}
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cycles += 2; /* + mvc oscillator clock cycles */
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return 1;
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}
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/* MOVE(C) : 0011 1WDD DDD1 Z11- : A-144 */
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static size_t dsp56k_op_movec_2(const UINT16 op, UINT8* cycles)
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{
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UINT8 W;
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UINT16 memOffset;
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typed_pointer SD = {NULL, DT_BYTE};
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typed_pointer XMemOffset = {NULL, DT_BYTE};
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W = BITS(op,0x0400);
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decode_Z_table(BITS(op,0x0008), &XMemOffset);
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decode_DDDDD_table(BITS(op,0x03e0), &SD);
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memOffset = *((UINT16*)XMemOffset.addr);
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if (W)
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{
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/* Write D */
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UINT16 tempData = data_read_word_16le(WORD(memOffset));
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typed_pointer temp_src = { (void*)&tempData, DT_WORD };
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SetDestinationValue(temp_src, SD);
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}
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else
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{
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/* Read S */
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UINT16 tempData = *((UINT16*)SD.addr);
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typed_pointer temp_src = { (void*)&tempData, DT_WORD };
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SetDataMemoryValue(temp_src, WORD(memOffset));
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}
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/* S L E U N Z V C */
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/* * ? ? ? ? ? ? ? */
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/* All ? bits - If SR is specified as a destination operand, set according to the corresponding
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bit of the source operand. If SR is not specified as a destination operand, L is set if data
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limiting occurred. All ? bits are not affected otherwise.*/
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return 0;
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if (W && (SD.addr != &SR))
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{
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/* If you're writing to something other than the SR */
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/* TODO */
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}
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cycles += 2; /* + mvc oscillator clock cycles */
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return 1;
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}
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/* MOVE(C) : 0011 1WDD DDD1 t10- xxxx xxxx xxxx xxxx : A-144 */
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@ -2803,16 +2917,43 @@ static size_t dsp56k_op_rep_1(const UINT16 op, UINT8* cycles)
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/* S L E U N Z V C */
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/* - * - - - - - - */
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/* TODO */
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/* TODO: L */
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return 1;
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}
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/* REP : 0000 0100 001D DDDD : A-180 */
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static size_t dsp56k_op_rep_2(const UINT16 op, UINT8* cycles)
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{
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/* TODO: This is non-interruptable, probably have to turn off interrupts here */
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UINT16 repValue;
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typed_pointer D = {NULL, DT_BYTE};
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decode_DDDDD_table(BITS(op,0x001f), &D);
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/* TODO: handle special A&B source cases */
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if (D.addr == &A || D.addr == &B)
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logerror("DSP56k ERROR : Rep with A or B instruction not implemented yet!\n");
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repValue = *((UINT16*)D.addr);
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if (repValue != 0)
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{
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TEMP = LC;
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LC = repValue;
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core.repFlag = 1;
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core.repAddr = PC + WORD(1);
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cycles += 4; /* TODO: + mv oscillator clock cycles */
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}
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else
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{
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cycles += 6; /* TODO: + mv oscillator clock cycles */
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}
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/* S L E U N Z V C */
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/* - * - - - - - - */
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return 0;
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/* TODO: L */
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return 1;
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}
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/* REPcc : 0000 0001 0101 cccc : A-184 */
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@ -2834,9 +2975,17 @@ static size_t dsp56k_op_reset(const UINT16 op, UINT8* cycles)
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/* RTI : 0000 0000 0000 0111 : A-194 */
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static size_t dsp56k_op_rti(const UINT16 op, UINT8* cycles)
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{
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core.ppc = PC;
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PC = SSH;
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change_pc(PC);
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SR = SSL;
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SP = SP - 1;
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/* S L E U N Z V C */
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/* - ? ? ? ? ? ? ? */
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/* ? ? ? ? ? ? ? ? */
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/* All ? bits - Set according to value pulled from the stack. */
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cycles += 4; /* TODO: + rx oscillator clock cycles */
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return 0;
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}
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@ -2927,10 +3076,22 @@ static size_t dsp56k_op_tfr3(const UINT16 op, UINT8* cycles)
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/* TST(2) : 0001 0101 0001 -1DD : A-220 */
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static size_t dsp56k_op_tst2(const UINT16 op, UINT8* cycles)
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{
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typed_pointer D = {NULL, DT_BYTE};
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decode_DD_table(BITS(op,0x0003), &D);
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/* S L E U N Z V C */
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/* - * * * * * 0 0 */
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/* (L,E,U should be set to 0) */
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return 0;
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L_bit_set(0);
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E_bit_set(0);
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// U_bit_set(0); /* TODO: Conflicting opinions? "Set if unnormalized." Documentation is weird (A&B?) */
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if ((*((UINT16*)D.addr)) & 0x8000) N_bit_set(1); else N_bit_set(0);
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if ((*((UINT16*)D.addr)) == 0x0000) Z_bit_set(1); else Z_bit_set(0);
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// V_bit_set(0); /* TODO: Verify as well! */
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C_bit_set(0);
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cycles += 2;
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return 1;
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}
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/* WAIT : 0000 0000 0000 1011 : A-222 */
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@ -3193,7 +3354,7 @@ static void decode_RR_table(UINT16 RR, typed_pointer* ret)
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case 0x03: ret->addr = &R3; ret->data_type = DT_WORD; break;
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}
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}
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#ifdef UNUSED_FUNCTION
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static void decode_Z_table(UINT16 Z, typed_pointer* ret)
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{
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switch(Z)
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@ -3203,7 +3364,7 @@ static void decode_Z_table(UINT16 Z, typed_pointer* ret)
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case 0x00: ret->addr = &B1; ret->data_type = DT_WORD; break;
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}
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}
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#endif
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static void execute_m_table(int x, UINT16 m)
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{
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UINT16 *rX = 0x00 ;
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@ -3245,19 +3406,19 @@ static void execute_MM_table(UINT16 rnum, UINT16 MM)
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case 0x3: (*rX) = (*rX)+(*nX) ; break;
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}
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}
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#ifdef UNUSED_FUNCTION
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// Returns R address
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/* Returns R value */
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static UINT16 execute_q_table(int x, UINT16 q)
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{
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UINT16 *rX = 0x00 ;
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UINT16 *nX = 0x00 ;
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UINT16 *rX = 0x0000;
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UINT16 *nX = 0x0000;
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switch(x)
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{
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case 0x0: rX = &R0 ; nX = &N0 ; break ;
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case 0x1: rX = &R1 ; nX = &N1 ; break ;
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case 0x2: rX = &R2 ; nX = &N2 ; break ;
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case 0x3: rX = &R3 ; nX = &N3 ; break ;
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case 0x0: rX = &R0; nX = &N0; break;
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case 0x1: rX = &R1; nX = &N1; break;
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case 0x2: rX = &R2; nX = &N2; break;
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case 0x3: rX = &R3; nX = &N3; break;
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}
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switch(q)
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@ -3266,10 +3427,12 @@ static UINT16 execute_q_table(int x, UINT16 q)
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case 0x1: (*rX)--; return (*rX); break; // This one is special - it's a *PRE-decrement*!
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}
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/* Should not get here */
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exit(1);
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return 0x00;
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}
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#ifdef UNUSED_FUNCTION
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static void execute_z_table(int x, UINT16 z)
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{
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UINT16 *rX = 0x00 ;
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@ -64,6 +64,7 @@ static int init_eeprom_count;
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static UINT32* shared_ram;
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static UINT16* dsp56k_p_mirror;
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static UINT16* dsp56k_p_8000;
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static const UINT16 dsp56k_bank00_size = 0x1000; static UINT16* dsp56k_bank00_ram;
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static const UINT16 dsp56k_bank01_size = 0x1000; static UINT16* dsp56k_bank01_ram;
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static const UINT16 dsp56k_bank02_size = 0x4000; static UINT16* dsp56k_bank02_ram;
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@ -286,6 +287,21 @@ static READ16_HANDLER( dsp56k_bootload_r )
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return 0x7fff;
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}
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static OPBASE_HANDLER( plygonet_dsp56k_opbase_handler )
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{
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if (address >= 0x7000 && address <= 0x7fff)
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{
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opbase->rom = opbase->ram = (void*)(dsp56k_p_mirror - 0x7000);
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return ~0;
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}
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else if (address >= 0x8000 && address <= 0x87ff)
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{
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opbase->rom = opbase->ram = (void*)(dsp56k_p_8000 - 0x8000);
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return ~0;
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}
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return address;
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}
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/* The dsp56k's Port C Data register (0xffe3) :
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Program code (function 4e) configures it as general purpose output I/O pins (ffc1 = 0000 & ffc3 = 0fff).
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@ -465,6 +481,7 @@ static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 32 )
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AM_RANGE(0x580000, 0x5807ff) AM_RAM
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AM_RANGE(0x580800, 0x580803) AM_READWRITE(network_r, SMH_NOP)
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AM_RANGE(0x580800, 0x580803) AM_RAM /* network RAM | registers? */
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// AM_RANGE(0x600000, 0x600000)
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AM_RANGE(0x600004, 0x600007) AM_WRITE(sound_w)
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AM_RANGE(0x600008, 0x60000b) AM_READ(sound_r)
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AM_RANGE(0x640000, 0x640003) AM_WRITE(sound_irq_w)
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@ -477,15 +494,15 @@ ADDRESS_MAP_END
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/**********************************************************************************/
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static ADDRESS_MAP_START( dsp_program_map, ADDRESS_SPACE_PROGRAM, 16 )
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AM_RANGE(0x7000, 0x7fff) AM_RAM AM_BASE(&dsp56k_p_mirror) /* Unsure of size, but this corresponds to bank01 */
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AM_RANGE(0x8000, 0x87ff) AM_RAM
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AM_RANGE(0x7000, 0x7fff) AM_RAM AM_BASE(&dsp56k_p_mirror) /* Unsure of size, but 0x1000 matches bank01 */
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AM_RANGE(0x8000, 0x87ff) AM_RAM AM_BASE(&dsp56k_p_8000)
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AM_RANGE(0xc000, 0xc000) AM_READ(dsp56k_bootload_r)
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ADDRESS_MAP_END
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static ADDRESS_MAP_START( dsp_data_map, ADDRESS_SPACE_DATA, 16 )
|
||||
AM_RANGE(0x0800, 0x5fff) AM_RAM /* Appears to not be affected by banking? */
|
||||
AM_RANGE(0x0800, 0x5fff) AM_RAM /* Appears to not be affected by banking? */
|
||||
AM_RANGE(0x6000, 0x6fff) AM_READWRITE(dsp56k_ram_bank00_read, dsp56k_ram_bank00_write)
|
||||
AM_RANGE(0x7000, 0x7fff) AM_READWRITE(dsp56k_ram_bank01_read, dsp56k_ram_bank01_write)
|
||||
AM_RANGE(0x7000, 0x7fff) AM_READWRITE(dsp56k_ram_bank01_read, dsp56k_ram_bank01_write) /* Mirrored in program space @ 0x8000 */
|
||||
AM_RANGE(0x8000, 0xbfff) AM_READWRITE(dsp56k_ram_bank02_read, dsp56k_ram_bank02_write)
|
||||
AM_RANGE(0xc000, 0xdfff) AM_READWRITE(dsp56k_shared_ram_read, dsp56k_shared_ram_write)
|
||||
AM_RANGE(0xe000, 0xffbf) AM_READWRITE(dsp56k_ram_bank04_read, dsp56k_ram_bank04_write)
|
||||
@ -569,7 +586,7 @@ static MACHINE_DRIVER_START( plygonet )
|
||||
MDRV_CPU_PROGRAM_MAP(main_map, 0)
|
||||
MDRV_CPU_VBLANK_INT_HACK(polygonet_interrupt, 2)
|
||||
|
||||
MDRV_CPU_ADD("dsp", DSP56156, 10000000) /* should be 40.0 MHz/? */
|
||||
MDRV_CPU_ADD("dsp", DSP56156, 10000000) /* xtal is 40.0 MHz */
|
||||
MDRV_CPU_PROGRAM_MAP(dsp_program_map, 0)
|
||||
MDRV_CPU_DATA_MAP(dsp_data_map, 0)
|
||||
|
||||
@ -643,6 +660,9 @@ static DRIVER_INIT(polygonet)
|
||||
memset(dsp56k_bank02_ram, 0, 2 * 8 * dsp56k_bank02_size * sizeof(UINT16));
|
||||
memset(dsp56k_shared_ram_16, 0, 2 * 8 * dsp56k_shared_ram_16_size * sizeof(UINT16));
|
||||
memset(dsp56k_bank04_ram, 0, 2 * 8 * dsp56k_bank04_size * sizeof(UINT16));
|
||||
|
||||
/* The dsp56k occasionally executes out of mapped memory */
|
||||
memory_set_opbase_handler(1, plygonet_dsp56k_opbase_handler);
|
||||
}
|
||||
|
||||
ROM_START( plygonet )
|
||||
|
||||
Loading…
Reference in New Issue
Block a user