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https://github.com/holub/mame
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bus/pci: add Cirrus Logic GD5446 card
This commit is contained in:
parent
d3b9dbf9c9
commit
40bf644661
@ -5494,6 +5494,8 @@ if (BUSES["PCI"]~=null) then
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MAME_DIR .. "src/devices/bus/pci/aha2940au.h",
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MAME_DIR .. "src/devices/bus/pci/aha2940au.h",
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MAME_DIR .. "src/devices/bus/pci/audiowerk2.cpp",
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MAME_DIR .. "src/devices/bus/pci/audiowerk2.cpp",
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MAME_DIR .. "src/devices/bus/pci/audiowerk2.h",
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MAME_DIR .. "src/devices/bus/pci/audiowerk2.h",
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MAME_DIR .. "src/devices/bus/pci/clgd5446.cpp",
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MAME_DIR .. "src/devices/bus/pci/clgd5446.h",
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MAME_DIR .. "src/devices/bus/pci/clgd546x_laguna.cpp",
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MAME_DIR .. "src/devices/bus/pci/clgd546x_laguna.cpp",
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MAME_DIR .. "src/devices/bus/pci/clgd546x_laguna.h",
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MAME_DIR .. "src/devices/bus/pci/clgd546x_laguna.h",
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MAME_DIR .. "src/devices/bus/pci/ds2416.cpp",
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MAME_DIR .. "src/devices/bus/pci/ds2416.cpp",
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145
src/devices/bus/pci/clgd5446.cpp
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145
src/devices/bus/pci/clgd5446.cpp
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@ -0,0 +1,145 @@
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// license:BSD-3-Clause
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// copyright-holders:Angelo Salese
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/**************************************************************************************************
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Cirrus Logic CL-GD5446
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Assume Rev. B
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**************************************************************************************************/
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#include "emu.h"
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#include "clgd5446.h"
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#include "screen.h"
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#define LOG_WARN (1U << 1)
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#define LOG_TODO (1U << 2) // log unimplemented registers
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#define VERBOSE (LOG_GENERAL | LOG_WARN | LOG_TODO)
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//#define LOG_OUTPUT_FUNC osd_printf_info
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#include "logmacro.h"
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#define LOGWARN(...) LOGMASKED(LOG_WARN, __VA_ARGS__)
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#define LOGTODO(...) LOGMASKED(LOG_TODO, __VA_ARGS__)
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DEFINE_DEVICE_TYPE(GD5446_PCI, cirrus_gd5446_pci_device, "clgd5446", "Cirrus Logic GD-5446 card")
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cirrus_gd5446_pci_device::cirrus_gd5446_pci_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
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: pci_card_device(mconfig, GD5446_PCI, tag, owner, clock)
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, m_vga(*this, "svga")
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, m_vga_rom(*this, "vga_rom")
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{
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// subvendor ID: Returns values from ROM 0x7ffc-0x7ffe
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set_ids(0x101300b8, 0x00, 0x030000, 0x10130000);
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}
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ROM_START( gd5446 )
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// Cirrus Logic/Quadtel CL-GD5446 PCI VGA BIOS v1.31, AT27C256R
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// from photoply
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ROM_REGION32_LE( 0x8000, "vga_rom", ROMREGION_ERASEFF )
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ROM_SYSTEM_BIOS( 0, "quadtel", "Quadtel CL-GD5446 1.31" )
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ROMX_LOAD( "cl-gd5446_pci_vga_bios_version_1.31.u2", 0x0000, 0x8000, CRC(61f8cac7) SHA1(6e54aadfe10dfa5c7e417a054e9a64499a99083c), ROM_BIOS(0) )
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// Chip:CL-GD5446-HC-A - ROM: CL-GD5436/46 PCI VGA BIOS Version 1.25 - RAM: 1MB, 2MB, 4MB -
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// OSC: 14.31818MHz - Connector: DB15 - VESA feature connector
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// ROM_SYSTEM_BIOS( 1, "???", "Quadtel CL-GD5446 1.25" )
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// ROMX_LOAD("5446bv.vbi", 0x00000, 0x10000, CRC(7a859659) SHA1(ff667218261969c48082ec12aa91088a01b0cb2a) )
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ROM_END
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const tiny_rom_entry *cirrus_gd5446_pci_device::device_rom_region() const
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{
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return ROM_NAME(gd5446);
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}
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void cirrus_gd5446_pci_device::device_add_mconfig(machine_config &config)
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{
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screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER));
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screen.set_raw(XTAL(25'174'800), 900, 0, 640, 526, 0, 480);
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screen.set_screen_update(m_vga, FUNC(cirrus_gd5446_vga_device::screen_update));
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CIRRUS_GD5446_VGA(config, m_vga, 0);
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m_vga->set_screen("screen");
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// 1MB or 2MB, max 4MB
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m_vga->set_vram_size(4*1024*1024);
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}
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void cirrus_gd5446_pci_device::device_start()
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{
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pci_device::device_start();
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add_map( 32*1024*1024, M_MEM, FUNC(cirrus_gd5446_pci_device::vram_aperture_map));
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// TODO: special in Rev A, can be either M_MEM or M_IO thru CF8 / CF4 / CF3
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//add_map( 4096, M_MEM, FUNC(cirrus_gd5446_pci_device::mmio_map));
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add_map( 512, M_MEM, FUNC(cirrus_gd5446_pci_device::mmio_map));
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// TODO: Rev B do the same, except it just maps GPIO here thru CF8 / CF4
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add_map( 512, M_MEM, FUNC(cirrus_gd5446_pci_device::gpio_map));
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add_rom((u8 *)m_vga_rom->base(), 0x8000);
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expansion_rom_base = 0xc0000;
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// INTA#
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intr_pin = 1;
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}
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void cirrus_gd5446_pci_device::device_reset()
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{
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pci_device::device_reset();
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command = 0x0000;
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command_mask = 0x0023;
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// medium DEVSEL#
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status = 0x0200;
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remap_cb();
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}
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void cirrus_gd5446_pci_device::config_map(address_map &map)
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{
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pci_device::config_map(map);
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}
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void cirrus_gd5446_pci_device::vram_aperture_map(address_map &map)
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{
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map(0x000000, 0x3fffff).rw(m_vga, FUNC(cirrus_gd5446_vga_device::mem_linear_r), FUNC(cirrus_gd5446_vga_device::mem_linear_w));
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}
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void cirrus_gd5446_pci_device::mmio_map(address_map &map)
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{
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}
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void cirrus_gd5446_pci_device::gpio_map(address_map &map)
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{
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}
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// TODO: this should really be a subclass of VGA
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void cirrus_gd5446_pci_device::legacy_memory_map(address_map &map)
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{
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map(0xa0000, 0xbffff).rw(FUNC(cirrus_gd5446_pci_device::vram_r), FUNC(cirrus_gd5446_pci_device::vram_w));
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}
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void cirrus_gd5446_pci_device::legacy_io_map(address_map &map)
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{
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map(0, 0x02f).m(m_vga, FUNC(cirrus_gd5446_vga_device::io_map));
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}
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uint8_t cirrus_gd5446_pci_device::vram_r(offs_t offset)
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{
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return downcast<cirrus_gd5446_vga_device *>(m_vga.target())->mem_r(offset);
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}
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void cirrus_gd5446_pci_device::vram_w(offs_t offset, uint8_t data)
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{
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downcast<cirrus_gd5446_vga_device *>(m_vga.target())->mem_w(offset, data);
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}
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void cirrus_gd5446_pci_device::map_extra(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space,
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uint64_t io_window_start, uint64_t io_window_end, uint64_t io_offset, address_space *io_space)
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{
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{
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memory_space->install_readwrite_handler(0xa0000, 0xbffff, read8sm_delegate(*this, FUNC(cirrus_gd5446_pci_device::vram_r)), write8sm_delegate(*this, FUNC(cirrus_gd5446_pci_device::vram_w)));
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io_space->install_device(0x03b0, 0x03df, *this, &cirrus_gd5446_pci_device::legacy_io_map);
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}
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}
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47
src/devices/bus/pci/clgd5446.h
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47
src/devices/bus/pci/clgd5446.h
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@ -0,0 +1,47 @@
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// license:BSD-3-Clause
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// copyright-holders:Angelo Salese
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#ifndef MAME_BUS_PCI_CLGD5446_H
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#define MAME_BUS_PCI_CLGD5446_H
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#pragma once
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#include "pci_slot.h"
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#include "video/pc_vga_cirrus.h"
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class cirrus_gd5446_pci_device : public pci_card_device
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{
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public:
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cirrus_gd5446_pci_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
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void legacy_memory_map(address_map &map);
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void legacy_io_map(address_map &map);
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protected:
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virtual void device_start() override;
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virtual void device_reset() override;
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virtual void device_add_mconfig(machine_config &config) override;
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virtual const tiny_rom_entry *device_rom_region() const override;
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virtual void map_extra(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space,
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uint64_t io_window_start, uint64_t io_window_end, uint64_t io_offset, address_space *io_space) override;
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virtual void config_map(address_map &map) override;
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virtual void mmio_map(address_map &map);
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virtual void vram_aperture_map(address_map &map);
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virtual void gpio_map(address_map &map);
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private:
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required_device<cirrus_gd5446_vga_device> m_vga;
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required_memory_region m_vga_rom;
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u8 vram_r(offs_t offset);
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void vram_w(offs_t offset, uint8_t data);
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// u32 unmap_log_r(offs_t offset, u32 mem_mask = ~0);
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// void unmap_log_w(offs_t offset, u32 data, u32 mem_mask = ~0);
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};
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DECLARE_DEVICE_TYPE(GD5446_PCI, cirrus_gd5446_pci_device)
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#endif // MAME_BUS_PCI_CLGD546X_LAGUNA_H
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@ -204,13 +204,3 @@ ROM_START( clgd5440 )
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ROM_LOAD("bios.bin", 0x00000, 0x10000, CRC(f0d3d0b4) SHA1(620b0727a20b127f5f32576ec54fbc6f9f437ad3) )
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ROM_LOAD("bios.bin", 0x00000, 0x10000, CRC(f0d3d0b4) SHA1(620b0727a20b127f5f32576ec54fbc6f9f437ad3) )
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ROM_END
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ROM_END
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*/
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*/
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/*
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Cirrus Logic CL-GD5446 - PCI cards
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// Chip:CL-GD5446-HC-A - ROM: CL-GD5436/46 PCI VGA BIOS Version 1.25 - RAM: 1MB, 2MB, 4MB - OSC: 14.31818MHz - Connector: DB15 - VESA feature connector
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ROM_START( clgd5446 )
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ROM_REGION(0x10000, "clgd5446", 0)
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ROM_LOAD("5446bv.vbi", 0x00000, 0x10000, CRC(7a859659) SHA1(ff667218261969c48082ec12aa91088a01b0cb2a) )
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ROM_END
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*/
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@ -8,6 +8,7 @@
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#include "aha2940au.h"
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#include "aha2940au.h"
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#include "audiowerk2.h"
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#include "audiowerk2.h"
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#include "clgd5446.h"
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#include "clgd546x_laguna.h"
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#include "clgd546x_laguna.h"
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#include "ds2416.h"
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#include "ds2416.h"
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#include "ess_maestro.h"
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#include "ess_maestro.h"
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@ -125,6 +126,7 @@ void pci_cards(device_slot_interface &device)
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device.option_add("virgedx", VIRGEDX_PCI);
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device.option_add("virgedx", VIRGEDX_PCI);
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device.option_add("mga2064w", MGA2064W);
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device.option_add("mga2064w", MGA2064W);
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device.option_add("promotion3210", PROMOTION3210);
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device.option_add("promotion3210", PROMOTION3210);
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device.option_add("gd5446", GD5446_PCI);
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device.option_add("oti64111", OTI64111_PCI);
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device.option_add("oti64111", OTI64111_PCI);
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device.option_add("wd9710", WD9710_PCI);
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device.option_add("wd9710", WD9710_PCI);
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