diff --git a/src/emu/cpu/arm7/arm7core.c b/src/emu/cpu/arm7/arm7core.c
index c07ae83e47c..ec55680cdea 100644
--- a/src/emu/cpu/arm7/arm7core.c
+++ b/src/emu/cpu/arm7/arm7core.c
@@ -343,7 +343,8 @@ static UINT32 decodeShift(arm_state *cpustate, UINT32 insn, UINT32 *pCarry)
     UINT32 t  = (insn & INSN_OP2_SHIFT_TYPE) >> INSN_OP2_SHIFT_TYPE_SHIFT;
 
     if ((insn & INSN_OP2_RM) == 0xf) {
-        rm += 8;
+        // "If a register is used to specify the shift amount the PC will be 12 bytes ahead." (instead of 8)
+        rm += t & 1 ? 12 : 8;
     }
 
     /* All shift types ending in 1 are Rk, not #k */
diff --git a/src/emu/cpu/arm7/arm7dasm.c b/src/emu/cpu/arm7/arm7dasm.c
index bc676c8bc5f..7c52e8fa0e0 100644
--- a/src/emu/cpu/arm7/arm7dasm.c
+++ b/src/emu/cpu/arm7/arm7dasm.c
@@ -939,6 +939,11 @@ static UINT32 thumb_disasm( char *pBuf, UINT32 pc, UINT16 opcode )
 							case 0x2: /* MOV */
 								switch( ( opcode & THUMB_HIREG_H ) >> THUMB_HIREG_H_SHIFT )
 								{
+									case 0x0:
+										rs = ( opcode & THUMB_HIREG_RS ) >> THUMB_HIREG_RS_SHIFT;
+										rd = opcode & THUMB_HIREG_RD;
+										pBuf += sprintf( pBuf, "MOV R%d, R%d", rd, rs );
+										break;
 									case 0x1:
 										rs = ( opcode & THUMB_HIREG_RS ) >> THUMB_HIREG_RS_SHIFT;
 										rd = opcode & THUMB_HIREG_RD;
diff --git a/src/emu/cpu/arm7/arm7exec.c b/src/emu/cpu/arm7/arm7exec.c
index 20e31fd4586..5273ae7c659 100644
--- a/src/emu/cpu/arm7/arm7exec.c
+++ b/src/emu/cpu/arm7/arm7exec.c
@@ -580,6 +580,13 @@
                                 case 0x2: /* MOV */
                                     switch ((insn & THUMB_HIREG_H) >> THUMB_HIREG_H_SHIFT)
                                     {
+                                        case 0x0:       // MOV Rd, Rs (undefined)
+                                            // "The action of H1 = 0, H2 = 0 for Op = 00 (ADD), Op = 01 (CMP) and Op = 10 (MOV) is undefined, and should not be used."
+                                            rs = (insn & THUMB_HIREG_RS) >> THUMB_HIREG_RS_SHIFT;
+                                            rd = insn & THUMB_HIREG_RD;
+                                            SET_REGISTER(cpustate, rd, GET_REGISTER(cpustate, rs));
+                                            R15 += 2;
+                                            break;
                                         case 0x1:       // MOV Rd, Hs
                                             rs = (insn & THUMB_HIREG_RS) >> THUMB_HIREG_RS_SHIFT;
                                             rd = insn & THUMB_HIREG_RD;