mirror of
https://github.com/holub/mame
synced 2025-04-20 15:32:45 +03:00
New and completely rewritten emulation of SCN2651 PCI, SCN2661 EPCI & SCN2641 ACI
This is far more thorough and accurate than the preexisting MC2661 device emulation. Synchronous modes have been implemented but not tested.
This commit is contained in:
AJR
parent
e81e74777d
commit
415128cae4
@ -2719,6 +2719,18 @@ if (MACHINES["SCC68070"]~=null) then
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}
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end
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---------------------------------------------------
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--
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--@src/devices/machine/scnxx562.h,MACHINES["SCN_PCI"] = true
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---------------------------------------------------
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if (MACHINES["SCN_PCI"]~=null) then
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files {
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MAME_DIR .. "src/devices/machine/scn_pci.cpp",
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MAME_DIR .. "src/devices/machine/scn_pci.h",
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}
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end
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---------------------------------------------------
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--
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--@src/devices/machine/scnxx562.h,MACHINES["DUSCC"] = true
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@ -602,6 +602,7 @@ MACHINES["S3C24XX"] = true
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--MACHINES["S3C44B0"] = true
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MACHINES["SATURN"] = true
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MACHINES["SCC68070"] = true
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MACHINES["SCN_PCI"] = true
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MACHINES["SCSI"] = true
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MACHINES["SCUDSP"] = true
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MACHINES["SDA2006"] = true
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@ -626,6 +626,7 @@ MACHINES["SATURN"] = true
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MACHINES["SCC68070"] = true
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--MACHINES["SCSI"] = true
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MACHINES["SCC2698B"] = true
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MACHINES["SCN_PCI"] = true
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MACHINES["SCUDSP"] = true
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MACHINES["SECFLASH"] = true
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MACHINES["SEIBU_COP"] = true
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1576
src/devices/machine/scn_pci.cpp
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1576
src/devices/machine/scn_pci.cpp
Normal file
File diff suppressed because it is too large
Load Diff
285
src/devices/machine/scn_pci.h
Normal file
285
src/devices/machine/scn_pci.h
Normal file
@ -0,0 +1,285 @@
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// license:BSD-3-Clause
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// copyright-holders:AJR
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/***************************************************************************
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Signetics SCN2651 Programmable Communications Interface (PCI)
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Signetics SCN2661A/B/C Enhanced Programmable Communications Interface
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Signetics SCN2641 Asynchronous Communications Interface
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****************************************************************************
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_____ _____
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D2 1 |* \_/ | 28 D1
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D3 2 | | 27 D0
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RxD 3 | | 26 Vcc
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GND 4 | | 25 _RxC/BKDET
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D4 5 | | 24 _DTR
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D5 6 | | 23 _RTS
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D6 7 | SCN2651 | 22 _DSR
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D7 8 | SCN2661 | 21 RESET
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_TxC 9 | SCN68661 | 20 BRCLK
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A1 10 | | 19 TxD
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_CE 11 | | 18 _TxEMT/DSCHG
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A0 12 | | 17 _CTS
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_R/W 13 | | 16 _DCD
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_RxRDY 14 |_____________| 15 _TxRDY
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_____ _____
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D3 1 |* \_/ | 24 D2
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RxD 2 | | 23 D1
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GND 3 | | 22 D0
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D4 4 | | 21 Vcc
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D5 5 | | 20 _RxC/BKDET
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D6 6 | | 19 _RTS
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D7 7 | SCN2641 | 18 RESET
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_TxC 8 | | 17 BRCLK
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A1 9 | | 16 TxD
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_CE 10 | | 15 _CTS
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A0 11 | | 14 _DCD
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_R/W 12 |_____________| 13 _INTR
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***************************************************************************/
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#ifndef MAME_MACHINE_SCN_PCI_H
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#define MAME_MACHINE_SCN_PCI_H
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#pragma once
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//**************************************************************************
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// TYPE DEFINITIONS
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//**************************************************************************
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// ======================> scn_pci_device
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class scn_pci_device : public device_t
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{
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public:
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// callback configuration
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auto dtr_handler() { return m_dtr_callback.bind(); }
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auto rts_handler() { return m_rts_callback.bind(); }
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auto txemt_dschg_handler() { return m_txemt_dschg_callback.bind(); }
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auto txc_handler() { return m_txc_callback.bind(); }
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auto rxc_handler() { return m_rxc_callback.bind(); }
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auto txd_handler() { return m_txd_callback.bind(); }
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auto txrdy_handler() { return m_txrdy_callback.bind(); }
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auto rxrdy_handler() { return m_rxrdy_callback.bind(); }
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// microprocessor interface
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u8 read(offs_t offset);
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void write(offs_t offset, u8 data);
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// line write handlers
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DECLARE_WRITE_LINE_MEMBER(rxd_w);
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DECLARE_WRITE_LINE_MEMBER(dsr_w);
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DECLARE_WRITE_LINE_MEMBER(dcd_w);
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DECLARE_WRITE_LINE_MEMBER(cts_w);
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DECLARE_WRITE_LINE_MEMBER(txc_w);
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DECLARE_WRITE_LINE_MEMBER(rxc_w);
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// output polling
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DECLARE_READ_LINE_MEMBER(txrdy_r) { assert(!m_is_aci); return BIT(m_status, 0) ? 0 : 1; }
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DECLARE_READ_LINE_MEMBER(rxrdy_r) { assert(!m_is_aci); return BIT(m_status, 1) ? 0 : 1; }
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DECLARE_READ_LINE_MEMBER(txemt_dschg_r) { assert(!m_is_aci); return BIT(m_status, 2) != 0 ? 0 : 1; }
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protected:
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enum class rcvr_state : u8 {
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DISABLED,
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ASYNC_WAIT,
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ASYNC_START,
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HUNT_MODE,
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HUNT_SYN2,
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SYNCED,
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BREAK_DETECT
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};
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enum class xmtr_state : u8 {
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MARKING,
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DATA_BITS,
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STOP_BITS,
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SYN1,
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SYN2
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};
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// construction/destruction
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scn_pci_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, const u16 *br_div, bool is_enhanced, bool is_aci);
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// device-level overrides
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virtual void device_resolve_objects() override;
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virtual void device_start() override;
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virtual void device_reset() override;
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// receiver helpers
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virtual void set_rxrdy(bool state);
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void rx_load_async(u8 data, bool pe, bool fe);
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void rx_load_sync(u8 data, bool pe);
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u8 read_rhr();
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void rcvr_sync();
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void rcvr_update(bool internal, bool output_1x);
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// transmitter helpers
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void set_txd(bool state);
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virtual void set_txrdy(bool state);
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virtual void set_txemt(bool state);
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void write_thr(u8 data);
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void loopback_retransmit(u8 data);
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void tx_load(u8 data);
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void xmtr_update(bool internal, bool output_1x);
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// modem control helpers
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virtual void set_dschg(bool state);
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void set_dtr(bool state);
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void set_rts(bool state);
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// mode setting helpers
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void write_syn(u8 data);
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u8 read_mode();
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void write_mode(u8 data);
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// other helpers
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u8 read_status();
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u8 read_command();
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void write_command(u8 data);
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TIMER_CALLBACK_MEMBER(brg_tick);
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// static tables
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static const u16 s_br_divisors_1[16];
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static const u16 s_br_divisors_2[16];
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static const u16 s_br_divisors_3[16];
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static const char *const s_stop_bit_desc[4];
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// callback objects
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devcb_write_line m_dtr_callback;
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devcb_write_line m_rts_callback;
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devcb_write_line m_txemt_dschg_callback;
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devcb_write_line m_txc_callback;
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devcb_write_line m_rxc_callback;
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devcb_write_line m_txd_callback;
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devcb_write_line m_txrdy_callback;
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devcb_write_line m_rxrdy_callback;
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// constant parameters
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const u16 *const m_br_div;
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const bool m_is_enhanced;
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const bool m_is_aci;
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// baud rate timer
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emu_timer *m_brg_timer;
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// primary registers
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u8 m_rhr;
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u8 m_thr;
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u8 m_status;
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u8 m_syn[3];
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u8 m_mode[2];
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u8 m_command;
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// initialization pointers
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u8 m_mode_pointer;
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u8 m_syn_pointer;
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// input line states
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bool m_rxd;
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bool m_cts;
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bool m_txc_input;
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bool m_rxc_input;
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// receiver state
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u16 m_rsr;
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u8 m_rbits;
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bool m_rparity;
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rcvr_state m_rcvr_state;
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u8 m_rcvr_clocks;
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bool m_null_frame_received;
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bool m_pre_syndet;
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// transmitter state
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u8 m_tsr;
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u8 m_tbits;
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bool m_tparity;
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xmtr_state m_xmtr_state;
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u8 m_xmtr_clocks;
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bool m_txd;
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bool m_thr_loaded;
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bool m_txemt;
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// misc. status
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bool m_dschg;
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bool m_dtr;
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bool m_rts;
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bool m_syn1_parity;
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bool m_brg_output;
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};
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// ======================> scn2651_device
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class scn2651_device : public scn_pci_device
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{
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public:
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// device type constructor
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scn2651_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
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};
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// ======================> scn2661a_device
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class scn2661a_device : public scn_pci_device
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{
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public:
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// device type constructor
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scn2661a_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
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};
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// ======================> scn2661b_device
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class scn2661b_device : public scn_pci_device
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{
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public:
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// device type constructor
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scn2661b_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
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};
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// ======================> scn2661c_device
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class scn2661c_device : public scn_pci_device
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{
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public:
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// device type constructor
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scn2661c_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
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};
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// ======================> scn2641_device
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class scn2641_device : public scn_pci_device
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{
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public:
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// device type constructor
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scn2641_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
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// callback configuration
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auto intr_handler() { return m_intr_callback.bind(); }
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// output polling
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DECLARE_READ_LINE_MEMBER(intr_r) { return (m_status & 0x07) != 0 ? 0 : 1; }
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protected:
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// device-level overrides
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virtual void device_validity_check(validity_checker &valid) const override;
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virtual void device_resolve_objects() override;
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// scn_pci_device overrides
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virtual void set_rxrdy(bool state) override;
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virtual void set_txrdy(bool state) override;
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virtual void set_txemt(bool state) override;
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virtual void set_dschg(bool state) override;
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private:
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static const u16 s_br_divisors[16];
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devcb_write_line m_intr_callback;
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};
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DECLARE_DEVICE_TYPE(SCN2651, scn2651_device)
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DECLARE_DEVICE_TYPE(SCN2661A, scn2661a_device)
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DECLARE_DEVICE_TYPE(SCN2661B, scn2661b_device)
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DECLARE_DEVICE_TYPE(SCN2661C, scn2661c_device)
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DECLARE_DEVICE_TYPE(SCN2641, scn2641_device)
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#endif // MAME_MACHINE_SCN_PCI_H
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