Fixed incorrect MUL number of cycles

This commit is contained in:
Angelo Salese 2009-06-19 19:44:06 +00:00
parent f6943c73e9
commit 41b154bf46

View File

@ -1908,7 +1908,7 @@ static void HC11OP(mul)(hc11_state *cpustate)
REG_D = (UINT8)REG_A * (UINT8)REG_B;
CLEAR_C(cpustate);
cpustate->ccr |= (REG_B & 0x80) ? CC_C : 0;
CYCLES(cpustate, 3);
CYCLES(cpustate, 10);
}
/* PSHA 0x36 */