Device validation fixes: all the rest (nw)

This commit is contained in:
AJR 2017-03-03 12:17:44 -05:00
parent bf9276a63f
commit 41d94a28b0
11 changed files with 16 additions and 32 deletions

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@ -340,7 +340,7 @@ e116xs_device::e116xs_device(const machine_config &mconfig, const char *tag, dev
//-------------------------------------------------
e116xsr_device::e116xsr_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: hyperstone_device(mconfig, "E1-16XSR", tag, owner, clock, E116XT, 16, 16, ADDRESS_MAP_NAME(e116_16k_iram_map), "e116xsr", __FILE__)
: hyperstone_device(mconfig, "E1-16XSR", tag, owner, clock, E116XSR, 16, 16, ADDRESS_MAP_NAME(e116_16k_iram_map), "e116xsr", __FILE__)
{
}

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@ -1762,17 +1762,17 @@ psxcpu_device::psxcpu_device( const machine_config &mconfig, device_type type, c
}
cxd8530aq_device::cxd8530aq_device( const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock )
: psxcpu_device( mconfig, CXD8661R, "CXD8530AQ", tag, owner, clock, "cxd8530aq", __FILE__ )
: psxcpu_device( mconfig, CXD8530AQ, "CXD8530AQ", tag, owner, clock, "cxd8530aq", __FILE__ )
{
}
cxd8530bq_device::cxd8530bq_device( const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock )
: psxcpu_device( mconfig, CXD8661R, "CXD8530BQ", tag, owner, clock, "cxd8530bq", __FILE__ )
: psxcpu_device( mconfig, CXD8530BQ, "CXD8530BQ", tag, owner, clock, "cxd8530bq", __FILE__ )
{
}
cxd8530cq_device::cxd8530cq_device( const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock )
: psxcpu_device( mconfig, CXD8661R, "CXD8530CQ", tag, owner, clock, "cxd8530cq", __FILE__ )
: psxcpu_device( mconfig, CXD8530CQ, "CXD8530CQ", tag, owner, clock, "cxd8530cq", __FILE__ )
{
}

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@ -179,29 +179,13 @@ enum
****************************************************************************/
tms9995_device::tms9995_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: cpu_device(mconfig, TMS9995, "TMS9995", tag, owner, clock, "tms9995", __FILE__),
m_state_any(0),
PC(0),
PC_debug(0),
m_program_config("program", ENDIANNESS_BIG, 8, 16),
m_io_config("cru", ENDIANNESS_BIG, 8, 16),
m_prgspace(nullptr),
m_cru(nullptr),
m_external_operation(*this),
m_iaq_line(*this),
m_clock_out_line(*this),
m_holda_line(*this),
m_dbin_line(*this)
: tms9995_device(mconfig, TMS9995, "TMS9995", tag, owner, clock, "tms9995", __FILE__)
{
m_mp9537 = false;
m_check_overflow = false;
}
/*
Called from subclass.
*/
tms9995_device::tms9995_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source)
: cpu_device(mconfig, TMS9995, name, tag, owner, clock, shortname, source),
: cpu_device(mconfig, type, name, tag, owner, clock, shortname, source),
m_state_any(0),
PC(0),
PC_debug(0),

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@ -26,7 +26,7 @@ DEVICE_ADDRESS_MAP_START(config_map, 32, i82439tx_host_device)
ADDRESS_MAP_END
i82439tx_host_device::i82439tx_host_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: pci_host_device(mconfig, I82439TX_NEW, "i82439tx northbridge", tag, owner, clock, "i82439tx", __FILE__)
: pci_host_device(mconfig, I82439TX_NEW, "i82439tx northbridge", tag, owner, clock, "i82439tx_new", __FILE__)
{
}

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@ -91,7 +91,7 @@ WRITE16_MEMBER( ide_controller_device::write_cs1 )
const device_type IDE_CONTROLLER_32 = device_creator<ide_controller_32_device>;
ide_controller_32_device::ide_controller_32_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
ide_controller_device(mconfig, IDE_CONTROLLER, "IDE Controller (32 bit)", tag, owner, clock, "ide_controller32", __FILE__)
ide_controller_device(mconfig, IDE_CONTROLLER_32, "IDE Controller (32 bit)", tag, owner, clock, "ide_controller32", __FILE__)
{
}

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@ -557,7 +557,7 @@ void netlist_mame_logic_output_t::device_start()
// ----------------------------------------------------------------------------------------
netlist_mame_int_input_t::netlist_mame_int_input_t(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: device_t(mconfig, NETLIST_INT_INPUT, "Netlist Integer Input", tag, owner, clock, "netlist_logic_input", __FILE__),
: device_t(mconfig, NETLIST_INT_INPUT, "Netlist Integer Input", tag, owner, clock, "netlist_int_input", __FILE__),
netlist_mame_sub_interface(*owner),
m_param(nullptr),
m_mask(0xffffffff),

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@ -183,7 +183,7 @@ z80sio_device::z80sio_device(const machine_config &mconfig, const char *tag, dev
}
upd7201N_device::upd7201N_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: z80sio_device(mconfig, UPD7201N, "UPD 7201", tag, owner, clock, TYPE_UPD7201, "upd7201", __FILE__){ }
: z80sio_device(mconfig, UPD7201N, "UPD 7201", tag, owner, clock, TYPE_UPD7201, "upd7201n", __FILE__){ }
//-------------------------------------------------
// device_start - device-specific startup

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@ -613,7 +613,7 @@ mos8564_device::mos8564_device(const machine_config &mconfig, const char *tag, d
:mos6567_device(mconfig, MOS8564, "MOS8564", tag, owner, clock, TYPE_8564, "mos8564", __FILE__) { }
mos6569_device::mos6569_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
:mos6566_device(mconfig, MOS6566, "MOS6569", tag, owner, clock, TYPE_6569, "mos6569", __FILE__) { }
:mos6566_device(mconfig, MOS6569, "MOS6569", tag, owner, clock, TYPE_6569, "mos6569", __FILE__) { }
mos6569_device::mos6569_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, uint32_t variant, const char *shortname, const char *source)
:mos6566_device(mconfig, type, name, tag, owner, clock, variant, shortname, source) { }

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@ -129,7 +129,7 @@ v9938_device::v9938_device(const machine_config &mconfig, const char *tag, devic
}
v9958_device::v9958_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: v99x8_device(mconfig, V9938, "V9958 VDP", "v9958", tag, owner, clock)
: v99x8_device(mconfig, V9958, "V9958 VDP", "v9958", tag, owner, clock)
{
m_model = MODEL_V9958;
}

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@ -322,7 +322,7 @@ void apollo_csr_set_status_register(uint16_t mask, uint16_t data);
#define MCFG_APOLLO_SIO_OUTPORT_CALLBACK(_cb) \
devcb = &apollo_sio::set_outport_cb(*device, DEVCB_##_cb);
class apollo_sio: public mc68681_device
class apollo_sio: public mc68681_base_device
{
public:
apollo_sio(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);

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@ -714,7 +714,7 @@ TIMER_CALLBACK_MEMBER( apollo_state::apollo_rtc_timer )
apollo_sio::apollo_sio(const machine_config &mconfig, const char *tag,
device_t *owner, uint32_t clock) :
mc68681_device(mconfig, tag, owner, clock),
mc68681_base_device(mconfig, APOLLO_SIO, "DN3000/DS3500 SIO", tag, owner, clock, "apollo_sio", __FILE__),
m_csrb(0),
m_ip6(0)
{
@ -745,7 +745,7 @@ READ8_MEMBER( apollo_sio::read )
"1X/16X Test", "RHRB", "IVR", "Input Ports", "Start Counter",
"Stop Counter" };
int data = mc68681_device::read(space, offset/2, mem_mask);
int data = mc68681_base_device::read(space, offset/2, mem_mask);
switch (offset / 2)
{
@ -805,7 +805,7 @@ WRITE8_MEMBER( apollo_sio::write )
break;
#endif
}
mc68681_device::write(space, offset/2, data, mem_mask);
mc68681_base_device::write(space, offset/2, data, mem_mask);
}
// device type definition