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https://github.com/holub/mame
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(MESS) Altos5: added terminal back (z80dart isn't quite ready yet)
This commit is contained in:
Robbbert
parent
ca191571d0
commit
428f19b5c6
@ -11,6 +11,8 @@
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#include "machine/z80pio.h"
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#include "machine/z80dart.h"
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#include "machine/z80dma.h"
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#include "machine/serial.h"
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#include "machine/terminal.h"
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class altos5_state : public driver_device
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@ -21,23 +23,35 @@ public:
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m_maincpu(*this, "maincpu"),
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m_pio0(*this, "z80pio_0"),
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m_pio1(*this, "z80pio_1"),
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m_sio1(*this, "z80sio_1"),
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m_sio2(*this, "z80sio_2"),
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m_ctc(*this, "z80ctc")
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m_dart(*this, "z80dart"),
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m_sio (*this, "z80sio"),
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m_ctc (*this, "z80ctc"),
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m_terminal(*this, TERMINAL_TAG)
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{ }
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DECLARE_READ8_MEMBER(memory_read_byte);
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DECLARE_WRITE8_MEMBER(memory_write_byte);
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DECLARE_READ8_MEMBER(io_read_byte);
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DECLARE_WRITE8_MEMBER(io_write_byte);
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DECLARE_READ8_MEMBER(port08_r);
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DECLARE_READ8_MEMBER(port09_r);
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DECLARE_WRITE8_MEMBER(port08_w);
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DECLARE_WRITE8_MEMBER(port09_w);
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DECLARE_DRIVER_INIT(altos5);
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DECLARE_WRITE8_MEMBER(kbd_put);
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DECLARE_READ8_MEMBER(port2e_r);
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DECLARE_READ8_MEMBER(port2f_r);
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UINT8 m_term_data;
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UINT8 m_port08;
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UINT8 m_port09;
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virtual void machine_reset();
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required_device<cpu_device> m_maincpu;
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required_device<z80pio_device> m_pio0;
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required_device<z80pio_device> m_pio1;
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required_device<z80sio0_device> m_sio1;
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required_device<z80sio0_device> m_sio2;
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required_device<z80dart_device> m_dart;
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optional_device<z80dart_device> m_sio;
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required_device<z80ctc_device> m_ctc;
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required_device<generic_terminal_device> m_terminal;
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};
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static ADDRESS_MAP_START(altos5_mem, AS_PROGRAM, 8, altos5_state)
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@ -54,8 +68,11 @@ static ADDRESS_MAP_START(altos5_io, AS_IO, 8, altos5_state)
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AM_RANGE(0x0c, 0x0f) AM_DEVREADWRITE("z80ctc", z80ctc_device, read, write)
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AM_RANGE(0x10, 0x13) AM_DEVREADWRITE("z80pio_1", z80pio_device, read, write)
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//AM_RANGE(0x14, 0x17) AM_WRITE(romoff_w)
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AM_RANGE(0x1c, 0x1f) AM_DEVREADWRITE("z80sio_1", z80sio0_device, cd_ba_r, cd_ba_w)
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AM_RANGE(0x2c, 0x2f) AM_DEVREADWRITE("z80sio_2", z80sio0_device, cd_ba_r, cd_ba_w)
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AM_RANGE(0x1c, 0x1f) AM_DEVREADWRITE("z80dart", z80dart_device, ba_cd_r, ba_cd_w)
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//AM_RANGE(0x20, 0x23) // Hard drive
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AM_RANGE(0x2c, 0x2d) AM_NOP
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AM_RANGE(0x2e, 0x2e) AM_READ(port2e_r) AM_DEVWRITE(TERMINAL_TAG, generic_terminal_device, write)
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AM_RANGE(0x2f, 0x2f) AM_READ(port2f_r) AM_WRITENOP
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ADDRESS_MAP_END
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/* Input ports */
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@ -73,11 +90,52 @@ static const z80_daisy_config daisy_chain_intf[] =
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{ "z80pio_0" },
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{ "z80pio_1" },
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{ "z80ctc" },
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{ "z80sio_1" },
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{ "z80sio_2" },
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{ "z80dart" },
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// { "z80sio" },
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{ NULL }
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};
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/*
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d0: L = a HD is present
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d1: L = a 2nd hard drive is present
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d2: unused configuration input (must be H to skip HD boot)
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d3: selected floppy is single(L) or double sided(H)
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d7: IRQ from FDC
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*/
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READ8_MEMBER( altos5_state::port08_r )
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{
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return m_port08 | 0x87;
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}
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/*
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d0: HD IRQ
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*/
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READ8_MEMBER( altos5_state::port09_r )
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{
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return m_port09 | 0x01;
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}
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/*
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d4: DDEN (H = double density
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d5: DS (H = drive 2)
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d6: SS (H = side 2)
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*/
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WRITE8_MEMBER( altos5_state::port08_w )
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{
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m_port08 = data;
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}
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/*
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d1, 2: Memory Map template selection (0 = diag; 1 = oasis; 2 = mp/m)
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d3, 4: CPU bank select
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d5: H = Write protect of common area
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d6, 7: DMA bank select
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*/
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WRITE8_MEMBER( altos5_state::port09_w )
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{
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m_port09 = data;
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}
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READ8_MEMBER(altos5_state::memory_read_byte)
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{
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address_space& prog_space = m_maincpu->space(AS_PROGRAM);
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@ -113,15 +171,29 @@ static Z80DMA_INTERFACE( dma_intf )
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DEVCB_DRIVER_MEMBER(altos5_state, io_write_byte)
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};
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// baud rate generator and RTC. All inputs are 2MHz.
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static Z80CTC_INTERFACE( ctc_intf )
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{
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DEVCB_CPU_INPUT_LINE("maincpu", INPUT_LINE_IRQ0), // interrupt callback
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DEVCB_NULL, /* ZC/TO0 callback - SIO channel A clock */
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DEVCB_NULL, /* ZC/TO1 callback - SIO channel B clock */
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DEVCB_NULL,//DRIVER_LINE_MEMBER(altos5_state, pcm_82_w) /* ZC/TO2 callback - speaker */
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DEVCB_NULL, /* ZC/TO0 callback - SIO Ch B */
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DEVCB_NULL, /* ZC/TO1 callback - Z80DART Ch A, SIO Ch A */
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DEVCB_NULL, /* ZC/TO2 callback - Z80DART Ch B */
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};
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static Z80PIO_INTERFACE( pio0_intf ) // all pins go to expansion socket
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// system functions
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static Z80PIO_INTERFACE( pio0_intf )
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{
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DEVCB_CPU_INPUT_LINE("maincpu", INPUT_LINE_IRQ0), // interrupt callback
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DEVCB_DRIVER_MEMBER(altos5_state, port08_r), /* read port A */
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DEVCB_DRIVER_MEMBER(altos5_state, port08_w), /* write port A */
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DEVCB_NULL, /* portA ready active callback */
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DEVCB_DRIVER_MEMBER(altos5_state, port09_r), /* read port B */
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DEVCB_DRIVER_MEMBER(altos5_state, port09_w), /* write port B */
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DEVCB_NULL /* portB ready active callback */
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};
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// parallel port
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static Z80PIO_INTERFACE( pio1_intf )
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{
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DEVCB_CPU_INPUT_LINE("maincpu", INPUT_LINE_IRQ0), // interrupt callback
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DEVCB_NULL, /* read port A */
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@ -132,21 +204,12 @@ static Z80PIO_INTERFACE( pio0_intf ) // all pins go to expansion socket
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DEVCB_NULL /* portB ready active callback */
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};
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static Z80PIO_INTERFACE( pio1_intf )
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{
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DEVCB_CPU_INPUT_LINE("maincpu", INPUT_LINE_IRQ0), // interrupt callback
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DEVCB_NULL,//DEVICE_MEMBER(K7659_KEYBOARD_TAG, k7659_keyboard_device, read), /* read port A */
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DEVCB_NULL, /* write port A */
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DEVCB_NULL, /* portA ready active callback */
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DEVCB_NULL,//DRIVER_MEMBER(altos5_state, pcm_85_r), /* read port B */
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DEVCB_NULL,//DRIVER_MEMBER(altos5_state, pcm_85_w), /* write port B */
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DEVCB_NULL /* portB ready active callback */
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};
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static Z80SIO_INTERFACE( sio1_intf )
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// serial printer and console#3
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static Z80DART_INTERFACE( dart_intf )
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{
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0, 0, 0, 0,
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// console#3
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DEVCB_NULL,
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DEVCB_NULL,
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DEVCB_NULL,
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@ -154,6 +217,7 @@ static Z80SIO_INTERFACE( sio1_intf )
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DEVCB_NULL,
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DEVCB_NULL,
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// printer
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DEVCB_NULL,
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DEVCB_NULL,
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DEVCB_NULL,
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@ -161,29 +225,13 @@ static Z80SIO_INTERFACE( sio1_intf )
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DEVCB_NULL,
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DEVCB_NULL,
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DEVCB_CPU_INPUT_LINE("maincpu", INPUT_LINE_IRQ0),
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DEVCB_NULL,
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DEVCB_NULL,
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DEVCB_NULL,
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DEVCB_NULL
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};
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static Z80SIO_INTERFACE( sio2_intf )
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{
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0, 0, 0, 0,
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DEVCB_NULL,
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DEVCB_NULL,
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DEVCB_NULL,
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DEVCB_NULL,
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DEVCB_NULL,
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DEVCB_NULL,
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DEVCB_NULL,
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DEVCB_NULL,
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DEVCB_NULL,
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DEVCB_NULL,
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DEVCB_NULL,
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DEVCB_NULL,
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DEVCB_NULL
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};
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DRIVER_INIT_MEMBER( altos5_state, altos5 )
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{
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@ -191,6 +239,28 @@ DRIVER_INIT_MEMBER( altos5_state, altos5 )
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membank("bank1")->configure_entries(0, 2, &RAM[0], 0x10000);
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}
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READ8_MEMBER( altos5_state::port2e_r )
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{
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UINT8 ret = m_term_data;
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m_term_data = 0;
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return ret;
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}
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READ8_MEMBER( altos5_state::port2f_r )
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{
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return (m_term_data) ? 13 : 12;
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}
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WRITE8_MEMBER( altos5_state::kbd_put )
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{
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m_term_data = data;
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}
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static GENERIC_TERMINAL_INTERFACE( terminal_intf )
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{
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DEVCB_DRIVER_MEMBER(altos5_state, kbd_put)
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};
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static MACHINE_CONFIG_START( altos5, altos5_state )
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/* basic machine hardware */
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MCFG_CPU_ADD("maincpu", Z80, XTAL_8MHz / 2)
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@ -199,14 +269,14 @@ static MACHINE_CONFIG_START( altos5, altos5_state )
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MCFG_CPU_CONFIG(daisy_chain_intf)
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/* video hardware */
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MCFG_GENERIC_TERMINAL_ADD(TERMINAL_TAG, terminal_intf)
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/* Devices */
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MCFG_Z80DMA_ADD( "z80dma", XTAL_8MHz / 2, dma_intf)
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MCFG_Z80DMA_ADD( "z80dma", XTAL_8MHz / 2, dma_intf)
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MCFG_Z80PIO_ADD( "z80pio_0", XTAL_8MHz / 2, pio0_intf )
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MCFG_Z80PIO_ADD( "z80pio_1", XTAL_8MHz / 2, pio1_intf )
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MCFG_Z80SIO0_ADD("z80sio_1", XTAL_8MHz / 2, sio1_intf )
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MCFG_Z80SIO0_ADD("z80sio_2", XTAL_8MHz / 2, sio2_intf )
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MCFG_Z80CTC_ADD( "z80ctc", XTAL_8MHz / 2, ctc_intf )
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MCFG_Z80CTC_ADD( "z80ctc", XTAL_8MHz / 2, ctc_intf )
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MCFG_Z80DART_ADD("z80dart", XTAL_8MHz / 2, dart_intf )
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MACHINE_CONFIG_END
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@ -217,11 +287,64 @@ ROM_START( altos5 )
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ROM_FILL(0x10054, 2, 0) // temp until banking sorted out
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ROM_FILL(0x10344, 3, 0) // kill self test
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ROM_REGION( 0x200, "user1", 0 )
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ROM_LOAD("82s141.bin", 0x0000, 0x0200, CRC(35c8078c) SHA1(dce24374bfcc5d23959e2c03485d82a119c0c3c9)) // looks like a keyboard matrix
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ROM_REGION( 0x200, "proms", 0 )
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ROM_LOAD("82s141.bin", 0x0000, 0x0200, CRC(35c8078c) SHA1(dce24374bfcc5d23959e2c03485d82a119c0c3c9)) // banking control
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ROM_END
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/* Driver */
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/* YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME FLAGS */
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COMP(1982, altos5, 0, 0, altos5, altos5, altos5_state, altos5, "Altos", "Altos 5-15", GAME_NOT_WORKING | GAME_NO_SOUND)
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#if 0
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/****************** UNUSED SERIAL CODE ************************/
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//AM_RANGE(0x2c, 0x2f) AM_DEVREADWRITE("z80sio", z80dart_device, ba_cd_r, ba_cd_w)
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static Z80SIO_INTERFACE( sio_intf )
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{
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9600, 9600, 153600, 153600, // rxa, txa, rxb, txb clocks (from CTC)
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// console#2
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DEVCB_NULL, // ChA in data
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DEVCB_NULL, // out data
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DEVCB_NULL, // DTR
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DEVCB_NULL, // RTS
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DEVCB_NULL, // WRDY
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DEVCB_NULL, // SYNC
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// console#1
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DEVCB_DEVICE_LINE_MEMBER("rs232", serial_port_device, rx),
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DEVCB_DEVICE_LINE_MEMBER("rs232", serial_port_device, tx),
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DEVCB_DEVICE_LINE_MEMBER("rs232", rs232_port_device, dtr_w),
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DEVCB_DEVICE_LINE_MEMBER("rs232", rs232_port_device, rts_w),
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DEVCB_NULL,
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DEVCB_NULL,
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DEVCB_CPU_INPUT_LINE("maincpu", INPUT_LINE_IRQ0),
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DEVCB_NULL, // unused DRQ pins
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DEVCB_NULL,
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DEVCB_NULL,
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DEVCB_NULL
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};
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static const rs232_port_interface rs232_intf =
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{
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// all outputs
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DEVCB_NULL,//DEVCB_DEVICE_LINE_MEMBER("z80sio", z80dart_device, rxcb_w), // data
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DEVCB_NULL, // DCD
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DEVCB_NULL, // DSR
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DEVCB_NULL, // RI
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DEVCB_NULL //DEVCB_DEVICE_LINE_MEMBER("z80sio", z80dart_device, ctsb_w) // CTS
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};
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//MCFG_Z80SIO0_ADD("z80sio", XTAL_8MHz / 2, sio_intf )
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//MCFG_RS232_PORT_ADD("rs232", rs232_intf, default_rs232_devices, "serial_terminal")
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#endif
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