Enable GCC implicit fallthrough warning.

I've guessed whether break or [[fallthrough]] is appropriate.  In cases
where it looked particularly suspicious, I added a FIXME comment.  All
of these changes should be reviewed by someone familiar with the code.
This commit is contained in:
Vas Crabb 2020-11-15 03:58:54 +11:00
parent f191d038ec
commit 4298ce18fb
89 changed files with 305 additions and 216 deletions

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@ -1078,6 +1078,12 @@ end
print("GCC version 7.0 or later needed") print("GCC version 7.0 or later needed")
os.exit(-1) os.exit(-1)
end end
buildoptions_cpp {
"-Wimplicit-fallthrough",
}
buildoptions_objcpp {
"-Wimplicit-fallthrough",
}
buildoptions { buildoptions {
"-Wno-unused-result", -- needed for fgets,fread on linux "-Wno-unused-result", -- needed for fgets,fread on linux
-- array bounds checking seems to be buggy in 4.8.1 (try it on video/stvvdp1.c and video/model1.c without -Wno-array-bounds) -- array bounds checking seems to be buggy in 4.8.1 (try it on video/stvvdp1.c and video/model1.c without -Wno-array-bounds)

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@ -225,6 +225,11 @@ configuration { "gmake or ninja" }
buildoptions_cpp { buildoptions_cpp {
"-x c++", "-x c++",
} }
if _OPTIONS["gcc"]~=nil and not string.find(_OPTIONS["gcc"], "clang") then
buildoptions_cpp {
"-Wno-error=implicit-fallthrough",
}
end
configuration { "vs*" } configuration { "vs*" }
buildoptions { buildoptions {

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@ -130,6 +130,7 @@ void atapi_cdrom_device::ExecCommand()
m_transfer_length = 0; m_transfer_length = 0;
return; return;
} }
[[fallthrough]];
default: default:
if(m_media_change) if(m_media_change)
{ {

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@ -230,6 +230,7 @@ uint8_t bbc_opus8272_device::read(offs_t offset)
case 0x06: case 0x06:
if (m_floppy0->get_device()) m_floppy0->get_device()->mon_w(1); if (m_floppy0->get_device()) m_floppy0->get_device()->mon_w(1);
if (m_floppy1->get_device()) m_floppy1->get_device()->mon_w(1); if (m_floppy1->get_device()) m_floppy1->get_device()->mon_w(1);
[[fallthrough]];
case 0x04: case 0x04:
data = m_fdc->msr_r(); data = m_fdc->msr_r();
break; break;
@ -237,6 +238,7 @@ uint8_t bbc_opus8272_device::read(offs_t offset)
case 0x05: case 0x05:
if (m_floppy0->get_device()) m_floppy0->get_device()->mon_w(0); if (m_floppy0->get_device()) m_floppy0->get_device()->mon_w(0);
if (m_floppy1->get_device()) m_floppy1->get_device()->mon_w(0); if (m_floppy1->get_device()) m_floppy1->get_device()->mon_w(0);
[[fallthrough]];
case 0x07: case 0x07:
data = m_fdc->fifo_r(); data = m_fdc->fifo_r();
break; break;
@ -262,6 +264,7 @@ void bbc_opus8272_device::write(offs_t offset, uint8_t data)
case 0x05: case 0x05:
if (m_floppy0->get_device()) m_floppy0->get_device()->mon_w(0); if (m_floppy0->get_device()) m_floppy0->get_device()->mon_w(0);
if (m_floppy1->get_device()) m_floppy1->get_device()->mon_w(0); if (m_floppy1->get_device()) m_floppy1->get_device()->mon_w(0);
[[fallthrough]];
case 0x07: case 0x07:
m_fdc->fifo_w(data); m_fdc->fifo_w(data);
break; break;

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@ -126,6 +126,7 @@ uint8_t electron_plus2_device::expbus_r(offs_t offset)
case 13: case 13:
data &= m_cart[0]->read(offset & 0x3fff, 0, 0, m_romsel & 0x01, 0, 1); data &= m_cart[0]->read(offset & 0x3fff, 0, 0, m_romsel & 0x01, 0, 1);
data &= m_cart[1]->read(offset & 0x3fff, 0, 0, m_romsel & 0x01, 0, 1); data &= m_cart[1]->read(offset & 0x3fff, 0, 0, m_romsel & 0x01, 0, 1);
[[fallthrough]];
case 14: case 14:
case 15: case 15:
data &= m_rom[m_romsel - 13]->read_rom(offset & 0x3fff); data &= m_rom[m_romsel - 13]->read_rom(offset & 0x3fff);

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@ -201,6 +201,7 @@ uint8_t electron_romboxp_device::expbus_r(offs_t offset)
case 13: case 13:
data &= m_cart[0]->read(offset & 0x3fff, 0, 0, m_romsel & 0x01, 0, 1); data &= m_cart[0]->read(offset & 0x3fff, 0, 0, m_romsel & 0x01, 0, 1);
data &= m_cart[1]->read(offset & 0x3fff, 0, 0, m_romsel & 0x01, 0, 1); data &= m_cart[1]->read(offset & 0x3fff, 0, 0, m_romsel & 0x01, 0, 1);
[[fallthrough]];
case 14: case 14:
case 15: case 15:
if (m_rom_base == 12) if (m_rom_base == 12)
@ -274,6 +275,7 @@ void electron_romboxp_device::expbus_w(offs_t offset, uint8_t data)
case 13: case 13:
m_cart[0]->write(offset & 0x3fff, data, 0, 0, m_romsel & 0x01, 0, 1); m_cart[0]->write(offset & 0x3fff, data, 0, 0, m_romsel & 0x01, 0, 1);
m_cart[1]->write(offset & 0x3fff, data, 0, 0, m_romsel & 0x01, 0, 1); m_cart[1]->write(offset & 0x3fff, data, 0, 0, m_romsel & 0x01, 0, 1);
[[fallthrough]];
case 14: case 14:
case 15: case 15:
if (m_rom_base == 12) if (m_rom_base == 12)

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@ -220,6 +220,7 @@ void gb_rom_tama5_device::write_ram(offs_t offset, uint8_t data)
case 0x40: /* Unknown, some kind of read */ case 0x40: /* Unknown, some kind of read */
if ((m_tama5_addr & 0x1f) == 0x12) if ((m_tama5_addr & 0x1f) == 0x12)
m_tama5_data = 0xff; m_tama5_data = 0xff;
[[fallthrough]];
case 0x80: /* Unknown, some kind of read (when 07=01)/write (when 07=00/02) */ case 0x80: /* Unknown, some kind of read (when 07=01)/write (when 07=00/02) */
default: default:
logerror( "%s Unknown addressing mode\n", machine().describe_context() ); logerror( "%s Unknown addressing mode\n", machine().describe_context() );

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@ -301,6 +301,7 @@ uint32_t gba_rom_device::read_gpio(offs_t offset, uint32_t mem_mask)
} }
if (ACCESSING_BITS_16_31) if (ACCESSING_BITS_16_31)
return m_gpio_regs[1] << 16; return m_gpio_regs[1] << 16;
[[fallthrough]];
case 1: case 1:
if (ACCESSING_BITS_0_15) if (ACCESSING_BITS_0_15)
return m_gpio_regs[2]; return m_gpio_regs[2];

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@ -245,6 +245,7 @@ void el2_3c503_device::el2_3c503_hiport_w(offs_t offset, uint8_t data) {
default: default:
logerror("3c503: trying to set multiple drqs %X\n", data); logerror("3c503: trying to set multiple drqs %X\n", data);
} }
break;
case 9: case 9:
if(m_regs.ctrl & 0x80) logerror("3c503: changing dma address during dma is undefined\n"); if(m_regs.ctrl & 0x80) logerror("3c503: changing dma address during dma is undefined\n");
m_regs.da = (data << 8) | (m_regs.da & 0xff); m_regs.da = (data << 8) | (m_regs.da & 0xff);

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@ -502,6 +502,7 @@ uint8_t gf1_device::global_reg_data_r(offs_t offset)
m_dma_irq_handler(0); m_dma_irq_handler(0);
return ret; return ret;
} }
break;
case 0x45: // Timer control case 0x45: // Timer control
if(offset == 1) if(offset == 1)
return m_timer_ctrl & 0x0c; return m_timer_ctrl & 0x0c;
@ -509,15 +510,18 @@ uint8_t gf1_device::global_reg_data_r(offs_t offset)
case 0x49: // Sampling control case 0x49: // Sampling control
if(offset == 1) if(offset == 1)
return m_sampling_ctrl & 0xe7; return m_sampling_ctrl & 0xe7;
break;
case 0x4c: // Reset case 0x4c: // Reset
if(offset == 1) if(offset == 1)
return m_reset; return m_reset;
break;
case 0x80: // Voice control case 0x80: // Voice control
/* bit 0 - 1 if voice is stopped /* bit 0 - 1 if voice is stopped
* bit 6 - 1 if addresses are decreasing, can change when looping is enabled * bit 6 - 1 if addresses are decreasing, can change when looping is enabled
* bit 7 - 1 if Wavetable IRQ is pending */ * bit 7 - 1 if Wavetable IRQ is pending */
if(offset == 1) if(offset == 1)
return m_voice[m_current_voice].voice_ctrl & 0xff; return m_voice[m_current_voice].voice_ctrl & 0xff;
break;
case 0x81: // Frequency Control case 0x81: // Frequency Control
ret = m_voice[m_current_voice].freq_ctrl; ret = m_voice[m_current_voice].freq_ctrl;
if(offset == 0) if(offset == 0)
@ -551,12 +555,15 @@ uint8_t gf1_device::global_reg_data_r(offs_t offset)
case 0x86: // Volume Ramp rate case 0x86: // Volume Ramp rate
if(offset == 1) if(offset == 1)
return m_voice[m_current_voice].vol_ramp_rate; return m_voice[m_current_voice].vol_ramp_rate;
break;
case 0x87: // Volume Ramp start (high 4 bits = exponent, low 4 bits = mantissa) case 0x87: // Volume Ramp start (high 4 bits = exponent, low 4 bits = mantissa)
if(offset == 1) if(offset == 1)
return m_voice[m_current_voice].vol_ramp_start; return m_voice[m_current_voice].vol_ramp_start;
break;
case 0x88: // Volume Ramp end (high 4 bits = exponent, low 4 bits = mantissa) case 0x88: // Volume Ramp end (high 4 bits = exponent, low 4 bits = mantissa)
if(offset == 1) if(offset == 1)
return m_voice[m_current_voice].vol_ramp_end; return m_voice[m_current_voice].vol_ramp_end;
break;
case 0x89: // Current Volume (high 4 bits = exponent, middle 8 bits = mantissa, low 4 bits = 0 [reserved]) case 0x89: // Current Volume (high 4 bits = exponent, middle 8 bits = mantissa, low 4 bits = 0 [reserved])
ret = m_voice[m_current_voice].current_vol; ret = m_voice[m_current_voice].current_vol;
if(offset == 0) if(offset == 0)
@ -578,15 +585,18 @@ uint8_t gf1_device::global_reg_data_r(offs_t offset)
case 0x8c: // Pan position (4 bits, 0=full left, 15=full right) case 0x8c: // Pan position (4 bits, 0=full left, 15=full right)
if(offset == 1) if(offset == 1)
return m_voice[m_current_voice].pan_position; return m_voice[m_current_voice].pan_position;
break;
case 0x8d: // Volume Ramp control case 0x8d: // Volume Ramp control
/* bit 0 - Ramp has stopped /* bit 0 - Ramp has stopped
* bit 6 - Ramp direction * bit 6 - Ramp direction
* bit 7 - Ramp IRQ pending */ * bit 7 - Ramp IRQ pending */
if(offset == 1) if(offset == 1)
return m_voice[m_current_voice].vol_ramp_ctrl; return m_voice[m_current_voice].vol_ramp_ctrl;
break;
case 0x8e: // Active voices (6 bits, high 2 bits are always 1) case 0x8e: // Active voices (6 bits, high 2 bits are always 1)
if(offset == 1) if(offset == 1)
return (m_active_voices - 1) | 0xc0; return (m_active_voices - 1) | 0xc0;
break;
case 0x8f: // IRQ source register case 0x8f: // IRQ source register
if(offset == 1) if(offset == 1)
{ {

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@ -224,6 +224,7 @@ void mcd_isa_device::cmd_w(uint8_t data)
{ {
case 5: case 5:
m_readmsf = 0; m_readmsf = 0;
[[fallthrough]];
case 4: case 4:
case 3: case 3:
m_readmsf |= bcd_2_dec(data) << ((m_cmdrd_count - 3) * 8); m_readmsf |= bcd_2_dec(data) << ((m_cmdrd_count - 3) * 8);

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@ -194,8 +194,10 @@ WRITE_LINE_MEMBER( isa8_myb3k_fdc471x_device_base::drq_w )
{ {
case 1: case 1:
m_isa->drq1_w(state); m_isa->drq1_w(state);
[[fallthrough]]; // FIXME: really?
case 2: case 2:
m_isa->drq2_w(state); m_isa->drq2_w(state);
[[fallthrough]]; // FIXME: really?
default: default:
break; break;
} }

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@ -556,6 +556,7 @@ void sb_device::process_fifo(uint8_t cmd)
{ {
case 0x0f: // read asp reg case 0x0f: // read asp reg
queue_r(0); queue_r(0);
[[fallthrough]];
case 0x0e: // write asp reg case 0x0e: // write asp reg
case 0x02: // get asp version case 0x02: // get asp version
case 0x04: // set asp mode register case 0x04: // set asp mode register

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@ -237,6 +237,7 @@ void nes_cony_device::write_h(offs_t offset, uint8_t data)
{ {
case 0x0000: case 0x0000:
m_latch1 = 1; m_latch1 = 1;
[[fallthrough]];
case 0x3000: case 0x3000:
case 0x30ff: case 0x30ff:
case 0x31ff: case 0x31ff:
@ -283,6 +284,7 @@ void nes_cony_device::write_h(offs_t offset, uint8_t data)
case 0x0314: case 0x0314:
case 0x0315: case 0x0315:
m_latch2 = 1; m_latch2 = 1;
[[fallthrough]];
case 0x0310: case 0x0310:
case 0x0311: case 0x0311:
case 0x0316: case 0x0316:

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@ -775,6 +775,7 @@ void nes_pikay2k_device::write_h(offs_t offset, uint8_t data)
case 0x2000: case 0x2000:
m_reg[0] = 0; m_reg[0] = 0;
[[fallthrough]];
default: default:
txrom_write(offset, data); txrom_write(offset, data);
break; break;

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@ -1770,6 +1770,7 @@ void nes_bmc_ball11_device::write_h(offs_t offset, uint8_t data)
{ {
case 0x4000: // here we also update reg[0] upper bit case 0x4000: // here we also update reg[0] upper bit
m_reg[0] = (m_reg[0] & 0x01) | ((data >> 3) & 0x02); m_reg[0] = (m_reg[0] & 0x01) | ((data >> 3) & 0x02);
[[fallthrough]];
case 0x0000: case 0x0000:
case 0x2000: case 0x2000:
case 0x6000: case 0x6000:

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@ -454,10 +454,12 @@ uint8_t nes_namcot340_device::n340_loread(offs_t offset)
{ {
case 0x1000: case 0x1000:
return m_irq_count & 0xff; return m_irq_count & 0xff;
set_irq_line(CLEAR_LINE); set_irq_line(CLEAR_LINE); // FIXME: unreachable
[[fallthrough]];
case 0x1800: case 0x1800:
return (m_irq_count >> 8) & 0xff; return (m_irq_count >> 8) & 0xff;
set_irq_line(CLEAR_LINE); set_irq_line(CLEAR_LINE); // FIXME: unreachable
[[fallthrough]];
default: default:
return 0x00; return 0x00;
} }

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@ -372,6 +372,7 @@ void nes_cart_slot_device::call_load_ines()
case 0x8: // it's iNES 2.0 format case 0x8: // it's iNES 2.0 format
ines20 = true; ines20 = true;
[[fallthrough]];
case 0x0: case 0x0:
default: default:
mapper |= header[7] & 0xf0; mapper |= header[7] & 0xf0;
@ -840,6 +841,7 @@ const char * nes_cart_slot_device::get_default_card_ines(get_default_card_softwa
case 0x8: // it's iNES 2.0 format case 0x8: // it's iNES 2.0 format
ines20 = true; ines20 = true;
[[fallthrough]];
case 0x0: case 0x0:
default: default:
mapper |= ROM[7] & 0xf0; mapper |= ROM[7] & 0xf0;

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@ -1204,7 +1204,7 @@ void nes_cityfight_device::write_h(offs_t offset, uint8_t data)
case 0x4008: case 0x4008:
case 0x400c: case 0x400c:
m_prg_mode = data & 1; m_prg_mode = data & 1;
[[fallthrough]];
case 0x7000: case 0x7000:
m_irq_count = (m_irq_count & 0x1e0) | ((data & 0x0f) << 1); m_irq_count = (m_irq_count & 0x1e0) | ((data & 0x0f) << 1);
break; break;

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@ -214,6 +214,7 @@ void pce_tennokoe_device::write_cart(offs_t offset, uint8_t data)
// TODO: lock/unlock mechanism is a complete guess, needs real HW study // TODO: lock/unlock mechanism is a complete guess, needs real HW study
// (writes to ports $c0000, $d0000, $f0000) // (writes to ports $c0000, $d0000, $f0000)
m_bram_locked = (data == 0); m_bram_locked = (data == 0);
[[fallthrough]];
default: default:
logerror("tennokoe: ROM writing at %06x %02x\n",offset,data); logerror("tennokoe: ROM writing at %06x %02x\n",offset,data);
break; break;

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@ -229,6 +229,7 @@ void hle_device_base::tra_complete()
m_y_delta); m_y_delta);
//break; uncommenting this causes problems with early versions of Solaris //break; uncommenting this causes problems with early versions of Solaris
} }
[[fallthrough]];
case 1U: case 1U:
LOG("Sent %s (B=%X->%x X=%d Y=%d) - sending X delta\n", LOG("Sent %s (B=%X->%x X=%d Y=%d) - sending X delta\n",
(1U == m_phase) ? "button state" : "Y delta", (1U == m_phase) ? "button state" : "Y delta",

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@ -128,6 +128,7 @@ uint8_t dpc_device::read(offs_t offset)
return m_shift_reg; return m_shift_reg;
case 0x04: // Sound value, MOVAMT value AND'd with Draw Line Carry; with Draw Line Add case 0x04: // Sound value, MOVAMT value AND'd with Draw Line Carry; with Draw Line Add
m_latch_62 = m_latch_64; m_latch_62 = m_latch_64;
[[fallthrough]];
case 0x06: // Sound value, MOVAMT value AND'd with Draw Line Carry; without Draw Line Add case 0x06: // Sound value, MOVAMT value AND'd with Draw Line Carry; without Draw Line Add
m_latch_64 = m_latch_62 + m_df[4].top; m_latch_64 = m_latch_62 + m_df[4].top;
m_dlc = (m_latch_62 + m_df[4].top > 0xff) ? 1 : 0; m_dlc = (m_latch_62 + m_df[4].top > 0xff) ? 1 : 0;

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@ -360,6 +360,7 @@ void ws_rom_sram_device::write_io(offs_t offset, uint8_t data)
{ {
case 0x01: // SRAM bank to select case 0x01: // SRAM bank to select
m_nvram_base = (data * 0x10000) & (m_nvram.size() - 1); m_nvram_base = (data * 0x10000) & (m_nvram.size() - 1);
[[fallthrough]];
default: default:
ws_rom_device::write_io(offset, data); ws_rom_device::write_io(offset, data);
break; break;

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@ -1831,7 +1831,7 @@ void dp8344_device::store_result()
write_register(m_latched_instr & 0x001f, m_source_data); write_register(m_latched_instr & 0x001f, m_source_data);
break; break;
} }
[[fallthrough]]; // FIXME: really?
case 0xe000: case 0xe000:
if (BIT(m_latched_instr, 11)) if (BIT(m_latched_instr, 11))
m_source_data = sub_nzcv(m_source_data, read_accumulator(), BIT(m_latched_instr, 10) && BIT(m_ccr, 1)); m_source_data = sub_nzcv(m_source_data, read_accumulator(), BIT(m_latched_instr, 10) && BIT(m_ccr, 1));

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@ -599,6 +599,7 @@ void ccpu_cpu_device::execute_run()
/* CST */ /* CST */
case 0xf7: case 0xf7:
m_watchdog = 0; m_watchdog = 0;
[[fallthrough]];
/* ADDP */ /* ADDP */
case 0xe7: case 0xe7:
tempval = RDMEM(m_I); tempval = RDMEM(m_I);

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@ -860,7 +860,7 @@ inline void cosmac_device::run_state()
{ {
case cosmac_state::STATE_0_FETCH: case cosmac_state::STATE_0_FETCH:
m_op = 0; m_op = 0;
[[fallthrough]];
case cosmac_state::STATE_0_FETCH_2ND: case cosmac_state::STATE_0_FETCH_2ND:
fetch_instruction(); fetch_instruction();
break; break;
@ -872,7 +872,7 @@ inline void cosmac_device::run_state()
case cosmac_state::STATE_1_EXECUTE: case cosmac_state::STATE_1_EXECUTE:
sample_ef_lines(); sample_ef_lines();
[[fallthrough]];
case cosmac_state::STATE_1_EXECUTE_2ND: case cosmac_state::STATE_1_EXECUTE_2ND:
execute_instruction(); execute_instruction();
debug(); debug();

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@ -613,10 +613,11 @@ inline void dspp_device::set_rbase(uint32_t base, uint32_t addr)
case 0: case 0:
m_core->m_rbase[0] = addr; m_core->m_rbase[0] = addr;
m_core->m_rbase[1] = addr + 4 - base; m_core->m_rbase[1] = addr + 4 - base;
[[fallthrough]];
// Intentional fall-through // Intentional fall-through
case 8: case 8:
m_core->m_rbase[2] = addr + 8 - base; m_core->m_rbase[2] = addr + 8 - base;
[[fallthrough]];
case 12: case 12:
m_core->m_rbase[3] = addr + 12 - base; m_core->m_rbase[3] = addr + 12 - base;
break; break;

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@ -86,11 +86,11 @@ bool dspp_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
{ {
case 0: case 0:
describe_special(op, desc); describe_special(op, desc);
[[fallthrough]]; // FIXME: really?
case 1: case 1:
case 2: case 2:
describe_branch(op, desc); describe_branch(op, desc);
[[fallthrough]]; // FIXME: really?
case 3: case 3:
describe_complex_branch(op, desc); describe_complex_branch(op, desc);
} }

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@ -362,7 +362,6 @@ std::string i8089_disassembler::do_disassemble()
else if (m_wb == 2) else if (m_wb == 2)
return util::string_format("lcall %s, %05x", off, m_pc + (int16_t) i); return util::string_format("lcall %s, %05x", off, m_pc + (int16_t) i);
} }
else
return invalid(); return invalid();
case 0x28: return inst_rm("addb", "add"); case 0x28: return inst_rm("addb", "add");

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@ -850,6 +850,7 @@ void i80286_cpu_device::code_descriptor(uint16_t selector, uint16_t offset, int
if (SEGDESC(r) || (GATE(r) != TSSDESCIDLE)) if (SEGDESC(r) || (GATE(r) != TSSDESCIDLE))
throw TRAP(FAULT_GP,IDXTBL(selector)); throw TRAP(FAULT_GP,IDXTBL(selector));
[[fallthrough]];
case TSSDESCIDLE: case TSSDESCIDLE:
switch_task(selector, gate); switch_task(selector, gate);
load_flags(CompressFlags(), CPL); load_flags(CompressFlags(), CPL);
@ -1888,7 +1889,7 @@ reg.base = BASE(desc); (void)(r); reg.limit = LIMIT(desc); }
break; break;
} }
} }
[[fallthrough]];
default: default:
if(!common_op(op)) if(!common_op(op))
{ {

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@ -1748,7 +1748,7 @@ void m68000_base_device::fmovem(u16 w2)
case 1: // Dynamic register list, postincrement or control addressing mode. case 1: // Dynamic register list, postincrement or control addressing mode.
// FIXME: not really tested, but seems to work // FIXME: not really tested, but seems to work
reglist = REG_D()[(reglist >> 4) & 7]; reglist = REG_D()[(reglist >> 4) & 7];
[[fallthrough]];
case 0: // Static register list, predecrement or control addressing mode case 0: // Static register list, predecrement or control addressing mode
{ {
for (i=0; i < 8; i++) for (i=0; i < 8; i++)
@ -1807,7 +1807,7 @@ void m68000_base_device::fmovem(u16 w2)
case 3: // Dynamic register list, predecrement addressing mode. case 3: // Dynamic register list, predecrement addressing mode.
// FIXME: not really tested, but seems to work // FIXME: not really tested, but seems to work
reglist = REG_D()[(reglist >> 4) & 7]; reglist = REG_D()[(reglist >> 4) & 7];
[[fallthrough]];
case 2: // Static register list, postincrement or control addressing mode case 2: // Static register list, postincrement or control addressing mode
{ {
for (i=0; i < 8; i++) for (i=0; i < 8; i++)

View File

@ -1050,6 +1050,7 @@ void m68851_pmove_put(u32 ea, u16 modes)
pmmu_atc_flush(); pmmu_atc_flush();
} }
} }
[[fallthrough]];
case 1: case 1:
logerror("680x0: unknown PMOVE case 1, PC %x\n", m_pc); logerror("680x0: unknown PMOVE case 1, PC %x\n", m_pc);
break; break;

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@ -5211,6 +5211,7 @@ void mips3_device::execute_run()
machine().debug_break(); machine().debug_break();
break; break;
} }
[[fallthrough]];
case 0x31: /* LWC1 */ case 0x31: /* LWC1 */
if (!(SR & SR_COP1)) if (!(SR & SR_COP1))
{ {
@ -5233,6 +5234,7 @@ void mips3_device::execute_run()
machine().debug_break(); machine().debug_break();
break; break;
} }
[[fallthrough]];
case 0x35: /* LDC1 */ case 0x35: /* LDC1 */
if (!(SR & SR_COP1)) if (!(SR & SR_COP1))
{ {

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@ -155,6 +155,7 @@ bool mips3_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
case 0x22: // LWL case 0x22: // LWL
case 0x26: // LWR case 0x26: // LWR
desc.regin[0] |= REGFLAG_R(RTREG); desc.regin[0] |= REGFLAG_R(RTREG);
[[fallthrough]];
case 0x20: // LB case 0x20: // LB
case 0x21: // LH case 0x21: // LH
case 0x23: // LW case 0x23: // LW

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@ -978,7 +978,7 @@ void r4000_base_device::cpu_execute(u32 const op)
m_icache_tag[(ADDR(m_r[RSREG], s16(op)) & m_icache_mask_hi) >> m_icache_shift] &= ~ICACHE_V; m_icache_tag[(ADDR(m_r[RSREG], s16(op)) & m_icache_mask_hi) >> m_icache_shift] &= ~ICACHE_V;
break; break;
} }
[[fallthrough]];
case 0x04: // index load tag (I) case 0x04: // index load tag (I)
if (ICACHE) if (ICACHE)
{ {
@ -989,7 +989,7 @@ void r4000_base_device::cpu_execute(u32 const op)
break; break;
} }
[[fallthrough]];
case 0x08: // index store tag (I) case 0x08: // index store tag (I)
if (ICACHE) if (ICACHE)
{ {
@ -999,7 +999,7 @@ void r4000_base_device::cpu_execute(u32 const op)
break; break;
} }
[[fallthrough]];
case 0x01: // index writeback invalidate (D) case 0x01: // index writeback invalidate (D)
case 0x02: // index invalidate (SI) case 0x02: // index invalidate (SI)
case 0x03: // index writeback invalidate (SD) case 0x03: // index writeback invalidate (SD)
@ -1891,6 +1891,7 @@ void r5000_device::cp1_execute(u32 const op)
return; return;
} }
} }
[[fallthrough]];
case 0x11: // D case 0x11: // D
switch (op & 0x3f) switch (op & 0x3f)
{ {

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@ -551,6 +551,7 @@ void pdp1_device::device_start()
{ {
default: default:
m_extend_support = 0; m_extend_support = 0;
[[fallthrough]];
case 0: /* no extension */ case 0: /* no extension */
m_extended_address_mask = 07777; m_extended_address_mask = 07777;
m_address_extension_mask = 00000; m_address_extension_mask = 00000;

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@ -711,6 +711,7 @@ bool ppc_device::frontend::describe_1f(uint32_t op, opcode_desc &desc, const opc
case 0x136: // ECIWX case 0x136: // ECIWX
if (!(m_ppc.m_cap & PPCCAP_VEA)) if (!(m_ppc.m_cap & PPCCAP_VEA))
return false; return false;
[[fallthrough]];
case 0x014: // LWARX case 0x014: // LWARX
case 0x017: // LWZX case 0x017: // LWZX
case 0x057: // LBZX case 0x057: // LBZX
@ -920,6 +921,7 @@ bool ppc_device::frontend::describe_1f(uint32_t op, opcode_desc &desc, const opc
case 0x1b6: // ECOWX case 0x1b6: // ECOWX
if (!(m_ppc.m_cap & PPCCAP_VEA)) if (!(m_ppc.m_cap & PPCCAP_VEA))
return false; return false;
[[fallthrough]];
case 0x096: // STWCX. case 0x096: // STWCX.
case 0x097: // STWX case 0x097: // STWX
case 0x0d7: // STBX case 0x0d7: // STBX
@ -1339,6 +1341,7 @@ bool ppc_device::frontend::describe_3f(uint32_t op, opcode_desc &desc, const opc
case 0x00e: // FCTIWx case 0x00e: // FCTIWx
case 0x00f: // FCTIWZx case 0x00f: // FCTIWZx
FPSCR_MODIFIED(desc, 4); FPSCR_MODIFIED(desc, 4);
[[fallthrough]];
case 0x028: // FNEGx case 0x028: // FNEGx
case 0x048: // FMRx case 0x048: // FMRx
case 0x088: // FNABSx case 0x088: // FNABSx

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@ -1022,6 +1022,7 @@ void tlcs90_device::decode()
if (b0 == 0xfe) { if (b0 == 0xfe) {
OPCC( LDI+b1-0x58,14,18 ) NONE( 1 ) NONE( 2 ) return; OPCC( LDI+b1-0x58,14,18 ) NONE( 1 ) NONE( 2 ) return;
} }
[[fallthrough]]; // FIXME: really?
case 0x60: // ADD A,g case 0x60: // ADD A,g
case 0x61: // ADC A,g case 0x61: // ADC A,g
@ -2776,6 +2777,7 @@ TIMER_CALLBACK_MEMBER( tlcs90_device::t90_timer_callback )
case 0x03: // 8bit PWM case 0x03: // 8bit PWM
logerror("CPU Timer %d expired with unhandled mode %d\n", i, mode); logerror("CPU Timer %d expired with unhandled mode %d\n", i, mode);
// TODO: hmm... // TODO: hmm...
[[fallthrough]]; // FIXME: really?
case 0x00: // 8bit case 0x00: // 8bit
m_timer_value[i]++; m_timer_value[i]++;
if ( m_timer_value[i] == m_treg_8bit[i] ) if ( m_timer_value[i] == m_treg_8bit[i] )

View File

@ -877,7 +877,7 @@ void tlcs90_disassembler::decode()
if (b0 == 0xfe) { if (b0 == 0xfe) {
OPCC( LDI+b1-0x58,14,18 ) NONE( 1 ) NONE( 2 ) return; OPCC( LDI+b1-0x58,14,18 ) NONE( 1 ) NONE( 2 ) return;
} }
[[fallthrough]]; // FIXME: really?
case 0x60: // ADD A,g case 0x60: // ADD A,g
case 0x61: // ADC A,g case 0x61: // ADC A,g
case 0x62: // SUB A,g case 0x62: // SUB A,g

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@ -585,6 +585,7 @@ void tms7000_device::tms7000_pf_w(offs_t offset, uint8_t data)
logerror("%s: CMOS low-power halt mode enabled\n", tag()); logerror("%s: CMOS low-power halt mode enabled\n", tag());
} }
data &= ~0x20; data &= ~0x20;
[[fallthrough]];
case 0x13: case 0x13:
// d0-d4: prescaler reload value // d0-d4: prescaler reload value
// d5: t2: cascade from t1 // d5: t2: cascade from t1

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@ -702,7 +702,7 @@ void z8_device::t1_trigger()
case Z8_TMR_TIN_TRIGGER: case Z8_TMR_TIN_TRIGGER:
if (m_internal_timer[1]->enabled()) if (m_internal_timer[1]->enabled())
break; break;
[[fallthrough]];
case Z8_TMR_TIN_RETRIGGER: case Z8_TMR_TIN_RETRIGGER:
if ((m_tmr & Z8_TMR_ENABLE_T1) != 0) if ((m_tmr & Z8_TMR_ENABLE_T1) != 0)
{ {

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@ -140,6 +140,7 @@ void cdp1879_device::write(offs_t offset, uint8_t data)
m_regs[offset + 6] = data; m_regs[offset + 6] = data;
break; break;
} }
[[fallthrough]];
case R_CNT_DAYOFMONTH: case R_CNT_DAYOFMONTH:
case R_CNT_MONTH: case R_CNT_MONTH:
m_regs[offset] = data; m_regs[offset] = data;

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@ -235,6 +235,7 @@ void ds1994_device::ds1994_rom_cmd(void)
case ROMCMD_SEARCHINT: case ROMCMD_SEARCHINT:
verboselog(0, "timer_main rom_command not implemented %02x\n", m_shift); verboselog(0, "timer_main rom_command not implemented %02x\n", m_shift);
m_state[m_state_ptr] = STATE_COMMAND; m_state[m_state_ptr] = STATE_COMMAND;
break;
default: default:
verboselog(0, "timer_main rom_command not found %02x\n", m_shift); verboselog(0, "timer_main rom_command not found %02x\n", m_shift);
m_state[m_state_ptr] = STATE_IDLE; m_state[m_state_ptr] = STATE_IDLE;

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@ -682,7 +682,7 @@ void fga002_device::write(offs_t offset, uint8_t data){
case FGA_DMA_GENERAL : LOG("FGA_DMA_GENERAL - not implemented\n"); m_fga002[FGA_DMA_GENERAL] = data; break; case FGA_DMA_GENERAL : LOG("FGA_DMA_GENERAL - not implemented\n"); m_fga002[FGA_DMA_GENERAL] = data; break;
case FGA_CTL12 : LOG("FGA_CTL12 - not implemented\n"); m_fga002[FGA_CTL12] = data; break; case FGA_CTL12 : LOG("FGA_CTL12 - not implemented\n"); m_fga002[FGA_CTL12] = data; break;
case FGA_LIOTIMING : LOG("FGA_LIOTIMING - not implemented\n"); m_fga002[FGA_LIOTIMING] = data; break; case FGA_LIOTIMING : LOG("FGA_LIOTIMING - not implemented\n"); m_fga002[FGA_LIOTIMING] = data; break;
case FGA_LOCALIACK : do_fga002reg_localiack_w(data); case FGA_LOCALIACK : do_fga002reg_localiack_w(data); break;
case FGA_FMBCTL : LOG("FGA_FMBCTL - not implemented\n"); m_fga002[FGA_FMBCTL] = data; break; case FGA_FMBCTL : LOG("FGA_FMBCTL - not implemented\n"); m_fga002[FGA_FMBCTL] = data; break;
case FGA_FMBAREA : LOG("FGA_FMBAREA - not implemented\n"); m_fga002[FGA_FMBAREA] = data; break; case FGA_FMBAREA : LOG("FGA_FMBAREA - not implemented\n"); m_fga002[FGA_FMBAREA] = data; break;
case FGA_AUXSRCSTART : LOG("FGA_AUXSRCSTART - not implemented\n"); m_fga002[FGA_AUXSRCSTART] = data; break; case FGA_AUXSRCSTART : LOG("FGA_AUXSRCSTART - not implemented\n"); m_fga002[FGA_AUXSRCSTART] = data; break;

View File

@ -754,12 +754,14 @@ void i8271_device::start_command(int cmd)
switch(cmd) { switch(cmd) {
case C_READ_DATA_SINGLE: case C_READ_DATA_SINGLE:
command[3] = 1; command[3] = 1;
[[fallthrough]];
case C_READ_DATA_MULTI: case C_READ_DATA_MULTI:
read_data_start(flopi[BIT(command[0], 7)]); read_data_start(flopi[BIT(command[0], 7)]);
break; break;
case C_VERIFY_DATA_SINGLE: case C_VERIFY_DATA_SINGLE:
command[3] = 1; command[3] = 1;
[[fallthrough]];
case C_VERIFY_DATA_MULTI: case C_VERIFY_DATA_MULTI:
verify_data_start(flopi[BIT(command[0], 7)]); verify_data_start(flopi[BIT(command[0], 7)]);
break; break;
@ -817,6 +819,7 @@ void i8271_device::start_command(int cmd)
case C_WRITE_DATA_SINGLE: case C_WRITE_DATA_SINGLE:
command[3] = 1; command[3] = 1;
[[fallthrough]];
case C_WRITE_DATA_MULTI: case C_WRITE_DATA_MULTI:
write_data_start(flopi[BIT(command[0], 7)]); write_data_start(flopi[BIT(command[0], 7)]);
break; break;

View File

@ -487,8 +487,9 @@ u8 i8279_device::data_r()
case 0x10: // underrun case 0x10: // underrun
if (!fifo_size) if (!fifo_size)
break; break;
[[fallthrough]];
default: default:
printf("Invalid status: %X\n", m_status); logerror("Invalid status: %X\n", m_status);
} }
} }
m_status = (m_status & 0xd0) | fifo_size; // turn off overrun & full m_status = (m_status & 0xd0) | fifo_size; // turn off overrun & full

View File

@ -326,6 +326,7 @@ void mb89374_device::write(offs_t offset, uint8_t data)
case REGISTER_RXIER: case REGISTER_RXIER:
m_rxier = data; m_rxier = data;
break;
case REGISTER_TXSR: case REGISTER_TXSR:
m_txsr = data | TXSR_MASK; m_txsr = data | TXSR_MASK;

View File

@ -268,8 +268,8 @@ inline void s3520cf_device::rtc_write(u8 offset,u8 data)
case 0xa: m_rtc.month = (m_cntrl1 & 2) ? 1 : m_rtc.month + 0x10; check_overflow(); break; case 0xa: m_rtc.month = (m_cntrl1 & 2) ? 1 : m_rtc.month + 0x10; check_overflow(); break;
case 0xb: m_rtc.year = (m_cntrl1 & 2) ? m_rtc.year & 0xf0 : m_rtc.year + 1; check_overflow(); break; case 0xb: m_rtc.year = (m_cntrl1 & 2) ? m_rtc.year & 0xf0 : m_rtc.year + 1; check_overflow(); break;
case 0xc: m_rtc.year = (m_cntrl1 & 2) ? m_rtc.year & 0x0f : m_rtc.year + 0x10; check_overflow(); break; case 0xc: m_rtc.year = (m_cntrl1 & 2) ? m_rtc.year & 0x0f : m_rtc.year + 0x10; check_overflow(); break;
case 0xd: m_cntrl1 = data & 0xf; case 0xd: m_cntrl1 = data & 0xf; break;
case 0xe: m_cntrl2 = data & 0xf; case 0xe: m_cntrl2 = data & 0xf; break;
} }
} }
} }

View File

@ -500,6 +500,7 @@ void strataflash_device::write8_16(offs_t offset, uint16_t data, bus_width_t bus
else else
m_wrbuf_base = offset; m_wrbuf_base = offset;
memset(m_wrbuf, 0xff, m_wrbuf_len); /* right??? */ memset(m_wrbuf, 0xff, m_wrbuf_len); /* right??? */
[[fallthrough]];
case FM_WRBUFPART3: case FM_WRBUFPART3:
if ((offset < m_wrbuf_base) || (offset >= (m_wrbuf_base + m_wrbuf_len))) if ((offset < m_wrbuf_base) || (offset >= (m_wrbuf_base + m_wrbuf_len)))
m_status |= 0x30; m_status |= 0x30;

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@ -883,6 +883,7 @@ void vrc5074_device::cpu_reg_w(offs_t offset, uint32_t data, uint32_t mem_mask)
case NREG_CPUSTAT + 0: /* CPU status */ case NREG_CPUSTAT + 0: /* CPU status */
if (data & 0x1) logerror("cpu_reg_w: System Cold Reset\n"); if (data & 0x1) logerror("cpu_reg_w: System Cold Reset\n");
if (data & 0x2) logerror("cpu_reg_w: CPU Warm Reset\n"); if (data & 0x2) logerror("cpu_reg_w: CPU Warm Reset\n");
[[fallthrough]];
case NREG_CPUSTAT + 1: /* CPU status */ case NREG_CPUSTAT + 1: /* CPU status */
if (LOG_NILE) logerror("%s NILE WRITE: CPU status(%03X) = %08X & %08X\n", machine().describe_context(), offset * 4, data, mem_mask); if (LOG_NILE) logerror("%s NILE WRITE: CPU status(%03X) = %08X & %08X\n", machine().describe_context(), offset * 4, data, mem_mask);
logit = 0; logit = 0;

View File

@ -522,6 +522,7 @@ void namco_15xx_device::namco_15xx_w(offs_t offset, uint8_t data)
case 0x06: case 0x06:
voice->waveform_select = (data >> 4) & 7; voice->waveform_select = (data >> 4) & 7;
[[fallthrough]];
case 0x04: case 0x04:
case 0x05: case 0x05:
/* the frequency has 20 bits */ /* the frequency has 20 bits */
@ -598,6 +599,7 @@ void namco_cus30_device::namcos1_sound_w(offs_t offset, uint8_t data)
case 0x01: case 0x01:
voice->waveform_select = (data >> 4) & 15; voice->waveform_select = (data >> 4) & 15;
[[fallthrough]];
case 0x02: case 0x02:
case 0x03: case 0x03:
/* the frequency has 20 bits */ /* the frequency has 20 bits */

View File

@ -1770,6 +1770,7 @@ void tms5220_device::device_timer(emu_timer &timer, device_timer_id id, int para
case 0x03: case 0x03:
/* High Impedance */ /* High Impedance */
m_io_ready = param; m_io_ready = param;
break;
case 0x00: case 0x00:
/* illegal */ /* illegal */
m_io_ready = param; m_io_ready = param;

View File

@ -1152,6 +1152,8 @@ void mos6566_device::execute_run()
// Third sample of border state // Third sample of border state
m_border_on_sample[2] = m_border_on; m_border_on_sample[2] = m_border_on;
[[fallthrough]]; // FIXME: really?
// Graphics // Graphics
case 19: case 19:
@ -1739,6 +1741,8 @@ void mos6569_device::execute_run()
// Third sample of border state // Third sample of border state
m_border_on_sample[2] = m_border_on; m_border_on_sample[2] = m_border_on;
[[fallthrough]]; // FIXME: really?
// Graphics // Graphics
case 19: case 19:

View File

@ -2444,6 +2444,7 @@ uint8_t tseng_vga_device::port_03c0_r(offs_t offset)
break; break;
case 0x08: case 0x08:
et4k.dac_state = 0; et4k.dac_state = 0;
[[fallthrough]];
default: default:
res = vga_device::port_03c0_r(offset); res = vga_device::port_03c0_r(offset);
break; break;
@ -2481,6 +2482,7 @@ void tseng_vga_device::port_03c0_w(offs_t offset, uint8_t data)
et4k.dac_ctrl = data; et4k.dac_ctrl = data;
break; break;
} }
[[fallthrough]];
default: default:
vga_device::port_03c0_w(offset,data); vga_device::port_03c0_w(offset,data);
break; break;
@ -4434,6 +4436,7 @@ bit 0-2 (911-928) READ-REG-SEL. Read Register Select. Selects the register
case 0xf000: case 0xf000:
ibm8514.multifunc_sel = data & 0x000f; ibm8514.multifunc_sel = data & 0x000f;
if(LOG_8514) logerror("S3: Multifunction select write %04x\n",data); if(LOG_8514) logerror("S3: Multifunction select write %04x\n",data);
break;
default: default:
if(LOG_8514) logerror("S3: Unimplemented multifunction register %i write %03x\n",data >> 12,data & 0x0fff); if(LOG_8514) logerror("S3: Unimplemented multifunction register %i write %03x\n",data >> 12,data & 0x0fff);
} }

View File

@ -1630,7 +1630,7 @@ void voodoo_device::recompute_video_memory()
{ {
case 3: /* reserved */ case 3: /* reserved */
logerror("VOODOO.ERROR:Unexpected memory configuration in recompute_video_memory!\n"); logerror("VOODOO.ERROR:Unexpected memory configuration in recompute_video_memory!\n");
[[fallthrough]];
case 0: /* 2 color buffers, 1 aux buffer */ case 0: /* 2 color buffers, 1 aux buffer */
fbi.rgboffs[2] = ~0; fbi.rgboffs[2] = ~0;
fbi.auxoffs = 2 * buffer_pages * 0x1000; fbi.auxoffs = 2 * buffer_pages * 0x1000;
@ -4591,6 +4591,7 @@ uint32_t voodoo_device::register_r(voodoo_device *vd, offs_t offset)
case fbiAfuncFail: case fbiAfuncFail:
case fbiPixelsOut: case fbiPixelsOut:
vd->update_statistics(true); vd->update_statistics(true);
[[fallthrough]];
case fbiTrianglesOut: case fbiTrianglesOut:
result = vd->reg[regnum].u & 0xffffff; result = vd->reg[regnum].u & 0xffffff;
break; break;

View File

@ -1222,7 +1222,7 @@ bool zeus2_device::zeus2_fifo_process(const uint32_t *data, int numwords)
return false; return false;
zeus_trans[3] = convert_float(data[1]); zeus_trans[3] = convert_float(data[1]);
dataoffs = 1; dataoffs = 1;
[[fallthrough]];
/* 0x07: set matrix and point (crusnexo) */ /* 0x07: set matrix and point (crusnexo) */
case 0x07: case 0x07:
if (numwords < 13) if (numwords < 13)
@ -1294,6 +1294,7 @@ bool zeus2_device::zeus2_fifo_process(const uint32_t *data, int numwords)
} }
break; break;
} }
[[fallthrough]];
// 0x1b: thegrid // 0x1b: thegrid
// 0x1c: crusnexo (4 words) // 0x1c: crusnexo (4 words)
case 0x1b: case 0x1b:
@ -1471,6 +1472,7 @@ void zeus2_device::zeus2_draw_model(uint32_t baseaddr, uint16_t count, int logit
case 0x00: // crusnexo case 0x00: // crusnexo
if (logit && curoffs == count) if (logit && curoffs == count)
logerror(" end cmd 00\n"); logerror(" end cmd 00\n");
[[fallthrough]];
case 0x21: /* thegrid */ case 0x21: /* thegrid */
case 0x22: /* crusnexo */ case 0x22: /* crusnexo */
// Sets 0x68 (uv float offset) and texture line and mode // Sets 0x68 (uv float offset) and texture line and mode

View File

@ -88,18 +88,24 @@ namespace sol
}; };
template<> template<>
struct is_container<core_options> : std::false_type {}; // don't convert core_optons to a table directly struct is_container<core_options> : std::false_type {}; // don't convert core_optons to a table directly
namespace stack sol::buffer *sol_lua_get(sol::types<buffer *>, lua_State *L, int index, sol::stack::record &tracking)
{ {
template <> return new sol::buffer(stack::get<int>(L, index), L);
struct pusher<osd_file::error> }
{ int sol_lua_push(sol::types<buffer *>, lua_State *L, buffer *value)
static int push(lua_State *L, osd_file::error error)
{ {
delete value;
return 1;
}
}
int sol_lua_push(sol::types<osd_file::error>, lua_State *L, osd_file::error &&value)
{
const char *strerror; const char *strerror;
switch(error) switch(value)
{ {
case osd_file::error::NONE: case osd_file::error::NONE:
return stack::push(L, sol::nil); return sol::stack::push(L, sol::nil);
case osd_file::error::FAILURE: case osd_file::error::FAILURE:
strerror = "failure"; strerror = "failure";
break; break;
@ -128,42 +134,19 @@ namespace sol
strerror = "unknown_error"; strerror = "unknown_error";
break; break;
} }
return stack::push(L, strerror); return sol::stack::push(L, strerror);
} }
};
template <> template <typename Handler>
struct checker<sol::buffer *> bool sol_lua_check(sol::types<osd_file::error>, lua_State *L, int index, Handler &&handler, sol::stack::record &tracking)
{ {
template <typename Handler> return sol::stack::check<int>(L, index, std::forward<Handler>(handler));
static bool check (lua_State* L, int index, Handler&& handler, record& tracking) }
{
return stack::check<int>(L, index, handler); int sol_lua_push(sol::types<map_handler_type>, lua_State *L, map_handler_type &&value)
} {
};
template <>
struct getter<sol::buffer *>
{
static sol::buffer *get(lua_State* L, int index, record& tracking)
{
return new sol::buffer(stack::get<int>(L, index), L);
}
};
template <>
struct pusher<sol::buffer *>
{
static int push(lua_State* L, sol::buffer *buff)
{
delete buff;
return 1;
}
};
template <>
struct pusher<map_handler_type>
{
static int push(lua_State *L, map_handler_type type)
{
const char *typestr; const char *typestr;
switch(type) switch(value)
{ {
case AMH_NONE: case AMH_NONE:
typestr = "none"; typestr = "none";
@ -201,13 +184,9 @@ namespace sol
typestr = "unknown"; typestr = "unknown";
break; break;
} }
return stack::push(L, typestr); return sol::stack::push(L, typestr);
}
};
}
} }
namespace namespace
{ {
// ======================> enum_parser // ======================> enum_parser
@ -1966,7 +1945,7 @@ void lua_engine::initialize()
return port_table; return port_table;
})); }));
ioport_manager_type.set("type_seq", [](ioport_manager &m, ioport_type type, int player, input_seq_type seqtype) { ioport_manager_type.set("type_seq", [](ioport_manager &m, ioport_type type, int player, input_seq_type seqtype) {
return sol::make_user(m.type_seq(type, player, seqtype)); return sol::make_user(input_seq(m.type_seq(type, player, seqtype)));
}); });
sol().registry().set("ioport", ioport_manager_type); sol().registry().set("ioport", ioport_manager_type);
@ -2080,7 +2059,7 @@ void lua_engine::initialize()
auto ioport_field_type = sol().registry().new_usertype<ioport_field>("new", sol::no_constructor); auto ioport_field_type = sol().registry().new_usertype<ioport_field>("new", sol::no_constructor);
ioport_field_type.set("set_value", &ioport_field::set_value); ioport_field_type.set("set_value", &ioport_field::set_value);
ioport_field_type.set("set_input_seq", [](ioport_field &f, const std::string &seq_type_string, sol::user<input_seq> seq) { ioport_field_type.set("set_input_seq", [](ioport_field &f, const std::string &seq_type_string, const input_seq &seq) {
input_seq_type seq_type = s_seq_type_parser(seq_type_string); input_seq_type seq_type = s_seq_type_parser(seq_type_string);
ioport_field::user_settings settings; ioport_field::user_settings settings;
f.get_user_settings(settings); f.get_user_settings(settings);
@ -2089,15 +2068,15 @@ void lua_engine::initialize()
}); });
ioport_field_type.set("input_seq", [](ioport_field &f, const std::string &seq_type_string) { ioport_field_type.set("input_seq", [](ioport_field &f, const std::string &seq_type_string) {
input_seq_type seq_type = s_seq_type_parser(seq_type_string); input_seq_type seq_type = s_seq_type_parser(seq_type_string);
return sol::make_user(f.seq(seq_type)); return sol::make_user(input_seq(f.seq(seq_type)));
}); });
ioport_field_type.set("set_default_input_seq", [](ioport_field &f, const std::string &seq_type_string, sol::user<input_seq> seq) { ioport_field_type.set("set_default_input_seq", [](ioport_field &f, const std::string &seq_type_string, const input_seq &seq) {
input_seq_type seq_type = s_seq_type_parser(seq_type_string); input_seq_type seq_type = s_seq_type_parser(seq_type_string);
f.set_defseq(seq_type, seq); f.set_defseq(seq_type, seq);
}); });
ioport_field_type.set("default_input_seq", [](ioport_field &f, const std::string &seq_type_string) { ioport_field_type.set("default_input_seq", [](ioport_field &f, const std::string &seq_type_string) {
input_seq_type seq_type = s_seq_type_parser(seq_type_string); input_seq_type seq_type = s_seq_type_parser(seq_type_string);
return sol::make_user(f.defseq(seq_type)); return sol::make_user(input_seq(f.defseq(seq_type)));
}); });
ioport_field_type.set("keyboard_codes", [this](ioport_field &f, int which) { ioport_field_type.set("keyboard_codes", [this](ioport_field &f, int which) {
sol::table result = sol().create_table(); sol::table result = sol().create_table();
@ -2316,14 +2295,14 @@ void lua_engine::initialize()
auto input_type = sol().registry().new_usertype<input_manager>("new", sol::no_constructor); auto input_type = sol().registry().new_usertype<input_manager>("new", sol::no_constructor);
input_type.set("code_from_token", [](input_manager &input, const char *token) { return sol::make_user(input.code_from_token(token)); }); input_type.set("code_from_token", [](input_manager &input, const char *token) { return sol::make_user(input.code_from_token(token)); });
input_type.set("code_pressed", [](input_manager &input, sol::user<input_code> code) { return input.code_pressed(code); }); input_type.set("code_pressed", [](input_manager &input, const input_code &code) { return input.code_pressed(code); });
input_type.set("code_to_token", [](input_manager &input, sol::user<input_code> code) { return input.code_to_token(code); }); input_type.set("code_to_token", [](input_manager &input, const input_code &code) { return input.code_to_token(code); });
input_type.set("code_name", [](input_manager &input, sol::user<input_code> code) { return input.code_name(code); }); input_type.set("code_name", [](input_manager &input, const input_code &code) { return input.code_name(code); });
input_type.set("seq_from_tokens", [](input_manager &input, const char *tokens) { input_seq seq; input.seq_from_tokens(seq, tokens); return sol::make_user(seq); }); input_type.set("seq_from_tokens", [](input_manager &input, const char *tokens) { input_seq seq; input.seq_from_tokens(seq, tokens); return sol::make_user(std::move(seq)); });
input_type.set("seq_pressed", [](input_manager &input, sol::user<input_seq> seq) { return input.seq_pressed(seq); }); input_type.set("seq_pressed", [](input_manager &input, const input_seq &seq) { return input.seq_pressed(seq); });
input_type.set("seq_to_tokens", [](input_manager &input, sol::user<input_seq> seq) { return input.seq_to_tokens(seq); }); input_type.set("seq_to_tokens", [](input_manager &input, const input_seq &seq) { return input.seq_to_tokens(seq); });
input_type.set("seq_name", [](input_manager &input, sol::user<input_seq> seq) { return input.seq_name(seq); }); input_type.set("seq_name", [](input_manager &input, const input_seq &seq) { return input.seq_name(seq); });
input_type.set("seq_clean", [](input_manager &input, sol::user<input_seq> seq) { input_seq cleaned_seq = input.seq_clean(seq); return sol::make_user(cleaned_seq); }); input_type.set("seq_clean", [](input_manager &input, const input_seq &seq) { return sol::make_user(input.seq_clean(seq)); });
input_type.set("seq_poll_start", [this](input_manager &input, const char *cls_string, sol::object seq) { input_type.set("seq_poll_start", [this](input_manager &input, const char *cls_string, sol::object seq) {
if (!m_seq_poll) if (!m_seq_poll)
m_seq_poll.reset(new input_sequence_poller(input)); m_seq_poll.reset(new input_sequence_poller(input));
@ -2353,7 +2332,7 @@ void lua_engine::initialize()
input_type.set("seq_poll_final", [this](input_manager &input) -> sol::object { input_type.set("seq_poll_final", [this](input_manager &input) -> sol::object {
if (!m_seq_poll) if (!m_seq_poll)
return sol::make_object(sol(), sol::nil); return sol::make_object(sol(), sol::nil);
return sol::make_object(sol(), sol::make_user(m_seq_poll->valid() ? m_seq_poll->sequence() : input_seq())); return sol::make_object(sol(), sol::make_user(m_seq_poll->valid() ? input_seq(m_seq_poll->sequence()) : input_seq()));
}); });
input_type.set("seq_poll_modified", [this](input_manager &input) -> sol::object { input_type.set("seq_poll_modified", [this](input_manager &input) -> sol::object {
if (!m_seq_poll) if (!m_seq_poll)
@ -2368,7 +2347,7 @@ void lua_engine::initialize()
input_type.set("seq_poll_sequence", [this](input_manager &input) -> sol::object { input_type.set("seq_poll_sequence", [this](input_manager &input) -> sol::object {
if (!m_seq_poll) if (!m_seq_poll)
return sol::make_object(sol(), sol::nil); return sol::make_object(sol(), sol::nil);
return sol::make_object(sol(), sol::make_user(m_seq_poll->sequence())); return sol::make_object(sol(), sol::make_user(input_seq(m_seq_poll->sequence())));
}); });
input_type.set("device_classes", sol::property([this](input_manager &input) { input_type.set("device_classes", sol::property([this](input_manager &input) {
sol::table result = sol().create_table(); sol::table result = sol().create_table();
@ -2449,7 +2428,7 @@ void lua_engine::initialize()
input_device_item_type.set("token", sol::property(&input_device_item::token)); input_device_item_type.set("token", sol::property(&input_device_item::token));
input_device_item_type.set("code", [](input_device_item &item) { input_device_item_type.set("code", [](input_device_item &item) {
input_code code(item.device().devclass(), item.device().devindex(), item.itemclass(), ITEM_MODIFIER_NONE, item.itemid()); input_code code(item.device().devclass(), item.device().devindex(), item.itemclass(), ITEM_MODIFIER_NONE, item.itemid());
return sol::make_user(code); return sol::make_user(std::move(code));
}); });
sol().registry().set("input_device_item", input_device_item_type); sol().registry().set("input_device_item", input_device_item_type);
@ -2974,7 +2953,8 @@ void lua_engine::initialize()
image_type.set("create", [](device_image_interface &di, const std::string &filename) { return di.create(filename); }); image_type.set("create", [](device_image_interface &di, const std::string &filename) { return di.create(filename); });
image_type.set("crc", &device_image_interface::crc); image_type.set("crc", &device_image_interface::crc);
image_type.set("display", [](device_image_interface &di) { return di.call_display(); }); image_type.set("display", [](device_image_interface &di) { return di.call_display(); });
image_type.set("device", sol::property(static_cast<const device_t &(device_image_interface::*)() const>(&device_image_interface::device))); // FIXME: the next line is causing sol3 to try instantiating device_t for some reason
//image_type.set("device", sol::property(static_cast<const device_t & (device_image_interface::*)() const>(&device_image_interface::device));
image_type.set("instance_name", sol::property(&device_image_interface::instance_name)); image_type.set("instance_name", sol::property(&device_image_interface::instance_name));
image_type.set("brief_instance_name", sol::property(&device_image_interface::brief_instance_name)); image_type.set("brief_instance_name", sol::property(&device_image_interface::brief_instance_name));
image_type.set("is_readable", sol::property(&device_image_interface::is_readable)); image_type.set("is_readable", sol::property(&device_image_interface::is_readable));

View File

@ -308,6 +308,7 @@ bool cqm_format::load(io_generic *io, uint32_t form_factor, floppy_image *image)
if (heads == 1) if (heads == 1)
return false; // single side ED ? return false; // single side ED ?
image->set_variant(floppy_image::DSED); image->set_variant(floppy_image::DSED);
[[fallthrough]]; // FIXME: really?
default: default:
return false; return false;
} }

View File

@ -442,6 +442,7 @@ void vboysnd_device::write(offs_t offset, uint8_t data)
break; break;
} }
} }
[[fallthrough]]; // FIXME: really?
case SxINT: case SxINT:
if (channel < 5) if (channel < 5)
{ {

View File

@ -323,6 +323,7 @@ void altos8600_state::hd_w(offs_t offset, u8 data)
m_stat |= 0xa; m_stat |= 0xa;
break; break;
} }
[[fallthrough]];
case 0x4: case 0x4:
m_secoff = 0; m_secoff = 0;
m_stat |= 1; m_stat |= 1;

View File

@ -213,6 +213,7 @@ void barata_state::fpga_send(unsigned char cmd)
{ {
m_lamps[lamp_index] = state ? 0 : 1; m_lamps[lamp_index] = state ? 0 : 1;
} }
[[fallthrough]]; // FIXME: really?
default: default:
mode = FPGA_WAITING_FOR_NEW_CMD; mode = FPGA_WAITING_FOR_NEW_CMD;
break; break;
@ -248,6 +249,7 @@ void barata_state::fpga_send(unsigned char cmd)
m_digits[2*counter_bank] = dec_7seg(counter_data/10); m_digits[2*counter_bank] = dec_7seg(counter_data/10);
m_digits[2*counter_bank+1] = dec_7seg(counter_data%10); m_digits[2*counter_bank+1] = dec_7seg(counter_data%10);
} }
[[fallthrough]]; // FIXME: really?
default: default:
mode = FPGA_WAITING_FOR_NEW_CMD; mode = FPGA_WAITING_FOR_NEW_CMD;
break; break;
@ -265,6 +267,7 @@ void barata_state::fpga_send(unsigned char cmd)
case 2: case 2:
sample_index = (sample_index << 3) | cmd; sample_index = (sample_index << 3) | cmd;
logerror("PLAY_SAMPLE #%d.\n", sample_index); logerror("PLAY_SAMPLE #%d.\n", sample_index);
[[fallthrough]]; // FIXME: really?
default: default:
mode = FPGA_WAITING_FOR_NEW_CMD; mode = FPGA_WAITING_FOR_NEW_CMD;
break; break;

View File

@ -70,6 +70,7 @@ void besta_state::mpcc_reg_w(offs_t offset, uint8_t data)
break; break;
case 10: case 10:
m_terminal->write(data); m_terminal->write(data);
[[fallthrough]]; // FIXME: really?
default: default:
m_mpcc_regs[offset] = data; m_mpcc_regs[offset] = data;
break; break;

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@ -145,15 +145,15 @@ uint32_t bfm_swp_state::bfm_swp_mem_r(offs_t offset, uint32_t mem_mask)
switch ( cs ) switch ( cs )
{ {
case 1: case 1:
if (offset<0x100000/4) return m_cpuregion[offset]; if (offset<0x100000/4)
return m_cpuregion[offset];
[[fallthrough]]; // FIXME: really?
case 2: case 2:
offset&=0x3fff; offset&=0x3fff;
return m_mainram[offset]; return m_mainram[offset];
default: default:
logerror("%08x maincpu read access offset %08x mem_mask %08x cs %d\n", pc, offset*4, mem_mask, cs); logerror("%08x maincpu read access offset %08x mem_mask %08x cs %d\n", pc, offset*4, mem_mask, cs);
} }
return 0x0000; return 0x0000;

View File

@ -430,7 +430,6 @@ void cops_state::dacia_w(offs_t offset, uint8_t data)
switch(offset & 0x07) switch(offset & 0x07)
{ {
case 0: /* IRQ enable Register 1 */ case 0: /* IRQ enable Register 1 */
{
m_dacia_irq1_reg &= ~0x80; m_dacia_irq1_reg &= ~0x80;
if (data & 0x80) //enable bits if (data & 0x80) //enable bits
@ -444,10 +443,8 @@ void cops_state::dacia_w(offs_t offset, uint8_t data)
if (LOG_DACIA) logerror("DACIA IRQ 1 Register: %02x\n", m_dacia_irq1_reg); if (LOG_DACIA) logerror("DACIA IRQ 1 Register: %02x\n", m_dacia_irq1_reg);
update_dacia_irq(); update_dacia_irq();
break; break;
}
case 1: /* Control / Format Register 1 */ case 1: /* Control / Format Register 1 */
{
if (data & 0x80) //Format Register if (data & 0x80) //Format Register
{ {
m_dacia_rts1 = (data & 0x01); m_dacia_rts1 = (data & 0x01);
@ -478,13 +475,12 @@ void cops_state::dacia_w(offs_t offset, uint8_t data)
} }
break; break;
}
case 2: /* Compare / Aux Ctrl Register 1 */ case 2: /* Compare / Aux Ctrl Register 1 */
{
if (m_dacia_reg1 == CMP_REGISTER) if (m_dacia_reg1 == CMP_REGISTER)
{ {
m_dacia_cmp1 =1; m_dacia_cmp1 = 1;
m_dacia_cmpval1=data; m_dacia_cmpval1 = data;
if (LOG_DACIA) logerror("DACIA Compare mode: %02x \n", data); if (LOG_DACIA) logerror("DACIA Compare mode: %02x \n", data);
// update_dacia_irq(); // update_dacia_irq();
} }
@ -492,15 +488,13 @@ void cops_state::dacia_w(offs_t offset, uint8_t data)
{ {
if (LOG_DACIA) logerror("DACIA Aux ctrl: %02x \n", data); if (LOG_DACIA) logerror("DACIA Aux ctrl: %02x \n", data);
} }
} [[fallthrough]]; // FIXME: really?
case 3: /* Transmit Data Register 1 */ case 3: /* Transmit Data Register 1 */
{
if (LOG_DACIA) logerror("DACIA Transmit: %02x %c\n", data, (char)data); if (LOG_DACIA) logerror("DACIA Transmit: %02x %c\n", data, (char)data);
m_ld->command_w(data); m_ld->command_w(data);
break; break;
}
case 4: /* IRQ enable Register 2 */ case 4: /* IRQ enable Register 2 */
{
m_dacia_irq2_reg &= ~0x80; m_dacia_irq2_reg &= ~0x80;
if (data & 0x80) //enable bits if (data & 0x80) //enable bits
@ -514,10 +508,8 @@ void cops_state::dacia_w(offs_t offset, uint8_t data)
if (LOG_DACIA) logerror("DACIA IRQ 2 Register: %02x\n", m_dacia_irq2_reg); if (LOG_DACIA) logerror("DACIA IRQ 2 Register: %02x\n", m_dacia_irq2_reg);
update_dacia_irq(); update_dacia_irq();
break; break;
}
case 5: /* Control / Format Register 2 */ case 5: /* Control / Format Register 2 */
{
if (data & 0x80) //Format Register if (data & 0x80) //Format Register
{ {
m_dacia_rts2 = (data & 0x01); m_dacia_rts2 = (data & 0x01);
@ -548,9 +540,8 @@ void cops_state::dacia_w(offs_t offset, uint8_t data)
} }
break; break;
}
case 6: /* Compare / Aux Ctrl Register 2 */ case 6: /* Compare / Aux Ctrl Register 2 */
{
if (m_dacia_reg2 == CMP_REGISTER) if (m_dacia_reg2 == CMP_REGISTER)
{ {
m_dacia_cmp2 =1; m_dacia_cmp2 =1;
@ -562,9 +553,8 @@ void cops_state::dacia_w(offs_t offset, uint8_t data)
{ {
if (LOG_DACIA) logerror("DACIA Aux ctrl 2: %02x \n", data); if (LOG_DACIA) logerror("DACIA Aux ctrl 2: %02x \n", data);
} }
} [[fallthrough]]; // FIXME: really?
case 7: /* Transmit Data Register 2 */ case 7: /* Transmit Data Register 2 */
{
if (LOG_DACIA) logerror("DACIA Transmit 2: %02x %c\n", data, (char)data); if (LOG_DACIA) logerror("DACIA Transmit 2: %02x %c\n", data, (char)data);
// for (int i=0; i <8; i++) // for (int i=0; i <8; i++)
@ -574,7 +564,6 @@ void cops_state::dacia_w(offs_t offset, uint8_t data)
// m_ld->command_w(data); // m_ld->command_w(data);
break; break;
} }
}
} }
/************************************* /*************************************
* *

View File

@ -280,6 +280,7 @@ void cosmic_state::cosmica_sound_output_w(offs_t offset, uint8_t data)
break; break;
} }
} }
[[fallthrough]]; // FIXME: really?
case 3: /*Dive Bombing Type B (G.S.B)*/ case 3: /*Dive Bombing Type B (G.S.B)*/
if (data) if (data)

View File

@ -427,6 +427,7 @@ void cxhumax_state::cx_uart2_w(offs_t offset, uint32_t data, uint32_t mem_mask)
} }
} }
} }
[[fallthrough]];
default: default:
COMBINE_DATA(&m_uart2_regs[offset]); break; COMBINE_DATA(&m_uart2_regs[offset]); break;
} }

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@ -255,6 +255,7 @@ void fcrash_state::sf2m1_layer_w(offs_t offset, uint16_t data)
data = 0x0b4e; data = 0x0b4e;
break; break;
} }
[[fallthrough]];
case 0xb3: case 0xb3:
m_cps_b_regs[m_layer_enable_reg / 2] = data; m_cps_b_regs[m_layer_enable_reg / 2] = data;
break; break;

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@ -790,6 +790,7 @@ uint32_t model3_state::pci_device_get_reg()
logerror("pci_device_get_reg: Device 11, unknown reg %02X", reg); logerror("pci_device_get_reg: Device 11, unknown reg %02X", reg);
break; break;
} }
[[fallthrough]]; // FIXME: really?
case 13: /* Real3D Controller chip */ case 13: /* Real3D Controller chip */
switch(reg) switch(reg)

View File

@ -1997,9 +1997,14 @@ void mpu4vid_state::mpu4_vid_bt_a00002_w(offs_t offset, uint8_t data)
{ {
switch (m_bt_which) switch (m_bt_which)
{ {
case 0: m_btpal_r[m_bt_palbase] = data; case 0:
case 1: m_btpal_g[m_bt_palbase] = data; m_btpal_r[m_bt_palbase] = data;
case 2: m_btpal_b[m_bt_palbase] = data; [[fallthrough]]; // FIXME: really?
case 1:
m_btpal_g[m_bt_palbase] = data;
[[fallthrough]]; // FIXME: really?
case 2:
m_btpal_b[m_bt_palbase] = data;
} }
m_bt_which++; m_bt_which++;

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@ -275,12 +275,11 @@ void mpu5_state::asic_w8(offs_t offset, uint8_t data)
break; break;
case 0x09: case 0x09:
{
//Assume SEC fitted for now //Assume SEC fitted for now
m_sec->data_w(~data&0x01); m_sec->data_w(~data&0x01);
m_sec->clk_w(~data&0x02); m_sec->clk_w(~data&0x02);
m_sec->cs_w(~data&0x04); m_sec->cs_w(~data&0x04);
} [[fallthrough]];
case 0x0b: case 0x0b:
output().set_value("statuslamp1", BIT(data, 4)); output().set_value("statuslamp1", BIT(data, 4));
output().set_value("statuslamp2", BIT(data, 5)); output().set_value("statuslamp2", BIT(data, 5));

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@ -652,6 +652,7 @@ void psion5mx_state::periphs_w(offs_t offset, uint32_t data, uint32_t mem_mask)
case REG_PADR: case REG_PADR:
LOGMASKED(LOG_GPIO_WRITES, "%s: peripheral write, PADR = %08x & %08x\n", machine().describe_context(), data, mem_mask); LOGMASKED(LOG_GPIO_WRITES, "%s: peripheral write, PADR = %08x & %08x\n", machine().describe_context(), data, mem_mask);
m_ports[PORTA] = data; m_ports[PORTA] = data;
break;
case REG_PBDR: case REG_PBDR:
{ {
LOGMASKED(LOG_GPIO_WRITES, "%s: peripheral write, PBDR = %08x & %08x\n", machine().describe_context(), data, mem_mask); LOGMASKED(LOG_GPIO_WRITES, "%s: peripheral write, PBDR = %08x & %08x\n", machine().describe_context(), data, mem_mask);

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@ -1601,7 +1601,7 @@ uint8_t rainbow_modelb_state::rtc_r(offs_t offset)
case 0x2004: // 0xFE004 (MIRROR) case 0x2004: // 0xFE004 (MIRROR)
if (m_rtc->chip_enable()) if (m_rtc->chip_enable())
return (m_rtc->read_data() & 0x01); return (m_rtc->read_data() & 0x01);
[[fallthrough]]; // FIXME: really?
// (RTC ACTIVATION) read magic pattern 0 // (RTC ACTIVATION) read magic pattern 0
case 0x0100: // 0xFC100 case 0x0100: // 0xFC100
case 0x2100: // 0xFE100 (MIRROR) case 0x2100: // 0xFE100 (MIRROR)

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@ -79,6 +79,7 @@ void ti68k_state::ti68k_io_w(offs_t offset, uint16_t data)
break; break;
case 0x0b: case 0x0b:
m_timer_val = data & 0xff; m_timer_val = data & 0xff;
[[fallthrough]]; // FIXME: really?
case 0x0c: case 0x0c:
m_kb_mask = data & 0x03ff; m_kb_mask = data & 0x03ff;
break; break;

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@ -899,7 +899,7 @@ void tx0_state::magtape_callback()
{ {
case MTS_UNSELECTING: case MTS_UNSELECTING:
m_magtape.state = MTS_UNSELECTED; m_magtape.state = MTS_UNSELECTED;
[[fallthrough]];
case MTS_UNSELECTED: case MTS_UNSELECTED:
if (m_magtape.sel_pending) if (m_magtape.sel_pending)
{ {
@ -960,7 +960,7 @@ void tx0_state::magtape_callback()
} }
break; break;
} }
[[fallthrough]];
case MTS_SELECTED: case MTS_SELECTED:
switch (m_magtape.command) switch (m_magtape.command)
{ {
@ -1254,7 +1254,7 @@ void tx0_state::magtape_callback()
{ {
m_magtape.u.write.state = MTWTS_STATE1; m_magtape.u.write.state = MTWTS_STATE1;
} }
[[fallthrough]];
case MTWTS_STATE1: case MTWTS_STATE1:
if (m_magtape.u.write.counter) if (m_magtape.u.write.counter)
{ {
@ -1282,7 +1282,7 @@ void tx0_state::magtape_callback()
m_magtape.u.write.counter = 3; m_magtape.u.write.counter = 3;
} }
} }
[[fallthrough]];
case MTWTS_STATE2: case MTWTS_STATE2:
if (m_magtape.u.write.counter != 0) if (m_magtape.u.write.counter != 0)
{ {

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@ -637,6 +637,7 @@ void _3do_state::madam_w(offs_t offset, uint32_t data, uint32_t mem_mask){
case 0x0680/4: case 0x0684/4: case 0x0688/4: case 0x068c/4: case 0x0680/4: case 0x0684/4: case 0x0688/4: case 0x068c/4:
case 0x0690/4: case 0x0694/4: case 0x0698/4: case 0x069c/4: case 0x0690/4: case 0x0694/4: case 0x0698/4: case 0x069c/4:
m_madam.mult[offset & 0x3f] = data; m_madam.mult[offset & 0x3f] = data;
[[fallthrough]];
case 0x07f0/4: case 0x07f0/4:
m_madam.mult_control |= data; m_madam.mult_control |= data;
break; break;

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@ -1176,11 +1176,11 @@ uint16_t amiga_state::custom_chip_r(offs_t offset)
case REG_JOY0DAT: case REG_JOY0DAT:
if (m_joy0dat_port.found()) if (m_joy0dat_port.found())
return joy0dat_r(); return joy0dat_r();
[[fallthrough]]; // FIXME: Really? Fall through to potentially reading the other joystick?
case REG_JOY1DAT: case REG_JOY1DAT:
if (m_joy1dat_port.found()) if (m_joy1dat_port.found())
return joy1dat_r(); return joy1dat_r();
[[fallthrough]]; // TODO: check that this is correct
case REG_POTGOR: case REG_POTGOR:
return m_potgo_port.read_safe(0x5500); return m_potgo_port.read_safe(0x5500);

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@ -383,6 +383,7 @@ void arkanoid_state::arkanoid_bootleg_d018_w(uint8_t data)
m_bootleg_cmd = 0x00; m_bootleg_cmd = 0x00;
if (m_maincpu->pc() == 0x7c47) if (m_maincpu->pc() == 0x7c47)
m_bootleg_cmd = 0x00; m_bootleg_cmd = 0x00;
[[fallthrough]]; // FIXME: really?
case 0x89: /* unneeded value : no read back */ case 0x89: /* unneeded value : no read back */
if (m_maincpu->pc() == 0x67e5) if (m_maincpu->pc() == 0x67e5)
m_bootleg_cmd = 0x00; m_bootleg_cmd = 0x00;
@ -433,6 +434,7 @@ void arkanoid_state::arkanoid_bootleg_d018_w(uint8_t data)
m_bootleg_cmd = 0x00; m_bootleg_cmd = 0x00;
if (m_maincpu->pc() == 0x7c47) if (m_maincpu->pc() == 0x7c47)
m_bootleg_cmd = 0x00; m_bootleg_cmd = 0x00;
[[fallthrough]]; // FIXME: really?
case 0x89: /* unneeded value : no read back */ case 0x89: /* unneeded value : no read back */
if (m_maincpu->pc() == 0x67e5) if (m_maincpu->pc() == 0x67e5)
m_bootleg_cmd = 0x00; m_bootleg_cmd = 0x00;

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@ -192,6 +192,7 @@ void isbc_215g_device::io_w(offs_t offset, uint16_t data)
find_sector(); find_sector();
else if(m_amsrch) else if(m_amsrch)
logerror("isbc_215g: address search without read gate\n"); logerror("isbc_215g: address search without read gate\n");
[[fallthrough]];
case 0x01: case 0x01:
m_stepdir = (data & 0x80) ? 1 : 0; m_stepdir = (data & 0x80) ? 1 : 0;
break; break;

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@ -1111,14 +1111,18 @@ void lynx_state::suzy_write(offs_t offset, uint8_t data)
break; break;
case HPOSSTRTL: case HPOSSTRTL:
m_blitter.x_pos = data; m_blitter.x_pos = data;
[[fallthrough]]; // FIXME: really?
case HPOSSTRTH: case HPOSSTRTH:
m_blitter.x_pos &= 0xff; m_blitter.x_pos &= 0xff;
m_blitter.x_pos |= data<<8; m_blitter.x_pos |= data<<8;
[[fallthrough]]; // FIXME: really?
case VPOSSTRTL: case VPOSSTRTL:
m_blitter.y_pos = data; m_blitter.y_pos = data;
[[fallthrough]]; // FIXME: really?
case VPOSSTRTH: case VPOSSTRTH:
m_blitter.y_pos &= 0xff; m_blitter.y_pos &= 0xff;
m_blitter.y_pos |= data<<8; m_blitter.y_pos |= data<<8;
[[fallthrough]]; // FIXME: really?
case SPRHSIZL: case SPRHSIZL:
m_blitter.width = data; m_blitter.width = data;
break; break;

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@ -963,6 +963,7 @@ void mpu4_state::pia_ic5_porta_w(uint8_t data)
m_aux1_input|= 0xd0; m_aux1_input|= 0xd0;
break; break;
} }
break;
case 0x01: //Middle row - note switches don't match pattern case 0x01: //Middle row - note switches don't match pattern
switch (machine().rand() & 0x3) switch (machine().rand() & 0x3)
@ -987,6 +988,7 @@ void mpu4_state::pia_ic5_porta_w(uint8_t data)
m_aux1_input|= 0x90; m_aux1_input|= 0x90;
break; break;
} }
break;
case 0x02: //Bottom row case 0x02: //Bottom row
switch (machine().rand() & 0x3) switch (machine().rand() & 0x3)
@ -1011,6 +1013,7 @@ void mpu4_state::pia_ic5_porta_w(uint8_t data)
m_aux1_input|= 0x30; m_aux1_input|= 0x30;
break; break;
} }
break;
} }
} }
} }

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@ -1754,6 +1754,7 @@ int n64_periphs::pif_channel_handle_command(int channel, int slength, uint8_t *s
rdata[2] = 0x01; rdata[2] = 0x01;
return 0; return 0;
} }
[[fallthrough]]; // FIXME: really?
} }
case 4: case 4:
{ {

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@ -75,6 +75,7 @@ void twincobr_state::twincobr_dsp_w(u16 data)
switch (m_main_ram_seg) switch (m_main_ram_seg)
{ {
case 0x30000: if ((m_dsp_addr_w < 3) && (data == 0)) m_dsp_execute = 1; case 0x30000: if ((m_dsp_addr_w < 3) && (data == 0)) m_dsp_execute = 1;
[[fallthrough]];
case 0x40000: case 0x40000:
case 0x50000: {address_space &mainspace = m_maincpu->space(AS_PROGRAM); case 0x50000: {address_space &mainspace = m_maincpu->space(AS_PROGRAM);
mainspace.write_word(m_main_ram_seg + m_dsp_addr_w, data); mainspace.write_word(m_main_ram_seg + m_dsp_addr_w, data);
@ -125,6 +126,7 @@ void twincobr_state::wardner_dsp_w(u16 data)
switch (m_main_ram_seg) switch (m_main_ram_seg)
{ {
case 0x7000: if ((m_dsp_addr_w < 3) && (data == 0)) m_dsp_execute = 1; case 0x7000: if ((m_dsp_addr_w < 3) && (data == 0)) m_dsp_execute = 1;
[[fallthrough]];
case 0x8000: case 0x8000:
case 0xa000: {address_space &mainspace = m_maincpu->space(AS_PROGRAM); case 0xa000: {address_space &mainspace = m_maincpu->space(AS_PROGRAM);
mainspace.write_byte(m_main_ram_seg + (m_dsp_addr_w + 0), (data & 0xff)); mainspace.write_byte(m_main_ram_seg + (m_dsp_addr_w + 0), (data & 0xff));

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@ -946,6 +946,7 @@ uint32_t dynax_state::screen_update_hanamai(screen_device &screen, bitmap_ind16
switch (m_hanamai_priority) switch (m_hanamai_priority)
{ {
default: popmessage("unknown priority %02x", m_hanamai_priority); default: popmessage("unknown priority %02x", m_hanamai_priority);
[[fallthrough]]; // FIXME: really?
case 0x10: lay[0] = 0; lay[1] = 1; lay[2] = 2; lay[3] = 3; break; case 0x10: lay[0] = 0; lay[1] = 1; lay[2] = 2; lay[3] = 3; break;
case 0x11: lay[0] = 0; lay[1] = 3; lay[2] = 2; lay[3] = 1; break; case 0x11: lay[0] = 0; lay[1] = 3; lay[2] = 2; lay[3] = 1; break;
case 0x12: lay[0] = 0; lay[1] = 1; lay[2] = 3; lay[3] = 2; break; case 0x12: lay[0] = 0; lay[1] = 1; lay[2] = 3; lay[3] = 2; break;

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@ -153,6 +153,7 @@ void k007342_device::vreg_w(offs_t offset, uint8_t data)
case 0x01: /* used for banking in Rock'n'Rage */ case 0x01: /* used for banking in Rock'n'Rage */
if (data != m_regs[1]) if (data != m_regs[1])
machine().tilemap().mark_all_dirty(); machine().tilemap().mark_all_dirty();
[[fallthrough]];
case 0x02: case 0x02:
m_scrollx[0] = (m_scrollx[0] & 0xff) | ((data & 0x01) << 8); m_scrollx[0] = (m_scrollx[0] & 0xff) | ((data & 0x01) << 8);
m_scrollx[1] = (m_scrollx[1] & 0xff) | ((data & 0x02) << 7); m_scrollx[1] = (m_scrollx[1] & 0xff) | ((data & 0x02) << 7);

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@ -587,6 +587,7 @@ void konamigx_state::konamigx_mixer(screen_device &screen, bitmap_rgb32 &bitmap,
// Daisukiss bad shadow filter // Daisukiss bad shadow filter
case 4: case 4:
if (k & 0x3000 || k == 0x0800) continue; if (k & 0x3000 || k == 0x0800) continue;
[[fallthrough]];
// Tokkae shadow masking (INACCURATE) // Tokkae shadow masking (INACCURATE)
case 5: case 5:

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@ -310,6 +310,7 @@ void psychic5_state::draw_background(screen_device &screen, bitmap_rgb32 &bitmap
case 3: case 7: if (m_sy2 == 0xf0) m_bg_clip_mode++; break; case 3: case 7: if (m_sy2 == 0xf0) m_bg_clip_mode++; break;
case 9: case 11: if (m_sx1 == 0xf0) m_bg_clip_mode++; break; case 9: case 11: if (m_sx1 == 0xf0) m_bg_clip_mode++; break;
case 13: case 15: if (sx1_old == 0xf0) m_bg_clip_mode++; case 13: case 15: if (sx1_old == 0xf0) m_bg_clip_mode++;
[[fallthrough]];
case 16: if (m_sy1 != 0x00) m_bg_clip_mode = 0; break; case 16: if (m_sy1 != 0x00) m_bg_clip_mode = 0; break;
} }

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@ -426,7 +426,7 @@ void vc4000_state::vc4000_sprite_update(bitmap_ind16 &bitmap, uint8_t *collision
case 0: case 0:
if (m_video.line != This->y + 2) break; if (m_video.line != This->y + 2) break;
This->state++; This->state++;
[[fallthrough]];
case 1: case 2: case 3: case 4: case 5: case 6: case 7: case 8:case 9:case 10: case 1: case 2: case 3: case 4: case 5: case 6: case 7: case 8:case 9:case 10:
vc4000_collision_plot(collision+This->data->x1, This->data->bitmap[This->state-1],This->mask,This->size); vc4000_collision_plot(collision+This->data->x1, This->data->bitmap[This->state-1],This->mask,This->size);
@ -471,7 +471,7 @@ void vc4000_state::vc4000_sprite_update(bitmap_ind16 &bitmap, uint8_t *collision
This->delay=0; This->delay=0;
This->state++; This->state++;
[[fallthrough]];
case 12: case 12:
if (This->y!=0) if (This->y!=0)
{ {
@ -479,7 +479,7 @@ void vc4000_state::vc4000_sprite_update(bitmap_ind16 &bitmap, uint8_t *collision
break; break;
} }
This->state++; This->state++;
[[fallthrough]];
case 13: case 14: case 15: case 16: case 17: case 18: case 19:case 20:case 21:case 22: case 13: case 14: case 15: case 16: case 17: case 18: case 19:case 20:case 21:case 22:
vc4000_collision_plot(collision+This->data->x2,This->data->bitmap[This->state-13],This->mask,This->size); vc4000_collision_plot(collision+This->data->x2,This->data->bitmap[This->state-13],This->mask,This->size);

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@ -2599,6 +2599,7 @@ void uniform::update()
break; break;
case CU_CHROMA_CONVERSION_GAIN: case CU_CHROMA_CONVERSION_GAIN:
m_shader->set_vector("ConversionGain", 3, &options->chroma_conversion_gain[0]); m_shader->set_vector("ConversionGain", 3, &options->chroma_conversion_gain[0]);
break;
case CU_CHROMA_Y_GAIN: case CU_CHROMA_Y_GAIN:
m_shader->set_vector("YGain", 3, &options->chroma_y_gain[0]); m_shader->set_vector("YGain", 3, &options->chroma_y_gain[0]);
break; break;

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@ -245,6 +245,7 @@ char *stream_getline(imgtool::stream &source, uint16_t max_len)
source.read(&data, 1); source.read(&data, 1);
if (data != '\n') if (data != '\n')
source.seek(-1, SEEK_CUR); source.seek(-1, SEEK_CUR);
[[fallthrough]];
case '\n': case '\n':
return line; return line;
default: default: