r65c19: Add banking for C39 subfamily (nw)

src/devices/cpu/m6502/r65c19.cpp

@@ -14,11 +14,14 @@
 #include "r65c19d.h"
 
 DEFINE_DEVICE_TYPE(R65C19, r65c19_device, "r65c19", "Rockwell R65C19 MCU")
+DEFINE_DEVICE_TYPE(L2800, l2800_device, "l2800", "Rockwell L2800 MCU")
 
 r65c19_device::r65c19_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, address_map_constructor internal_map)
 	: r65c02_device(mconfig, type, tag, owner, clock)
 	, m_w(0)
 	, m_i(0)
+	, m_page1_ram(*this, "page1")
+	, m_cir(0)
 {
 	program_config.m_internal_map = std::move(internal_map);
 }
@@ -28,6 +31,18 @@ r65c19_device::r65c19_device(const machine_config &mconfig, const char *tag, dev
 {
 }
 
+c39_device::c39_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, address_map_constructor internal_map)
+	: r65c19_device(mconfig, type, tag, owner, clock, internal_map)
+	, m_exp_config("expansion", ENDIANNESS_LITTLE, 8, 21, 0)
+	, m_es4_config("ES4", ENDIANNESS_LITTLE, 8, 9, 0)
+{
+}
+
+l2800_device::l2800_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
+	: c39_device(mconfig, L2800, tag, owner, clock, address_map_constructor(FUNC(l2800_device::internal_map), this))
+{
+}
+
 std::unique_ptr<util::disasm_interface> r65c19_device::create_disassembler()
 {
 	return std::make_unique<r65c19_disassembler>();
@@ -81,6 +96,29 @@ void r65c19_device::device_start()
 	c19_init();
 }
 
+device_memory_interface::space_config_vector c39_device::memory_space_config() const
+{
+	return space_config_vector {
+		std::make_pair(AS_PROGRAM, &program_config),
+		std::make_pair(AS_DATA, &m_exp_config),
+		std::make_pair(AS_IO, &m_es4_config)
+	};
+}
+
+void c39_device::device_start()
+{
+	std::unique_ptr<mi_banked> intf = std::make_unique<mi_banked>();
+	intf->exp = &space(AS_DATA);
+	intf->escache = space(AS_DATA).cache<0, 0, ENDIANNESS_LITTLE>();
+	intf->es4 = &space(AS_IO);
+
+	save_item(NAME(intf->bsr));
+	save_item(NAME(intf->pbs));
+	mintf = std::move(intf);
+
+	c19_init();
+}
+
 void r65c19_device::c19_init()
 {
 	init();
@@ -96,11 +134,157 @@ void r65c19_device::c19_init()
 
 	save_item(NAME(m_w));
 	save_item(NAME(m_i));
+	save_item(NAME(m_cir));
 }
 
 void r65c19_device::device_reset()
 {
 	r65c02_device::device_reset();
+
+	m_cir = 0x00;
+}
+
+void c39_device::device_reset()
+{
+	r65c02_device::device_reset();
+
+	mi_banked &intf = downcast<mi_banked &>(*mintf);
+	intf.bsr[0] = 0xe0;
+	intf.bsr[1] = 0xd1;
+	intf.bsr[2] = 0xb2;
+	intf.bsr[3] = 0xb3;
+	intf.bsr[4] = 0x74;
+	intf.bsr[5] = 0x75;
+	intf.bsr[6] = 0x76;
+	intf.bsr[7] = 0x77;
+	intf.pbs = 0xff;
+}
+
+u8 r65c19_device::page1_seg_r(offs_t offset)
+{
+	return m_page1_ram[(m_cir & 0x03) << 6 | offset];
+}
+
+void r65c19_device::page1_seg_w(offs_t offset, u8 data)
+{
+	m_page1_ram[(m_cir & 0x03) << 6 | offset] = data;
+}
+
+u8 r65c19_device::cir_r()
+{
+	return m_cir;
+}
+
+void r65c19_device::cir_w(u8 data)
+{
+	// TODO: clear interrupts
+	m_cir = data & 0x07;
+}
+
+u8 c39_device::mi_banked::exp_read(u16 adr)
+{
+	return exp->read_byte(u32(bsr[(adr & 0xe000) >> 13]) << 13 | (adr & 0x1fff));
+}
+
+u8 c39_device::mi_banked::exp_read_cached(u16 adr)
+{
+	return escache->read_byte(u32(bsr[(adr & 0xe000) >> 13]) << 13 | (adr & 0x1fff));
+}
+
+void c39_device::mi_banked::exp_write(u16 adr, u8 val)
+{
+	exp->write_byte(u32(bsr[(adr & 0xe000) >> 13]) << 13 | (adr & 0x1fff), val);
+}
+
+u8 c39_device::mi_banked::es4_read(u16 adr)
+{
+	return es4->read_byte(adr & 0x1ff);
+}
+
+void c39_device::mi_banked::es4_write(u16 adr, u8 val)
+{
+	es4->write_byte(adr & 0x1ff, val);
+}
+
+u8 c39_device::mi_banked::read(u16 adr)
+{
+	return program->read_byte(adr);
+}
+
+u8 c39_device::mi_banked::read_sync(u16 adr)
+{
+	if (adr < 0x0600)
+		return cache->read_byte(adr);
+	else if (adr >= 0x0800 || BIT(pbs, 1))
+		return exp_read_cached(adr);
+	else
+		return es4_read(adr);
+}
+
+u8 c39_device::mi_banked::read_arg(u16 adr)
+{
+	if (adr < 0x0600)
+		return cache->read_byte(adr);
+	else if (adr >= 0x0800 || BIT(pbs, 1))
+		return exp_read_cached(adr);
+	else
+		return es4_read(adr);
+}
+
+void c39_device::mi_banked::write(u16 adr, u8 val)
+{
+	program->write_byte(adr, val);
+}
+
+u8 c39_device::pbs_r()
+{
+	return downcast<mi_banked &>(*mintf).pbs;
+}
+
+void c39_device::pbs_w(u8 data)
+{
+	downcast<mi_banked &>(*mintf).pbs = data;
+}
+
+u8 c39_device::bsr_r(offs_t offset)
+{
+	return downcast<mi_banked &>(*mintf).bsr[offset];
+}
+
+void c39_device::bsr_w(offs_t offset, u8 data)
+{
+	downcast<mi_banked &>(*mintf).bsr[offset] = data;
+}
+
+u8 c39_device::expansion_r(offs_t offset)
+{
+	mi_banked &intf = downcast<mi_banked &>(*mintf);
+	if (offset >= 0x0200 || BIT(intf.pbs, 1))
+		return intf.exp_read(offset + 0x0600);
+	else
+		return intf.es4_read(offset + 0x0600);
+}
+
+void c39_device::expansion_w(offs_t offset, u8 data)
+{
+	mi_banked &intf = downcast<mi_banked &>(*mintf);
+	if (offset >= 0x0200 || BIT(intf.pbs, 1))
+		intf.exp_write(offset + 0x0600, data);
+	else
+		intf.es4_write(offset + 0x0600, data);
+}
+
+void c39_device::internal_map(address_map &map)
+{
+	// TODO: most registers still unimplemented
+	map(0x0005, 0x0005).rw(FUNC(c39_device::pbs_r), FUNC(c39_device::pbs_w));
+	map(0x000b, 0x000b).rw(FUNC(c39_device::cir_r), FUNC(c39_device::cir_w));
+	map(0x0018, 0x001f).rw(FUNC(c39_device::bsr_r), FUNC(c39_device::bsr_w));
+	map(0x0040, 0x007f).rw(FUNC(c39_device::page1_seg_r), FUNC(c39_device::page1_seg_w));
+	map(0x0080, 0x00ff).ram();
+	map(0x0100, 0x01ff).ram().share("page1");
+	map(0x0200, 0x047f).ram();
+	map(0x0600, 0xffff).rw(FUNC(c39_device::expansion_r), FUNC(c39_device::expansion_w));
 }
 
 #include "cpu/m6502/r65c19.hxx"

src/devices/cpu/m6502/r65c19.h

@@ -34,6 +34,11 @@ protected:
 
 	void c19_init();
 
+	u8 cir_r();
+	void cir_w(u8 data);
+	u8 page1_seg_r(offs_t offset);
+	void page1_seg_w(offs_t offset, u8 data);
+
 private:
 	void do_add(u8 v);
 	u16 do_accumulate(u16 v, u16 w);
@@ -83,8 +88,63 @@ private:
 
 	u16 m_w;
 	u16 m_i;
+
+	optional_shared_ptr<u8> m_page1_ram;
+	u8 m_cir;
+};
+
+class c39_device : public r65c19_device
+{
+protected:
+	c39_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, address_map_constructor internal_map);
+
+	virtual space_config_vector memory_space_config() const override;
+
+	virtual void device_start() override;
+	virtual void device_reset() override;
+
+	u8 pbs_r();
+	void pbs_w(u8 data);
+	u8 bsr_r(offs_t offset);
+	void bsr_w(offs_t offset, u8 data);
+	u8 expansion_r(offs_t offset);
+	void expansion_w(offs_t offset, u8 data);
+
+	void internal_map(address_map &map);
+
+private:
+	class mi_banked : public memory_interface {
+	public:
+		virtual u8 read(u16 adr) override;
+		virtual u8 read_sync(u16 adr) override;
+		virtual u8 read_arg(u16 adr) override;
+		virtual void write(u16 adr, u8 val) override;
+
+		u8 exp_read(u16 adr);
+		u8 exp_read_cached(u16 adr);
+		void exp_write(u16 adr, u8 val);
+		u8 es4_read(u16 adr);
+		void es4_write(u16 adr, u8 val);
+
+		address_space *exp;
+		memory_access_cache<0, 0, ENDIANNESS_LITTLE> *escache;
+		address_space *es4;
+
+		u8 bsr[8];
+		u8 pbs;
+	};
+
+	address_space_config m_exp_config;
+	address_space_config m_es4_config;
+};
+
+class l2800_device : public c39_device
+{
+public:
+	l2800_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
 };
 
 DECLARE_DEVICE_TYPE(R65C19, r65c19_device)
+DECLARE_DEVICE_TYPE(L2800, l2800_device)
 
 #endif // MAME_CPU_M6502_R65C19_H

src/mame/drivers/vd56sp.cpp

@@ -22,17 +22,16 @@ public:
 	void vd56sp(machine_config &mconfig);
 
 private:
-	void mem_map(address_map &map);
+	void exp_map(address_map &map);
 
 	required_device<r65c19_device> m_maincpu;
 };
 
 
-void vd56sp_state::mem_map(address_map &map)
+void vd56sp_state::exp_map(address_map &map)
 {
-	map(0x0040, 0x03ff).ram();
+	map(0x0e0000, 0x0fffff).rom().region("firmware", 0x20000);
-	map(0x0800, 0x1fff).rom().region("firmware", 0x20800);
+	map(0x1f8000, 0x1fffff).ram();
-	map(0x8000, 0xffff).rom().region("firmware", 0x28000);
 }
 
 
@@ -41,8 +40,8 @@ INPUT_PORTS_END
 
 void vd56sp_state::vd56sp(machine_config &config)
 {
-	R65C19(config, m_maincpu, 8'000'000); // FIXME: actually L2800-38 (XTAL not readable)
+	L2800(config, m_maincpu, 8'000'000); // L28L2800-38 (XTAL not readable)
-	m_maincpu->set_addrmap(AS_PROGRAM, &vd56sp_state::mem_map);
+	m_maincpu->set_addrmap(AS_DATA, &vd56sp_state::exp_map);
 
 	// Modem IC: Conexant R6764-61
 }