From 43898fb85fbe4e171bb6df667295f1d23ccda5a2 Mon Sep 17 00:00:00 2001
From: Ryan Holtz <rholtz@batcountryentertainment.com>
Date: Sat, 26 Sep 2009 22:25:33 +0000
Subject: [PATCH] Fleshed out SCC68070 definition in m68k core, for CD-i use in
 MESS [Harmony]

---
 src/emu/cpu/m68000/m68kcpu.c | 11 ++++++++-
 src/emu/cpu/m68000/m68kcpu.h | 45 ++++++++----------------------------
 2 files changed, 20 insertions(+), 36 deletions(-)

diff --git a/src/emu/cpu/m68000/m68kcpu.c b/src/emu/cpu/m68000/m68kcpu.c
index c67d9510044..bcf83e85b65 100644
--- a/src/emu/cpu/m68000/m68kcpu.c
+++ b/src/emu/cpu/m68000/m68kcpu.c
@@ -1345,6 +1345,15 @@ CPU_GET_INFO( m68040 )
  * SCC-68070 section
  ****************************************************************************/
 
+static CPU_INIT( scc68070 )
+{
+	m68ki_cpu_core *m68k = get_safe_token(device);
+
+	CPU_INIT_CALL(m68010);
+
+	m68k->cpu_type         = CPU_TYPE_SCC070;
+}
+
 CPU_GET_INFO( scc68070 )
 {
 	switch (state)
@@ -1353,7 +1362,7 @@ CPU_GET_INFO( scc68070 )
 		case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: 		info->i = 32;							break;
 
 		/* --- the following bits of info are returned as pointers to data or functions --- */
-		case CPUINFO_FCT_INIT:							info->init = CPU_INIT_NAME(m68000);		break; //todo
+		case CPUINFO_FCT_INIT:							info->init = CPU_INIT_NAME(scc68070);	break;
 
 		/* --- the following bits of info are returned as NULL-terminated strings --- */
 		case DEVINFO_STR_NAME:							strcpy(info->s, "SCC68070");			break;
diff --git a/src/emu/cpu/m68000/m68kcpu.h b/src/emu/cpu/m68000/m68kcpu.h
index 7adc89af871..ad73de70891 100644
--- a/src/emu/cpu/m68000/m68kcpu.h
+++ b/src/emu/cpu/m68000/m68kcpu.h
@@ -73,12 +73,14 @@ typedef struct _m68ki_cpu_core m68ki_cpu_core;
 #define FUNCTION_CODE_CPU_SPACE          7
 
 /* CPU types for deciding what to emulate */
-#define CPU_TYPE_000   1
-#define CPU_TYPE_008   2
-#define CPU_TYPE_010   4
-#define CPU_TYPE_EC020 8
-#define CPU_TYPE_020   16
-#define CPU_TYPE_040   32
+#define CPU_TYPE_000   	1
+#define CPU_TYPE_008   	2
+#define CPU_TYPE_010   	4
+#define CPU_TYPE_EC020 	8
+#define CPU_TYPE_020   	16
+#define CPU_TYPE_040   	32
+#define CPU_TYPE_060   	64
+#define CPU_TYPE_SCC070 128
 
 /* Different ways to stop the CPU */
 #define STOP_LEVEL_STOP 1
@@ -228,7 +230,7 @@ typedef struct _m68ki_cpu_core m68ki_cpu_core;
 
 #define CPU_TYPE_IS_010(A)         ((A) == CPU_TYPE_010)
 #define CPU_TYPE_IS_010_PLUS(A)    ((A) & (CPU_TYPE_010 | CPU_TYPE_EC020 | CPU_TYPE_020 | CPU_TYPE_040))
-#define CPU_TYPE_IS_010_LESS(A)    ((A) & (CPU_TYPE_000 | CPU_TYPE_008 | CPU_TYPE_010))
+#define CPU_TYPE_IS_010_LESS(A)    ((A) & (CPU_TYPE_000 | CPU_TYPE_008 | CPU_TYPE_010 | CPU_TYPE_SCC070))
 
 #define CPU_TYPE_IS_000(A)         ((A) == CPU_TYPE_000 || (A) == CPU_TYPE_008)
 
@@ -256,29 +258,6 @@ typedef struct _m68ki_cpu_core m68ki_cpu_core;
 
 
 /* Address error */
-/* sigjmp() on Mac OS X and *BSD in general saves signal contexts and is super-slow, use sigsetjmp() to tell it not to */
-#ifdef _BSD_SETJMP_H
-#define m68ki_set_address_error_trap(m68k) \
-	if(sigsetjmp(m68k->aerr_trap, 0) != 0) \
-	{ \
-		m68ki_exception_address_error(m68k); \
-		if(m68k->stopped) \
-		{ \
-			if (m68k->remaining_cycles > 0) \
-				m68k->remaining_cycles = 0; \
-			return m68k->initial_cycles; \
-		} \
-	}
-
-#define m68ki_check_address_error(m68k, ADDR, WRITE_MODE, FC) \
-	if((ADDR)&1) \
-	{ \
-		m68k->aerr_address = ADDR; \
-		m68k->aerr_write_mode = WRITE_MODE; \
-		m68k->aerr_fc = FC; \
-		siglongjmp(m68k->aerr_trap, 1); \
-	}
-#else
 #define m68ki_set_address_error_trap(m68k) \
 	if(setjmp(m68k->aerr_trap) != 0) \
 	{ \
@@ -299,7 +278,7 @@ typedef struct _m68ki_cpu_core m68ki_cpu_core;
 		m68k->aerr_fc = FC; \
 		longjmp(m68k->aerr_trap, 1); \
 	}
-#endif
+
 
 
 /* -------------------------- EA / Operand Access ------------------------- */
@@ -590,11 +569,7 @@ struct _m68ki_cpu_core
 	int  reset_cycles;
 	UINT32 tracing;
 
-#ifdef _BSD_SETJMP_H
-	sigjmp_buf aerr_trap;
-#else
 	jmp_buf aerr_trap;
-#endif
 	UINT32    aerr_address;
 	UINT32    aerr_write_mode;
 	UINT32    aerr_fc;