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hphybrid: first draft of HP-5061-3001 CPU driver

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This commit is contained in:
fulivi 2015-12-02 10:19:53 +01:00
parent 9892fe3f0c
commit 43a9b8a53f
3 changed files with 905 additions and 336 deletions
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768
src/devices/cpu/hphybrid/hphybrid.cpp
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@ -17,7 +17,21 @@ enum {
HPHYBRID_DMAPA,
HPHYBRID_DMAMA,
HPHYBRID_DMAC,
HPHYBRID_I
HPHYBRID_I,
HPHYBRID_AR2,
HPHYBRID_AR2_2,
HPHYBRID_AR2_3,
HPHYBRID_AR2_4,
HPHYBRID_SE,
HPHYBRID_R25,
HPHYBRID_R26,
HPHYBRID_R27,
HPHYBRID_R32,
HPHYBRID_R33,
HPHYBRID_R34,
HPHYBRID_R35,
HPHYBRID_R36,
HPHYBRID_R37
};
#define BIT_MASK(n) (1U << (n))
@ -40,13 +54,22 @@ enum {
#define HPHYBRID_IRH_SVC_BIT 10 // IRH in service
#define HPHYBRID_IRL_SVC_BIT 11 // IRL in service
#define HPHYBRID_DMAR_BIT 12 // DMA request
#define HPHYBRID_STS_BIT 13 // Status flag
#define HPHYBRID_FLG_BIT 14 // "Flag" flag
#define HPHYBRID_DC_BIT 15 // Decimal carry
#define HPHYBRID_IV_MASK 0xfff0 // IV mask
#define HP_REG_SE_MASK 0x000f
#define CURRENT_PA (m_reg_PA[ 0 ])
#define HP_RESET_ADDR 0x0020
// Part of r32-r37 that is actually output as address extension (6 bits of "BSC": block select code)
#define BSC_REG_MASK 0x3f
const device_type HP_5061_3001 = &device_creator<hp_5061_3001_cpu_device>;
const device_type HP_5061_3011 = &device_creator<hp_5061_3011_cpu_device>;
WRITE_LINE_MEMBER(hp_hybrid_cpu_device::dmar_w)
@ -58,10 +81,37 @@ WRITE_LINE_MEMBER(hp_hybrid_cpu_device::dmar_w)
}
}
hp_hybrid_cpu_device::hp_hybrid_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname)
: cpu_device(mconfig, type, name, tag, owner, clock, shortname, __FILE__),
m_program_config("program", ENDIANNESS_BIG, 16, 16, -1),
m_io_config("io", ENDIANNESS_BIG, 16, 6, -1)
WRITE_LINE_MEMBER(hp_hybrid_cpu_device::halt_w)
{
if (state) {
BIT_SET(m_flags , HPHYBRID_HALT_BIT);
} else {
BIT_CLR(m_flags , HPHYBRID_HALT_BIT);
}
}
WRITE_LINE_MEMBER(hp_hybrid_cpu_device::status_w)
{
if (state) {
BIT_SET(m_flags , HPHYBRID_STS_BIT);
} else {
BIT_CLR(m_flags , HPHYBRID_STS_BIT);
}
}
WRITE_LINE_MEMBER(hp_hybrid_cpu_device::flag_w)
{
if (state) {
BIT_SET(m_flags , HPHYBRID_FLG_BIT);
} else {
BIT_CLR(m_flags , HPHYBRID_FLG_BIT);
}
}
hp_hybrid_cpu_device::hp_hybrid_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname , UINT8 addrwidth)
: cpu_device(mconfig, type, name, tag, owner, clock, shortname, __FILE__),
m_program_config("program", ENDIANNESS_BIG, 16, addrwidth, -1),
m_io_config("io", ENDIANNESS_BIG, 16, 6, -1)
{
}
@ -89,7 +139,7 @@ void hp_hybrid_cpu_device::device_start()
state_add(HPHYBRID_C, "C", m_reg_C);
state_add(HPHYBRID_D, "D", m_reg_D);
state_add(HPHYBRID_P, "P", m_reg_P);
state_add(STATE_GENPC, "GENPC", m_reg_P).noshow();
state_add(STATE_GENPC, "GENPC", m_genpc).noshow();
state_add(HPHYBRID_R, "R", m_reg_R);
state_add(STATE_GENSP, "GENSP", m_reg_R).noshow();
state_add(HPHYBRID_IV, "IV", m_reg_IV);
@ -127,7 +177,7 @@ void hp_hybrid_cpu_device::device_start()
void hp_hybrid_cpu_device::device_reset()
{
m_reg_P = HP_RESET_ADDR;
m_reg_I = RM(m_reg_P);
m_reg_I = fetch();
m_flags = 0;
}
@ -137,7 +187,7 @@ void hp_hybrid_cpu_device::execute_run()
if (BIT(m_flags , HPHYBRID_DMAEN_BIT) && BIT(m_flags , HPHYBRID_DMAR_BIT)) {
handle_dma();
} else {
debugger_instruction_hook(this, m_reg_P);
debugger_instruction_hook(this, m_genpc);
// Check for interrupts
check_for_interrupts();
@ -173,7 +223,7 @@ UINT16 hp_hybrid_cpu_device::execute_one(UINT16 opcode)
return RM(opcode & 0x1f);
} else {
m_reg_P = execute_one_sub(opcode);
return RM(m_reg_P);
return fetch();
}
}
@ -186,7 +236,7 @@ UINT16 hp_hybrid_cpu_device::execute_one(UINT16 opcode)
*/
UINT16 hp_hybrid_cpu_device::execute_one_sub(UINT16 opcode)
{
UINT16 ea;
UINT32 ea;
UINT16 tmp;
switch (opcode & 0x7800) {
@ -247,8 +297,8 @@ UINT16 hp_hybrid_cpu_device::execute_one_sub(UINT16 opcode)
case 0x4000:
// JSM
m_icount -= 17;
WM(++m_reg_R , m_reg_P);
return get_ea(opcode);
WM(AEC_CASE_C , ++m_reg_R , m_reg_P);
return remove_mae(get_ea(opcode));
case 0x4800:
// ISZ
@ -289,7 +339,7 @@ UINT16 hp_hybrid_cpu_device::execute_one_sub(UINT16 opcode)
case 0x6800:
// JMP
m_icount -= 8;
return get_ea(opcode);
return remove_mae(get_ea(opcode));
default:
switch (opcode & 0xfec0) {
@ -309,8 +359,7 @@ UINT16 hp_hybrid_cpu_device::execute_one_sub(UINT16 opcode)
// SFS
// SFC
m_icount -= 14;
// TODO: read flag bit
return get_skip_addr(opcode , true);
return get_skip_addr(opcode , !BIT(m_flags , HPHYBRID_FLG_BIT));
case 0x7C00:
// RZB
@ -328,8 +377,7 @@ UINT16 hp_hybrid_cpu_device::execute_one_sub(UINT16 opcode)
// SSS
// SSC
m_icount -= 14;
// TODO: read status bit
return get_skip_addr(opcode , true);
return get_skip_addr(opcode , !BIT(m_flags , HPHYBRID_STS_BIT));
case 0x7cc0:
// SHS
@ -454,7 +502,7 @@ UINT16 hp_hybrid_cpu_device::execute_one_sub(UINT16 opcode)
memmove(&m_reg_PA[ 0 ] , &m_reg_PA[ 1 ] , HPHYBRID_INT_LVLS);
}
}
tmp = RM(m_reg_R--) + (opcode & 0x1f);
tmp = RM(AEC_CASE_C , m_reg_R--) + (opcode & 0x1f);
return BIT(opcode , 5) ? tmp - 0x20 : tmp;
} else {
switch (opcode) {
@ -545,15 +593,14 @@ UINT16 hp_hybrid_cpu_device::execute_one_sub(UINT16 opcode)
break;
default:
// Unrecognized instructions: NOP
// Execution time is fictional
m_icount -= 6;
}
}
}
}
}
}
// Unrecognized instruction: pass it on for further processing (by EMC if present)
return execute_no_bpc_ioc(opcode);
}
}
}
}
}
}
return m_reg_P + 1;
}
@ -575,34 +622,192 @@ offs_t hp_hybrid_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const U
return CPU_DISASSEMBLE_NAME(hp_hybrid)(this, buffer, pc, oprom, opram, options);
}
UINT16 hp_hybrid_cpu_device::get_ea(UINT16 opcode)
UINT16 hp_hybrid_cpu_device::remove_mae(UINT32 addr)
{
UINT16 base;
UINT16 off;
return (UINT16)(addr & 0xffff);
}
if (BIT(opcode , 10)) {
// Current page
base = m_reg_P;
} else {
// Base page
base = 0;
}
UINT16 hp_hybrid_cpu_device::RM(aec_cases_t aec_case , UINT16 addr)
{
return RM(add_mae(aec_case , addr));
}
off = opcode & 0x3ff;
if (off & 0x200) {
off -= 0x400;
}
UINT16 hp_hybrid_cpu_device::RM(UINT32 addr)
{
UINT16 tmp;
UINT16 addr_wo_bsc = remove_mae(addr);
base += off;
if (addr_wo_bsc <= HP_REG_LAST_ADDR) {
// Memory mapped registers that are present in both 3001 & 3011
switch (addr_wo_bsc) {
case HP_REG_A_ADDR:
return m_reg_A;
if (BIT(opcode , 15)) {
// Indirect addressing
m_icount -= 6;
return RM(base);
} else {
// Direct addressing
return base;
}
case HP_REG_B_ADDR:
return m_reg_B;
case HP_REG_P_ADDR:
return m_reg_P;
case HP_REG_R_ADDR:
return m_reg_R;
case HP_REG_R4_ADDR:
case HP_REG_R5_ADDR:
case HP_REG_R6_ADDR:
case HP_REG_R7_ADDR:
return RIO(CURRENT_PA , addr_wo_bsc - HP_REG_R4_ADDR);
case HP_REG_IV_ADDR:
// Correct?
if (!BIT(m_flags , HPHYBRID_IRH_SVC_BIT) && !BIT(m_flags , HPHYBRID_IRL_SVC_BIT)) {
return m_reg_IV;
} else {
return m_reg_IV | CURRENT_PA;
}
case HP_REG_PA_ADDR:
return CURRENT_PA;
case HP_REG_DMAPA_ADDR:
tmp = m_dmapa & HP_REG_PA_MASK;
if (BIT(m_flags , HPHYBRID_CB_BIT)) {
BIT_SET(tmp , 15);
}
if (BIT(m_flags , HPHYBRID_DB_BIT)) {
BIT_SET(tmp , 14);
}
return tmp;
case HP_REG_DMAMA_ADDR:
return m_dmama;
case HP_REG_DMAC_ADDR:
return m_dmac;
case HP_REG_C_ADDR:
return m_reg_C;
case HP_REG_D_ADDR:
return m_reg_D;
default:
return read_non_common_reg(addr_wo_bsc);
}
} else {
return m_direct->read_word(addr << 1);
}
}
void hp_hybrid_cpu_device::WM(aec_cases_t aec_case , UINT16 addr , UINT16 v)
{
WM(add_mae(aec_case , addr) , v);
}
void hp_hybrid_cpu_device::WM(UINT32 addr , UINT16 v)
{
UINT16 addr_wo_bsc = remove_mae(addr);
if (addr_wo_bsc <= HP_REG_LAST_ADDR) {
// Memory mapped registers
switch (addr_wo_bsc) {
case HP_REG_A_ADDR:
m_reg_A = v;
break;
case HP_REG_B_ADDR:
m_reg_B = v;
break;
case HP_REG_P_ADDR:
m_reg_P = v;
break;
case HP_REG_R_ADDR:
m_reg_R = v;
break;
case HP_REG_R4_ADDR:
case HP_REG_R5_ADDR:
case HP_REG_R6_ADDR:
case HP_REG_R7_ADDR:
WIO(CURRENT_PA , addr_wo_bsc - HP_REG_R4_ADDR , v);
break;
case HP_REG_IV_ADDR:
m_reg_IV = v & HP_REG_IV_MASK;
break;
case HP_REG_PA_ADDR:
CURRENT_PA = v & HP_REG_PA_MASK;
break;
case HP_REG_DMAPA_ADDR:
m_dmapa = v & HP_REG_PA_MASK;
break;
case HP_REG_DMAMA_ADDR:
m_dmama = v;
break;
case HP_REG_DMAC_ADDR:
m_dmac = v;
break;
case HP_REG_C_ADDR:
m_reg_C = v;
break;
case HP_REG_D_ADDR:
m_reg_D = v;
break;
default:
write_non_common_reg(addr_wo_bsc , v);
break;
}
} else {
m_program->write_word(addr << 1 , v);
}
}
UINT16 hp_hybrid_cpu_device::fetch(void)
{
m_genpc = add_mae(AEC_CASE_A , m_reg_P);
return RM(m_genpc);
}
UINT32 hp_hybrid_cpu_device::get_ea(UINT16 opcode)
{
UINT16 base;
UINT16 off;
aec_cases_t aec;
if (BIT(opcode , 10)) {
// Current page
base = m_reg_P;
aec = AEC_CASE_A;
} else {
// Base page
base = 0;
aec = AEC_CASE_B;
}
off = opcode & 0x3ff;
if (off & 0x200) {
off -= 0x400;
}
base += off;
if (BIT(opcode , 15)) {
// Indirect addressing
m_icount -= 6;
return add_mae(AEC_CASE_C , RM(aec , base));
} else {
// Direct addressing
return add_mae(aec , base);
}
}
void hp_hybrid_cpu_device::do_add(UINT16& addend1 , UINT16 addend2)
@ -676,7 +881,7 @@ void hp_hybrid_cpu_device::do_pw(UINT16 opcode)
if (m_flags & b_mask) {
tmp_addr |= 0x10000;
}
tmp = RM((UINT16)(tmp_addr >> 1));
tmp = RM(AEC_CASE_C , (UINT16)(tmp_addr >> 1));
if (BIT(tmp_addr , 0)) {
tmp &= 0xff;
} else {
@ -684,7 +889,7 @@ void hp_hybrid_cpu_device::do_pw(UINT16 opcode)
}
} else {
// Word
tmp = RM(*ptr_reg);
tmp = RM(AEC_CASE_C , *ptr_reg);
}
WM(reg_addr , tmp);
@ -719,10 +924,16 @@ void hp_hybrid_cpu_device::do_pw(UINT16 opcode)
if (m_flags & b_mask) {
tmp_addr |= 0x10000;
}
WMB(tmp_addr , (UINT8)tmp);
if (tmp_addr <= (HP_REG_LAST_ADDR * 2 + 1)) {
// Cannot write bytes to registers
} else {
// Extend address, preserve LSB & form byte address
tmp_addr = (add_mae(AEC_CASE_C , tmp_addr >> 1) << 1) | (tmp_addr & 1);
m_program->write_byte(tmp_addr , (UINT8)tmp);
}
} else {
// Word
WM(*ptr_reg , tmp);
WM(AEC_CASE_C , *ptr_reg , tmp);
}
}
}
@ -773,9 +984,9 @@ void hp_hybrid_cpu_device::check_for_interrupts(void)
m_icount -= 26;
// Do a double-indirect JSM IV,I instruction
WM(++m_reg_R , m_reg_P);
WM(AEC_CASE_C , ++m_reg_R , m_reg_P);
m_reg_P = RM(get_ea(0xc008));
m_reg_I = RM(m_reg_P);
m_reg_I = fetch();
}
void hp_hybrid_cpu_device::handle_dma(void)
@ -786,13 +997,13 @@ void hp_hybrid_cpu_device::handle_dma(void)
if (BIT(m_flags , HPHYBRID_DMADIR_BIT)) {
// "Outward" DMA: memory -> peripheral
tmp = RM(m_dmama++);
tmp = RM(AEC_CASE_D , m_dmama++);
WIO(m_dmapa , tc ? 2 : 0 , tmp);
m_icount -= 10;
} else {
// "Inward" DMA: peripheral -> memory
tmp = RIO(m_dmapa , tc ? 2 : 0);
WM(m_dmama++ , tmp);
WM(AEC_CASE_D , m_dmama++ , tmp);
m_icount -= 9;
}
@ -804,147 +1015,6 @@ void hp_hybrid_cpu_device::handle_dma(void)
}
}
UINT16 hp_hybrid_cpu_device::RM(UINT16 addr)
{
UINT16 tmp;
if (addr <= HP_REG_LAST_ADDR) {
// Memory mapped registers
switch (addr) {
case HP_REG_A_ADDR:
return m_reg_A;
case HP_REG_B_ADDR:
return m_reg_B;
case HP_REG_P_ADDR:
return m_reg_P;
case HP_REG_R_ADDR:
return m_reg_R;
case HP_REG_R4_ADDR:
case HP_REG_R5_ADDR:
case HP_REG_R6_ADDR:
case HP_REG_R7_ADDR:
return RIO(CURRENT_PA , addr - HP_REG_R4_ADDR);
case HP_REG_IV_ADDR:
// Correct?
if (!BIT(m_flags , HPHYBRID_IRH_SVC_BIT) && !BIT(m_flags , HPHYBRID_IRL_SVC_BIT)) {
return m_reg_IV;
} else {
return m_reg_IV | CURRENT_PA;
}
case HP_REG_PA_ADDR:
return CURRENT_PA;
case HP_REG_DMAPA_ADDR:
tmp = m_dmapa & HP_REG_PA_MASK;
if (BIT(m_flags , HPHYBRID_CB_BIT)) {
BIT_SET(tmp , 15);
}
if (BIT(m_flags , HPHYBRID_DB_BIT)) {
BIT_SET(tmp , 14);
}
return tmp;
case HP_REG_DMAMA_ADDR:
return m_dmama;
case HP_REG_DMAC_ADDR:
return m_dmac;
case HP_REG_C_ADDR:
return m_reg_C;
case HP_REG_D_ADDR:
return m_reg_D;
default:
// Unknown registers are returned as 0
return 0;
}
} else {
return m_direct->read_word((offs_t)addr << 1);
}
}
void hp_hybrid_cpu_device::WM(UINT16 addr , UINT16 v)
{
if (addr <= HP_REG_LAST_ADDR) {
// Memory mapped registers
switch (addr) {
case HP_REG_A_ADDR:
m_reg_A = v;
break;
case HP_REG_B_ADDR:
m_reg_B = v;
break;
case HP_REG_P_ADDR:
m_reg_P = v;
break;
case HP_REG_R_ADDR:
m_reg_R = v;
break;
case HP_REG_R4_ADDR:
case HP_REG_R5_ADDR:
case HP_REG_R6_ADDR:
case HP_REG_R7_ADDR:
WIO(CURRENT_PA , addr - HP_REG_R4_ADDR , v);
break;
case HP_REG_IV_ADDR:
m_reg_IV = v & HP_REG_IV_MASK;
break;
case HP_REG_PA_ADDR:
CURRENT_PA = v & HP_REG_PA_MASK;
break;
case HP_REG_DMAPA_ADDR:
m_dmapa = v & HP_REG_PA_MASK;
break;
case HP_REG_DMAMA_ADDR:
m_dmama = v;
break;
case HP_REG_DMAC_ADDR:
m_dmac = v;
break;
case HP_REG_C_ADDR:
m_reg_C = v;
break;
case HP_REG_D_ADDR:
m_reg_D = v;
break;
default:
// Unknown registers are silently discarded
break;
}
} else {
m_program->write_word((offs_t)addr << 1 , v);
}
}
void hp_hybrid_cpu_device::WMB(UINT32 addr , UINT8 v)
{
if (addr <= (HP_REG_LAST_ADDR * 2 + 1)) {
// Cannot write bytes to registers
} else {
m_program->write_byte(addr , v);
}
}
UINT16 hp_hybrid_cpu_device::RIO(UINT8 pa , UINT8 ic)
{
return m_io->read_word(HP_MAKE_IOADDR(pa, ic) << 1);
@ -955,7 +1025,303 @@ void hp_hybrid_cpu_device::WIO(UINT8 pa , UINT8 ic , UINT16 v)
m_io->write_word(HP_MAKE_IOADDR(pa, ic) << 1 , v);
}
hp_5061_3011_cpu_device::hp_5061_3011_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: hp_hybrid_cpu_device(mconfig, HP_5061_3011, "HP_5061_3011", tag, owner, clock, "5061-3011")
hp_5061_3001_cpu_device::hp_5061_3001_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: hp_hybrid_cpu_device(mconfig, HP_5061_3001, "HP-5061-3001", tag, owner, clock, "5061-3001", 22)
{
}
void hp_5061_3001_cpu_device::device_start()
{
hp_hybrid_cpu_device::device_start();
state_add(HPHYBRID_AR2, "Ar2" , m_reg_ar2[ 0 ]);
state_add(HPHYBRID_AR2_2, "Ar2_2" , m_reg_ar2[ 1 ]);
state_add(HPHYBRID_AR2_3, "Ar2_3" , m_reg_ar2[ 2 ]);
state_add(HPHYBRID_AR2_4, "Ar2_4" , m_reg_ar2[ 3 ]);
state_add(HPHYBRID_SE, "SE" , m_reg_se);
state_add(HPHYBRID_R25, "R25" , m_reg_r25).noshow();
state_add(HPHYBRID_R26, "R26" , m_reg_r26).noshow();
state_add(HPHYBRID_R27, "R27" , m_reg_r27).noshow();
state_add(HPHYBRID_R32, "R32" , m_reg_aec[ 0 ]);
state_add(HPHYBRID_R33, "R33" , m_reg_aec[ 1 ]);
state_add(HPHYBRID_R34, "R34" , m_reg_aec[ 2 ]);
state_add(HPHYBRID_R35, "R35" , m_reg_aec[ 3 ]);
state_add(HPHYBRID_R36, "R36" , m_reg_aec[ 4 ]);
state_add(HPHYBRID_R37, "R37" , m_reg_aec[ 5 ]);
save_item(NAME(m_reg_ar2[ 0 ]));
save_item(NAME(m_reg_ar2[ 1 ]));
save_item(NAME(m_reg_ar2[ 2 ]));
save_item(NAME(m_reg_ar2[ 3 ]));
save_item(NAME(m_reg_se));
save_item(NAME(m_reg_r25));
save_item(NAME(m_reg_r26));
save_item(NAME(m_reg_r27));
save_item(NAME(m_reg_aec[ 0 ]));
save_item(NAME(m_reg_aec[ 1 ]));
save_item(NAME(m_reg_aec[ 2 ]));
save_item(NAME(m_reg_aec[ 3 ]));
save_item(NAME(m_reg_aec[ 4 ]));
save_item(NAME(m_reg_aec[ 5 ]));
}
void hp_5061_3001_cpu_device::device_reset()
{
// Initial state of AEC registers:
// R32 0
// R33 5
// R34 0
// R35 0
// R36 0
// R37 0
m_reg_aec[ 0 ] = 0;
m_reg_aec[ 1 ] = 0x25; // FU_TEST
m_reg_aec[ 2 ] = 0;
m_reg_aec[ 3 ] = 0;
m_reg_aec[ 4 ] = 0;
m_reg_aec[ 5 ] = 0;
hp_hybrid_cpu_device::device_reset();
}
UINT16 hp_5061_3001_cpu_device::execute_no_bpc_ioc(UINT16 opcode)
{
// EMC instructions
UINT8 n;
UINT16 tmp1;
UINT16 tmp2;
switch (opcode & 0xfff0) {
case 0x7300:
// XFR
tmp1 = m_reg_A;
tmp2 = m_reg_B;
n = (opcode & 0xf) + 1;
m_icount -= 21;
while (n--) {
m_icount -= 12;
WM(AEC_CASE_C , tmp2 , RM(AEC_CASE_C , tmp1));
tmp1++;
tmp2++;
}
break;
case 0x7380:
// CLR
tmp1 = m_reg_A;
n = (opcode & 0xf) + 1;
m_icount -= 16;
while (n--) {
m_icount -= 6;
WM(AEC_CASE_C , tmp1 , 0);
tmp1++;
}
break;
default:
switch (opcode) {
case 0x7200:
// MWA
break;
case 0x7220:
// CMY
break;
case 0x7260:
// CMX
break;
case 0x7280:
// FXA
break;
case 0x7340:
// NRM
break;
case 0x73c0:
// CDC
break;
case 0x7a00:
// FMP
break;
case 0x7a21:
// FDV
break;
case 0x7b00:
// MRX
break;
case 0x7b21:
// DRS
break;
case 0x7b40:
// MRY
break;
case 0x7b61:
// MLY
break;
case 0x7b8f:
// MPY
break;
default:
// Unrecognized instructions: NOP
// Execution time is fictional
logerror("hp-5061-3001: unknown opcode %04x\n" , opcode);
m_icount -= 6;
break;
}
}
return m_reg_P + 1;
}
offs_t hp_5061_3001_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
{
extern CPU_DISASSEMBLE(hp_5061_3001);
return CPU_DISASSEMBLE_NAME(hp_5061_3001)(this, buffer, pc, oprom, opram, options);
}
UINT32 hp_5061_3001_cpu_device::add_mae(aec_cases_t aec_case , UINT16 addr)
{
UINT16 bsc_reg;
bool top_half = BIT(addr , 15) != 0;
switch (aec_case) {
case AEC_CASE_A:
bsc_reg = top_half ? HP_REG_R34_ADDR : HP_REG_R33_ADDR;
break;
case AEC_CASE_B:
bsc_reg = top_half ? HP_REG_R36_ADDR : HP_REG_R33_ADDR;
break;
case AEC_CASE_C:
bsc_reg = top_half ? HP_REG_R32_ADDR : HP_REG_R35_ADDR;
break;
case AEC_CASE_D:
bsc_reg = HP_REG_R37_ADDR;
break;
default:
logerror("hphybrid: aec_case=%d\n" , aec_case);
return 0;
}
return (UINT32)addr | ((UINT32)(m_reg_aec[ bsc_reg - HP_REG_R32_ADDR ] & BSC_REG_MASK) << 16);
}
UINT16 hp_5061_3001_cpu_device::read_non_common_reg(UINT16 addr)
{
switch (addr) {
case HP_REG_AR2_ADDR:
case HP_REG_AR2_ADDR + 1:
case HP_REG_AR2_ADDR + 2:
case HP_REG_AR2_ADDR + 3:
return m_reg_ar2[ addr - HP_REG_AR2_ADDR ];
case HP_REG_SE_ADDR:
return m_reg_se;
case HP_REG_R25_ADDR:
return m_reg_r25;
case HP_REG_R26_ADDR:
return m_reg_r26;
case HP_REG_R27_ADDR:
return m_reg_r27;
case HP_REG_R32_ADDR:
case HP_REG_R33_ADDR:
case HP_REG_R34_ADDR:
case HP_REG_R35_ADDR:
case HP_REG_R36_ADDR:
case HP_REG_R37_ADDR:
return m_reg_aec[ addr - HP_REG_R32_ADDR ];
default:
return 0;
}
}
void hp_5061_3001_cpu_device::write_non_common_reg(UINT16 addr , UINT16 v)
{
switch (addr) {
case HP_REG_AR2_ADDR:
case HP_REG_AR2_ADDR + 1:
case HP_REG_AR2_ADDR + 2:
case HP_REG_AR2_ADDR + 3:
m_reg_ar2[ addr - HP_REG_AR2_ADDR ] = v;
break;
case HP_REG_SE_ADDR:
m_reg_se = v & HP_REG_SE_MASK;
break;
case HP_REG_R25_ADDR:
m_reg_r25 = v;
break;
case HP_REG_R26_ADDR:
m_reg_r26 = v;
break;
case HP_REG_R27_ADDR:
m_reg_r27 = v;
break;
case HP_REG_R32_ADDR:
case HP_REG_R33_ADDR:
case HP_REG_R34_ADDR:
case HP_REG_R35_ADDR:
case HP_REG_R36_ADDR:
case HP_REG_R37_ADDR:
m_reg_aec[ addr - HP_REG_R32_ADDR ] = v;
break;
default:
break;
}
}
hp_5061_3011_cpu_device::hp_5061_3011_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: hp_hybrid_cpu_device(mconfig, HP_5061_3011, "HP-5061-3011", tag, owner, clock, "5061-3011", 16)
{
}
UINT16 hp_5061_3011_cpu_device::execute_no_bpc_ioc(UINT16 opcode)
{
// Unrecognized instructions: NOP
// Execution time is fictional
m_icount -= 6;
return m_reg_P + 1;
}
UINT32 hp_5061_3011_cpu_device::add_mae(aec_cases_t aec_case , UINT16 addr)
{
// No MAE on 3011
return addr;
}
UINT16 hp_5061_3011_cpu_device::read_non_common_reg(UINT16 addr)
{
// Non-existing registers are returned as 0
return 0;
}
void hp_5061_3011_cpu_device::write_non_common_reg(UINT16 addr , UINT16 v)
{
// Non-existing registers are silently discarded
}

183
src/devices/cpu/hphybrid/hphybrid.h
View File

@ -57,7 +57,19 @@
#define HP_REG_DMAC_ADDR 0x000D
#define HP_REG_C_ADDR 0x000e
#define HP_REG_D_ADDR 0x000f
#define HP_REG_AR2_ADDR 0x0010
#define HP_REG_SE_ADDR 0x0014
#define HP_REG_R25_ADDR 0x0015
#define HP_REG_R26_ADDR 0x0016
#define HP_REG_R27_ADDR 0x0017
#define HP_REG_R32_ADDR 0x001a
#define HP_REG_R33_ADDR 0x001b
#define HP_REG_R34_ADDR 0x001c
#define HP_REG_R35_ADDR 0x001d
#define HP_REG_R36_ADDR 0x001e
#define HP_REG_R37_ADDR 0x001f
#define HP_REG_LAST_ADDR 0x001f
#define HP_REG_AR1_ADDR 0xfff8
#define HP_REG_IV_MASK 0xfff0
#define HP_REG_PA_MASK 0x000f
@ -65,82 +77,143 @@
class hp_hybrid_cpu_device : public cpu_device
{
public:
DECLARE_WRITE_LINE_MEMBER(dmar_w);
DECLARE_WRITE_LINE_MEMBER(dmar_w);
DECLARE_WRITE_LINE_MEMBER(halt_w);
DECLARE_WRITE_LINE_MEMBER(status_w);
DECLARE_WRITE_LINE_MEMBER(flag_w);
protected:
hp_hybrid_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname);
hp_hybrid_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname , UINT8 addrwidth);
// device-level overrides
virtual void device_start() override;
virtual void device_reset() override;
// device-level overrides
virtual void device_start();
virtual void device_reset();
// device_execute_interface overrides
virtual UINT32 execute_min_cycles() const override { return 6; }
virtual UINT32 execute_max_cycles() const override { return 25; }
virtual UINT32 execute_input_lines() const override { return 2; }
virtual UINT32 execute_default_irq_vector() const override { return 0xffff; }
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
// device_execute_interface overrides
virtual UINT32 execute_min_cycles() const { return 6; }
virtual UINT32 execute_input_lines() const { return 2; }
virtual UINT32 execute_default_irq_vector() const { return 0xffff; }
virtual void execute_run();
virtual void execute_set_input(int inputnum, int state);
UINT16 execute_one(UINT16 opcode);
UINT16 execute_one_sub(UINT16 opcode);
UINT16 execute_one(UINT16 opcode);
UINT16 execute_one_sub(UINT16 opcode);
// Execute an instruction that doesn't belong to either BPC or IOC
virtual UINT16 execute_no_bpc_ioc(UINT16 opcode) = 0;
// device_memory_interface overrides
virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const override { return (spacenum == AS_PROGRAM) ? &m_program_config : ( (spacenum == AS_IO) ? &m_io_config : nullptr ); }
// device_memory_interface overrides
virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const { return (spacenum == AS_PROGRAM) ? &m_program_config : ( (spacenum == AS_IO) ? &m_io_config : NULL ); }
// device_state_interface overrides
void state_string_export(const device_state_entry &entry, std::string &str) override;
// device_state_interface overrides
void state_string_export(const device_state_entry &entry, std::string &str);
// device_disasm_interface overrides
virtual UINT32 disasm_min_opcode_bytes() const override { return 2; }
virtual UINT32 disasm_max_opcode_bytes() const override { return 2; }
virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
// device_disasm_interface overrides
virtual UINT32 disasm_min_opcode_bytes() const { return 2; }
virtual UINT32 disasm_max_opcode_bytes() const { return 2; }
virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options);
// Different cases of memory access
// See patent @ pg 361
typedef enum {
AEC_CASE_A, // Instr. fetches, non-base page fetches of link pointers, BPC direct non-base page accesses
AEC_CASE_B, // Base page fetches of link pointers, BPC direct base page accesses
AEC_CASE_C, // IOC, EMC & BPC indirect final destination accesses
AEC_CASE_D // DMA accesses
} aec_cases_t;
// do memory address extension
virtual UINT32 add_mae(aec_cases_t aec_case , UINT16 addr) = 0;
UINT16 remove_mae(UINT32 addr);
UINT16 RM(aec_cases_t aec_case , UINT16 addr);
UINT16 RM(UINT32 addr);
virtual UINT16 read_non_common_reg(UINT16 addr) = 0;
void WM(aec_cases_t aec_case , UINT16 addr , UINT16 v);
void WM(UINT32 addr , UINT16 v);
virtual void write_non_common_reg(UINT16 addr , UINT16 v) = 0;
UINT16 fetch(void);
int m_icount;
// State of processor
UINT16 m_reg_A; // Register A
UINT16 m_reg_B; // Register B
UINT16 m_reg_P; // Register P
UINT16 m_reg_R; // Register R
UINT16 m_reg_C; // Register C
UINT16 m_reg_D; // Register D
UINT16 m_reg_IV; // Register IV
UINT8 m_reg_PA[ HPHYBRID_INT_LVLS + 1 ]; // Stack of register PA (4 bit-long)
UINT16 m_flags; // Flags
UINT8 m_dmapa; // DMA peripheral address (4 bits)
UINT16 m_dmama; // DMA address
UINT16 m_dmac; // DMA counter
UINT16 m_reg_I; // Instruction register
UINT32 m_genpc; // Full PC
private:
address_space_config m_program_config;
address_space_config m_io_config;
address_space_config m_program_config;
address_space_config m_io_config;
address_space *m_program;
direct_read_data *m_direct;
address_space *m_io;
int m_icount;
address_space *m_program;
direct_read_data *m_direct;
address_space *m_io;
// State of processor
UINT16 m_reg_A; // Register A
UINT16 m_reg_B; // Register B
UINT16 m_reg_P; // Register P
UINT16 m_reg_R; // Register R
UINT16 m_reg_C; // Register C
UINT16 m_reg_D; // Register D
UINT16 m_reg_IV; // Register IV
UINT8 m_reg_PA[ HPHYBRID_INT_LVLS + 1 ]; // Stack of register PA (4 bit-long)
UINT16 m_flags; // Flags (carry, overflow, cb, db, int en, dma en, dma dir)
UINT8 m_dmapa; // DMA peripheral address (4 bits)
UINT16 m_dmama; // DMA address
UINT16 m_dmac; // DMA counter
UINT16 m_reg_I; // Instruction register
UINT32 get_ea(UINT16 opcode);
void do_add(UINT16& addend1 , UINT16 addend2);
UINT16 get_skip_addr(UINT16 opcode , bool condition) const;
UINT16 get_skip_addr_sc(UINT16 opcode , UINT16& v , unsigned n);
void do_pw(UINT16 opcode);
void check_for_interrupts(void);
void handle_dma(void);
UINT16 get_ea(UINT16 opcode);
void do_add(UINT16& addend1 , UINT16 addend2);
UINT16 get_skip_addr(UINT16 opcode , bool condition) const;
UINT16 get_skip_addr_sc(UINT16 opcode , UINT16& v , unsigned n);
void do_pw(UINT16 opcode);
void check_for_interrupts(void);
void handle_dma(void);
UINT16 RIO(UINT8 pa , UINT8 ic);
void WIO(UINT8 pa , UINT8 ic , UINT16 v);
};
UINT16 RM(UINT16 addr);
void WM(UINT16 addr , UINT16 v);
void WMB(UINT32 addr , UINT8 v);
UINT16 RIO(UINT8 pa , UINT8 ic);
void WIO(UINT8 pa , UINT8 ic , UINT16 v);
class hp_5061_3001_cpu_device : public hp_hybrid_cpu_device
{
public:
hp_5061_3001_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
protected:
virtual void device_start();
virtual void device_reset();
virtual UINT32 execute_max_cycles() const { return 213; } // XFR 16
virtual UINT16 execute_no_bpc_ioc(UINT16 opcode);
virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options);
virtual UINT32 add_mae(aec_cases_t aec_case , UINT16 addr);
virtual UINT16 read_non_common_reg(UINT16 addr);
virtual void write_non_common_reg(UINT16 addr , UINT16 v);
private:
// Additional state of processor
UINT16 m_reg_ar2[ 4 ]; // AR2 register
UINT16 m_reg_se; // SE register (4 bits)
UINT16 m_reg_r25; // R25 register
UINT16 m_reg_r26; // R26 register
UINT16 m_reg_r27; // R27 register
UINT16 m_reg_aec[ HP_REG_R37_ADDR - HP_REG_R32_ADDR + 1 ]; // AEC registers R32-R37
};
class hp_5061_3011_cpu_device : public hp_hybrid_cpu_device
{
public:
hp_5061_3011_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
hp_5061_3011_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
protected:
virtual UINT32 execute_max_cycles() const { return 25; }
virtual UINT16 execute_no_bpc_ioc(UINT16 opcode);
virtual UINT32 add_mae(aec_cases_t aec_case , UINT16 addr);
virtual UINT16 read_non_common_reg(UINT16 addr);
virtual void write_non_common_reg(UINT16 addr , UINT16 v);
};
extern const device_type HP_5061_3001;
extern const device_type HP_5061_3011;
#endif /* _HPHYBRID_H_ */

290
src/devices/cpu/hphybrid/hphybrid_dasm.cpp
View File

@ -8,7 +8,7 @@
#include "debugger.h"
#include "hphybrid.h"
typedef void (*fn_dis_param)(char *buffer , offs_t pc , UINT16 opcode);
typedef void (*fn_dis_param)(char *buffer , offs_t pc , UINT16 opcode , bool is_3001);
typedef struct {
UINT16 m_op_mask;
@ -18,84 +18,160 @@ typedef struct {
UINT32 m_dasm_flags;
} dis_entry_t;
static void addr_2_str(char *buffer , UINT16 addr , bool indirect)
static void addr_2_str(char *buffer , UINT16 addr , bool indirect , bool is_3001)
{
char *s = buffer + strlen(buffer);
char *s = buffer + strlen(buffer);
s += sprintf(s , "$%04x" , addr);
s += sprintf(s , "$%04x" , addr);
switch (addr) {
case HP_REG_A_ADDR:
strcpy(s , "(A)");
break;
if (is_3001) {
switch (addr) {
case HP_REG_AR1_ADDR:
strcpy(s , "(Ar1)");
break;
case HP_REG_B_ADDR:
strcpy(s , "(B)");
break;
case HP_REG_AR1_ADDR + 1:
strcpy(s , "(Ar1_2)");
break;
case HP_REG_P_ADDR:
strcpy(s , "(P)");
break;
case HP_REG_AR1_ADDR + 2:
strcpy(s , "(Ar1_3)");
break;
case HP_REG_R_ADDR:
strcpy(s , "(R)");
break;
case HP_REG_AR1_ADDR + 3:
strcpy(s , "(Ar1_4)");
break;
case HP_REG_R4_ADDR:
strcpy(s , "(R4)");
break;
case HP_REG_AR2_ADDR:
strcpy(s , "(Ar2)");
break;
case HP_REG_R5_ADDR:
strcpy(s , "(R5)");
break;
case HP_REG_AR2_ADDR + 1:
strcpy(s , "(Ar2_2)");
break;
case HP_REG_R6_ADDR:
strcpy(s , "(R6)");
break;
case HP_REG_AR2_ADDR + 2:
strcpy(s , "(Ar2_3)");
break;
case HP_REG_R7_ADDR:
strcpy(s , "(R7)");
break;
case HP_REG_AR2_ADDR + 3:
strcpy(s , "(Ar2_4)");
break;
case HP_REG_IV_ADDR:
strcpy(s , "(IV)");
break;
case HP_REG_SE_ADDR:
strcpy(s , "(SE)");
break;
case HP_REG_PA_ADDR:
strcpy(s , "(PA)");
break;
case HP_REG_R25_ADDR:
strcpy(s , "(R25)");
break;
case HP_REG_DMAPA_ADDR:
strcpy(s , "(DMAPA)");
break;
case HP_REG_R26_ADDR:
strcpy(s , "(R26)");
break;
case HP_REG_DMAMA_ADDR:
strcpy(s , "(DMAMA)");
break;
case HP_REG_R27_ADDR:
strcpy(s , "(R27)");
break;
case HP_REG_DMAC_ADDR:
strcpy(s , "(DMAC)");
break;
case HP_REG_R32_ADDR:
strcpy(s , "(R32)");
break;
case HP_REG_C_ADDR:
strcpy(s , "(C)");
break;
case HP_REG_R33_ADDR:
strcpy(s , "(R33)");
break;
case HP_REG_D_ADDR:
strcpy(s , "(D)");
break;
}
case HP_REG_R34_ADDR:
strcpy(s , "(R34)");
break;
if (indirect) {
strcat(s , ",I");
}
case HP_REG_R35_ADDR:
strcpy(s , "(R35)");
break;
case HP_REG_R36_ADDR:
strcpy(s , "(R36)");
break;
case HP_REG_R37_ADDR:
strcpy(s , "(R37)");
break;
}
}
switch (addr) {
case HP_REG_A_ADDR:
strcpy(s , "(A)");
break;
case HP_REG_B_ADDR:
strcpy(s , "(B)");
break;
case HP_REG_P_ADDR:
strcpy(s , "(P)");
break;
case HP_REG_R_ADDR:
strcpy(s , "(R)");
break;
case HP_REG_R4_ADDR:
strcpy(s , "(R4)");
break;
case HP_REG_R5_ADDR:
strcpy(s , "(R5)");
break;
case HP_REG_R6_ADDR:
strcpy(s , "(R6)");
break;
case HP_REG_R7_ADDR:
strcpy(s , "(R7)");
break;
case HP_REG_IV_ADDR:
strcpy(s , "(IV)");
break;
case HP_REG_PA_ADDR:
strcpy(s , "(PA)");
break;
case HP_REG_DMAPA_ADDR:
strcpy(s , "(DMAPA)");
break;
case HP_REG_DMAMA_ADDR:
strcpy(s , "(DMAMA)");
break;
case HP_REG_DMAC_ADDR:
strcpy(s , "(DMAC)");
break;
case HP_REG_C_ADDR:
strcpy(s , "(C)");
break;
case HP_REG_D_ADDR:
strcpy(s , "(D)");
break;
}
if (indirect) {
strcat(s , ",I");
}
}
static void param_none(char *buffer , offs_t pc , UINT16 opcode)
static void param_none(char *buffer , offs_t pc , UINT16 opcode , bool is_3001)
{
}
static void param_loc(char *buffer , offs_t pc , UINT16 opcode)
static void param_loc(char *buffer , offs_t pc , UINT16 opcode , bool is_3001)
{
UINT16 base;
UINT16 off;
@ -113,26 +189,26 @@ static void param_loc(char *buffer , offs_t pc , UINT16 opcode)
off -= 0x400;
}
addr_2_str(buffer , base + off , (opcode & 0x8000) != 0);
addr_2_str(buffer , base + off , (opcode & 0x8000) != 0 , is_3001);
}
static void param_addr32(char *buffer , offs_t pc , UINT16 opcode)
static void param_addr32(char *buffer , offs_t pc , UINT16 opcode , bool is_3001)
{
addr_2_str(buffer , opcode & 0x1f , (opcode & 0x8000) != 0);
addr_2_str(buffer , opcode & 0x1f , (opcode & 0x8000) != 0 , is_3001);
}
static void param_skip(char *buffer , offs_t pc , UINT16 opcode)
static void param_skip(char *buffer , offs_t pc , UINT16 opcode , bool is_3001)
{
UINT16 off = opcode & 0x3f;
if (off & 0x20) {
off -= 0x40;
}
addr_2_str(buffer , pc + off , false);
addr_2_str(buffer , pc + off , false , is_3001);
}
static void param_skip_sc(char *buffer , offs_t pc , UINT16 opcode)
static void param_skip_sc(char *buffer , offs_t pc , UINT16 opcode , bool is_3001)
{
param_skip(buffer, pc, opcode);
param_skip(buffer, pc, opcode , is_3001);
if (opcode & 0x80) {
if (opcode & 0x40) {
@ -143,7 +219,7 @@ static void param_skip_sc(char *buffer , offs_t pc , UINT16 opcode)
}
}
static void param_ret(char *buffer , offs_t pc , UINT16 opcode)
static void param_ret(char *buffer , offs_t pc , UINT16 opcode , bool is_3001)
{
char *s = buffer + strlen(buffer);
@ -159,16 +235,16 @@ static void param_ret(char *buffer , offs_t pc , UINT16 opcode)
}
}
static void param_n16(char *buffer , offs_t pc , UINT16 opcode)
static void param_n16(char *buffer , offs_t pc , UINT16 opcode , bool is_3001)
{
char *s = buffer + strlen(buffer);
sprintf(s , "%u" , (opcode & 0xf) + 1);
}
static void param_reg_id(char *buffer , offs_t pc , UINT16 opcode)
static void param_reg_id(char *buffer , offs_t pc , UINT16 opcode , bool is_3001)
{
addr_2_str(buffer, opcode & 7, false);
addr_2_str(buffer, opcode & 7, false , is_3001);
if (opcode & 0x80) {
strcat(buffer , ",D");
@ -260,22 +336,76 @@ static const dis_entry_t dis_table[] = {
{0 , 0 , nullptr , nullptr , 0 }
};
static const dis_entry_t dis_table_emc[] = {
// *** EMC Instructions ***
{0xffff , 0x7200 , "MWA" , param_none , 0 },
{0xffff , 0x7220 , "CMY" , param_none , 0 },
{0xffff , 0x7260 , "CMX" , param_none , 0 },
{0xffff , 0x7280 , "FXA" , param_none , 0 },
{0xfff0 , 0x7300 , "XFR" , param_n16 , 0 },
{0xffff , 0x7340 , "NRM" , param_none , 0 },
{0xfff0 , 0x7380 , "CLR" , param_n16 , 0 },
{0xffff , 0x73c0 , "CDC" , param_none , 0 },
{0xffff , 0x7a00 , "FMP" , param_none , 0 },
{0xffff , 0x7a21 , "FDV" , param_none , 0 },
{0xffff , 0x7b00 , "MRX" , param_none , 0 },
{0xffff , 0x7b21 , "DRS" , param_none , 0 },
{0xffff , 0x7b40 , "MRY" , param_none , 0 },
{0xffff , 0x7b61 , "MLY" , param_none , 0 },
{0xffff , 0x7b8f , "MPY" , param_none , 0 },
// *** END ***
{0 , 0 , NULL , NULL , 0 }
};
static offs_t disassemble_table(UINT16 opcode , offs_t pc , const dis_entry_t *table , bool is_3001 , char *buffer)
{
const dis_entry_t *p;
for (p = table; p->m_op_mask; p++) {
if ((opcode & p->m_op_mask) == p->m_opcode) {
strcpy(buffer , p->m_mnemonic);
strcat(buffer , " ");
p->m_param_fn(buffer , pc , opcode , is_3001);
return 1 | p->m_dasm_flags | DASMFLAG_SUPPORTED;
}
}
return 0;
}
CPU_DISASSEMBLE(hp_hybrid)
{
UINT16 opcode = ((UINT16)oprom[ 0 ] << 8) | oprom[ 1 ];
const dis_entry_t *p;
UINT16 opcode = ((UINT16)oprom[ 0 ] << 8) | oprom[ 1 ];
offs_t res;
for (p = dis_table; p->m_op_mask; p++) {
if ((opcode & p->m_op_mask) == p->m_opcode) {
strcpy(buffer , p->m_mnemonic);
strcat(buffer , " ");
p->m_param_fn(buffer , pc , opcode);
return 1 | p->m_dasm_flags | DASMFLAG_SUPPORTED;
}
}
res = disassemble_table(opcode , pc , dis_table , false , buffer);
// Unknown opcode
strcpy(buffer , "???");
if (res == 0) {
// Unknown opcode
strcpy(buffer , "???");
res = 1 | DASMFLAG_SUPPORTED;
}
return 1 | DASMFLAG_SUPPORTED;
return res;
}
CPU_DISASSEMBLE(hp_5061_3001)
{
UINT16 opcode = ((UINT16)oprom[ 0 ] << 8) | oprom[ 1 ];
offs_t res;
res = disassemble_table(opcode , pc , dis_table_emc , true , buffer);
if (res == 0) {
res = disassemble_table(opcode , pc , dis_table , true , buffer);
}
if (res == 0) {
// Unknown opcode
strcpy(buffer , "???");
res = 1 | DASMFLAG_SUPPORTED;
}
return res;
}