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Updated notes for Alba ZG driver, nw
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@ -17,40 +17,19 @@ TODO:
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there's an heavy x offsetting with the flip screen right now due of that (sets register
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0x0d to 0x80 when the screen is upside-down)
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-You can actually configure the coin chutes / coin lockout active high/low (!), obviously
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MAME isn't really suitable for it at the current time;
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MAME framework isn't really suitable for it at the current time;
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PCB:
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- HD46505SP-2 / HD68B45SP Japan
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- Mostek MK3880P CPU, Z80 clone
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- NEC D8255AC-2
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- AY38910A/P
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- X1-009 (labeled 8732K5), X1-0198 (or X1-019B, can't read)
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- X2-004, X2-003, AX-014 (all with epoxy modulese apparently)
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- X1-007
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- CR-203 lithium battery, near X1-009 and X1-0198. There is also a switch near it
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- Xtal 12 MHz at top right corner
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============================================================================================
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Code disassembling
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(anything that I don't know the meaning is in brackets):
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[0458]-> (Writes to ports 00 & 01)
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[04bd]-> Enables prot lock
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[04d9]-> Palette RAM init
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[0c55]-> Video Ram Init
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[04c3]-> Disables prot lock
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[2603]-> Custom Ram Math
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[008b]-> Custom Ram Check 1 [without prot lock]
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[009A]-> Custom Ram Check 2 [must be NZ]
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[010e]-> Video Ram Math 1 [$c000]
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[00A0]-> Video Ram Check 1 [must be Z]
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[013b]-> Video Ram Math 2 [$d000]
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[00A6]-> Video Ram Check 2 [must be Z]
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[0197]-> Eeprom Check 1
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[2344] -> Eeprom sub check 1
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[2318] -> Eeprom sub check 2
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...
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[0222]-> Back Up Check
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[047c]-> (Writes to ports 83 & 80)
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[0488]-> Multiple writes to sound ports 40 & 41
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[04b4]-> Disables prot lock
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[0810]->[08b5]->write & read to sound port 40
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[08dd]->
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[079d]->(write to port c0)
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[0985]->Nvram lock enable/disable
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...
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[0b44]-> Nvram Check
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[0b1a]-> Nvram Check
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[090a]-> (?)
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[0312]-> Eeprom init msg
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*******************************************************************************************/
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#include "emu.h"
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@ -58,8 +37,9 @@ Code disassembling
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#include "machine/eeprom.h"
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#include "sound/ay8910.h"
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#include "video/mc6845.h"
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#include "machine/8255ppi.h"
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#include "machine/i8255.h"
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#define MASTER_CLOCK XTAL_12MHz
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class albazg_state : public driver_device
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{
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@ -83,9 +63,6 @@ public:
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UINT8 m_prot_lock;
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};
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#define MASTER_CLOCK XTAL_12MHz
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static TILE_GET_INFO( y_get_bg_tile_info )
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{
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albazg_state *state = machine.driver_data<albazg_state>();
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@ -238,7 +215,7 @@ static const mc6845_interface mc6845_intf =
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NULL /* update address callback */
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};
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static const ppi8255_interface ppi8255_intf =
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static I8255A_INTERFACE( ppi8255_intf )
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{
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DEVCB_NULL, /* Port A read */
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DEVCB_INPUT_PORT("SYSTEM"), /* Port B read */
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@ -269,7 +246,7 @@ static ADDRESS_MAP_START( port_map, AS_IO, 8 )
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AM_RANGE(0x01, 0x01) AM_DEVWRITE("crtc", mc6845_register_w)
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AM_RANGE(0x40, 0x40) AM_DEVREAD("aysnd", ay8910_r)
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AM_RANGE(0x40, 0x41) AM_DEVWRITE("aysnd", ay8910_address_data_w)
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AM_RANGE(0x80, 0x83) AM_DEVREADWRITE("ppi8255_0", ppi8255_r, ppi8255_w)
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AM_RANGE(0x80, 0x83) AM_DEVREADWRITE_MODERN("ppi8255_0", i8255_device, read, write)
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AM_RANGE(0xc0, 0xc0) AM_WRITE(watchdog_reset_w)
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ADDRESS_MAP_END
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@ -408,7 +385,7 @@ static MACHINE_CONFIG_START( yumefuda, albazg_state )
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MCFG_WATCHDOG_VBLANK_INIT(8) // timing is unknown
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MCFG_PPI8255_ADD( "ppi8255_0", ppi8255_intf )
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MCFG_I8255A_ADD( "ppi8255_0", ppi8255_intf )
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/* video hardware */
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MCFG_SCREEN_ADD("screen", RASTER)
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