From 43f222fec61aa6ab42ca51d3189f333f75ceddc3 Mon Sep 17 00:00:00 2001 From: arbee Date: Sat, 4 Jul 2015 13:56:54 -0400 Subject: [PATCH] hp64k: fix compile with OG's latest changes, seems to still work OK. (nw) --- src/emu/cpu/hphybrid/hphybrid.c | 2 +- src/mess/drivers/hp64k.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/src/emu/cpu/hphybrid/hphybrid.c b/src/emu/cpu/hphybrid/hphybrid.c index 84f3d911653..03a36549b60 100644 --- a/src/emu/cpu/hphybrid/hphybrid.c +++ b/src/emu/cpu/hphybrid/hphybrid.c @@ -867,7 +867,7 @@ UINT16 hp_hybrid_cpu_device::RM(UINT16 addr) return 0; } } else { - return m_direct->read_decrypted_word((offs_t)addr << 1); + return m_direct->read_word((offs_t)addr << 1); } } diff --git a/src/mess/drivers/hp64k.c b/src/mess/drivers/hp64k.c index 51b291d6e0d..7bf0107a597 100644 --- a/src/mess/drivers/hp64k.c +++ b/src/mess/drivers/hp64k.c @@ -1160,7 +1160,7 @@ static MACHINE_CONFIG_START(hp64k , hp64k_state) MCFG_SCREEN_REFRESH_RATE(60) MCFG_PALETTE_ADD_MONOCHROME_GREEN_HIGHLIGHT("palette") - MCFG_FD1791x_ADD("fdc" , XTAL_4MHz / 4) + MCFG_FD1791_ADD("fdc" , XTAL_4MHz / 4) MCFG_WD_FDC_FORCE_READY MCFG_WD_FDC_INTRQ_CALLBACK(WRITELINE(hp64k_state , hp64k_flp_intrq_w)) MCFG_WD_FDC_DRQ_CALLBACK(WRITELINE(hp64k_state , hp64k_flp_drq_w))