diff --git a/src/mame/drivers/indy_indigo2.cpp b/src/mame/drivers/indy_indigo2.cpp index 2bacbb8ec51..931476ddf5b 100644 --- a/src/mame/drivers/indy_indigo2.cpp +++ b/src/mame/drivers/indy_indigo2.cpp @@ -161,6 +161,7 @@ private: void ip22_map(address_map &map); void pio4_map(address_map &map); + void pio6_map(address_map &map); required_device m_scsi_ctrl2; }; @@ -252,7 +253,7 @@ void ip24_state::pio2_map(address_map &map) void ip24_state::pio6_map(address_map &map) { - map(0x00, 0xff).rw(m_ioc2, FUNC(ioc2_device::read), FUNC(ioc2_device::write)).umask16(0x00ff); + map(0x00, 0x2f).m("ioc2", FUNC(ioc2_guinness_device::map)).umask16(0x00ff); } void ip22_state::ip22_map(address_map &map) @@ -263,7 +264,12 @@ void ip22_state::ip22_map(address_map &map) void ip22_state::pio4_map(address_map &map) { - map(0x00, 0xff).rw("ioc2", FUNC(ioc2_full_house_device::int2_r), FUNC(ioc2_full_house_device::int2_w)).umask16(0x00ff); + map(0x00, 0x0f).m("ioc2", FUNC(ioc2_full_house_device::int2_map)).umask16(0x00ff); +} + +void ip22_state::pio6_map(address_map &map) +{ + map(0x00, 0x1f).m("ioc2", FUNC(ioc2_full_house_device::map)).umask16(0x00ff); } void ip24_state::machine_start() @@ -328,7 +334,6 @@ void ip24_state::ip24_base(machine_config &config) m_hpc3->set_addrmap(hpc3_device::AS_PIO0, &ip24_state::pio0_map); m_hpc3->set_addrmap(hpc3_device::AS_PIO1, &ip24_state::pio1_map); m_hpc3->set_addrmap(hpc3_device::AS_PIO2, &ip24_state::pio2_map); - m_hpc3->set_addrmap(hpc3_device::AS_PIO6, &ip24_state::pio6_map); m_hpc3->hd_rd_cb<0>().set(m_scsi_ctrl, FUNC(wd33c93b_device::indir_r)); m_hpc3->hd_wr_cb<0>().set(m_scsi_ctrl, FUNC(wd33c93b_device::indir_w)); m_hpc3->hd_dma_rd_cb<0>().set(m_scsi_ctrl, FUNC(wd33c93b_device::dma_r)); @@ -351,6 +356,8 @@ void ip24_state::ip24(machine_config &config) { ip24_base(config); + m_hpc3->set_addrmap(hpc3_device::AS_PIO6, &ip24_state::pio6_map); + SGI_IOC2_GUINNESS(config, m_ioc2, m_maincpu); VINO(config, m_vino); DS1386_8K(config, m_rtc, 32768); @@ -414,6 +421,7 @@ void ip22_state::indigo2_4415(machine_config &config) NSCSI_CONNECTOR(config, "scsibus2:7", scsi_devices, nullptr, false); m_hpc3->set_addrmap(hpc3_device::AS_PIO4, &ip22_state::pio4_map); + m_hpc3->set_addrmap(hpc3_device::AS_PIO6, &ip22_state::pio6_map); m_hpc3->hd_rd_cb<1>().set(m_scsi_ctrl2, FUNC(wd33c93b_device::indir_r)); m_hpc3->hd_wr_cb<1>().set(m_scsi_ctrl2, FUNC(wd33c93b_device::indir_w)); m_hpc3->hd_dma_rd_cb<1>().set(m_scsi_ctrl2, FUNC(wd33c93b_device::dma_r)); diff --git a/src/mame/machine/ioc2.cpp b/src/mame/machine/ioc2.cpp index 072f731c640..ec3383bb7a0 100644 --- a/src/mame/machine/ioc2.cpp +++ b/src/mame/machine/ioc2.cpp @@ -91,7 +91,6 @@ void ioc2_device::device_add_mconfig(machine_config &config) PC_LPT(config, m_pi1); -#if IOC2_NEW_KBDC // keyboard connector pc_kbdc_device &kbd_con(PC_KBDC(config, "kbd_con", 0)); kbd_con.out_clock_cb().set(m_kbdc, FUNC(ps2_keyboard_controller_device::kbd_clk_w)); @@ -121,12 +120,6 @@ void ioc2_device::device_add_mconfig(machine_config &config) kbdc_irq.output_handler().set(FUNC(ioc2_device::kbdc_int_w)); m_kbdc->kbd_irq().set(kbdc_irq, FUNC(input_merger_device::in_w<0>)); m_kbdc->aux_irq().set(kbdc_irq, FUNC(input_merger_device::in_w<1>)); -#else - KBDC8042(config, m_kbdc); - m_kbdc->set_keyboard_type(kbdc8042_device::KBDC8042_PS2); - m_kbdc->system_reset_callback().set_inputline(m_maincpu, INPUT_LINE_RESET); - m_kbdc->input_buffer_full_callback().set(FUNC(ioc2_device::kbdc_int_w)); -#endif PIT8254(config, m_pit, 0); m_pit->set_clk<0>(0); @@ -244,9 +237,6 @@ WRITE_LINE_MEMBER(ioc2_device::pit_clock2_out) { m_pit->write_clk0(state); m_pit->write_clk1(state); -#if !IOC2_NEW_KBDC - m_kbdc->write_out2(state); -#endif } WRITE_LINE_MEMBER(ioc2_device::kbdc_int_w) @@ -301,480 +291,322 @@ void ioc2_device::check_mappable_interrupt(int channel) } } -uint8_t ioc2_device::read(offs_t offset) +u8 ioc2_device::pi1_dma_ctrl_r() { - address_space &space = machine().dummy_space(); - - switch (offset) - { - case PI1_DATA_REG: - { - const uint8_t data = m_pi1->read(space, offset, 0xff);; - LOGMASKED(LOG_PI1, "%s: Read PI1 Data Register: %02x\n", machine().describe_context(), data); - return data; - } - case PI1_CTRL_REG: - { - const uint8_t data = m_pi1->read(space, offset, 0xff); - LOGMASKED(LOG_PI1, "%s: Read PI1 Control Register: %02x\n", machine().describe_context(), data); - return data; - } - case PI1_STATUS_REG: - { - const uint8_t data = m_pi1->read(space, offset, 0xff); - LOGMASKED(LOG_PI1, "%s: Read PI1 Status Register: %02x\n", machine().describe_context(), data); - return data; - } - - case PI1_DMA_CTRL_REG: - LOGMASKED(LOG_PI1, "%s: Read PI1 DMA Control Register: 00\n", machine().describe_context()); - return 0; - case PI1_INT_STATUS_REG: - LOGMASKED(LOG_PI1, "%s: Read PI1 Interrupt Status Register: 00\n", machine().describe_context()); - return 0; - case PI1_INT_MASK_REG: - LOGMASKED(LOG_PI1, "%s: Read PI1 Interrupt Mask Register: 00\n", machine().describe_context()); - return 0; - case PI1_TIMER1_REG: - LOGMASKED(LOG_PI1, "%s: Read PI1 Timer1 Register: 00\n", machine().describe_context()); - return 0; - case PI1_TIMER2_REG: - LOGMASKED(LOG_PI1, "%s: Read PI1 Timer2 Register: 00\n", machine().describe_context()); - return 0; - case PI1_TIMER3_REG: - LOGMASKED(LOG_PI1, "%s: Read PI1 Timer3 Register: 00\n", machine().describe_context()); - return 0; - case PI1_TIMER4_REG: - LOGMASKED(LOG_PI1, "%s: Read PI1 Timer4 Register: 00\n", machine().describe_context()); - return 0; - - case SERIAL1_CMD_REG: - { - const uint8_t data = m_scc->ba_cd_r(space, (offset - SERIAL1_CMD_REG) ^ 3); - LOGMASKED(LOG_SERIAL, "%s: Read Serial 1 Command Register: %02x\n", machine().describe_context(), data); - return data; - } - case SERIAL1_DATA_REG: - { - const uint8_t data = m_scc->ba_cd_r(space, (offset - SERIAL1_CMD_REG) ^ 3); - LOGMASKED(LOG_SERIAL, "%s: Read Serial 1 Data Register: %02x\n", machine().describe_context(), data); - return data; - } - case SERIAL2_CMD_REG: - { - const uint8_t data = m_scc->ba_cd_r(space, (offset - SERIAL1_CMD_REG) ^ 3); - LOGMASKED(LOG_SERIAL, "%s: Read Serial 2 Command Register: %02x\n", machine().describe_context(), data); - return data; - } - case SERIAL2_DATA_REG: - { - const uint8_t data = m_scc->ba_cd_r(space, (offset - SERIAL1_CMD_REG) ^ 3); - LOGMASKED(LOG_SERIAL, "%s: Read Serial 2 Data Register: %02x\n", machine().describe_context(), data); - return data; - } - - case KBD_MOUSE_REGS1: - { -#if IOC2_NEW_KBDC - const uint8_t data = m_kbdc->data_r(); -#else - const uint8_t data = m_kbdc->data_r(space, 0); -#endif - LOGMASKED(LOG_MOUSEKBD, "%s: Read Keyboard/Mouse Register 1: %02x\n", machine().describe_context(), data); - return data; - } - case KBD_MOUSE_REGS2: - { -#if IOC2_NEW_KBDC - const uint8_t data = m_kbdc->status_r(); -#else - const uint8_t data = m_kbdc->data_r(space, 4); -#endif - LOGMASKED(LOG_MOUSEKBD, "%s: Read Keyboard/Mouse Register 2: %02x\n", machine().describe_context(), data); - return data; - } - - case PANEL_REG: - LOGMASKED(LOG_PANEL, "%s: Read Front Panel Register: %02x\n", machine().describe_context(), m_front_panel_reg); - return m_front_panel_reg; - - case SYSID_REG: - { - const uint8_t data = get_system_id(); - LOGMASKED(LOG_SYSID, "%s: Read System ID Register: %02x\n", machine().describe_context(), data); - return data; - } - - case READ_REG: - LOGMASKED(LOG_READ, "%s: Read Read Register: %02x\n", machine().describe_context(), m_read_reg); - return m_read_reg; - - case DMA_SEL_REG: - // Bits 2-0 not quite understood, seem to be copy/paste error in SGI's own documents: - // - // 2 RW Parallel Port DMA Select. A high bit selects the Parallel Port DMA channel. 0\h is the default after reset. [this makes sense. -ed.] - // 1 RW ISDN Channel B DMA Select. A high bit selects the Parallel Port DMA channel. 0\h is the default after reset. [is this a copy/paste error? perhaps "Parallel Port" should be "ISDN Channel B"?] - // 0 RW [same text as above. Another copy/paste error, maybe? Should be channel A, with the bit selecting DMA channel 0/1 for ISDN channel A, the and the same for ISDN channel B in bit 1?] - LOGMASKED(LOG_DMA_SEL, "%s: Read DMA Select Register: %02x\n", machine().describe_context(), m_dma_sel); - return m_dma_sel; - - case RESET_REG: - LOGMASKED(LOG_RESET, "%s: Read Reset Register: %02x\n", machine().describe_context(), m_reset_reg); - return m_reset_reg; - - case WRITE_REG: - // Not yet implemented, some bits unnecessary: - // - // Bit Oper Description - // 7 RW Margin High. Set low for normal +5V operation, high to step supply up to +5.5V. Cleared at reset. - // 6 RW Margin Low. Set lowf or normal +5V operation, high to step supply down to +4.5V. Cleared at reset. - // 5 RW UART1 PC Mode. Set low to configure Port1 for RS422 Mac mode, high to select RS232 PC mode. Cleared at reset. - // 4 RW UART2 PC Mode. Set low to configure Port2 for RS422 Mac mode, high to select RS232 PC mode. Cleared at reset. - // 3 RW Ethernet Auto Select (active high). Set low for manual mode, high to have LXT901 automatically select TP or AUI based on link integrity. Cleared at reset. - // 2 RW Ethernet Port Select. Set low for TP, high for AUI. This setting is only used when Auto Select is in manual mode. Cleared at reset. - // 1 RW Ethernet UTP/STP select. Set low to select 150 ohm termination fro shielded TP (default), set high to select 100 ohm termination for unshielded TP. Cleared at reset. - // 0 RW Ethernet Normal Threshold (NTH) select. Set low to select the normal TP squelch threshold (default), high to reduce threshold by 4.5 dB (set low when reset). - LOGMASKED(LOG_WRITE, "%s: Read Write Register: %02x\n", machine().describe_context(), m_write_reg); - return m_write_reg; - - case INT3_LOCAL0_STATUS_REG: - LOGMASKED(LOG_INT3, "%s: Read Interrupt Local0 Status Register: %02x\n", machine().describe_context(), m_int3_local_status_reg[0]); - return m_int3_local_status_reg[0]; - - case INT3_LOCAL0_MASK_REG: - LOGMASKED(LOG_INT3, "%s: Read Interrupt Local0 Mask Register: %02x\n", machine().describe_context(), m_int3_local_mask_reg[0]); - return m_int3_local_mask_reg[0]; - - case INT3_LOCAL1_STATUS_REG: - LOGMASKED(LOG_INT3, "%s: Read Interrupt Local1 Status Register: %02x\n", machine().describe_context(), m_int3_local_status_reg[1]); - return m_int3_local_status_reg[1]; - - case INT3_LOCAL1_MASK_REG: - LOGMASKED(LOG_INT3, "%s: Read Interrupt Local1 Mask Register: %02x\n", machine().describe_context(), m_int3_local_mask_reg[1]); - return m_int3_local_mask_reg[1]; - - case INT3_MAP_STATUS_REG: - LOGMASKED(LOG_INT3, "%s: Read Interrupt Map Status Register: %02x\n", machine().describe_context(), m_int3_map_status_reg); - return m_int3_map_status_reg; - - case INT3_MAP_MASK0_REG: - LOGMASKED(LOG_INT3, "%s: Read Interrupt Map Mask0 Register: %02x\n", machine().describe_context(), m_int3_map_mask_reg[0]); - return m_int3_map_mask_reg[0]; - - case INT3_MAP_MASK1_REG: - LOGMASKED(LOG_INT3, "%s: Read Interrupt Map Mask1 Register: %02x\n", machine().describe_context(), m_int3_map_mask_reg[1]); - return m_int3_map_mask_reg[1]; - - case INT3_MAP_POLARITY_REG: - LOGMASKED(LOG_INT3, "%s: Read Interrupt Map Polarity Register: %02x\n", machine().describe_context(), m_int3_map_pol_reg); - return m_int3_map_pol_reg; - - case INT3_TIMER_CLEAR_REG: - LOGMASKED(LOG_INT3, "%s: Read Interrupt Timer Clear (ignored)\n", machine().describe_context()); - return 0; - - case INT3_ERROR_STATUS_REG: - LOGMASKED(LOG_INT3, "%s: Read Interrupt Error Status Register: %02x\n", machine().describe_context(), m_int3_err_status_reg); - return m_int3_err_status_reg; - - case TIMER_COUNT0_REG: - { - const uint8_t data = m_pit->read(0); - LOGMASKED(LOG_PIT, "%s: Read Timer Count0 Register: %02x\n", machine().describe_context(), data); - return data; - } - case TIMER_COUNT1_REG: - { - const uint8_t data = m_pit->read(1); - LOGMASKED(LOG_PIT, "%s: Read Timer Count1 Register: %02x\n", machine().describe_context(), data); - return data; - } - case TIMER_COUNT2_REG: - { - const uint8_t data = m_pit->read(2); - LOGMASKED(LOG_PIT, "%s: Read Timer Count2 Register: %02x\n", machine().describe_context(), data); - return data; - } - case TIMER_CONTROL_REG: - { - const uint8_t data = m_pit->read(3); - LOGMASKED(LOG_PIT, "%s: Read Timer Control Register: %02x\n", machine().describe_context(), data); - return data; - } - } - + LOGMASKED(LOG_PI1, "%s: Read PI1 DMA Control Register: 00\n", machine().describe_context()); return 0; } -void ioc2_device::write(offs_t offset, uint8_t data) +void ioc2_device::pi1_dma_ctrl_w(u8 data) { - address_space &space = machine().dummy_space(); + LOGMASKED(LOG_PI1, "%s: Write PI1 DMA Control Register: %02x\n", machine().describe_context(), data); +} - switch (offset) +u8 ioc2_device::pi1_int_status_r() +{ + LOGMASKED(LOG_PI1, "%s: Read PI1 Interrupt Status Register: 00\n", machine().describe_context()); + return 0; +} + +void ioc2_device::pi1_int_status_w(u8 data) +{ + LOGMASKED(LOG_PI1, "%s: Write PI1 Interrupt Status Register: %02x\n", machine().describe_context(), data); +} + +u8 ioc2_device::pi1_int_mask_r() +{ + LOGMASKED(LOG_PI1, "%s: Read PI1 Interrupt Mask Register: 00\n", machine().describe_context()); + return 0; +} + +void ioc2_device::pi1_int_mask_w(u8 data) +{ + LOGMASKED(LOG_PI1, "%s: Write PI1 Interrupt Mask Register: %02x\n", machine().describe_context(), data); +} + +u8 ioc2_device::pi1_timer1_r() +{ + LOGMASKED(LOG_PI1, "%s: Read PI1 Timer1 Register: 00\n", machine().describe_context()); + return 0; +} + +u8 ioc2_device::pi1_timer2_r() +{ + LOGMASKED(LOG_PI1, "%s: Read PI1 Timer2 Register: 00\n", machine().describe_context()); + return 0; +} + +u8 ioc2_device::pi1_timer3_r() +{ + LOGMASKED(LOG_PI1, "%s: Read PI1 Timer3 Register: 00\n", machine().describe_context()); + return 0; +} + +u8 ioc2_device::pi1_timer4_r() +{ + LOGMASKED(LOG_PI1, "%s: Read PI1 Timer4 Register: 00\n", machine().describe_context()); + return 0; +} + +void ioc2_device::pi1_timer1_w(u8 data) +{ + LOGMASKED(LOG_PI1, "%s: Write PI1 Timer1 Register: %02x\n", machine().describe_context(), data); +} + +void ioc2_device::pi1_timer2_w(u8 data) +{ + LOGMASKED(LOG_PI1, "%s: Write PI1 Timer2 Register: %02x\n", machine().describe_context(), data); +} + +void ioc2_device::pi1_timer3_w(u8 data) +{ + LOGMASKED(LOG_PI1, "%s: Write PI1 Timer3 Register: %02x\n", machine().describe_context(), data); +} + +void ioc2_device::pi1_timer4_w(u8 data) +{ + LOGMASKED(LOG_PI1, "%s: Write PI1 Timer4 Register: %02x\n", machine().describe_context(), data); +} + +u8 ioc2_device::gc_select_r() +{ + LOGMASKED(LOG_READ, "%s: Read GC Select Register: 00\n", machine().describe_context()); + return 0; +} + +void ioc2_device::gc_select_w(u8 data) +{ + LOGMASKED(LOG_WRITE, "%s: Write GC Select Register: %02x\n", machine().describe_context(), data); +} + +u8 ioc2_device::gen_cntl_r() +{ + LOGMASKED(LOG_READ, "%s: Read General Control Register: 00\n", machine().describe_context()); + return 0; +} + +void ioc2_device::gen_cntl_w(u8 data) +{ + LOGMASKED(LOG_WRITE, "%s: Write General Control Register: %02x\n", machine().describe_context(), data); +} + +u8 ioc2_device::front_panel_r() +{ + LOGMASKED(LOG_PANEL, "%s: Read Front Panel Register: %02x\n", machine().describe_context(), m_front_panel_reg); + return m_front_panel_reg; +} + +void ioc2_device::front_panel_w(u8 data) +{ + LOGMASKED(LOG_PANEL, "%s: Write Front Panel Register: %02x\n", machine().describe_context(), data); + m_front_panel_reg &= ~(data & (FRONT_PANEL_VOL_UP_INT | FRONT_PANEL_VOL_DOWN_INT | FRONT_PANEL_POWER_BUTTON_INT)); + if (!(m_front_panel_reg & FRONT_PANEL_INT_MASK)) + lower_local_irq(1, INT3_LOCAL1_PANEL); +} + +u8 ioc2_device::system_id_r() +{ + const uint8_t data = get_system_id(); + LOGMASKED(LOG_SYSID, "%s: Read System ID Register: %02x\n", machine().describe_context(), data); + return data; +} + +u8 ioc2_device::read_r() +{ + LOGMASKED(LOG_READ, "%s: Read Read Register: %02x\n", machine().describe_context(), m_read_reg); + return m_read_reg; +} + +u8 ioc2_device::dma_sel_r() +{ + // Bits 2-0 not quite understood, seem to be copy/paste error in SGI's own documents: + // + // 2 RW Parallel Port DMA Select. A high bit selects the Parallel Port DMA channel. 0\h is the default after reset. [this makes sense. -ed.] + // 1 RW ISDN Channel B DMA Select. A high bit selects the Parallel Port DMA channel. 0\h is the default after reset. [is this a copy/paste error? perhaps "Parallel Port" should be "ISDN Channel B"?] + // 0 RW [same text as above. Another copy/paste error, maybe? Should be channel A, with the bit selecting DMA channel 0/1 for ISDN channel A, the and the same for ISDN channel B in bit 1?] + LOGMASKED(LOG_DMA_SEL, "%s: Read DMA Select Register: %02x\n", machine().describe_context(), m_dma_sel); + return m_dma_sel; +} + +void ioc2_device::dma_sel_w(u8 data) +{ + // Bits 2-0 not quite understood, seem to be copy/paste error in SGI's own documents: + // + // 5:4 RW Serial Port Clock Select: 00 selects a 10MHz internal clock (default), 01 selects a 6.67MHz internal clock, and 02 or 03 selects the external clock input. + // 2 RW Parallel Port DMA Select. A high bit selects the Parallel Port DMA channel. 0\h is the default after reset. [this makes sense. -ed.] + // 1 RW ISDN Channel B DMA Select. A high bit selects the Parallel Port DMA channel. 0\h is the default after reset. [is this a copy/paste error? perhaps "Parallel Port" should be "ISDN Channel B"?] + // 0 RW [same text as above. Another copy/paste error, maybe? Should be channel A, with the bit selecting DMA channel 0/1 for ISDN channel A, the and the same for ISDN channel B in bit 1?] + LOGMASKED(LOG_DMA_SEL, "%s: Write DMA Select Register: %02x\n", machine().describe_context(), data); + uint8_t old = m_dma_sel; + m_dma_sel = data; + uint8_t changed = old ^ m_dma_sel; + if (changed & DMA_SEL_CLOCK_SEL_MASK) { - case PI1_DATA_REG: - LOGMASKED(LOG_PI1, "%s: Write PI1 Data Register: %02x\n", machine().describe_context(), data); - m_pi1->write(space, offset, data); - return; - case PI1_CTRL_REG: - LOGMASKED(LOG_PI1, "%s: Write PI1 Control Register: %02x\n", machine().describe_context(), data); - m_pi1->write(space, offset, data); - return; - case PI1_STATUS_REG: - LOGMASKED(LOG_PI1, "%s: Write PI1 Status Register: %02x\n", machine().describe_context(), data); - m_pi1->write(space, offset, data); - return; - - case PI1_DMA_CTRL_REG: - LOGMASKED(LOG_PI1, "%s: Write PI1 DMA Control Register: %02x\n", machine().describe_context(), data); - return; - case PI1_INT_STATUS_REG: - LOGMASKED(LOG_PI1, "%s: Write PI1 Interrupt Status Register: %02x\n", machine().describe_context(), data); - return; - case PI1_INT_MASK_REG: - LOGMASKED(LOG_PI1, "%s: Write PI1 Interrupt Mask Register: %02x\n", machine().describe_context(), data); - return; - case PI1_TIMER1_REG: - LOGMASKED(LOG_PI1, "%s: Write PI1 Timer1 Register: %02x\n", machine().describe_context(), data); - return; - case PI1_TIMER2_REG: - LOGMASKED(LOG_PI1, "%s: Write PI1 Timer2 Register: %02x\n", machine().describe_context(), data); - return; - case PI1_TIMER3_REG: - LOGMASKED(LOG_PI1, "%s: Write PI1 Timer3 Register: %02x\n", machine().describe_context(), data); - return; - case PI1_TIMER4_REG: - LOGMASKED(LOG_PI1, "%s: Write PI1 Timer4 Register: %02x\n", machine().describe_context(), data); - return; - - case SERIAL1_CMD_REG: - LOGMASKED(LOG_SERIAL, "%s: Write Serial 1 Command Register: %02x\n", machine().describe_context(), data); - m_scc->ba_cd_w(space, 3, data & 0xff); - return; - case SERIAL1_DATA_REG: - LOGMASKED(LOG_SERIAL, "%s: Write Serial 1 Data Register: %02x\n", machine().describe_context(), data); - m_scc->ba_cd_w(space, 2, data & 0xff); - return; - case SERIAL2_CMD_REG: - LOGMASKED(LOG_SERIAL, "%s: Write Serial 2 Command Register: %02x\n", machine().describe_context(), data); - m_scc->ba_cd_w(space, 1, data & 0xff); - return; - case SERIAL2_DATA_REG: - LOGMASKED(LOG_SERIAL, "%s: Write Serial 2 Data Register: %02x\n", machine().describe_context(), data); - m_scc->ba_cd_w(space, 0, data & 0xff); - return; - - case KBD_MOUSE_REGS1: - LOGMASKED(LOG_MOUSEKBD, "%s: Write Keyboard/Mouse Register 1: %02x\n", machine().describe_context(), data); -#if IOC2_NEW_KBDC - m_kbdc->data_w(data & 0xff); -#else - m_kbdc->data_w(space, 0, data & 0xff); -#endif - return; - case KBD_MOUSE_REGS2: - LOGMASKED(LOG_MOUSEKBD, "%s: Write Keyboard/Mouse Register 2: %02x\n", machine().describe_context(), data); -#if IOC2_NEW_KBDC - m_kbdc->command_w(data & 0xff); -#else - m_kbdc->data_w(space, 4, data & 0xff); -#endif - return; - - case PANEL_REG: - LOGMASKED(LOG_PANEL, "%s: Write Front Panel Register: %02x\n", machine().describe_context(), data); - m_front_panel_reg &= ~(data & (FRONT_PANEL_VOL_UP_INT | FRONT_PANEL_VOL_DOWN_INT | FRONT_PANEL_POWER_BUTTON_INT)); - if (!(m_front_panel_reg & FRONT_PANEL_INT_MASK)) - lower_local_irq(1, INT3_LOCAL1_PANEL); - return; - - case DMA_SEL_REG: + if (changed & DMA_SEL_CLOCK_SEL_EXT) { - // Bits 2-0 not quite understood, seem to be copy/paste error in SGI's own documents: - // - // 5:4 RW Serial Port Clock Select: 00 selects a 10MHz internal clock (default), 01 selects a 6.67MHz internal clock, and 02 or 03 selects the external clock input. - // 2 RW Parallel Port DMA Select. A high bit selects the Parallel Port DMA channel. 0\h is the default after reset. [this makes sense. -ed.] - // 1 RW ISDN Channel B DMA Select. A high bit selects the Parallel Port DMA channel. 0\h is the default after reset. [is this a copy/paste error? perhaps "Parallel Port" should be "ISDN Channel B"?] - // 0 RW [same text as above. Another copy/paste error, maybe? Should be channel A, with the bit selecting DMA channel 0/1 for ISDN channel A, the and the same for ISDN channel B in bit 1?] - LOGMASKED(LOG_DMA_SEL, "%s: Write DMA Select Register: %02x\n", machine().describe_context(), data); - uint8_t old = m_dma_sel; - m_dma_sel = data; - uint8_t changed = old ^ m_dma_sel; - if (changed & DMA_SEL_CLOCK_SEL_MASK) - { - if (changed & DMA_SEL_CLOCK_SEL_EXT) - { - LOGMASKED(LOG_DMA_SEL, "%s: External clock select %sselected\n", machine().describe_context(), (old & DMA_SEL_CLOCK_SEL_EXT) != 0 ? "de" : ""); - // TODO: verify the external Rx/Tx clock, is it fixed or programmable? - } - } - // TODO: Currently we always assume a 10MHz clock as PCLK - return; + LOGMASKED(LOG_DMA_SEL, "%s: External clock select %sselected\n", machine().describe_context(), (old & DMA_SEL_CLOCK_SEL_EXT) != 0 ? "de" : ""); + // TODO: verify the external Rx/Tx clock, is it fixed or programmable? } - - case RESET_REG: - LOGMASKED(LOG_RESET, "%s: Write Reset Register: %02x\n", machine().describe_context(), data); - handle_reset_reg_write(data); - return; - - case WRITE_REG: - LOGMASKED(LOG_WRITE, "%s: Write Write Register: %02x\n", machine().describe_context(), data); - m_write_reg = data; - return; - - case INT3_LOCAL0_STATUS_REG: - case INT3_LOCAL1_STATUS_REG: - case INT3_MAP_STATUS_REG: - case INT3_ERROR_STATUS_REG: - // Read-only registers - return; - - case INT3_LOCAL0_MASK_REG: - LOGMASKED(LOG_INT3, "%s: Write Interrupt Local0 Mask Register: %02x\n", machine().describe_context(), data); - set_local_int_mask(0, data); - return; - case INT3_LOCAL1_MASK_REG: - LOGMASKED(LOG_INT3, "%s: Write Interrupt Local1 Mask Register: %02x\n", machine().describe_context(), data); - set_local_int_mask(1, data); - return; - - case INT3_MAP_MASK0_REG: - LOGMASKED(LOG_INT3, "%s: Write Interrupt Map Mask0 Register: %02x\n", machine().describe_context(), data); - set_map_int_mask(0, data); - return; - case INT3_MAP_MASK1_REG: - LOGMASKED(LOG_INT3, "%s: Write Interrupt Map Mask1 Register: %02x\n", machine().describe_context(), data); - set_map_int_mask(1, data); - return; - case INT3_MAP_POLARITY_REG: - // TODO: Mappable interrupt polarity select - LOGMASKED(LOG_INT3, "%s: Write Interrupt Map Polarity Register: %02x\n", machine().describe_context(), data); - m_int3_map_pol_reg = data; - return; - case INT3_TIMER_CLEAR_REG: - LOGMASKED(LOG_INT3, "%s: Write Interrupt Timer Clear Register: %02x\n", machine().describe_context(), data); - set_timer_int_clear(data); - return; - - case TIMER_COUNT0_REG: - LOGMASKED(LOG_PIT, "%s: Write Timer Count0 Register: %02x\n", machine().describe_context(), data); - m_pit->write(0, data); - return; - case TIMER_COUNT1_REG: - LOGMASKED(LOG_PIT, "%s: Write Timer Count1 Register: %02x\n", machine().describe_context(), data); - m_pit->write(1, data); - return; - case TIMER_COUNT2_REG: - LOGMASKED(LOG_PIT, "%s: Write Timer Count2 Register: %02x\n", machine().describe_context(), data); - m_pit->write(2, data); - return; - case TIMER_CONTROL_REG: - LOGMASKED(LOG_PIT, "%s: Write Timer Control Register: %02x\n", machine().describe_context(), data); - m_pit->write(3, data); - return; } + // TODO: Currently we always assume a 10MHz clock as PCLK } -uint8_t ioc2_full_house_device::int2_r(offs_t offset) +u8 ioc2_device::reset_r() { - uint8_t ret = 0; - switch (offset) - { - case 0x0000/4: - ret = m_int3_local_status_reg[0]; - LOGMASKED(LOG_INT3, "%s: INT2 Local0 Interrupt Status Read: %02x\n", machine().describe_context(), ret); - break; - case 0x0004/4: - ret = m_int3_local_mask_reg[0]; - LOGMASKED(LOG_INT3, "%s: INT2 Local0 Interrupt Mask Read: %02x\n", machine().describe_context(), ret); - break; - case 0x0008/4: - ret = m_int3_local_status_reg[1]; - LOGMASKED(LOG_INT3, "%s: INT2 Local1 Interrupt Status Read: %02x\n", machine().describe_context(), ret); - break; - case 0x000c/4: - ret = m_int3_local_mask_reg[1]; - LOGMASKED(LOG_INT3, "%s: INT2 Local1 Interrupt Mask Read: %02x\n", machine().describe_context(), ret); - break; - case 0x0010/4: - ret = m_int3_map_status_reg; - LOGMASKED(LOG_INT3, "%s: INT2 Mappable Interrupt Status: %02x\n", machine().describe_context(), ret); - break; - case 0x0014/4: - ret = m_int3_map_mask_reg[0]; - LOGMASKED(LOG_INT3, "%s: INT2 Mapped Interrupt 0 Mask Read: %02x\n", machine().describe_context(), ret); - break; - case 0x0018/4: - ret = m_int3_map_mask_reg[1]; - LOGMASKED(LOG_INT3, "%s: INT2 Mapped Interrupt 1 Mask Read: %02x\n", machine().describe_context(), ret); - break; - case 0x0030/4: - ret = m_pit->read(0); - LOGMASKED(LOG_PIT, "%s: INT2 PIT Counter 0 Read: %02x\n", machine().describe_context(), ret); - break; - case 0x0034/4: - ret = m_pit->read(1); - LOGMASKED(LOG_PIT, "%s: INT2 PIT Counter 1 Read: %02x\n", machine().describe_context(), ret); - break; - case 0x0038/4: - ret = m_pit->read(2); - LOGMASKED(LOG_PIT, "%s: INT2 PIT Counter 2 Read: %02x\n", machine().describe_context(), ret); - break; - case 0x003c/4: - ret = m_pit->read(3); - LOGMASKED(LOG_PIT, "%s: INT2 PIT Control Read: %02x\n", machine().describe_context(), ret); - break; - default: - LOGMASKED(LOG_READ, "%s: Unknown INT2 Read: %08x\n", machine().describe_context(), 0x1fbd9000 + (offset << 2)); - break; - } - return ret; + LOGMASKED(LOG_RESET, "%s: Read Reset Register: %02x\n", machine().describe_context(), m_reset_reg); + return m_reset_reg; } -void ioc2_full_house_device::int2_w(offs_t offset, uint8_t data) +void ioc2_device::reset_w(u8 data) { - switch (offset) - { - case 0x0004/4: - set_local_int_mask(0, data); - LOGMASKED(LOG_INT3, "%s: INT2 Local0 Interrupt Mask Write: %02x\n", machine().describe_context(), data); - break; - case 0x000c/4: - set_local_int_mask(1, data); - LOGMASKED(LOG_INT3, "%s: INT2 Local1 Interrupt Mask Write: %02x\n", machine().describe_context(), data); - break; - case 0x0014/4: - set_map_int_mask(0, data); - LOGMASKED(LOG_INT3, "%s: INT2 Mapped Interrupt 0 Mask Write: %02x\n", machine().describe_context(), data); - break; - case 0x0018/4: - set_map_int_mask(1, data); - LOGMASKED(LOG_INT3, "%s: INT2 Mapped Interrupt 1 Mask Write: %02x\n", machine().describe_context(), data); - break; - case 0x0020/4: - set_timer_int_clear(data); - LOGMASKED(LOG_INT3, "%s: INT2 Timer Interrupt Clear Write: %02x\n", machine().describe_context(), data); - break; - case 0x0030/4: - m_pit->write(0, data); - LOGMASKED(LOG_PIT, "%s: INT2 PIT Counter 0 Write: %02x\n", machine().describe_context(), data); - break; - case 0x0034/4: - m_pit->write(1, data); - LOGMASKED(LOG_PIT, "%s: INT2 PIT Counter 1 Write: %02x\n", machine().describe_context(), data); - break; - case 0x0038/4: - m_pit->write(2, data); - LOGMASKED(LOG_PIT, "%s: INT2 PIT Counter 2 Write: %02x\n", machine().describe_context(), data); - break; - case 0x003c/4: - m_pit->write(3, data); - LOGMASKED(LOG_PIT, "%s: INT2 PIT Control Write: %02x\n", machine().describe_context(), data); - break; - default: - LOGMASKED(LOG_WRITE, "%s: Unknown INT2 Write: %08x = %02x\n", machine().describe_context(), 0x1fbd9000 + (offset << 2), data); - break; - } + LOGMASKED(LOG_RESET, "%s: Write Reset Register: %02x\n", machine().describe_context(), data); + handle_reset_reg_write(data); +} + +u8 ioc2_device::write_r() +{ + // Not yet implemented, some bits unnecessary: + // + // Bit Oper Description + // 7 RW Margin High. Set low for normal +5V operation, high to step supply up to +5.5V. Cleared at reset. + // 6 RW Margin Low. Set lowf or normal +5V operation, high to step supply down to +4.5V. Cleared at reset. + // 5 RW UART1 PC Mode. Set low to configure Port1 for RS422 Mac mode, high to select RS232 PC mode. Cleared at reset. + // 4 RW UART2 PC Mode. Set low to configure Port2 for RS422 Mac mode, high to select RS232 PC mode. Cleared at reset. + // 3 RW Ethernet Auto Select (active high). Set low for manual mode, high to have LXT901 automatically select TP or AUI based on link integrity. Cleared at reset. + // 2 RW Ethernet Port Select. Set low for TP, high for AUI. This setting is only used when Auto Select is in manual mode. Cleared at reset. + // 1 RW Ethernet UTP/STP select. Set low to select 150 ohm termination fro shielded TP (default), set high to select 100 ohm termination for unshielded TP. Cleared at reset. + // 0 RW Ethernet Normal Threshold (NTH) select. Set low to select the normal TP squelch threshold (default), high to reduce threshold by 4.5 dB (set low when reset). + LOGMASKED(LOG_WRITE, "%s: Read Write Register: %02x\n", machine().describe_context(), m_write_reg); + return m_write_reg; +} + +void ioc2_device::write_w(u8 data) +{ + LOGMASKED(LOG_WRITE, "%s: Write Write Register: %02x\n", machine().describe_context(), data); + m_write_reg = data; +} + +template +u8 ioc2_device::local_status_r() +{ + LOGMASKED(LOG_INT3, "%s: Read Interrupt Local%d Status Register: %02x\n", machine().describe_context(), N, m_int3_local_status_reg[N]); + return m_int3_local_status_reg[N]; +} + +template +u8 ioc2_device::local_mask_r() +{ + LOGMASKED(LOG_INT3, "%s: Read Interrupt Local%d Mask Register: %02x\n", machine().describe_context(), N, m_int3_local_mask_reg[N]); + return m_int3_local_mask_reg[N]; +} + +template +void ioc2_device::local_mask_w(u8 data) +{ + LOGMASKED(LOG_INT3, "%s: Write Interrupt Local%d Mask Register: %02x\n", machine().describe_context(), N, data); + set_local_int_mask(N, data); +} + +u8 ioc2_device::map_status_r() +{ + LOGMASKED(LOG_INT3, "%s: Read Interrupt Map Status Register: %02x\n", machine().describe_context(), m_int3_map_status_reg); + return m_int3_map_status_reg; +} + +template +u8 ioc2_device::map_mask_r() +{ + LOGMASKED(LOG_INT3, "%s: Read Interrupt Map Mask%d Register: %02x\n", machine().describe_context(), N, m_int3_map_mask_reg[N]); + return m_int3_map_mask_reg[N]; +} + +template +void ioc2_device::map_mask_w(u8 data) +{ + LOGMASKED(LOG_INT3, "%s: Write Interrupt Map Mask%d Register: %02x\n", machine().describe_context(), N, data); + set_map_int_mask(N, data); +} + +u8 ioc2_device::map_pol_r() +{ + LOGMASKED(LOG_INT3, "%s: Read Interrupt Map Polarity Register: %02x\n", machine().describe_context(), m_int3_map_pol_reg); + return m_int3_map_pol_reg; +} + +void ioc2_device::map_pol_w(u8 data) +{ + // TODO: Mappable interrupt polarity select + LOGMASKED(LOG_INT3, "%s: Write Interrupt Map Polarity Register: %02x\n", machine().describe_context(), data); + m_int3_map_pol_reg = data; +} + +void ioc2_device::timer_int_clear_w(u8 data) +{ + LOGMASKED(LOG_INT3, "%s: Write Interrupt Timer Clear Register: %02x\n", machine().describe_context(), data); + set_timer_int_clear(data); +} + +u8 ioc2_device::error_status_r() +{ + LOGMASKED(LOG_INT3, "%s: Read Interrupt Error Status Register: %02x\n", machine().describe_context(), m_int3_err_status_reg); + return m_int3_err_status_reg; +} + +void ioc2_device::base_map(address_map &map) +{ + map(0x00, 0x02).rw(m_pi1, FUNC(pc_lpt_device::read), FUNC(pc_lpt_device::write)); + map(0x03, 0x03).rw(FUNC(ioc2_device::pi1_dma_ctrl_r), FUNC(ioc2_device::pi1_dma_ctrl_w)); + map(0x04, 0x04).rw(FUNC(ioc2_device::pi1_int_status_r), FUNC(ioc2_device::pi1_int_status_w)); + map(0x05, 0x05).rw(FUNC(ioc2_device::pi1_int_mask_r), FUNC(ioc2_device::pi1_int_mask_w)); + map(0x06, 0x06).rw(FUNC(ioc2_device::pi1_timer1_r), FUNC(ioc2_device::pi1_timer1_w)); + map(0x07, 0x07).rw(FUNC(ioc2_device::pi1_timer2_r), FUNC(ioc2_device::pi1_timer2_w)); + map(0x08, 0x08).rw(FUNC(ioc2_device::pi1_timer3_r), FUNC(ioc2_device::pi1_timer3_w)); + map(0x09, 0x09).rw(FUNC(ioc2_device::pi1_timer4_r), FUNC(ioc2_device::pi1_timer4_w)); + map(0x0c, 0x0f).rw(m_scc, FUNC(z80scc_device::ba_cd_inv_r), FUNC(z80scc_device::ba_cd_inv_w)); + map(0x10, 0x10).rw(m_kbdc, FUNC(ps2_keyboard_controller_device::data_r), FUNC(ps2_keyboard_controller_device::data_w)); + map(0x11, 0x11).rw(m_kbdc, FUNC(ps2_keyboard_controller_device::status_r), FUNC(ps2_keyboard_controller_device::command_w)); + map(0x12, 0x12).rw(FUNC(ioc2_device::gc_select_r), FUNC(ioc2_device::gc_select_w)); + map(0x13, 0x13).rw(FUNC(ioc2_device::gen_cntl_r), FUNC(ioc2_device::gen_cntl_w)); + map(0x14, 0x14).rw(FUNC(ioc2_device::front_panel_r), FUNC(ioc2_device::front_panel_w)); + map(0x16, 0x16).r(FUNC(ioc2_device::system_id_r)); + map(0x18, 0x18).r(FUNC(ioc2_device::read_r)); + map(0x1a, 0x1a).rw(FUNC(ioc2_device::dma_sel_r), FUNC(ioc2_device::dma_sel_w)); + map(0x1c, 0x1c).rw(FUNC(ioc2_device::reset_r), FUNC(ioc2_device::reset_w)); + map(0x1e, 0x1e).rw(FUNC(ioc2_device::write_r), FUNC(ioc2_device::write_w)); +} + +void ioc2_guinness_device::map(address_map &map) +{ + base_map(map); + map(0x20, 0x20).r(FUNC(ioc2_guinness_device::local_status_r<0>)); + map(0x21, 0x21).rw(FUNC(ioc2_guinness_device::local_mask_r<0>), FUNC(ioc2_guinness_device::local_mask_w<0>)); + map(0x22, 0x22).r(FUNC(ioc2_guinness_device::local_status_r<1>)); + map(0x23, 0x23).rw(FUNC(ioc2_guinness_device::local_mask_r<1>), FUNC(ioc2_guinness_device::local_mask_w<1>)); + map(0x24, 0x24).r(FUNC(ioc2_guinness_device::map_status_r)); + map(0x25, 0x25).rw(FUNC(ioc2_guinness_device::map_mask_r<0>), FUNC(ioc2_guinness_device::map_mask_w<0>)); + map(0x26, 0x26).rw(FUNC(ioc2_guinness_device::map_mask_r<1>), FUNC(ioc2_guinness_device::map_mask_w<1>)); + map(0x27, 0x27).rw(FUNC(ioc2_guinness_device::map_pol_r), FUNC(ioc2_guinness_device::map_pol_w)); + map(0x28, 0x28).w(FUNC(ioc2_guinness_device::timer_int_clear_w)); + map(0x29, 0x29).r(FUNC(ioc2_guinness_device::error_status_r)); + map(0x2c, 0x2f).rw(m_pit, FUNC(pit8254_device::read), FUNC(pit8254_device::write)); +} + +void ioc2_full_house_device::map(address_map &map) +{ + base_map(map); +} + +void ioc2_full_house_device::int2_map(address_map &map) +{ + map(0x00, 0x00).r(FUNC(ioc2_full_house_device::local_status_r<0>)); + map(0x01, 0x01).rw(FUNC(ioc2_full_house_device::local_mask_r<0>), FUNC(ioc2_full_house_device::local_mask_w<0>)); + map(0x02, 0x02).r(FUNC(ioc2_full_house_device::local_status_r<1>)); + map(0x03, 0x03).rw(FUNC(ioc2_full_house_device::local_mask_r<1>), FUNC(ioc2_full_house_device::local_mask_w<1>)); + map(0x04, 0x04).r(FUNC(ioc2_full_house_device::map_status_r)); + map(0x05, 0x05).rw(FUNC(ioc2_full_house_device::map_mask_r<0>), FUNC(ioc2_full_house_device::map_mask_w<0>)); + map(0x06, 0x06).rw(FUNC(ioc2_full_house_device::map_mask_r<1>), FUNC(ioc2_full_house_device::map_mask_w<1>)); + map(0x08, 0x08).w(FUNC(ioc2_full_house_device::timer_int_clear_w)); + map(0x0c, 0x0f).rw(m_pit, FUNC(pit8254_device::read), FUNC(pit8254_device::write)); } void ioc2_device::set_local_int_mask(int channel, uint8_t mask) @@ -815,9 +647,7 @@ void ioc2_device::handle_reset_reg_write(uint8_t data) // guinness/fullhouse-specific implementations can handle bit 3 being used for ISDN reset on Indy only and bit 2 for EISA reset on Indigo 2 only, but for now we do nothing with it if (!BIT(data, 1)) { -#if !IOC2_NEW_KBDC - m_kbdc->reset(); -#endif + //m_kbdc->reset(); } m_reset_reg = 0; } diff --git a/src/mame/machine/ioc2.h b/src/mame/machine/ioc2.h index 0d92399625e..1af24846849 100644 --- a/src/mame/machine/ioc2.h +++ b/src/mame/machine/ioc2.h @@ -11,13 +11,7 @@ #pragma once -#define IOC2_NEW_KBDC (1) - -#if IOC2_NEW_KBDC #include "machine/at_keybc.h" -#else -#include "machine/8042kbdc.h" -#endif #include "bus/pc_kbd/pc_kbdc.h" #include "bus/pc_kbd/keyboards.h" #include "machine/pc_lpt.h" @@ -30,9 +24,6 @@ class ioc2_device : public device_t public: template void set_cpu_tag(T &&tag) { m_maincpu.set_tag(std::forward(tag)); } - void write(offs_t offset, uint8_t data); - uint8_t read(offs_t offset); - DECLARE_INPUT_CHANGED_MEMBER( power_button ); DECLARE_INPUT_CHANGED_MEMBER( volume_down ); DECLARE_INPUT_CHANGED_MEMBER( volume_up ); @@ -91,53 +82,46 @@ protected: void check_mappable_interrupt(int channel); - enum - { - PI1_DATA_REG = 0x00/4, - PI1_CTRL_REG = 0x04/4, - PI1_STATUS_REG = 0x08/4, - PI1_DMA_CTRL_REG = 0x0c/4, - PI1_INT_STATUS_REG = 0x10/4, - PI1_INT_MASK_REG = 0x14/4, - PI1_TIMER1_REG = 0x18/4, - PI1_TIMER2_REG = 0x1c/4, - PI1_TIMER3_REG = 0x20/4, - PI1_TIMER4_REG = 0x24/4, + u8 pi1_dma_ctrl_r(); + void pi1_dma_ctrl_w(u8 data); + u8 pi1_int_status_r(); + void pi1_int_status_w(u8 data); + u8 pi1_int_mask_r(); + void pi1_int_mask_w(u8 data); + u8 pi1_timer1_r(); + u8 pi1_timer2_r(); + u8 pi1_timer3_r(); + u8 pi1_timer4_r(); + void pi1_timer1_w(u8 data); + void pi1_timer2_w(u8 data); + void pi1_timer3_w(u8 data); + void pi1_timer4_w(u8 data); + u8 gc_select_r(); + void gc_select_w(u8 data); + u8 gen_cntl_r(); + void gen_cntl_w(u8 data); + u8 front_panel_r(); + void front_panel_w(u8 data); + u8 system_id_r(); + u8 read_r(); + u8 dma_sel_r(); + void dma_sel_w(u8 data); + u8 reset_r(); + void reset_w(u8 data); + u8 write_r(); + void write_w(u8 data); + template u8 local_status_r(); + template u8 local_mask_r(); + template void local_mask_w(u8 data); + u8 map_status_r(); + template u8 map_mask_r(); + template void map_mask_w(u8 data); + u8 map_pol_r(); + void map_pol_w(u8 data); + void timer_int_clear_w(u8 data); + u8 error_status_r(); - SERIAL1_CMD_REG = 0x30/4, - SERIAL1_DATA_REG = 0x34/4, - SERIAL2_CMD_REG = 0x38/4, - SERIAL2_DATA_REG = 0x3c/4, - - KBD_MOUSE_REGS1 = 0x40/4, - KBD_MOUSE_REGS2 = 0x44/4, - - GENCTRL_SELECT_REG = 0x48/4, - GENCTRL_REG = 0x4c/4, - - PANEL_REG = 0x50/4, - SYSID_REG = 0x58/4, - READ_REG = 0x60/4, - DMA_SEL_REG = 0x68/4, - RESET_REG = 0x70/4, - WRITE_REG = 0x78/4, - - INT3_LOCAL0_STATUS_REG = 0x80/4, - INT3_LOCAL0_MASK_REG = 0x84/4, - INT3_LOCAL1_STATUS_REG = 0x88/4, - INT3_LOCAL1_MASK_REG = 0x8c/4, - INT3_MAP_STATUS_REG = 0x90/4, - INT3_MAP_MASK0_REG = 0x94/4, - INT3_MAP_MASK1_REG = 0x98/4, - INT3_MAP_POLARITY_REG = 0x9c/4, - INT3_TIMER_CLEAR_REG = 0xa0/4, - INT3_ERROR_STATUS_REG = 0xa4/4, - - TIMER_COUNT0_REG = 0xb0/4, - TIMER_COUNT1_REG = 0xb4/4, - TIMER_COUNT2_REG = 0xb8/4, - TIMER_CONTROL_REG = 0xbc/4, - }; + void base_map(address_map &map); enum { @@ -165,11 +149,7 @@ protected: required_device m_scc; required_device m_pi1; // we assume standard parallel port (SPP) mode // TODO: SGI parallel port (SGIPP), HP BOISE high speed parallel port (HPBPP), and Ricoh scanner mode -#if IOC2_NEW_KBDC required_device m_kbdc; -#else - required_device m_kbdc; -#endif required_device m_pit; virtual void handle_reset_reg_write(uint8_t data); @@ -219,6 +199,7 @@ public: set_cpu_tag(std::forward(cpu_tag)); } + void map(address_map &map); ioc2_guinness_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); protected: @@ -237,8 +218,8 @@ public: ioc2_full_house_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); - uint8_t int2_r(offs_t offset); - void int2_w(offs_t offset, uint8_t data); + void map(address_map &map); + void int2_map(address_map &map); protected: uint8_t get_system_id() override { return 0x11; }