mirror of
https://github.com/holub/mame
synced 2025-04-16 13:34:55 +03:00
c128: PARTNER 128 WIP. (nw)
This commit is contained in:
parent
bf047e7c03
commit
43f506316f
@ -167,7 +167,7 @@ Missing dumps:
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<feature name="game" value="1" />
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<feature name="exrom" value="1" />
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<dataarea name="romh" size="0x4000">
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<dataarea name="roml" size="0x4000">
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<rom name="partner 128" size="0x4000" crc="686a6881" sha1="53d4bcf7aff40f1642bc143626b63beb3c8478dc" offset="0" />
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</dataarea>
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</part>
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@ -2,29 +2,29 @@
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// copyright-holders:Curt Coder
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/**********************************************************************
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Timeworks PARTNER 128 cartridge emulation
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Timeworks PARTNER 128 cartridge emulation
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**********************************************************************/
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/*
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PCB Layout
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----------
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PCB Layout
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----------
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|---------------|
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|LS74 SW CN|
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|LS09 LS273|
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|LS139 RAM |
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|LS133 |
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| LS240 |
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|LS33 ROM |
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|LS09 |
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|||||||||||||||
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|---------------|
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|LS74 SW * |
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|LS09 LS273|
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|LS139 RAM |
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|LS133 |
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| LS240 |
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|LS33 ROM |
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|LS09 |
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|||||||||||||||
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ROM - Toshiba TMM24128AP 16Kx8 EPROM (blank label)
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RAM - Sony CXK5864PN-15L 8Kx8 SRAM
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SW - push button switch
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CN - lead out to joystick port dongle
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ROM - Toshiba TMM24128AP 16Kx8 EPROM (blank label)
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RAM - Sony CXK5864PN-15L 8Kx8 SRAM
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SW - push button switch
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* - solder point for joystick port dongle
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*/
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@ -45,6 +45,7 @@ const device_type C128_PARTNER = &device_creator<partner128_t>;
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WRITE_LINE_MEMBER( partner128_t::nmi_w )
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{
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m_ls74_d1 = state;
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}
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static INPUT_PORTS_START( c128_partner )
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@ -75,8 +76,14 @@ ioport_constructor partner128_t::device_input_ports() const
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partner128_t::partner128_t(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
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device_t(mconfig, C128_PARTNER, "PARTNER 128", tag, owner, clock, "c128_partner", __FILE__),
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device_c64_expansion_card_interface(mconfig, *this),
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device_vcs_control_port_interface(mconfig, *this),
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m_ram(*this, "ram")
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//device_vcs_control_port_interface(mconfig, *this),
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m_ram(*this, "ram"),
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m_ram_a12_a7(0),
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m_ls74_cd(0),
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m_ls74_d1(0),
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m_ls74_q1(0),
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m_ls74_q2(0),
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m_joyb2(0)
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{
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}
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@ -89,6 +96,14 @@ void partner128_t::device_start()
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{
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// allocate memory
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m_ram.allocate(0x2000);
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// state saving
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save_item(NAME(m_ram_a12_a7));
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save_item(NAME(m_ls74_cd));
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save_item(NAME(m_ls74_d1));
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save_item(NAME(m_ls74_q1));
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save_item(NAME(m_ls74_q2));
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save_item(NAME(m_joyb2));
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}
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@ -98,6 +113,13 @@ void partner128_t::device_start()
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void partner128_t::device_reset()
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{
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m_ram_a12_a7 = 0;
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m_ls74_cd = 0;
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m_ls74_q1 = 0;
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m_ls74_q2 = 0;
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nmi_w(CLEAR_LINE);
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}
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@ -107,6 +129,30 @@ void partner128_t::device_reset()
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UINT8 partner128_t::c64_cd_r(address_space &space, offs_t offset, UINT8 data, int sphi2, int ba, int roml, int romh, int io1, int io2)
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{
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if (!roml)
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{
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data = m_roml[offset & 0x3fff];
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}
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if (!io1)
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{
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if (BIT(offset, 7))
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{
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data = m_roml[offset & 0x3fff];
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m_ls74_q1 = m_ls74_d1;
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}
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else
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{
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data = m_ram[(m_ram_a12_a7 << 7) | (offset & 0x7f)];
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}
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}
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if (m_ls74_q2 && ((offset & 0xff3a) == 0xff3a))
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{
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data = 0x21;
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}
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return data;
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}
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@ -117,6 +163,47 @@ UINT8 partner128_t::c64_cd_r(address_space &space, offs_t offset, UINT8 data, in
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void partner128_t::c64_cd_w(address_space &space, offs_t offset, UINT8 data, int sphi2, int ba, int roml, int romh, int io1, int io2)
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{
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if (!io1)
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{
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if (BIT(offset, 7))
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{
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/*
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bit description
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0 RAM A7
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1 RAM A8
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2 RAM A9
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3 RAM A10
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4 RAM A11
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5 RAM A12
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6 LS74 1Cd,2Cd
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7 N/C
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*/
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m_ram_a12_a7 = data & 0x3f;
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m_ls74_cd = BIT(data, 6);
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if (!m_ls74_cd)
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{
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m_ls74_q1 = 0;
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m_ls74_q2 = 0;
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nmi_w(CLEAR_LINE);
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}
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}
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else
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{
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m_ram[(m_ram_a12_a7 << 7) | (offset & 0x7f)] = data;
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}
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}
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if (sphi2 && ((offset & 0xfff0) == 0xd600))
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{
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m_ram[(m_ram_a12_a7 << 7) | (offset & 0x7f)] = data;
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}
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}
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@ -128,3 +215,22 @@ int partner128_t::c64_game_r(offs_t offset, int sphi2, int ba, int rw)
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{
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return 1;
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}
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//-------------------------------------------------
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// vcs_joy_w - joystick write
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//-------------------------------------------------
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void partner128_t::vcs_joy_w(UINT8 data)
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{
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int joya2 = BIT(data, 2);
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if (!m_joyb2 && joya2)
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{
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m_ls74_q2 = m_ls74_q1;
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nmi_w(m_ls74_q2 ? ASSERT_LINE : CLEAR_LINE);
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m_joyb2 = joya2;
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}
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}
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@ -24,8 +24,8 @@
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// ======================> partner128_t
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class partner128_t : public device_t,
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public device_c64_expansion_card_interface,
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public device_vcs_control_port_interface
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public device_c64_expansion_card_interface
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//public device_vcs_control_port_interface
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{
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public:
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// construction/destruction
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@ -47,9 +47,17 @@ protected:
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virtual int c64_game_r(offs_t offset, int sphi2, int ba, int rw);
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// device_vcs_control_port_interface overrides
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virtual void vcs_joy_w(UINT8 data);
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private:
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optional_shared_ptr<UINT8> m_ram;
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int m_ram_a12_a7;
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int m_ls74_cd;
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int m_ls74_d1;
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int m_ls74_q1;
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int m_ls74_q2;
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int m_joyb2;
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};
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@ -963,11 +963,11 @@ READ8_MEMBER( c128_state::cia1_pa_r )
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bit description
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PA0 COL0, JOY B0
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PA1 COL1, JOY B1
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PA2 COL2, JOY B2
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PA3 COL3, JOY B3
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PA4 COL4, BTNB
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PA0 COL0, JOYB0
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PA1 COL1, JOYB1
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PA2 COL2, JOYB2
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PA3 COL3, JOYB3
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PA4 COL4, FBTNB
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PA5 COL5
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PA6 COL6
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PA7 COL7
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@ -1005,20 +1005,40 @@ READ8_MEMBER( c128_state::cia1_pa_r )
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return data;
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}
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WRITE8_MEMBER( c128_state::cia1_pa_w )
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{
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/*
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bit description
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PA0 COL0, JOYB0
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PA1 COL1, JOYB1
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PA2 COL2, JOYB2
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PA3 COL3, JOYB3
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PA4 COL4, FBTNB
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PA5 COL5
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PA6 COL6
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PA7 COL7
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*/
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m_joy2->joy_w(data & 0x1f);
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}
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READ8_MEMBER( c128_state::cia1_pb_r )
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{
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/*
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bit description
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PB0 JOY A0
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PB1 JOY A1
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PB2 JOY A2
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PB3 JOY A3
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PB4 BTNA/_LP
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PB5
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PB6
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PB7
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PB0 ROW0, JOYA0
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PB1 ROW1, JOYA1
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PB2 ROW2, JOYA2
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PB3 ROW3, JOYA3
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PB4 ROW4, FBTNA, _LP
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PB5 ROW5
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PB6 ROW6
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PB7 ROW7
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*/
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@ -1055,17 +1075,19 @@ WRITE8_MEMBER( c128_state::cia1_pb_w )
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bit description
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PB0 ROW0
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PB1 ROW1
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PB2 ROW2
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PB3 ROW3
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PB4 ROW4
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PB0 ROW0, JOYA0
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PB1 ROW1, JOYA1
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PB2 ROW2, JOYA2
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PB3 ROW3, JOYA3
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PB4 ROW4, FBTNA, _LP
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PB5 ROW5
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PB6 ROW6
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PB7 ROW7
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*/
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m_joy1->joy_w(data & 0x1f);
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m_vic->lp_w(BIT(data, 4));
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}
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@ -1487,6 +1509,7 @@ static MACHINE_CONFIG_START( ntsc, c128_state )
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MCFG_MOS6526_CNT_CALLBACK(WRITELINE(c128_state, cia1_cnt_w))
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MCFG_MOS6526_SP_CALLBACK(WRITELINE(c128_state, cia1_sp_w))
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MCFG_MOS6526_PA_INPUT_CALLBACK(READ8(c128_state, cia1_pa_r))
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MCFG_MOS6526_PA_OUTPUT_CALLBACK(WRITE8(c128_state, cia1_pa_w))
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MCFG_MOS6526_PB_INPUT_CALLBACK(READ8(c128_state, cia1_pb_r))
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MCFG_MOS6526_PB_OUTPUT_CALLBACK(WRITE8(c128_state, cia1_pb_w))
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MCFG_DEVICE_ADD(MOS6526_2_TAG, MOS6526, XTAL_14_31818MHz*2/3.5/8)
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@ -1659,6 +1682,7 @@ static MACHINE_CONFIG_START( pal, c128_state )
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MCFG_MOS6526_CNT_CALLBACK(WRITELINE(c128_state, cia1_cnt_w))
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MCFG_MOS6526_SP_CALLBACK(WRITELINE(c128_state, cia1_sp_w))
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MCFG_MOS6526_PA_INPUT_CALLBACK(READ8(c128_state, cia1_pa_r))
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MCFG_MOS6526_PA_OUTPUT_CALLBACK(WRITE8(c128_state, cia1_pa_w))
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MCFG_MOS6526_PB_INPUT_CALLBACK(READ8(c128_state, cia1_pb_r))
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MCFG_MOS6526_PB_OUTPUT_CALLBACK(WRITE8(c128_state, cia1_pb_w))
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MCFG_DEVICE_ADD(MOS6526_2_TAG, MOS6526, XTAL_17_734472MHz*2/4.5/8)
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@ -625,20 +625,40 @@ READ8_MEMBER( c64_state::cia1_pa_r )
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return data;
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}
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WRITE8_MEMBER( c64_state::cia1_pa_w )
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{
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/*
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bit description
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PA0 COL0, JOY B0
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PA1 COL1, JOY B1
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PA2 COL2, JOY B2
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PA3 COL3, JOY B3
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PA4 COL4, BTNB
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PA5 COL5
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PA6 COL6
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PA7 COL7
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*/
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m_joy2->joy_w(data & 0x1f);
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}
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READ8_MEMBER( c64_state::cia1_pb_r )
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{
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/*
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bit description
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PB0 JOY A0
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PB1 JOY A1
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PB2 JOY A2
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PB3 JOY A3
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PB4 BTNA/_LP
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PB5
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PB6
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PB7
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PB0 ROW0, JOY A0
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PB1 ROW1, JOY A1
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PB2 ROW2, JOY A2
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PB3 ROW3, JOY A3
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PB4 ROW4, BTNA, _LP
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PB5 ROW5
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PB6 ROW6
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PB7 ROW7
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*/
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@ -671,17 +691,19 @@ WRITE8_MEMBER( c64_state::cia1_pb_w )
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bit description
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PB0 ROW0
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PB1 ROW1
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PB2 ROW2
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PB3 ROW3
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PB4 ROW4
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PB0 ROW0, JOY A0
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PB1 ROW1, JOY A1
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PB2 ROW2, JOY A2
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PB3 ROW3, JOY A3
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PB4 ROW4, BTNA, _LP
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PB5 ROW5
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PB6 ROW6
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PB7 ROW7
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*/
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m_joy1->joy_w(data & 0x1f);
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m_vic->lp_w(BIT(data, 4));
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}
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@ -1289,6 +1311,7 @@ static MACHINE_CONFIG_START( pal, c64_state )
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MCFG_MOS6526_CNT_CALLBACK(DEVWRITELINE(PET_USER_PORT_TAG, pet_user_port_device, write_4))
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MCFG_MOS6526_SP_CALLBACK(DEVWRITELINE(PET_USER_PORT_TAG, pet_user_port_device, write_5))
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MCFG_MOS6526_PA_INPUT_CALLBACK(READ8(c64_state, cia1_pa_r))
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MCFG_MOS6526_PA_OUTPUT_CALLBACK(WRITE8(c64_state, cia1_pa_w))
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MCFG_MOS6526_PB_INPUT_CALLBACK(READ8(c64_state, cia1_pb_r))
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MCFG_MOS6526_PB_OUTPUT_CALLBACK(WRITE8(c64_state, cia1_pb_w))
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MCFG_DEVICE_ADD(MOS6526_2_TAG, MOS6526, XTAL_17_734472MHz/18)
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@ -1423,6 +1446,7 @@ static MACHINE_CONFIG_START( pal_gs, c64gs_state )
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MCFG_MOS6526_CNT_CALLBACK(DEVWRITELINE(PET_USER_PORT_TAG, pet_user_port_device, write_4))
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MCFG_MOS6526_SP_CALLBACK(DEVWRITELINE(PET_USER_PORT_TAG, pet_user_port_device, write_5))
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MCFG_MOS6526_PA_INPUT_CALLBACK(READ8(c64gs_state, cia1_pa_r))
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MCFG_MOS6526_PA_OUTPUT_CALLBACK(WRITE8(c64_state, cia1_pa_w))
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MCFG_MOS6526_PB_INPUT_CALLBACK(READ8(c64gs_state, cia1_pb_r))
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MCFG_MOS6526_PB_OUTPUT_CALLBACK(WRITE8(c64_state, cia1_pb_w))
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MCFG_DEVICE_ADD(MOS6526_2_TAG, MOS6526, XTAL_17_734472MHz/18)
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@ -171,6 +171,7 @@ public:
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DECLARE_WRITE_LINE_MEMBER( cia1_cnt_w );
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DECLARE_WRITE_LINE_MEMBER( cia1_sp_w );
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DECLARE_READ8_MEMBER( cia1_pa_r );
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DECLARE_WRITE8_MEMBER( cia1_pa_w );
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DECLARE_READ8_MEMBER( cia1_pb_r );
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DECLARE_WRITE8_MEMBER( cia1_pb_w );
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@ -34,42 +34,42 @@
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class c64_state : public driver_device
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{
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public:
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c64_state(const machine_config &mconfig, device_type type, const char *tag)
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: driver_device(mconfig, type, tag),
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m_maincpu(*this, M6510_TAG),
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m_pla(*this, PLA_TAG),
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m_vic(*this, MOS6569_TAG),
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m_sid(*this, MOS6581_TAG),
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m_cia1(*this, MOS6526_1_TAG),
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m_cia2(*this, MOS6526_2_TAG),
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m_iec(*this, CBM_IEC_TAG),
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m_joy1(*this, CONTROL1_TAG),
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m_joy2(*this, CONTROL2_TAG),
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m_exp(*this, C64_EXPANSION_SLOT_TAG),
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m_user(*this, PET_USER_PORT_TAG),
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m_ram(*this, RAM_TAG),
|
||||
m_cassette(*this, PET_DATASSETTE_PORT_TAG),
|
||||
m_color_ram(*this, "color_ram"),
|
||||
m_row0(*this, "ROW0"),
|
||||
m_row1(*this, "ROW1"),
|
||||
m_row2(*this, "ROW2"),
|
||||
m_row3(*this, "ROW3"),
|
||||
m_row4(*this, "ROW4"),
|
||||
m_row5(*this, "ROW5"),
|
||||
m_row6(*this, "ROW6"),
|
||||
m_row7(*this, "ROW7"),
|
||||
m_lock(*this, "LOCK"),
|
||||
m_loram(1),
|
||||
m_hiram(1),
|
||||
m_charen(1),
|
||||
m_va14(1),
|
||||
m_va15(1),
|
||||
m_restore(1),
|
||||
m_cia1_irq(CLEAR_LINE),
|
||||
m_cia2_irq(CLEAR_LINE),
|
||||
m_vic_irq(CLEAR_LINE),
|
||||
m_exp_irq(CLEAR_LINE),
|
||||
m_exp_nmi(CLEAR_LINE)
|
||||
c64_state(const machine_config &mconfig, device_type type, const char *tag) :
|
||||
driver_device(mconfig, type, tag),
|
||||
m_maincpu(*this, M6510_TAG),
|
||||
m_pla(*this, PLA_TAG),
|
||||
m_vic(*this, MOS6569_TAG),
|
||||
m_sid(*this, MOS6581_TAG),
|
||||
m_cia1(*this, MOS6526_1_TAG),
|
||||
m_cia2(*this, MOS6526_2_TAG),
|
||||
m_iec(*this, CBM_IEC_TAG),
|
||||
m_joy1(*this, CONTROL1_TAG),
|
||||
m_joy2(*this, CONTROL2_TAG),
|
||||
m_exp(*this, C64_EXPANSION_SLOT_TAG),
|
||||
m_user(*this, PET_USER_PORT_TAG),
|
||||
m_ram(*this, RAM_TAG),
|
||||
m_cassette(*this, PET_DATASSETTE_PORT_TAG),
|
||||
m_color_ram(*this, "color_ram"),
|
||||
m_row0(*this, "ROW0"),
|
||||
m_row1(*this, "ROW1"),
|
||||
m_row2(*this, "ROW2"),
|
||||
m_row3(*this, "ROW3"),
|
||||
m_row4(*this, "ROW4"),
|
||||
m_row5(*this, "ROW5"),
|
||||
m_row6(*this, "ROW6"),
|
||||
m_row7(*this, "ROW7"),
|
||||
m_lock(*this, "LOCK"),
|
||||
m_loram(1),
|
||||
m_hiram(1),
|
||||
m_charen(1),
|
||||
m_va14(1),
|
||||
m_va15(1),
|
||||
m_restore(1),
|
||||
m_cia1_irq(CLEAR_LINE),
|
||||
m_cia2_irq(CLEAR_LINE),
|
||||
m_vic_irq(CLEAR_LINE),
|
||||
m_exp_irq(CLEAR_LINE),
|
||||
m_exp_nmi(CLEAR_LINE)
|
||||
{ }
|
||||
|
||||
// ROM
|
||||
@ -121,6 +121,7 @@ public:
|
||||
|
||||
DECLARE_WRITE_LINE_MEMBER( cia1_irq_w );
|
||||
DECLARE_READ8_MEMBER( cia1_pa_r );
|
||||
DECLARE_WRITE8_MEMBER( cia1_pa_w );
|
||||
DECLARE_READ8_MEMBER( cia1_pb_r );
|
||||
DECLARE_WRITE8_MEMBER( cia1_pb_w );
|
||||
|
||||
|
Loading…
Reference in New Issue
Block a user