pc9801.cpp: Eliminate bogus XTALs (nw)

This commit is contained in:
AJR 2018-07-21 00:39:21 -04:00
parent 4bd63272aa
commit 445c94120b
4 changed files with 10 additions and 14 deletions

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@ -18,8 +18,6 @@
#include "speaker.h" #include "speaker.h"
#define MAIN_CLOCK_X1 XTAL(1'996'800)
//************************************************************************** //**************************************************************************
// GLOBAL VARIABLES // GLOBAL VARIABLES
//************************************************************************** //**************************************************************************
@ -40,7 +38,7 @@ WRITE_LINE_MEMBER(pc9801_26_device::sound_irq)
MACHINE_CONFIG_START(pc9801_26_device::device_add_mconfig) MACHINE_CONFIG_START(pc9801_26_device::device_add_mconfig)
SPEAKER(config, "mono").front_center(); SPEAKER(config, "mono").front_center();
MCFG_DEVICE_ADD("opn", YM2203, MAIN_CLOCK_X1*2) // unknown clock / divider MCFG_DEVICE_ADD("opn", YM2203, 15.9744_MHz_XTAL / 4) // divider not verified
MCFG_YM2203_IRQ_HANDLER(WRITELINE(*this, pc9801_26_device, sound_irq)) MCFG_YM2203_IRQ_HANDLER(WRITELINE(*this, pc9801_26_device, sound_irq))
MCFG_AY8910_PORT_A_READ_CB(READ8(*this, pc9801_26_device, opn_porta_r)) MCFG_AY8910_PORT_A_READ_CB(READ8(*this, pc9801_26_device, opn_porta_r))
//MCFG_AY8910_PORT_B_READ_CB(READ8(*this, pc9801_state, opn_portb_r)) //MCFG_AY8910_PORT_B_READ_CB(READ8(*this, pc9801_state, opn_portb_r))

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@ -32,8 +32,6 @@
#include "speaker.h" #include "speaker.h"
#define MAIN_CLOCK_X1 XTAL(1'996'800)
//************************************************************************** //**************************************************************************
// GLOBAL VARIABLES // GLOBAL VARIABLES
//************************************************************************** //**************************************************************************
@ -48,17 +46,17 @@ DEFINE_DEVICE_TYPE(PC9801_AMD98, pc9801_amd98_device, "pc9801_amd98", "pc9801_am
MACHINE_CONFIG_START(pc9801_amd98_device::device_add_mconfig) MACHINE_CONFIG_START(pc9801_amd98_device::device_add_mconfig)
SPEAKER(config, "lspeaker").front_left(); SPEAKER(config, "lspeaker").front_left();
SPEAKER(config, "rspeaker").front_right(); SPEAKER(config, "rspeaker").front_right();
MCFG_DEVICE_ADD("ay1", AY8910, MAIN_CLOCK_X1*2) MCFG_DEVICE_ADD("ay1", AY8910, 1'996'800)
MCFG_AY8910_PORT_A_READ_CB(IOPORT("OPN_PA1")) MCFG_AY8910_PORT_A_READ_CB(IOPORT("OPN_PA1"))
MCFG_AY8910_PORT_B_WRITE_CB(WRITE8(*this, pc9801_amd98_device,ay3_address_w)) MCFG_AY8910_PORT_B_WRITE_CB(WRITE8(*this, pc9801_amd98_device,ay3_address_w))
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "lspeaker", 0.50) MCFG_SOUND_ROUTE(ALL_OUTPUTS, "lspeaker", 0.50)
MCFG_DEVICE_ADD("ay2", AY8910, MAIN_CLOCK_X1*2) MCFG_DEVICE_ADD("ay2", AY8910, 1'996'800)
MCFG_AY8910_PORT_A_READ_CB(IOPORT("OPN_PA2")) MCFG_AY8910_PORT_A_READ_CB(IOPORT("OPN_PA2"))
MCFG_AY8910_PORT_B_WRITE_CB(WRITE8(*this, pc9801_amd98_device,ay3_data_latch_w)) MCFG_AY8910_PORT_B_WRITE_CB(WRITE8(*this, pc9801_amd98_device,ay3_data_latch_w))
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "rspeaker", 0.50) MCFG_SOUND_ROUTE(ALL_OUTPUTS, "rspeaker", 0.50)
MCFG_DEVICE_ADD("ay3", AY8910, MAIN_CLOCK_X1*2) MCFG_DEVICE_ADD("ay3", AY8910, 1'996'800)
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "lspeaker", 0.25) MCFG_SOUND_ROUTE(ALL_OUTPUTS, "lspeaker", 0.25)
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "rspeaker", 0.25) MCFG_SOUND_ROUTE(ALL_OUTPUTS, "rspeaker", 0.25)
MACHINE_CONFIG_END MACHINE_CONFIG_END

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@ -75,11 +75,10 @@ const double XTAL::known_xtals[] = {
1'750'000, /* 1.75_MHz_XTAL RCA CDP1861 */ 1'750'000, /* 1.75_MHz_XTAL RCA CDP1861 */
1'797'100, /* 1.7971_MHz_XTAL SWTPC 6800 (with MIKBUG) */ 1'797'100, /* 1.7971_MHz_XTAL SWTPC 6800 (with MIKBUG) */
1'843'200, /* 1.8432_MHz_XTAL Bondwell 12/14 */ 1'843'200, /* 1.8432_MHz_XTAL Bondwell 12/14 */
1'996'800, /* 1.9968_MHz_XTAL NEC PC-98xx */
2'000'000, /* 2_MHz_XTAL - */ 2'000'000, /* 2_MHz_XTAL - */
2'012'160, /* 2.01216_MHz_XTAL Cidelsa Draco sound board */ 2'012'160, /* 2.01216_MHz_XTAL Cidelsa Draco sound board */
2'097'152, /* 2.097152_MHz_XTAL Icatel 1995 - Brazilian public payphone */ 2'097'152, /* 2.097152_MHz_XTAL Icatel 1995 - Brazilian public payphone */
2'457'600, /* 2.4576_MHz_XTAL Atari ST MFP, NEC PC-98xx */ 2'457'600, /* 2.4576_MHz_XTAL Atari ST MFP */
2'500'000, /* 2.5_MHz_XTAL Janken Man units */ 2'500'000, /* 2.5_MHz_XTAL Janken Man units */
2'950'000, /* 2.95_MHz_XTAL Playmatic MPU-C, MPU-III & Sound-3 */ 2'950'000, /* 2.95_MHz_XTAL Playmatic MPU-C, MPU-III & Sound-3 */
3'000'000, /* 3_MHz_XTAL Probably only used to drive 68705 or similar MCUs on 80's Taito PCBs */ 3'000'000, /* 3_MHz_XTAL Probably only used to drive 68705 or similar MCUs on 80's Taito PCBs */

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@ -1798,13 +1798,14 @@ READ8_MEMBER(pc9801_state::get_slave_ack)
* *
****************************************/ ****************************************/
/* basically, PC-98xx series has two xtals. /* These rates do NOT appear to represent actual XTALs. They are likely obtained in
My guess is that both are on the PCB, and they clocks the various system components. different ways on different PC-98 models as divisions of extant XTAL frequencies
such as 14.7456 MHz, 15.9744 MHz, 19.6608 MHz and 23.9616 MHz.
PC-9801RS needs X1 for the pit, otherwise Uchiyama Aki no Chou Bangai has sound pitch bugs PC-9801RS needs X1 for the pit, otherwise Uchiyama Aki no Chou Bangai has sound pitch bugs
PC-9821 definitely needs X2, otherwise there's a timer error at POST. Unless it needs a different clock anyway ... PC-9821 definitely needs X2, otherwise there's a timer error at POST. Unless it needs a different clock anyway ...
*/ */
#define MAIN_CLOCK_X1 XTAL(1'996'800) #define MAIN_CLOCK_X1 1'996'800
#define MAIN_CLOCK_X2 XTAL(2'457'600) #define MAIN_CLOCK_X2 2'457'600
/**************************************** /****************************************
* *