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Make UML shorthand a bit easier to use without using namespace everywhere, clean up a bit of macro hell in PowerPC core

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This commit is contained in:
Vas Crabb 2018-03-23 11:28:51 +11:00
parent 3be74a07a8
commit 44c7da0cf5
7 changed files with 285 additions and 296 deletions
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299
src/devices/cpu/drcumlsh.h
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@ -7,184 +7,183 @@
Shorthand definitions for the universal machine language.
***************************************************************************/
#ifndef MAME_CPU_DRCUMLSH_H
#define MAME_CPU_DRCUMLSH_H
#pragma once
#ifndef __DRCUMLSH_H__
#define __DRCUMLSH_H__
#include "drcuml.h"
/***************************************************************************
INLINE FUNCTIONS
MACROS
***************************************************************************/
/* ----- Compile-time Opcodes ----- */
#define UML_HANDLE(block, _handle) do { block->append().handle(_handle); } while (0)
#define UML_HASH(block, mode, pc) do { block->append().hash(mode, pc); } while (0)
#define UML_LABEL(block, _label) do { block->append().label(_label); } while (0)
#define UML_MAPVAR(block, _mapvar, _value) do { block->append().mapvar(_mapvar, _value); } while (0)
#define UML_HANDLE(block, handle_) do { using namespace uml; block->append().handle(handle_); } while (0)
#define UML_HASH(block, mode, pc) do { using namespace uml; block->append().hash(mode, pc); } while (0)
#define UML_LABEL(block, label_) do { using namespace uml; block->append().label(label_); } while (0)
#define UML_MAPVAR(block, mapvar_, value) do { using namespace uml; block->append().mapvar(mapvar_, value); } while (0)
/* ----- Control Flow Operations ----- */
#define UML_NOP(block) do { block->append().nop(); } while (0)
#define UML_DEBUG(block, pc) do { block->append().debug(pc); } while (0)
#define UML_EXIT(block, param) do { block->append().exit(param); } while (0)
#define UML_EXITc(block, cond, param) do { block->append().exit(param, cond); } while (0)
#define UML_HASHJMP(block, mode, pc, handle) do { block->append().hashjmp(mode, pc, handle); } while (0)
#define UML_JMP(block, label) do { block->append().jmp(label); } while (0)
#define UML_JMPc(block, cond, label) do { block->append().jmp(cond, label); } while (0)
#define UML_JMPH(block, handle) do { block->append().jmph(handle); } while (0)
#define UML_JMPHc(block, cond, handle) do { block->append().jmph(cond, handle); } while (0)
#define UML_EXH(block, handle, param) do { block->append().exh(handle, param); } while (0)
#define UML_EXHc(block, cond, handle, param) do { block->append().exh(cond, handle, param); } while (0)
#define UML_CALLH(block, handle) do { block->append().callh(handle); } while (0)
#define UML_CALLHc(block, cond, handle) do { block->append().callh(cond, handle); } while (0)
#define UML_RET(block) do { block->append().ret(); } while (0)
#define UML_RETc(block, cond) do { block->append().ret(cond); } while (0)
#define UML_CALLC(block, func, ptr) do { block->append().callc(func, ptr); } while (0)
#define UML_CALLCc(block, cond, func, ptr) do { block->append().callc(cond, func, ptr); } while (0)
#define UML_RECOVER(block, dst, mapvar) do { block->append().recover(dst, mapvar); } while (0)
#define UML_NOP(block) do { using namespace uml; block->append().nop(); } while (0)
#define UML_DEBUG(block, pc) do { using namespace uml; block->append().debug(pc); } while (0)
#define UML_EXIT(block, param) do { using namespace uml; block->append().exit(param); } while (0)
#define UML_EXITc(block, cond, param) do { using namespace uml; block->append().exit(param, cond); } while (0)
#define UML_HASHJMP(block, mode, pc, handle) do { using namespace uml; block->append().hashjmp(mode, pc, handle); } while (0)
#define UML_JMP(block, label) do { using namespace uml; block->append().jmp(label); } while (0)
#define UML_JMPc(block, cond, label) do { using namespace uml; block->append().jmp(cond, label); } while (0)
#define UML_JMPH(block, handle) do { using namespace uml; block->append().jmph(handle); } while (0)
#define UML_JMPHc(block, cond, handle) do { using namespace uml; block->append().jmph(cond, handle); } while (0)
#define UML_EXH(block, handle, param) do { using namespace uml; block->append().exh(handle, param); } while (0)
#define UML_EXHc(block, cond, handle, param) do { using namespace uml; block->append().exh(cond, handle, param); } while (0)
#define UML_CALLH(block, handle) do { using namespace uml; block->append().callh(handle); } while (0)
#define UML_CALLHc(block, cond, handle) do { using namespace uml; block->append().callh(cond, handle); } while (0)
#define UML_RET(block) do { using namespace uml; block->append().ret(); } while (0)
#define UML_RETc(block, cond) do { using namespace uml; block->append().ret(cond); } while (0)
#define UML_CALLC(block, func, ptr) do { using namespace uml; block->append().callc(func, ptr); } while (0)
#define UML_CALLCc(block, cond, func, ptr) do { using namespace uml; block->append().callc(cond, func, ptr); } while (0)
#define UML_RECOVER(block, dst, mapvar) do { using namespace uml; block->append().recover(dst, mapvar); } while (0)
/* ----- Internal Register Operations ----- */
#define UML_SETFMOD(block, mode) do { block->append().setfmod(mode); } while (0)
#define UML_GETFMOD(block, dst) do { block->append().getfmod(dst); } while (0)
#define UML_GETEXP(block, dst) do { block->append().getexp(dst); } while (0)
#define UML_GETFLGS(block, dst, flags) do { block->append().getflgs(dst, flags); } while (0)
#define UML_SAVE(block, dst) do { block->append().save(dst); } while (0)
#define UML_RESTORE(block, src) do { block->append().restore(src); } while (0)
#define UML_SETFMOD(block, mode) do { using namespace uml; block->append().setfmod(mode); } while (0)
#define UML_GETFMOD(block, dst) do { using namespace uml; block->append().getfmod(dst); } while (0)
#define UML_GETEXP(block, dst) do { using namespace uml; block->append().getexp(dst); } while (0)
#define UML_GETFLGS(block, dst, flags) do { using namespace uml; block->append().getflgs(dst, flags); } while (0)
#define UML_SAVE(block, dst) do { using namespace uml; block->append().save(dst); } while (0)
#define UML_RESTORE(block, src) do { using namespace uml; block->append().restore(src); } while (0)
/* ----- 32-Bit Integer Operations ----- */
#define UML_LOAD(block, dst, base, index, size, scale) do { block->append().load(dst, base, index, size, scale); } while (0)
#define UML_LOADS(block, dst, base, index, size, scale) do { block->append().loads(dst, base, index, size, scale); } while (0)
#define UML_STORE(block, base, index, src1, size, scale) do { block->append().store(base, index, src1, size, scale); } while (0)
#define UML_READ(block, dst, src1, size, space) do { block->append().read(dst, src1, size, space); } while (0)
#define UML_READM(block, dst, src1, mask, size, space) do { block->append().readm(dst, src1, mask, size, space); } while (0)
#define UML_WRITE(block, dst, src1, size, space) do { block->append().write(dst, src1, size, space); } while (0)
#define UML_WRITEM(block, dst, src1, mask, size, space) do { block->append().writem(dst, src1, mask, size, space); } while (0)
#define UML_CARRY(block, src, bitnum) do { block->append().carry(src, bitnum); } while (0)
#define UML_SETc(block, cond, dst) do { block->append().set(cond, dst); } while (0)
#define UML_MOV(block, dst, src1) do { block->append().mov(dst, src1); } while (0)
#define UML_MOVc(block, cond, dst, src1) do { block->append().mov(cond, dst, src1); } while (0)
#define UML_SEXT(block, dst, src1, size) do { block->append().sext(dst, src1, size); } while (0)
#define UML_ROLAND(block, dst, src, shift, mask) do { block->append().roland(dst, src, shift, mask); } while (0)
#define UML_ROLINS(block, dst, src, shift, mask) do { block->append().rolins(dst, src, shift, mask); } while (0)
#define UML_ADD(block, dst, src1, src2) do { block->append().add(dst, src1, src2); } while (0)
#define UML_ADDC(block, dst, src1, src2) do { block->append().addc(dst, src1, src2); } while (0)
#define UML_SUB(block, dst, src1, src2) do { block->append().sub(dst, src1, src2); } while (0)
#define UML_SUBB(block, dst, src1, src2) do { block->append().subb(dst, src1, src2); } while (0)
#define UML_CMP(block, src1, src2) do { block->append().cmp(src1, src2); } while (0)
#define UML_MULU(block, dst, edst, src1, src2) do { block->append().mulu(dst, edst, src1, src2); } while (0)
#define UML_MULS(block, dst, edst, src1, src2) do { block->append().muls(dst, edst, src1, src2); } while (0)
#define UML_DIVU(block, dst, edst, src1, src2) do { block->append().divu(dst, edst, src1, src2); } while (0)
#define UML_DIVS(block, dst, edst, src1, src2) do { block->append().divs(dst, edst, src1, src2); } while (0)
#define UML_AND(block, dst, src1, src2) do { block->append()._and(dst, src1, src2); } while (0)
#define UML_TEST(block, src1, src2) do { block->append().test(src1, src2); } while (0)
#define UML_OR(block, dst, src1, src2) do { block->append()._or(dst, src1, src2); } while (0)
#define UML_XOR(block, dst, src1, src2) do { block->append()._xor(dst, src1, src2); } while (0)
#define UML_LZCNT(block, dst, src) do { block->append().lzcnt(dst, src); } while (0)
#define UML_TZCNT(block, dst, src) do { block->append().tzcnt(dst, src); } while (0)
#define UML_BSWAP(block, dst, src) do { block->append().bswap(dst, src); } while (0)
#define UML_SHL(block, dst, src, count) do { block->append().shl(dst, src, count); } while (0)
#define UML_SHR(block, dst, src, count) do { block->append().shr(dst, src, count); } while (0)
#define UML_SAR(block, dst, src, count) do { block->append().sar(dst, src, count); } while (0)
#define UML_ROL(block, dst, src, count) do { block->append().rol(dst, src, count); } while (0)
#define UML_ROLC(block, dst, src, count) do { block->append().rolc(dst, src, count); } while (0)
#define UML_ROR(block, dst, src, count) do { block->append().ror(dst, src, count); } while (0)
#define UML_RORC(block, dst, src, count) do { block->append().rorc(dst, src, count); } while (0)
#define UML_LOAD(block, dst, base, index, size, scale) do { using namespace uml; block->append().load(dst, base, index, size, scale); } while (0)
#define UML_LOADS(block, dst, base, index, size, scale) do { using namespace uml; block->append().loads(dst, base, index, size, scale); } while (0)
#define UML_STORE(block, base, index, src1, size, scale) do { using namespace uml; block->append().store(base, index, src1, size, scale); } while (0)
#define UML_READ(block, dst, src1, size, space) do { using namespace uml; block->append().read(dst, src1, size, space); } while (0)
#define UML_READM(block, dst, src1, mask, size, space) do { using namespace uml; block->append().readm(dst, src1, mask, size, space); } while (0)
#define UML_WRITE(block, dst, src1, size, space) do { using namespace uml; block->append().write(dst, src1, size, space); } while (0)
#define UML_WRITEM(block, dst, src1, mask, size, space) do { using namespace uml; block->append().writem(dst, src1, mask, size, space); } while (0)
#define UML_CARRY(block, src, bitnum) do { using namespace uml; block->append().carry(src, bitnum); } while (0)
#define UML_SETc(block, cond, dst) do { using namespace uml; block->append().set(cond, dst); } while (0)
#define UML_MOV(block, dst, src1) do { using namespace uml; block->append().mov(dst, src1); } while (0)
#define UML_MOVc(block, cond, dst, src1) do { using namespace uml; block->append().mov(cond, dst, src1); } while (0)
#define UML_SEXT(block, dst, src1, size) do { using namespace uml; block->append().sext(dst, src1, size); } while (0)
#define UML_ROLAND(block, dst, src, shift, mask) do { using namespace uml; block->append().roland(dst, src, shift, mask); } while (0)
#define UML_ROLINS(block, dst, src, shift, mask) do { using namespace uml; block->append().rolins(dst, src, shift, mask); } while (0)
#define UML_ADD(block, dst, src1, src2) do { using namespace uml; block->append().add(dst, src1, src2); } while (0)
#define UML_ADDC(block, dst, src1, src2) do { using namespace uml; block->append().addc(dst, src1, src2); } while (0)
#define UML_SUB(block, dst, src1, src2) do { using namespace uml; block->append().sub(dst, src1, src2); } while (0)
#define UML_SUBB(block, dst, src1, src2) do { using namespace uml; block->append().subb(dst, src1, src2); } while (0)
#define UML_CMP(block, src1, src2) do { using namespace uml; block->append().cmp(src1, src2); } while (0)
#define UML_MULU(block, dst, edst, src1, src2) do { using namespace uml; block->append().mulu(dst, edst, src1, src2); } while (0)
#define UML_MULS(block, dst, edst, src1, src2) do { using namespace uml; block->append().muls(dst, edst, src1, src2); } while (0)
#define UML_DIVU(block, dst, edst, src1, src2) do { using namespace uml; block->append().divu(dst, edst, src1, src2); } while (0)
#define UML_DIVS(block, dst, edst, src1, src2) do { using namespace uml; block->append().divs(dst, edst, src1, src2); } while (0)
#define UML_AND(block, dst, src1, src2) do { using namespace uml; block->append()._and(dst, src1, src2); } while (0)
#define UML_TEST(block, src1, src2) do { using namespace uml; block->append().test(src1, src2); } while (0)
#define UML_OR(block, dst, src1, src2) do { using namespace uml; block->append()._or(dst, src1, src2); } while (0)
#define UML_XOR(block, dst, src1, src2) do { using namespace uml; block->append()._xor(dst, src1, src2); } while (0)
#define UML_LZCNT(block, dst, src) do { using namespace uml; block->append().lzcnt(dst, src); } while (0)
#define UML_TZCNT(block, dst, src) do { using namespace uml; block->append().tzcnt(dst, src); } while (0)
#define UML_BSWAP(block, dst, src) do { using namespace uml; block->append().bswap(dst, src); } while (0)
#define UML_SHL(block, dst, src, count) do { using namespace uml; block->append().shl(dst, src, count); } while (0)
#define UML_SHR(block, dst, src, count) do { using namespace uml; block->append().shr(dst, src, count); } while (0)
#define UML_SAR(block, dst, src, count) do { using namespace uml; block->append().sar(dst, src, count); } while (0)
#define UML_ROL(block, dst, src, count) do { using namespace uml; block->append().rol(dst, src, count); } while (0)
#define UML_ROLC(block, dst, src, count) do { using namespace uml; block->append().rolc(dst, src, count); } while (0)
#define UML_ROR(block, dst, src, count) do { using namespace uml; block->append().ror(dst, src, count); } while (0)
#define UML_RORC(block, dst, src, count) do { using namespace uml; block->append().rorc(dst, src, count); } while (0)
/* ----- 64-Bit Integer Operations ----- */
#define UML_DLOAD(block, dst, base, index, size, scale) do { block->append().dload(dst, base, index, size, scale); } while (0)
#define UML_DLOADS(block, dst, base, index, size, scale) do { block->append().dloads(dst, base, index, size, scale); } while (0)
#define UML_DSTORE(block, base, index, src1, size, scale) do { block->append().dstore(base, index, src1, size, scale); } while (0)
#define UML_DREAD(block, dst, src1, size, space) do { block->append().dread(dst, src1, size, space); } while (0)
#define UML_DREADM(block, dst, src1, mask, size, space) do { block->append().dreadm(dst, src1, mask, size, space); } while (0)
#define UML_DWRITE(block, dst, src1, size, space) do { block->append().dwrite(dst, src1, size, space); } while (0)
#define UML_DWRITEM(block, dst, src1, mask, size, space) do { block->append().dwritem(dst, src1, mask, size, space); } while (0)
#define UML_DCARRY(block, src, bitnum) do { block->append().dcarry(src, bitnum); } while (0)
#define UML_DSETc(block, cond, dst) do { block->append().dset(cond, dst); } while (0)
#define UML_DMOV(block, dst, src1) do { block->append().dmov(dst, src1); } while (0)
#define UML_DMOVc(block, cond, dst, src1) do { block->append().dmov(cond, dst, src1); } while (0)
#define UML_DSEXT(block, dst, src1, size) do { block->append().dsext(dst, src1, size); } while (0)
#define UML_DROLAND(block, dst, src, shift, mask) do { block->append().droland(dst, src, shift, mask); } while (0)
#define UML_DROLINS(block, dst, src, shift, mask) do { block->append().drolins(dst, src, shift, mask); } while (0)
#define UML_DADD(block, dst, src1, src2) do { block->append().dadd(dst, src1, src2); } while (0)
#define UML_DADDC(block, dst, src1, src2) do { block->append().daddc(dst, src1, src2); } while (0)
#define UML_DSUB(block, dst, src1, src2) do { block->append().dsub(dst, src1, src2); } while (0)
#define UML_DSUBB(block, dst, src1, src2) do { block->append().dsubb(dst, src1, src2); } while (0)
#define UML_DCMP(block, src1, src2) do { block->append().dcmp(src1, src2); } while (0)
#define UML_DMULU(block, dst, edst, src1, src2) do { block->append().dmulu(dst, edst, src1, src2); } while (0)
#define UML_DMULS(block, dst, edst, src1, src2) do { block->append().dmuls(dst, edst, src1, src2); } while (0)
#define UML_DDIVU(block, dst, edst, src1, src2) do { block->append().ddivu(dst, edst, src1, src2); } while (0)
#define UML_DDIVS(block, dst, edst, src1, src2) do { block->append().ddivs(dst, edst, src1, src2); } while (0)
#define UML_DAND(block, dst, src1, src2) do { block->append().dand(dst, src1, src2); } while (0)
#define UML_DTEST(block, src1, src2) do { block->append().dtest(src1, src2); } while (0)
#define UML_DOR(block, dst, src1, src2) do { block->append().dor(dst, src1, src2); } while (0)
#define UML_DXOR(block, dst, src1, src2) do { block->append().dxor(dst, src1, src2); } while (0)
#define UML_DLZCNT(block, dst, src) do { block->append().dlzcnt(dst, src); } while (0)
#define UML_DTZCNT(block, dst, src) do { block->append().dtzcnt(dst, src); } while (0)
#define UML_DBSWAP(block, dst, src) do { block->append().dbswap(dst, src); } while (0)
#define UML_DSHL(block, dst, src, count) do { block->append().dshl(dst, src, count); } while (0)
#define UML_DSHR(block, dst, src, count) do { block->append().dshr(dst, src, count); } while (0)
#define UML_DSAR(block, dst, src, count) do { block->append().dsar(dst, src, count); } while (0)
#define UML_DROL(block, dst, src, count) do { block->append().drol(dst, src, count); } while (0)
#define UML_DROLC(block, dst, src, count) do { block->append().drolc(dst, src, count); } while (0)
#define UML_DROR(block, dst, src, count) do { block->append().dror(dst, src, count); } while (0)
#define UML_DRORC(block, dst, src, count) do { block->append().drorc(dst, src, count); } while (0)
#define UML_DLOAD(block, dst, base, index, size, scale) do { using namespace uml; block->append().dload(dst, base, index, size, scale); } while (0)
#define UML_DLOADS(block, dst, base, index, size, scale) do { using namespace uml; block->append().dloads(dst, base, index, size, scale); } while (0)
#define UML_DSTORE(block, base, index, src1, size, scale) do { using namespace uml; block->append().dstore(base, index, src1, size, scale); } while (0)
#define UML_DREAD(block, dst, src1, size, space) do { using namespace uml; block->append().dread(dst, src1, size, space); } while (0)
#define UML_DREADM(block, dst, src1, mask, size, space) do { using namespace uml; block->append().dreadm(dst, src1, mask, size, space); } while (0)
#define UML_DWRITE(block, dst, src1, size, space) do { using namespace uml; block->append().dwrite(dst, src1, size, space); } while (0)
#define UML_DWRITEM(block, dst, src1, mask, size, space) do { using namespace uml; block->append().dwritem(dst, src1, mask, size, space); } while (0)
#define UML_DCARRY(block, src, bitnum) do { using namespace uml; block->append().dcarry(src, bitnum); } while (0)
#define UML_DSETc(block, cond, dst) do { using namespace uml; block->append().dset(cond, dst); } while (0)
#define UML_DMOV(block, dst, src1) do { using namespace uml; block->append().dmov(dst, src1); } while (0)
#define UML_DMOVc(block, cond, dst, src1) do { using namespace uml; block->append().dmov(cond, dst, src1); } while (0)
#define UML_DSEXT(block, dst, src1, size) do { using namespace uml; block->append().dsext(dst, src1, size); } while (0)
#define UML_DROLAND(block, dst, src, shift, mask) do { using namespace uml; block->append().droland(dst, src, shift, mask); } while (0)
#define UML_DROLINS(block, dst, src, shift, mask) do { using namespace uml; block->append().drolins(dst, src, shift, mask); } while (0)
#define UML_DADD(block, dst, src1, src2) do { using namespace uml; block->append().dadd(dst, src1, src2); } while (0)
#define UML_DADDC(block, dst, src1, src2) do { using namespace uml; block->append().daddc(dst, src1, src2); } while (0)
#define UML_DSUB(block, dst, src1, src2) do { using namespace uml; block->append().dsub(dst, src1, src2); } while (0)
#define UML_DSUBB(block, dst, src1, src2) do { using namespace uml; block->append().dsubb(dst, src1, src2); } while (0)
#define UML_DCMP(block, src1, src2) do { using namespace uml; block->append().dcmp(src1, src2); } while (0)
#define UML_DMULU(block, dst, edst, src1, src2) do { using namespace uml; block->append().dmulu(dst, edst, src1, src2); } while (0)
#define UML_DMULS(block, dst, edst, src1, src2) do { using namespace uml; block->append().dmuls(dst, edst, src1, src2); } while (0)
#define UML_DDIVU(block, dst, edst, src1, src2) do { using namespace uml; block->append().ddivu(dst, edst, src1, src2); } while (0)
#define UML_DDIVS(block, dst, edst, src1, src2) do { using namespace uml; block->append().ddivs(dst, edst, src1, src2); } while (0)
#define UML_DAND(block, dst, src1, src2) do { using namespace uml; block->append().dand(dst, src1, src2); } while (0)
#define UML_DTEST(block, src1, src2) do { using namespace uml; block->append().dtest(src1, src2); } while (0)
#define UML_DOR(block, dst, src1, src2) do { using namespace uml; block->append().dor(dst, src1, src2); } while (0)
#define UML_DXOR(block, dst, src1, src2) do { using namespace uml; block->append().dxor(dst, src1, src2); } while (0)
#define UML_DLZCNT(block, dst, src) do { using namespace uml; block->append().dlzcnt(dst, src); } while (0)
#define UML_DTZCNT(block, dst, src) do { using namespace uml; block->append().dtzcnt(dst, src); } while (0)
#define UML_DBSWAP(block, dst, src) do { using namespace uml; block->append().dbswap(dst, src); } while (0)
#define UML_DSHL(block, dst, src, count) do { using namespace uml; block->append().dshl(dst, src, count); } while (0)
#define UML_DSHR(block, dst, src, count) do { using namespace uml; block->append().dshr(dst, src, count); } while (0)
#define UML_DSAR(block, dst, src, count) do { using namespace uml; block->append().dsar(dst, src, count); } while (0)
#define UML_DROL(block, dst, src, count) do { using namespace uml; block->append().drol(dst, src, count); } while (0)
#define UML_DROLC(block, dst, src, count) do { using namespace uml; block->append().drolc(dst, src, count); } while (0)
#define UML_DROR(block, dst, src, count) do { using namespace uml; block->append().dror(dst, src, count); } while (0)
#define UML_DRORC(block, dst, src, count) do { using namespace uml; block->append().drorc(dst, src, count); } while (0)
/* ----- 32-bit Floating Point Arithmetic Operations ----- */
#define UML_FSLOAD(block, dst, base, index) do { block->append().fsload(dst, base, index); } while (0)
#define UML_FSSTORE(block, base, index, src1) do { block->append().fsstore(base, index, src1); } while (0)
#define UML_FSREAD(block, dst, src1, space) do { block->append().fsread(dst, src1, AS_##space); } while (0)
#define UML_FSWRITE(block, dst, src1, space) do { block->append().fswrite(dst, src1, AS_##space); } while (0)
#define UML_FSMOV(block, dst, src1) do { block->append().fsmov(dst, src1); } while (0)
#define UML_FSMOVc(block, cond, dst, src1) do { block->append().fsmov(cond, dst, src1); } while (0)
#define UML_FSTOINT(block, dst, src1, size, round) do { block->append().fstoint(dst, src1, size, round); } while (0)
#define UML_FSFRINT(block, dst, src1, size) do { block->append().fsfrint(dst, src1, size); } while (0)
#define UML_FSFRFLT(block, dst, src1, size) do { block->append().fsfrflt(dst, src1, size); } while (0)
#define UML_FSADD(block, dst, src1, src2) do { block->append().fsadd(dst, src1, src2); } while (0)
#define UML_FSSUB(block, dst, src1, src2) do { block->append().fssub(dst, src1, src2); } while (0)
#define UML_FSCMP(block, src1, src2) do { block->append().fscmp(src1, src2); } while (0)
#define UML_FSMUL(block, dst, src1, src2) do { block->append().fsmul(dst, src1, src2); } while (0)
#define UML_FSDIV(block, dst, src1, src2) do { block->append().fsdiv(dst, src1, src2); } while (0)
#define UML_FSNEG(block, dst, src1) do { block->append().fsneg(dst, src1); } while (0)
#define UML_FSABS(block, dst, src1) do { block->append().fsabs(dst, src1); } while (0)
#define UML_FSSQRT(block, dst, src1) do { block->append().fssqrt(dst, src1); } while (0)
#define UML_FSRECIP(block, dst, src1) do { block->append().fsrecip(dst, src1); } while (0)
#define UML_FSRSQRT(block, dst, src1) do { block->append().fsrsqrt(dst, src1); } while (0)
#define UML_FSCOPYI(block, dst, src) do { block->append().fscopyi(dst, src); } while (0)
#define UML_ICOPYFS(block, dst, src) do { block->append().icopyfs(dst, src); } while (0)
#define UML_FSLOAD(block, dst, base, index) do { using namespace uml; block->append().fsload(dst, base, index); } while (0)
#define UML_FSSTORE(block, base, index, src1) do { using namespace uml; block->append().fsstore(base, index, src1); } while (0)
#define UML_FSREAD(block, dst, src1, space) do { using namespace uml; block->append().fsread(dst, src1, AS_##space); } while (0)
#define UML_FSWRITE(block, dst, src1, space) do { using namespace uml; block->append().fswrite(dst, src1, AS_##space); } while (0)
#define UML_FSMOV(block, dst, src1) do { using namespace uml; block->append().fsmov(dst, src1); } while (0)
#define UML_FSMOVc(block, cond, dst, src1) do { using namespace uml; block->append().fsmov(cond, dst, src1); } while (0)
#define UML_FSTOINT(block, dst, src1, size, round) do { using namespace uml; block->append().fstoint(dst, src1, size, round); } while (0)
#define UML_FSFRINT(block, dst, src1, size) do { using namespace uml; block->append().fsfrint(dst, src1, size); } while (0)
#define UML_FSFRFLT(block, dst, src1, size) do { using namespace uml; block->append().fsfrflt(dst, src1, size); } while (0)
#define UML_FSADD(block, dst, src1, src2) do { using namespace uml; block->append().fsadd(dst, src1, src2); } while (0)
#define UML_FSSUB(block, dst, src1, src2) do { using namespace uml; block->append().fssub(dst, src1, src2); } while (0)
#define UML_FSCMP(block, src1, src2) do { using namespace uml; block->append().fscmp(src1, src2); } while (0)
#define UML_FSMUL(block, dst, src1, src2) do { using namespace uml; block->append().fsmul(dst, src1, src2); } while (0)
#define UML_FSDIV(block, dst, src1, src2) do { using namespace uml; block->append().fsdiv(dst, src1, src2); } while (0)
#define UML_FSNEG(block, dst, src1) do { using namespace uml; block->append().fsneg(dst, src1); } while (0)
#define UML_FSABS(block, dst, src1) do { using namespace uml; block->append().fsabs(dst, src1); } while (0)
#define UML_FSSQRT(block, dst, src1) do { using namespace uml; block->append().fssqrt(dst, src1); } while (0)
#define UML_FSRECIP(block, dst, src1) do { using namespace uml; block->append().fsrecip(dst, src1); } while (0)
#define UML_FSRSQRT(block, dst, src1) do { using namespace uml; block->append().fsrsqrt(dst, src1); } while (0)
#define UML_FSCOPYI(block, dst, src) do { using namespace uml; block->append().fscopyi(dst, src); } while (0)
#define UML_ICOPYFS(block, dst, src) do { using namespace uml; block->append().icopyfs(dst, src); } while (0)
/* ----- 64-bit Floating Point Arithmetic Operations ----- */
#define UML_FDLOAD(block, dst, base, index) do { block->append().fdload(dst, base, index); } while (0)
#define UML_FDSTORE(block, base, index, src1) do { block->append().fdstore(base, index, src1); } while (0)
#define UML_FDREAD(block, dst, src1, space) do { block->append().fdread(dst, src1, AS_##space); } while (0)
#define UML_FDWRITE(block, dst, src1, space) do { block->append().fdwrite(dst, src1, AS_##space); } while (0)
#define UML_FDMOV(block, dst, src1) do { block->append().fdmov(dst, src1); } while (0)
#define UML_FDMOVc(block, cond, dst, src1) do { block->append().fdmov(cond, dst, src1); } while (0)
#define UML_FDTOINT(block, dst, src1, size, round) do { block->append().fdtoint(dst, src1, size, round); } while (0)
#define UML_FDFRINT(block, dst, src1, size) do { block->append().fdfrint(dst, src1, size); } while (0)
#define UML_FDFRFLT(block, dst, src1, size) do { block->append().fdfrflt(dst, src1, size); } while (0)
#define UML_FDRNDS(block, dst, src1) do { block->append().fdrnds(dst, src1); } while (0)
#define UML_FDADD(block, dst, src1, src2) do { block->append().fdadd(dst, src1, src2); } while (0)
#define UML_FDSUB(block, dst, src1, src2) do { block->append().fdsub(dst, src1, src2); } while (0)
#define UML_FDCMP(block, src1, src2) do { block->append().fdcmp(src1, src2); } while (0)
#define UML_FDMUL(block, dst, src1, src2) do { block->append().fdmul(dst, src1, src2); } while (0)
#define UML_FDDIV(block, dst, src1, src2) do { block->append().fddiv(dst, src1, src2); } while (0)
#define UML_FDNEG(block, dst, src1) do { block->append().fdneg(dst, src1); } while (0)
#define UML_FDABS(block, dst, src1) do { block->append().fdabs(dst, src1); } while (0)
#define UML_FDSQRT(block, dst, src1) do { block->append().fdsqrt(dst, src1); } while (0)
#define UML_FDRECIP(block, dst, src1) do { block->append().fdrecip(dst, src1); } while (0)
#define UML_FDRSQRT(block, dst, src1) do { block->append().fdrsqrt(dst, src1); } while (0)
#define UML_FDCOPYI(block, dst, src) do { block->append().fdcopyi(dst, src); } while (0)
#define UML_ICOPYFD(block, dst, src) do { block->append().icopyfd(dst, src); } while (0)
#define UML_FDLOAD(block, dst, base, index) do { using namespace uml; block->append().fdload(dst, base, index); } while (0)
#define UML_FDSTORE(block, base, index, src1) do { using namespace uml; block->append().fdstore(base, index, src1); } while (0)
#define UML_FDREAD(block, dst, src1, space) do { using namespace uml; block->append().fdread(dst, src1, AS_##space); } while (0)
#define UML_FDWRITE(block, dst, src1, space) do { using namespace uml; block->append().fdwrite(dst, src1, AS_##space); } while (0)
#define UML_FDMOV(block, dst, src1) do { using namespace uml; block->append().fdmov(dst, src1); } while (0)
#define UML_FDMOVc(block, cond, dst, src1) do { using namespace uml; block->append().fdmov(cond, dst, src1); } while (0)
#define UML_FDTOINT(block, dst, src1, size, round) do { using namespace uml; block->append().fdtoint(dst, src1, size, round); } while (0)
#define UML_FDFRINT(block, dst, src1, size) do { using namespace uml; block->append().fdfrint(dst, src1, size); } while (0)
#define UML_FDFRFLT(block, dst, src1, size) do { using namespace uml; block->append().fdfrflt(dst, src1, size); } while (0)
#define UML_FDRNDS(block, dst, src1) do { using namespace uml; block->append().fdrnds(dst, src1); } while (0)
#define UML_FDADD(block, dst, src1, src2) do { using namespace uml; block->append().fdadd(dst, src1, src2); } while (0)
#define UML_FDSUB(block, dst, src1, src2) do { using namespace uml; block->append().fdsub(dst, src1, src2); } while (0)
#define UML_FDCMP(block, src1, src2) do { using namespace uml; block->append().fdcmp(src1, src2); } while (0)
#define UML_FDMUL(block, dst, src1, src2) do { using namespace uml; block->append().fdmul(dst, src1, src2); } while (0)
#define UML_FDDIV(block, dst, src1, src2) do { using namespace uml; block->append().fddiv(dst, src1, src2); } while (0)
#define UML_FDNEG(block, dst, src1) do { using namespace uml; block->append().fdneg(dst, src1); } while (0)
#define UML_FDABS(block, dst, src1) do { using namespace uml; block->append().fdabs(dst, src1); } while (0)
#define UML_FDSQRT(block, dst, src1) do { using namespace uml; block->append().fdsqrt(dst, src1); } while (0)
#define UML_FDRECIP(block, dst, src1) do { using namespace uml; block->append().fdrecip(dst, src1); } while (0)
#define UML_FDRSQRT(block, dst, src1) do { using namespace uml; block->append().fdrsqrt(dst, src1); } while (0)
#define UML_FDCOPYI(block, dst, src) do { using namespace uml; block->append().fdcopyi(dst, src); } while (0)
#define UML_ICOPYFD(block, dst, src) do { using namespace uml; block->append().icopyfd(dst, src); } while (0)
#endif /* __DRCUMLSH_H__ */
#endif // MAME_CPU_DRCUMLSH_H

12
src/devices/cpu/e132xs/e132xsdrc.cpp
View File

@ -6,10 +6,8 @@
#include "e132xsfe.h"
#include "32xsdefs.h"
using namespace uml;
#define DRC_PC mem(m_core->global_regs)
#define DRC_SR mem(&m_core->global_regs[1])
#define DRC_PC uml::mem(m_core->global_regs)
#define DRC_SR uml::mem(&m_core->global_regs[1])
void hyperstone_device::execute_run_drc()
{
@ -331,7 +329,7 @@ static inline uint32_t epc(const opcode_desc *desc)
already allocated
-------------------------------------------------*/
static inline void alloc_handle(drcuml_state *drcuml, code_handle **handleptr, const char *name)
static inline void alloc_handle(drcuml_state *drcuml, uml::code_handle **handleptr, const char *name)
{
if (*handleptr == nullptr)
*handleptr = drcuml->handle_alloc(name);
@ -346,7 +344,7 @@ static inline void alloc_handle(drcuml_state *drcuml, code_handle **handleptr, c
void hyperstone_device::static_generate_exception(uint32_t exception, const char *name)
{
code_handle *&exception_handle = m_exception[exception];
uml::code_handle *&exception_handle = m_exception[exception];
drcuml_state *drcuml = m_drcuml.get();
drcuml_block *block = drcuml->begin_block(1024);
@ -512,7 +510,7 @@ void hyperstone_device::static_generate_out_of_cycles()
static_generate_memory_accessor
------------------------------------------------------------------*/
void hyperstone_device::static_generate_memory_accessor(int size, int iswrite, bool isio, const char *name, code_handle *&handleptr)
void hyperstone_device::static_generate_memory_accessor(int size, int iswrite, bool isio, const char *name, uml::code_handle *&handleptr)
{
/* on entry, address is in I0; data for writes is in I1 */
/* on exit, read result is in I1 */

13
src/devices/cpu/powerpc/ppc.h
View File

@ -8,17 +8,17 @@
PowerPC emulator.
***************************************************************************/
#ifndef MAME_CPU_POWERPC_PPC_H
#define MAME_CPU_POWERPC_PPC_H
#pragma once
#include "divtlb.h"
#include "cpu/drcfe.h"
#include "cpu/drcuml.h"
#include "cpu/drcumlsh.h"
#include "divtlb.h"
/***************************************************************************
CONSTANTS
@ -168,14 +168,11 @@ enum
downcast<ppc_device &>(*device).set_bus_frequency(_frequency);
class ppc_frontend;
class ppc_device : public cpu_device, public device_vtlb_interface
{
friend class ppc_frontend;
protected:
class frontend;
/* PowerPC flavors */
enum powerpc_flavor
{
@ -535,7 +532,7 @@ protected:
/* core state */
drc_cache m_cache; /* pointer to the DRC code cache */
std::unique_ptr<drcuml_state> m_drcuml; /* DRC UML generator state */
std::unique_ptr<ppc_frontend> m_drcfe; /* pointer to the DRC front-end state */
std::unique_ptr<frontend> m_drcfe; /* pointer to the DRC front-end state */
uint32_t m_drcoptions; /* configurable DRC options */
/* parameters for subroutines */

2
src/devices/cpu/powerpc/ppccom.cpp
View File

@ -864,7 +864,7 @@ void ppc_device::device_start()
m_drcuml->symbol_add(&m_fcmp_cr_table, sizeof(m_fcmp_cr_table), "fcmp_cr_table");
/* initialize the front-end helper */
m_drcfe = std::make_unique<ppc_frontend>(this, COMPILE_BACKWARDS_BYTES, COMPILE_FORWARDS_BYTES, SINGLE_INSTRUCTION_MODE ? 1 : COMPILE_MAX_SEQUENCE);
m_drcfe = std::make_unique<frontend>(*this, COMPILE_BACKWARDS_BYTES, COMPILE_FORWARDS_BYTES, SINGLE_INSTRUCTION_MODE ? 1 : COMPILE_MAX_SEQUENCE);
/* compute the register parameters */
for (int regnum = 0; regnum < 32; regnum++)

93
src/devices/cpu/powerpc/ppcdrc.cpp
View File

@ -15,16 +15,15 @@
***************************************************************************/
#include "emu.h"
#include "debugger.h"
#include "ppc.h"
#include "ppccom.h"
#include "ppcfe.h"
#include "ppc_dasm.h"
#include "cpu/drcfe.h"
#include "cpu/drcuml.h"
#include "cpu/drcumlsh.h"
using namespace uml;
#include "debugger.h"
@ -58,12 +57,12 @@ using namespace uml;
#define R32(reg) m_regmap[reg]
#define R32Z(reg) (((reg) == 0) ? uml::parameter(0) : m_regmap[reg])
#define F64(reg) m_fdregmap[reg]
#define CR32(reg) mem(&m_core->cr[reg])
#define FPSCR32 mem(&m_core->fpscr)
#define MSR32 mem(&m_core->msr)
#define XERSO32 mem(&m_core->xerso)
#define SR32(reg) mem(&m_core->sr[reg])
#define SPR32(reg) mem(&m_core->spr[reg])
#define CR32(reg) uml::mem(&m_core->cr[reg])
#define FPSCR32 uml::mem(&m_core->fpscr)
#define MSR32 uml::mem(&m_core->msr)
#define XERSO32 uml::mem(&m_core->xerso)
#define SR32(reg) uml::mem(&m_core->sr[reg])
#define SPR32(reg) uml::mem(&m_core->spr[reg])
#define CRMASK(reg) (0xf0000000 >> ((reg) * 4))
@ -103,7 +102,7 @@ using namespace uml;
already allocated
-------------------------------------------------*/
inline void ppc_device::alloc_handle(drcuml_state *drcuml, code_handle **handleptr, const char *name)
inline void ppc_device::alloc_handle(drcuml_state *drcuml, uml::code_handle **handleptr, const char *name)
{
if (*handleptr == nullptr)
*handleptr = drcuml->handle_alloc(name);
@ -660,7 +659,7 @@ static void cfunc_ppccom_get_dsisr(void *param)
void ppc_device::static_generate_entry_point()
{
code_label skip = 1;
uml::code_label skip = 1;
drcuml_block *block;
/* begin generating */
@ -817,9 +816,9 @@ void ppc_device::static_generate_tlb_mismatch()
void ppc_device::static_generate_exception(uint8_t exception, int recover, const char *name)
{
code_handle *&exception_handle = recover ? m_exception[exception] : m_exception_norecover[exception];
uml::code_handle *&exception_handle = recover ? m_exception[exception] : m_exception_norecover[exception];
uint32_t vector = exception << 8;
code_label label = 1;
uml::code_label label = 1;
drcuml_block *block;
/* begin generating */
@ -853,7 +852,7 @@ void ppc_device::static_generate_exception(uint8_t exception, int recover, const
UML_MOV(block, I3, vector); // mov i3,vector
if (exception == EXCEPTION_EI)
{
code_label not_decrementer;
uml::code_label not_decrementer;
UML_TEST(block, mem(&m_core->irq_pending), 0x01); // test [irq_pending],0x01
UML_JMPc(block, COND_NZ, not_decrementer = label++); // jmp not_decrementer,nz
@ -920,7 +919,7 @@ void ppc_device::static_generate_exception(uint8_t exception, int recover, const
UML_MOV(block, I3, vector); // mov i3,vector
if (exception == EXCEPTION_EI)
{
code_label notwdog, common;
uml::code_label notwdog, common;
UML_TEST(block, SPR32(SPR4XX_TSR), PPC4XX_TSR_PIS); // test [tsr],PIS
UML_MOVc(block, COND_NZ, I3, 0x1000); // mov i3,0x1000,NZ
@ -991,7 +990,7 @@ void ppc_device::static_generate_exception(uint8_t exception, int recover, const
static_generate_memory_accessor
------------------------------------------------------------------*/
void ppc_device::static_generate_memory_accessor(int mode, int size, int iswrite, int ismasked, const char *name, code_handle *&handleptr, code_handle *masked)
void ppc_device::static_generate_memory_accessor(int mode, int size, int iswrite, int ismasked, const char *name, uml::code_handle *&handleptr, uml::code_handle *masked)
{
/* on entry, address is in I0; data for writes is in I1; masks are in I2 */
/* on exit, read result is in I0 */
@ -1599,7 +1598,7 @@ void ppc_device::generate_update_cycles(drcuml_block *block, compiler_state *com
/* check full interrupts if pending */
if (compiler->checkints)
{
code_label skip;
uml::code_label skip;
compiler->checkints = false;
UML_TEST(block, mem(&m_core->irq_pending), ~0); // test [irq_pending],0
@ -1814,12 +1813,12 @@ void ppc_device::generate_compute_flags(drcuml_block *block, const opcode_desc *
/* modify inputs based on required flags */
if (!DISABLE_FLAG_OPTIMIZATIONS)
{
if (!(desc->regreq[3] & REGFLAG_XER_CA))
if (!(desc->regreq[3] & frontend::REGFLAG_XER_CA))
xermask &= ~XER_CA;
if (!(desc->regreq[2] & REGFLAG_CR(0)))
if (!(desc->regreq[2] & frontend::REGFLAG_CR(0)))
updatecr = 0;
}
xerflags = ((xermask & XER_OV) ? FLAG_V : 0) | ((xermask & XER_CA) ? FLAG_C : 0);
xerflags = ((xermask & XER_OV) ? uml::FLAG_V : 0) | ((xermask & XER_CA) ? uml::FLAG_C : 0);
/* easy case: nothing to do */
if (!updatecr && xermask == 0)
@ -1943,7 +1942,7 @@ void ppc_device::generate_branch(drcuml_block *block, compiler_state *compiler,
}
else
{
generate_update_cycles(block, &compiler_temp, mem(srcptr), true); // <subtract cycles>
generate_update_cycles(block, &compiler_temp, uml::mem(srcptr), true); // <subtract cycles>
/* clear two LSBs of the target address to prevent branching to an invalid address */
UML_AND(block, I0, mem(srcptr), 0xFFFFFFFC); // and i0, 0xFFFFFFFC
@ -2857,7 +2856,7 @@ bool ppc_device::generate_instruction_1f(drcuml_block *block, compiler_state *co
UML_CMP(block, I2, 0x00000020); // cmp rb,0x20
UML_JMPc(block, COND_S, compiler->labelnum); // bs 1:
if (DISABLE_FLAG_OPTIMIZATIONS || (desc->regreq[3] & REGFLAG_XER_CA))
if (DISABLE_FLAG_OPTIMIZATIONS || (desc->regreq[3] & frontend::REGFLAG_XER_CA))
{
// for shift amt > 32, carry flag is the sign bit of Rs and the sign bit fills all bit positions
UML_TEST(block, R32(G_RS(op)), 0x80000000);
@ -2868,7 +2867,7 @@ bool ppc_device::generate_instruction_1f(drcuml_block *block, compiler_state *co
UML_JMP(block, compiler->labelnum+1); // bra 2:
UML_LABEL(block, compiler->labelnum++); // 1:
if (DISABLE_FLAG_OPTIMIZATIONS || (desc->regreq[3] & REGFLAG_XER_CA))
if (DISABLE_FLAG_OPTIMIZATIONS || (desc->regreq[3] & frontend::REGFLAG_XER_CA))
{
UML_SHL(block, I1, 0xffffffff, I2); // shl i1,0xffffffff,i2
UML_XOR(block, I1, I1, ~0); // xor i1,i1,~0
@ -2889,7 +2888,7 @@ bool ppc_device::generate_instruction_1f(drcuml_block *block, compiler_state *co
return true;
case 0x338: /* SRAWIx */
if (DISABLE_FLAG_OPTIMIZATIONS || (desc->regreq[3] & REGFLAG_XER_CA))
if (DISABLE_FLAG_OPTIMIZATIONS || (desc->regreq[3] & frontend::REGFLAG_XER_CA))
{
UML_AND(block, I0, R32(G_RS(op)), ~(0xffffffff << (G_SH(op) & 31)));// and i0,rs,~(0xffffffff << (sh & 31))
UML_SAR(block, I1, R32(G_RS(op)), 31); // sar i1,rs,31
@ -3852,84 +3851,84 @@ void ppc_device::log_register_list(drcuml_state *drcuml, const char *string, con
drcuml->log_printf("[%s:", string);
for (regnum = 0; regnum < 32; regnum++)
if (reglist[0] & REGFLAG_R(regnum))
if (reglist[0] & frontend::REGFLAG_R(regnum))
{
drcuml->log_printf("%sr%d", (count++ == 0) ? "" : ",", regnum);
if (regnostarlist != nullptr && !(regnostarlist[0] & REGFLAG_R(regnum)))
if (regnostarlist != nullptr && !(regnostarlist[0] & frontend::REGFLAG_R(regnum)))
drcuml->log_printf("*");
}
for (regnum = 0; regnum < 32; regnum++)
if (reglist[1] & REGFLAG_FR(regnum))
if (reglist[1] & frontend::REGFLAG_FR(regnum))
{
drcuml->log_printf("%sfr%d", (count++ == 0) ? "" : ",", regnum);
if (regnostarlist != nullptr && !(regnostarlist[1] & REGFLAG_FR(regnum)))
if (regnostarlist != nullptr && !(regnostarlist[1] & frontend::REGFLAG_FR(regnum)))
drcuml->log_printf("*");
}
for (regnum = 0; regnum < 8; regnum++)
if (reglist[2] & REGFLAG_CR(regnum))
if (reglist[2] & frontend::REGFLAG_CR(regnum))
{
if ((reglist[2] & REGFLAG_CR(regnum)) == REGFLAG_CR(regnum) && (regnostarlist == nullptr || (regnostarlist[2] & REGFLAG_CR(regnum)) == REGFLAG_CR(regnum)))
if ((reglist[2] & frontend::REGFLAG_CR(regnum)) == frontend::REGFLAG_CR(regnum) && (regnostarlist == nullptr || (regnostarlist[2] & frontend::REGFLAG_CR(regnum)) == frontend::REGFLAG_CR(regnum)))
{
drcuml->log_printf("%scr%d", (count++ == 0) ? "" : ",", regnum);
if (regnostarlist != nullptr && !(regnostarlist[2] & REGFLAG_CR(regnum)))
if (regnostarlist != nullptr && !(regnostarlist[2] & frontend::REGFLAG_CR(regnum)))
drcuml->log_printf("*");
}
else
{
for (crnum = 0; crnum < 4; crnum++)
if (reglist[2] & REGFLAG_CR_BIT(regnum * 4 + crnum))
if (reglist[2] & frontend::REGFLAG_CR_BIT(regnum * 4 + crnum))
{
drcuml->log_printf("%scr%d[%s]", (count++ == 0) ? "" : ",", regnum, crtext[crnum]);
if (regnostarlist != nullptr && !(regnostarlist[2] & REGFLAG_CR_BIT(regnum * 4 + crnum)))
if (regnostarlist != nullptr && !(regnostarlist[2] & frontend::REGFLAG_CR_BIT(regnum * 4 + crnum)))
drcuml->log_printf("*");
}
}
}
if (reglist[3] & REGFLAG_XER_CA)
if (reglist[3] & frontend::REGFLAG_XER_CA)
{
drcuml->log_printf("%sxer_ca", (count++ == 0) ? "" : ",");
if (regnostarlist != nullptr && !(regnostarlist[3] & REGFLAG_XER_CA))
if (regnostarlist != nullptr && !(regnostarlist[3] & frontend::REGFLAG_XER_CA))
drcuml->log_printf("*");
}
if (reglist[3] & REGFLAG_XER_OV)
if (reglist[3] & frontend::REGFLAG_XER_OV)
{
drcuml->log_printf("%sxer_ov", (count++ == 0) ? "" : ",");
if (regnostarlist != nullptr && !(regnostarlist[3] & REGFLAG_XER_OV))
if (regnostarlist != nullptr && !(regnostarlist[3] & frontend::REGFLAG_XER_OV))
drcuml->log_printf("*");
}
if (reglist[3] & REGFLAG_XER_SO)
if (reglist[3] & frontend::REGFLAG_XER_SO)
{
drcuml->log_printf("%sxer_so", (count++ == 0) ? "" : ",");
if (regnostarlist != nullptr && !(regnostarlist[3] & REGFLAG_XER_SO))
if (regnostarlist != nullptr && !(regnostarlist[3] & frontend::REGFLAG_XER_SO))
drcuml->log_printf("*");
}
if (reglist[3] & REGFLAG_XER_COUNT)
if (reglist[3] & frontend::REGFLAG_XER_COUNT)
{
drcuml->log_printf("%sxer_count", (count++ == 0) ? "" : ",");
if (regnostarlist != nullptr && !(regnostarlist[3] & REGFLAG_XER_COUNT))
if (regnostarlist != nullptr && !(regnostarlist[3] & frontend::REGFLAG_XER_COUNT))
drcuml->log_printf("*");
}
if (reglist[3] & REGFLAG_CTR)
if (reglist[3] & frontend::REGFLAG_CTR)
{
drcuml->log_printf("%sctr", (count++ == 0) ? "" : ",");
if (regnostarlist != nullptr && !(regnostarlist[3] & REGFLAG_CTR))
if (regnostarlist != nullptr && !(regnostarlist[3] & frontend::REGFLAG_CTR))
drcuml->log_printf("*");
}
if (reglist[3] & REGFLAG_LR)
if (reglist[3] & frontend::REGFLAG_LR)
{
drcuml->log_printf("%slr", (count++ == 0) ? "" : ",");
if (regnostarlist != nullptr && !(regnostarlist[3] & REGFLAG_LR))
if (regnostarlist != nullptr && !(regnostarlist[3] & frontend::REGFLAG_LR))
drcuml->log_printf("*");
}
for (regnum = 0; regnum < 8; regnum++)
if (reglist[3] & REGFLAG_FPSCR(regnum))
if (reglist[3] & frontend::REGFLAG_FPSCR(regnum))
{
drcuml->log_printf("%sfpscr%d", (count++ == 0) ? "" : ",", regnum);
if (regnostarlist != nullptr && !(regnostarlist[3] & REGFLAG_FPSCR(regnum)))
if (regnostarlist != nullptr && !(regnostarlist[3] & frontend::REGFLAG_FPSCR(regnum)))
drcuml->log_printf("*");
}

94
src/devices/cpu/powerpc/ppcfe.cpp
View File

@ -53,12 +53,12 @@
//**************************************************************************
//-------------------------------------------------
// ppc_frontend - constructor
// frontend - constructor
//-------------------------------------------------
ppc_frontend::ppc_frontend(ppc_device *ppc, uint32_t window_start, uint32_t window_end, uint32_t max_sequence)
: drc_frontend(*ppc, window_start, window_end, max_sequence),
m_ppc(ppc)
ppc_device::frontend::frontend(ppc_device &ppc, uint32_t window_start, uint32_t window_end, uint32_t max_sequence)
: drc_frontend(ppc, window_start, window_end, max_sequence)
, m_ppc(ppc)
{
}
@ -68,13 +68,13 @@ ppc_frontend::ppc_frontend(ppc_device *ppc, uint32_t window_start, uint32_t wind
// instruction
//-------------------------------------------------
bool ppc_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
bool ppc_device::frontend::describe(opcode_desc &desc, const opcode_desc *prev)
{
uint32_t op, opswitch;
int regnum;
// compute the physical PC
if (!m_ppc->memory_translate(AS_PROGRAM, TRANSLATE_FETCH, desc.physpc))
if (!m_ppc.memory_translate(AS_PROGRAM, TRANSLATE_FETCH, desc.physpc))
{
// uh-oh: a page fault; leave the description empty and just if this is the first instruction, leave it empty and
// mark as needing to validate; otherwise, just end the sequence here
@ -83,7 +83,7 @@ bool ppc_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
}
// fetch the opcode
op = desc.opptr.l[0] = m_ppc->m_direct->read_dword(desc.physpc, m_ppc->m_codexor);
op = desc.opptr.l[0] = m_ppc.m_direct->read_dword(desc.physpc, m_ppc.m_codexor);
// all instructions are 4 bytes and default to a single cycle each
desc.length = 4;
@ -172,7 +172,7 @@ bool ppc_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
return true;
case 0x11: // SC
if (!(m_ppc->m_cap & (PPCCAP_OEA | PPCCAP_4XX)))
if (!(m_ppc.m_cap & (PPCCAP_OEA | PPCCAP_4XX)))
return false;
desc.flags |= OPFLAG_WILL_CAUSE_EXCEPTION;
if (is_601_class())
@ -305,7 +305,7 @@ bool ppc_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
case 0x30: // LFS
case 0x32: // LFD
if (!(m_ppc->m_cap & PPCCAP_FPU))
if (!(m_ppc.m_cap & PPCCAP_FPU))
return false;
GPR_USED_OR_ZERO(desc, G_RA(op));
FPR_MODIFIED(desc, G_RD(op));
@ -314,7 +314,7 @@ bool ppc_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
case 0x31: // LFSU
case 0x33: // LFDU
if (!(m_ppc->m_cap & PPCCAP_FPU))
if (!(m_ppc.m_cap & PPCCAP_FPU))
return false;
if (G_RA(op) == 0)
return false;
@ -326,7 +326,7 @@ bool ppc_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
case 0x34: // STFS
case 0x36: // STFD
if (!(m_ppc->m_cap & PPCCAP_FPU))
if (!(m_ppc.m_cap & PPCCAP_FPU))
return false;
GPR_USED_OR_ZERO(desc, G_RA(op));
FPR_USED(desc, G_RS(op));
@ -335,7 +335,7 @@ bool ppc_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
case 0x35: // STFSU
case 0x37: // STFDU
if (!(m_ppc->m_cap & PPCCAP_FPU))
if (!(m_ppc.m_cap & PPCCAP_FPU))
return false;
if (G_RA(op) == 0)
return false;
@ -362,7 +362,7 @@ bool ppc_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
0x13 group
-------------------------------------------------*/
bool ppc_frontend::describe_13(uint32_t op, opcode_desc &desc, const opcode_desc *prev)
bool ppc_device::frontend::describe_13(uint32_t op, opcode_desc &desc, const opcode_desc *prev)
{
uint32_t opswitch = (op >> 1) & 0x3ff;
@ -411,7 +411,7 @@ bool ppc_frontend::describe_13(uint32_t op, opcode_desc &desc, const opcode_desc
return true;
case 0x032: // RFI
if (!(m_ppc->m_cap & (PPCCAP_OEA | PPCCAP_4XX)))
if (!(m_ppc.m_cap & (PPCCAP_OEA | PPCCAP_4XX)))
return false;
desc.flags |= OPFLAG_PRIVILEGED | OPFLAG_CAN_CHANGE_MODES | OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE | OPFLAG_CAN_CAUSE_EXCEPTION;
desc.targetpc = BRANCH_TARGET_DYNAMIC;
@ -424,14 +424,14 @@ bool ppc_frontend::describe_13(uint32_t op, opcode_desc &desc, const opcode_desc
return true;
case 0x033: // RFCI
if (!(m_ppc->m_cap & PPCCAP_4XX))
if (!(m_ppc.m_cap & PPCCAP_4XX))
return false;
desc.flags |= OPFLAG_PRIVILEGED | OPFLAG_CAN_CHANGE_MODES | OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE | OPFLAG_CAN_CAUSE_EXCEPTION;
desc.targetpc = BRANCH_TARGET_DYNAMIC;
return true;
case 0x096: // ISYNC
if (!(m_ppc->m_cap & (PPCCAP_VEA | PPCCAP_4XX)))
if (!(m_ppc.m_cap & (PPCCAP_VEA | PPCCAP_4XX)))
return false;
if (is_601_class())
desc.cycles = 6; // 601
@ -463,7 +463,7 @@ bool ppc_frontend::describe_13(uint32_t op, opcode_desc &desc, const opcode_desc
0x1f group
-------------------------------------------------*/
bool ppc_frontend::describe_1f(uint32_t op, opcode_desc &desc, const opcode_desc *prev)
bool ppc_device::frontend::describe_1f(uint32_t op, opcode_desc &desc, const opcode_desc *prev)
{
uint32_t opswitch = (op >> 1) & 0x3ff;
int spr, regnum;
@ -709,7 +709,7 @@ bool ppc_frontend::describe_1f(uint32_t op, opcode_desc &desc, const opcode_desc
return true;
case 0x136: // ECIWX
if (!(m_ppc->m_cap & PPCCAP_VEA))
if (!(m_ppc.m_cap & PPCCAP_VEA))
return false;
case 0x014: // LWARX
case 0x017: // LWZX
@ -774,14 +774,14 @@ bool ppc_frontend::describe_1f(uint32_t op, opcode_desc &desc, const opcode_desc
case 0x116: // DCBT
case 0x2f6: // DCBA
case 0x3d6: // ICBI
if (!(m_ppc->m_cap & (PPCCAP_VEA | PPCCAP_4XX)))
if (!(m_ppc.m_cap & (PPCCAP_VEA | PPCCAP_4XX)))
return false;
GPR_USED_OR_ZERO(desc, G_RA(op));
GPR_USED(desc, G_RB(op));
return true;
case 0x1d6: // DCBI
if (!(m_ppc->m_cap & (PPCCAP_OEA | PPCCAP_4XX)))
if (!(m_ppc.m_cap & (PPCCAP_OEA | PPCCAP_4XX)))
return false;
GPR_USED_OR_ZERO(desc, G_RA(op));
GPR_USED(desc, G_RB(op));
@ -817,11 +817,11 @@ bool ppc_frontend::describe_1f(uint32_t op, opcode_desc &desc, const opcode_desc
}
if (spr & 0x010)
desc.flags |= OPFLAG_PRIVILEGED | OPFLAG_CAN_CAUSE_EXCEPTION;
if ((m_ppc->m_cap & PPCCAP_4XX) && spr == SPR4XX_TBLU)
if ((m_ppc.m_cap & PPCCAP_4XX) && spr == SPR4XX_TBLU)
desc.cycles = POWERPC_COUNT_READ_TBL;
else if ((m_ppc->m_cap & PPCCAP_VEA) && spr == SPRVEA_TBL_R)
else if ((m_ppc.m_cap & PPCCAP_VEA) && spr == SPRVEA_TBL_R)
desc.cycles = POWERPC_COUNT_READ_TBL;
else if ((m_ppc->m_cap & PPCCAP_OEA) && spr == SPROEA_DEC)
else if ((m_ppc.m_cap & PPCCAP_OEA) && spr == SPROEA_DEC)
desc.cycles = POWERPC_COUNT_READ_DEC;
return true;
@ -844,7 +844,7 @@ bool ppc_frontend::describe_1f(uint32_t op, opcode_desc &desc, const opcode_desc
return true;
case 0x173: // MFTB
if (!(m_ppc->m_cap & PPCCAP_VEA))
if (!(m_ppc.m_cap & PPCCAP_VEA))
return false;
GPR_MODIFIED(desc, G_RD(op));
spr = compute_spr(G_SPR(op));
@ -893,7 +893,7 @@ bool ppc_frontend::describe_1f(uint32_t op, opcode_desc &desc, const opcode_desc
return true;
case 0x0d2: // MTSR
if (!(m_ppc->m_cap & PPCCAP_OEA))
if (!(m_ppc.m_cap & PPCCAP_OEA))
return false;
GPR_USED(desc, G_RS(op));
desc.flags |= OPFLAG_PRIVILEGED | OPFLAG_CAN_CAUSE_EXCEPTION;
@ -918,7 +918,7 @@ bool ppc_frontend::describe_1f(uint32_t op, opcode_desc &desc, const opcode_desc
return true;
case 0x1b6: // ECOWX
if (!(m_ppc->m_cap & PPCCAP_VEA))
if (!(m_ppc.m_cap & PPCCAP_VEA))
return false;
case 0x096: // STWCX.
case 0x097: // STWX
@ -945,7 +945,7 @@ bool ppc_frontend::describe_1f(uint32_t op, opcode_desc &desc, const opcode_desc
return true;
case 0x0f2: // MTSRIN
if (!(m_ppc->m_cap & PPCCAP_OEA))
if (!(m_ppc.m_cap & PPCCAP_OEA))
return false;
GPR_USED(desc, G_RS(op));
GPR_USED(desc, G_RB(op));
@ -953,21 +953,21 @@ bool ppc_frontend::describe_1f(uint32_t op, opcode_desc &desc, const opcode_desc
return true;
case 0x132: // TLBIE
if (!(m_ppc->m_cap & PPCCAP_OEA))
if (!(m_ppc.m_cap & PPCCAP_OEA))
return false;
GPR_USED(desc, G_RB(op));
desc.flags |= OPFLAG_PRIVILEGED | OPFLAG_CAN_CAUSE_EXCEPTION;
return true;
case 0x172: // TLBIA
if (!(m_ppc->m_cap & PPCCAP_OEA) || (m_ppc->m_cap & PPCCAP_603_MMU))
if (!(m_ppc.m_cap & PPCCAP_OEA) || (m_ppc.m_cap & PPCCAP_603_MMU))
return false;
desc.flags |= OPFLAG_PRIVILEGED | OPFLAG_CAN_CAUSE_EXCEPTION;
return true;
case 0x3d2: // TLBLD
case 0x3f2: // TLBLI
if (!(m_ppc->m_cap & PPCCAP_603_MMU) && !is_602_class())
if (!(m_ppc.m_cap & PPCCAP_603_MMU) && !is_602_class())
return false;
desc.flags |= OPFLAG_PRIVILEGED | OPFLAG_CAN_CAUSE_EXCEPTION;
return true;
@ -993,7 +993,7 @@ bool ppc_frontend::describe_1f(uint32_t op, opcode_desc &desc, const opcode_desc
case 0x217: // LFSX
case 0x257: // LFDX
if (!(m_ppc->m_cap & PPCCAP_FPU))
if (!(m_ppc.m_cap & PPCCAP_FPU))
return false;
GPR_USED_OR_ZERO(desc, G_RA(op));
GPR_USED(desc, G_RB(op));
@ -1002,7 +1002,7 @@ bool ppc_frontend::describe_1f(uint32_t op, opcode_desc &desc, const opcode_desc
return true;
case 0x236: // TLBSYNC
if (!(m_ppc->m_cap & PPCCAP_OEA))
if (!(m_ppc.m_cap & PPCCAP_OEA))
return false;
desc.flags |= OPFLAG_PRIVILEGED | OPFLAG_CAN_CAUSE_EXCEPTION;
return true;
@ -1011,13 +1011,13 @@ bool ppc_frontend::describe_1f(uint32_t op, opcode_desc &desc, const opcode_desc
return true;
case 0x356: // EIEIO
if (!(m_ppc->m_cap & (PPCCAP_VEA | PPCCAP_4XX)))
if (!(m_ppc.m_cap & (PPCCAP_VEA | PPCCAP_4XX)))
return false;
return true;
case 0x237: // LFSUX
case 0x277: // LFDUX
if (!(m_ppc->m_cap & PPCCAP_FPU))
if (!(m_ppc.m_cap & PPCCAP_FPU))
return false;
if (G_RA(op) == 0)
return false;
@ -1056,7 +1056,7 @@ bool ppc_frontend::describe_1f(uint32_t op, opcode_desc &desc, const opcode_desc
case 0x297: // STFSX
case 0x2d7: // STFDX
case 0x3d7: // STFIWX
if (!(m_ppc->m_cap & PPCCAP_FPU))
if (!(m_ppc.m_cap & PPCCAP_FPU))
return false;
GPR_USED_OR_ZERO(desc, G_RA(op));
GPR_USED(desc, G_RB(op));
@ -1066,7 +1066,7 @@ bool ppc_frontend::describe_1f(uint32_t op, opcode_desc &desc, const opcode_desc
case 0x2b7: // STFSUX
case 0x2f7: // STFDUX
if (!(m_ppc->m_cap & PPCCAP_FPU))
if (!(m_ppc.m_cap & PPCCAP_FPU))
return false;
if (G_RA(op) == 0)
return false;
@ -1089,7 +1089,7 @@ bool ppc_frontend::describe_1f(uint32_t op, opcode_desc &desc, const opcode_desc
return true;
case 0x3f6: // DCBZ
if (!(m_ppc->m_cap & (PPCCAP_VEA | PPCCAP_4XX)))
if (!(m_ppc.m_cap & (PPCCAP_VEA | PPCCAP_4XX)))
return false;
GPR_USED_OR_ZERO(desc, G_RA(op));
GPR_USED(desc, G_RB(op));
@ -1099,7 +1099,7 @@ bool ppc_frontend::describe_1f(uint32_t op, opcode_desc &desc, const opcode_desc
case 0x106: // ICBT
case 0x1c6: // DCCCI
case 0x3c6: // ICCCI
if (!(m_ppc->m_cap & PPCCAP_4XX))
if (!(m_ppc.m_cap & PPCCAP_4XX))
return false;
GPR_USED_OR_ZERO(desc, G_RA(op));
GPR_USED(desc, G_RB(op));
@ -1108,7 +1108,7 @@ bool ppc_frontend::describe_1f(uint32_t op, opcode_desc &desc, const opcode_desc
case 0x1e6: // DCREAD
case 0x3e6: // ICREAD
if (!(m_ppc->m_cap & PPCCAP_4XX))
if (!(m_ppc.m_cap & PPCCAP_4XX))
return false;
GPR_USED_OR_ZERO(desc, G_RA(op));
GPR_USED(desc, G_RB(op));
@ -1117,28 +1117,28 @@ bool ppc_frontend::describe_1f(uint32_t op, opcode_desc &desc, const opcode_desc
return true;
case 0x143: // MFDCR
if (!(m_ppc->m_cap & PPCCAP_4XX))
if (!(m_ppc.m_cap & PPCCAP_4XX))
return false;
GPR_MODIFIED(desc, G_RD(op));
desc.flags |= OPFLAG_PRIVILEGED | OPFLAG_CAN_CAUSE_EXCEPTION;
return true;
case 0x1c3: // MTDCR
if (!(m_ppc->m_cap & PPCCAP_4XX))
if (!(m_ppc.m_cap & PPCCAP_4XX))
return false;
GPR_USED(desc, G_RS(op));
desc.flags |= OPFLAG_PRIVILEGED | OPFLAG_CAN_CAUSE_EXCEPTION | OPFLAG_CAN_EXPOSE_EXTERNAL_INT;
return true;
case 0x083: // WRTEE
if (!(m_ppc->m_cap & PPCCAP_4XX))
if (!(m_ppc.m_cap & PPCCAP_4XX))
return false;
GPR_USED(desc, G_RS(op));
desc.flags |= OPFLAG_CAN_EXPOSE_EXTERNAL_INT;
return true;
case 0x0a3: // WRTEEI
if (!(m_ppc->m_cap & PPCCAP_4XX))
if (!(m_ppc.m_cap & PPCCAP_4XX))
return false;
if (op & MSR_EE)
desc.flags |= OPFLAG_CAN_EXPOSE_EXTERNAL_INT;
@ -1162,11 +1162,11 @@ bool ppc_frontend::describe_1f(uint32_t op, opcode_desc &desc, const opcode_desc
0x3b group
-------------------------------------------------*/
bool ppc_frontend::describe_3b(uint32_t op, opcode_desc &desc, const opcode_desc *prev)
bool ppc_device::frontend::describe_3b(uint32_t op, opcode_desc &desc, const opcode_desc *prev)
{
uint32_t opswitch = (op >> 1) & 0x1f;
if (!(m_ppc->m_cap & PPCCAP_FPU))
if (!(m_ppc.m_cap & PPCCAP_FPU))
return false;
switch (opswitch)
@ -1238,11 +1238,11 @@ bool ppc_frontend::describe_3b(uint32_t op, opcode_desc &desc, const opcode_desc
0x3f group
-------------------------------------------------*/
bool ppc_frontend::describe_3f(uint32_t op, opcode_desc &desc, const opcode_desc *prev)
bool ppc_device::frontend::describe_3f(uint32_t op, opcode_desc &desc, const opcode_desc *prev)
{
uint32_t opswitch = (op >> 1) & 0x3ff;
if (!(m_ppc->m_cap & PPCCAP_FPU))
if (!(m_ppc.m_cap & PPCCAP_FPU))
return false;
if (opswitch & 0x10)

68
src/devices/cpu/powerpc/ppcfe.h
View File

@ -7,49 +7,45 @@
Front-end for PowerPC recompiler
***************************************************************************/
#ifndef MAME_CPU_POWERPC_PPCFE_H
#define MAME_CPU_POWERPC_PPCFE_H
#ifndef __PPCFE_H__
#define __PPCFE_H__
#pragma once
#include "ppc.h"
#include "cpu/drcfe.h"
//**************************************************************************
// MACROS
//**************************************************************************
// register flags 0
#define REGFLAG_R(n) (1 << (n))
#define REGFLAG_RZ(n) (((n) == 0) ? 0 : REGFLAG_R(n))
// register flags 1
#define REGFLAG_FR(n) (1 << (n))
// register flags 2
#define REGFLAG_CR(n) (0xf0000000 >> (4 * (n)))
#define REGFLAG_CR_BIT(n) (0x80000000 >> (n))
// register flags 3
#define REGFLAG_XER_CA (1 << 0)
#define REGFLAG_XER_OV (1 << 1)
#define REGFLAG_XER_SO (1 << 2)
#define REGFLAG_XER_COUNT (1 << 3)
#define REGFLAG_CTR (1 << 4)
#define REGFLAG_LR (1 << 5)
#define REGFLAG_FPSCR(n) (1 << (6 + (n)))
//**************************************************************************
// TYPE DEFINITIONS
//**************************************************************************
class ppc_frontend : public drc_frontend
class ppc_device::frontend : public drc_frontend
{
public:
// register flags 0
static constexpr u32 REGFLAG_R(unsigned n) { return 1U << n; }
static constexpr u32 REGFLAG_RZ(unsigned n) { return !n ? 0U : REGFLAG_R(n); }
// register flags 1
static constexpr u32 REGFLAG_FR(unsigned n) { return 1U << n; }
// register flags 2
static constexpr u32 REGFLAG_CR(unsigned n) { return 0xf0000000U >> (4 * n); }
static constexpr u32 REGFLAG_CR_BIT(unsigned n) { return 0x80000000U >> n; }
// register flags 3
static constexpr u32 REGFLAG_XER_CA = 1U << 0;
static constexpr u32 REGFLAG_XER_OV = 1U << 1;
static constexpr u32 REGFLAG_XER_SO = 1U << 2;
static constexpr u32 REGFLAG_XER_COUNT = 1U << 3;
static constexpr u32 REGFLAG_CTR = 1U << 4;
static constexpr u32 REGFLAG_LR = 1U << 5;
static constexpr u32 REGFLAG_FPSCR(unsigned n) { return 1U << (6 + n); }
// construction/destruction
ppc_frontend(ppc_device *ppc, uint32_t window_start, uint32_t window_end, uint32_t max_sequence);
frontend(ppc_device &ppc, uint32_t window_start, uint32_t window_end, uint32_t max_sequence);
protected:
// required overrides
@ -58,10 +54,10 @@ protected:
private:
// inlines
uint32_t compute_spr(uint32_t spr) const { return ((spr >> 5) | (spr << 5)) & 0x3ff; }
bool is_403_class() const { return (m_ppc->m_flavor == ppc_device::PPC_MODEL_403GA || m_ppc->m_flavor == ppc_device::PPC_MODEL_403GB || m_ppc->m_flavor == ppc_device::PPC_MODEL_403GC || m_ppc->m_flavor == ppc_device::PPC_MODEL_403GCX || m_ppc->m_flavor == ppc_device::PPC_MODEL_405GP); }
bool is_601_class() const { return (m_ppc->m_flavor == ppc_device::PPC_MODEL_601); }
bool is_602_class() const { return (m_ppc->m_flavor == ppc_device::PPC_MODEL_602); }
bool is_603_class() const { return (m_ppc->m_flavor == ppc_device::PPC_MODEL_603 || m_ppc->m_flavor == ppc_device::PPC_MODEL_603E || m_ppc->m_flavor == ppc_device::PPC_MODEL_603EV || m_ppc->m_flavor == ppc_device::PPC_MODEL_603R); }
bool is_403_class() const { return (m_ppc.m_flavor == ppc_device::PPC_MODEL_403GA || m_ppc.m_flavor == ppc_device::PPC_MODEL_403GB || m_ppc.m_flavor == ppc_device::PPC_MODEL_403GC || m_ppc.m_flavor == ppc_device::PPC_MODEL_403GCX || m_ppc.m_flavor == ppc_device::PPC_MODEL_405GP); }
bool is_601_class() const { return (m_ppc.m_flavor == ppc_device::PPC_MODEL_601); }
bool is_602_class() const { return (m_ppc.m_flavor == ppc_device::PPC_MODEL_602); }
bool is_603_class() const { return (m_ppc.m_flavor == ppc_device::PPC_MODEL_603 || m_ppc.m_flavor == ppc_device::PPC_MODEL_603E || m_ppc.m_flavor == ppc_device::PPC_MODEL_603EV || m_ppc.m_flavor == ppc_device::PPC_MODEL_603R); }
// internal helpers
bool describe_13(uint32_t op, opcode_desc &desc, const opcode_desc *prev);
@ -70,8 +66,8 @@ private:
bool describe_3f(uint32_t op, opcode_desc &desc, const opcode_desc *prev);
// internal state
ppc_device *m_ppc;
ppc_device &m_ppc;
};
#endif /* __PPCFE_H__ */
#endif // MAME_CPU_POWERPC_PPCFE_H