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Cleanups and version bump

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This commit is contained in:
Miodrag Milanovic 2013-11-05 06:59:51 +00:00
parent 50cdc0f4ae
commit 44d5c1b8ab
236 changed files with 5626 additions and 5674 deletions
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2
hash/abc1600.xml
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@ -168,5 +168,5 @@
</dataarea>
</part>
</software>
</softwarelist>

2
hash/abc800.xml
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@ -158,7 +158,7 @@
<year>198?</year>
<publisher>Luxor</publisher>
<info name="usage" value="RUN&quot;LIB&quot;" />
<part name="flop" interface="floppy_5_25">
<dataarea name="flop" size="119474">
<rom name="ufd619.td0" size="119474" crc="d3f9487e" sha1="ad22609421d9abb4c803899b405d087ff3b91c38" offset="0" />

10
hash/c64_cart.xml
View File

@ -6920,12 +6920,12 @@
<year>1985</year>
<publisher>Timeworks</publisher>
<sharedfeat name="compatibility" value="NTSC,PAL"/>
<part name="cart" interface="c64_cart">
<feature name="slot" value="partner" />
<feature name="game" value="0" />
<feature name="exrom" value="1" />
<dataarea name="romh" size="0x4000">
<rom name="timeworks c-64 ver 2-16-87" size="0x4000" crc="d40ec888" sha1="c9050ce93f9375b81800953a38450b0de3751bca" offset="0" />
</dataarea>
@ -6937,15 +6937,15 @@
<year>1987</year>
<publisher>ICS Electronics</publisher>
<sharedfeat name="compatibility" value="NTSC,PAL"/>
<part name="cart" interface="c64_cart">
<feature name="game" value="0" />
<feature name="exrom" value="0" />
<dataarea name="roml" size="0x2000">
<rom name="2.5 v low" size="0x2000" crc="66986152" sha1="ee4ad8ec165a9a3dfad1337a530df64170ad7522" offset="0" />
</dataarea>
<dataarea name="romh" size="0x2000">
<rom name="2.5 v. high" size="0x2000" crc="bc62db7f" sha1="4a3c97174b9912588009de28b0c9040e013f020e" offset="0" />
</dataarea>

22
hash/ibm5170.xml
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@ -304,7 +304,7 @@ Missing files come here
</dataarea>
</part>
</software>
<software name="1stword">
<description>1st Word Plus 2.0</description>
<year>19??</year>
@ -804,7 +804,7 @@ Missing files come here
</dataarea>
</part>
</software>
<software name="os2_20">
<description>OS/2 2.0</description>
<year>1992</year>
@ -3991,7 +3991,7 @@ Missing files come here
<description>Riki Coverdisk (June 1995) (Slovak)</description>
<year>1995</year>
<publisher>Riki</publisher>
<info name="Contents" value="Pyrotechnika" />
<info name="Contents" value="Pyrotechnika" />
<part name="flop1" interface="floppy_3_5">
<dataarea name="flop" size="1474560">
<rom name="riki0695-10.ima" size="1474560" crc="632e1b1b" sha1="c61bc9516d7c39cf785ab5e9d496907f9b5f6e45" offset="0" status="baddump" />
@ -4003,7 +4003,7 @@ Missing files come here
<description>Riki Coverdisk (July 1995) (Slovak)</description>
<year>1995</year>
<publisher>Riki</publisher>
<info name="Contents" value="Super Stardust" />
<info name="Contents" value="Super Stardust" />
<part name="flop1" interface="floppy_3_5">
<dataarea name="flop" size="1474560">
<rom name="riki0795-11.ima" size="1474560" crc="8cb11858" sha1="492d5c9df9ff4e6a85797295d4d8e5b12ed24b04" offset="0" status="baddump" />
@ -4039,7 +4039,7 @@ Missing files come here
<description>Riki Coverdisk (November 1995) (Slovak)</description>
<year>1995</year>
<publisher>Riki</publisher>
<info name="Contents" value="Bleifuss" />
<info name="Contents" value="Bleifuss" />
<part name="flop1" interface="floppy_3_5">
<dataarea name="flop" size="1474560">
<rom name="riki1195-14.ima" size="1474560" crc="bad9bdca" sha1="4425c59acb4c47fdb9f3f9b3322ef9cd5984ec5b" offset="0" status="baddump" />
@ -4063,7 +4063,7 @@ Missing files come here
<description>Riki Coverdisk (January 1996) (Slovak)</description>
<year>1996</year>
<publisher>Riki</publisher>
<info name="Contents" value="Jungle Book" />
<info name="Contents" value="Jungle Book" />
<part name="flop1" interface="floppy_3_5">
<dataarea name="flop" size="1474560">
<rom name="riki0196-16.ima" size="1474560" crc="2d363851" sha1="5b1d8fc2bd16ecad559f15ada6c477241d5a4848" offset="0" status="baddump" />
@ -4075,7 +4075,7 @@ Missing files come here
<description>Riki Coverdisk (February 1996) (Slovak)</description>
<year>1996</year>
<publisher>Riki</publisher>
<info name="Contents" value="Turrican II" />
<info name="Contents" value="Turrican II" />
<part name="flop1" interface="floppy_3_5">
<dataarea name="flop" size="1474560">
<rom name="riki0296-17.ima" size="1474560" crc="0397885e" sha1="fbeb23616a222a87d0d3f1e1bb01d9468ea2e2d9" offset="0" status="baddump" />
@ -4087,7 +4087,7 @@ Missing files come here
<description>Riki Coverdisk (March 1996) (Slovak)</description>
<year>1996</year>
<publisher>Riki</publisher>
<info name="Contents" value="Worms" />
<info name="Contents" value="Worms" />
<part name="flop1" interface="floppy_3_5">
<dataarea name="flop" size="1474560">
<rom name="riki0396-18.ima" size="1474560" crc="1884a1a5" sha1="3a3d1c942b7bdced7a65b0a3e3f65c583abdf03f" offset="0" status="baddump" />
@ -4099,7 +4099,7 @@ Missing files come here
<description>Riki Coverdisk (April 1996) (Slovak)</description>
<year>1996</year>
<publisher>Riki</publisher>
<info name="Contents" value="Tempest 2000" />
<info name="Contents" value="Tempest 2000" />
<part name="flop1" interface="floppy_3_5">
<dataarea name="flop" size="1474560">
<rom name="riki0496-19.ima" size="1474560" crc="5df023bd" sha1="684baaaa927db7102dec1872da18bc20ff4c780b" offset="0" status="baddump" />
@ -4111,7 +4111,7 @@ Missing files come here
<description>Riki Coverdisk (May 1996) (Slovak)</description>
<year>1996</year>
<publisher>Riki</publisher>
<info name="Contents" value="Virtual Snooker" />
<info name="Contents" value="Virtual Snooker" />
<part name="flop1" interface="floppy_3_5">
<dataarea name="flop" size="1474560">
<rom name="riki0596-20.ima" size="1474560" crc="5704d5cd" sha1="c283c7dc070fc9cb8b90fec096a980f4c713746c" offset="0" status="baddump" />
@ -4123,7 +4123,7 @@ Missing files come here
<description>Riki Coverdisk (June 1996) (Slovak)</description>
<year>1996</year>
<publisher>Riki</publisher>
<info name="Contents" value="World Rally Fever" />
<info name="Contents" value="World Rally Fever" />
<part name="flop1" interface="floppy_3_5">
<dataarea name="flop" size="1474560">
<rom name="riki0696-21.ima" size="1474560" crc="e00c21c8" sha1="b05f84ecc7b8e42528395ac5282de8bd36b986b8" offset="0" status="baddump" />

10
hash/ibm5170_cdrom.xml
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@ -6,7 +6,7 @@
<description>PC DOS 2000</description>
<year>1998</year>
<publisher>IBM</publisher>
<part name="cdrom" interface="cdrom">
<diskarea name="cdrom">
<disk name="pcdos2k" sha1="ae69e305e82f24d908296ba9f45a1321a1c9dd58" />
@ -18,7 +18,7 @@
<description>Windows Software Development Kit Version 3.1</description>
<year>1992</year>
<publisher>Microsoft</publisher>
<part name="cdrom" interface="cdrom">
<diskarea name="cdrom">
<disk name="050-151-320" sha1="4840cb3624e4032456434e099cd0362bc278e680" />
@ -30,7 +30,7 @@
<description>Windows Device Development Kit Version 3.1</description>
<year>1992</year>
<publisher>Microsoft</publisher>
<part name="cdrom" interface="cdrom">
<diskarea name="cdrom">
<disk name="win31ddk" sha1="0208c3299cb206ea8b9b7d99e75131661898bae2" />
@ -42,7 +42,7 @@
<description>Windows Resource Kit for Operating System Version 3.1</description>
<year>1992</year>
<publisher>Microsoft</publisher>
<part name="cdrom" interface="cdrom">
<diskarea name="cdrom">
<disk name="win31rk" sha1="0813d90cf00e296676ecd0259cd425ab50670e8a" />
@ -54,7 +54,7 @@
<description>Windows Multimedia Extensions 1.0</description>
<year>1992</year>
<publisher>Microsoft</publisher>
<part name="cdrom" interface="cdrom">
<diskarea name="cdrom">
<disk name="win30me" sha1="0ef02709c3ed3544fc01983921eaace878cf5d80" />

2
hash/megadriv.xml
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@ -29474,7 +29474,7 @@ Notice that these are not working on real hardware due to bugged code with VDP i
</dataarea>
</part>
</software>
<software name="topfight">
<description>Top Fighter 2000 MK VIII</description>
<year>199?</year>

6
hash/nes.xml
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@ -37501,11 +37501,11 @@
<feature name="batt?" value="BATTERY" />
<dataarea name="prg" size="262144">
<!-- The PRG split ROMs have to be confirmed -->
<rom name="8-27 0 5-20.u1" size="131072" crc="06074289" sha1="7c5b4a7f51eb79458cbe7cb7e77aae4df6eac4f3" offset="0x00000" status="baddump" /> <!-- Actual label: 8/27 0 5:20 -->
<rom name="8-27 1 5-20.u2" size="131072" crc="937992d7" sha1="e335b4c2dc3fc21effaa8a12d47677090c8b30c4" offset="0x20000" status="baddump" /> <!-- Actual label: 8/27 1 5:20 -->
<rom name="8-27 0 5-20.u1" size="131072" crc="06074289" sha1="7c5b4a7f51eb79458cbe7cb7e77aae4df6eac4f3" offset="0x00000" status="baddump" /> <!-- Actual label: 8/27 0 5:20 -->
<rom name="8-27 1 5-20.u2" size="131072" crc="937992d7" sha1="e335b4c2dc3fc21effaa8a12d47677090c8b30c4" offset="0x20000" status="baddump" /> <!-- Actual label: 8/27 1 5:20 -->
</dataarea>
<dataarea name="chr" size="131072">
<rom name="t.s.b. chr 8-27.u5" size="131072" crc="e5f74c77" sha1="3657693f08c66d2db84bcf62fdd4c439603778f5" offset="00000" /> <!-- Actual label: T.S.B. CHR 8/27 -->
<rom name="t.s.b. chr 8-27.u5" size="131072" crc="e5f74c77" sha1="3657693f08c66d2db84bcf62fdd4c439603778f5" offset="00000" /> <!-- Actual label: T.S.B. CHR 8/27 -->
</dataarea>
<!-- 8k WRAM on cartridge, battery backed up -->
<dataarea name="bwram" size="8192">

2
hash/pet_rom.xml
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@ -62,7 +62,7 @@
<publisher>Skyles Electric Works Inc.</publisher>
<part name="rom" interface="pet_9000_rom">
<dataarea name="rom" size="0x1000">
<dataarea name="rom" size="0x1000">
<rom name="com80u-9000.bin" size="0x1000" crc="7699b86b" sha1="51d43d05b7a657899d471371496de36e447c3ea4" offset="0" />
</dataarea>
</part>

2
src/emu/bus/a2bus/a2cffa.c
View File

@ -35,7 +35,7 @@ MACHINE_CONFIG_FRAGMENT( cffa2 )
MCFG_ATA_INTERFACE_ADD(CFFA2_ATA_TAG, ata_devices, "hdd", NULL, false)
// not yet, the core explodes
// MCFG_SOFTWARE_LIST_ADD("hdd_list", "apple2gs_hdd")
// MCFG_SOFTWARE_LIST_ADD("hdd_list", "apple2gs_hdd")
MACHINE_CONFIG_END
ROM_START( cffa2 )

14
src/emu/bus/a2bus/a2hsscsi.c
View File

@ -3,10 +3,10 @@
a2hsscsi.c
Implementation of the Apple II High Speed SCSI Card
This uses an ASIC called "Sandwich II"; the card itself is
sometimes known as "Cocoon".
Notes:
C0n0-C0n7 = NCR5380 registers in normal order
C0n8 = DMA address low
@ -17,7 +17,7 @@
C0nD = Enable DMA / reset 5380
C0nE = Priority (read bits 5-7) / Fire watchdog (write bit 7) / RAM bank (write bits 0-3)
C0nF = DMA speed (bit 7 = 0 for fast, 1 for slow) / ROM bank (write bits 0-4)
DMA control register (C0nC):
0x01 = pseudo-DMA enable
0x02 = DMA enable
@ -27,13 +27,13 @@
0x20 = 5380 IRQ enable
0x40 = system DMA status (read only)
0x80 = DMA stopped due to IRQ
Enable DMA / reset 5380 register (C0nD):
0x01 = Resume DMA after rollover or IRQ
0x02 = Reset the 5380
0x40 = Clear test mode
0x80 = Set test mode
*********************************************************************/
#include "a2hsscsi.h"
@ -182,9 +182,9 @@ UINT8 a2bus_hsscsi_device::read_c0nx(address_space &space, UINT8 offset)
break;
case 0xc:
return 0x00; // indicate watchdog?
return 0x00; // indicate watchdog?
case 0xe: // code at cf32 wants to RMW this without killing the ROM bank
case 0xe: // code at cf32 wants to RMW this without killing the ROM bank
return m_c0ne;
case 0xf:

10
src/emu/bus/a2bus/a2scsi.c
View File

@ -15,18 +15,18 @@
C0na = RAM and ROM bank switching
C0nb = reset 5380
C0nc = set IIgs block mode
C0nd = set pseudo-DMA
C0nd = set pseudo-DMA
C0ne = read DRQ status in bit 7
In IIgs block mode, any read from C800-CBFF window fetches
the next byte from the 5380's DMA port. This lets you use the
65816 MVN/MVP operations to burst-transfer up to 1K at a time.
(Requires a cycle-by-cycle haltable 65816 core; don't install the
GS/OS driver right now to avoid this)
GS/OS driver right now to avoid this)
Pseudo-DMA works similarly to the Mac implementation; use C0n8
to read/write "DMA" bytes in that mode.
*********************************************************************/
#include "a2scsi.h"

2
src/emu/bus/abcbus/abcbus.h
View File

@ -204,7 +204,7 @@ public:
// ======================> abcbus_slot_device
class abcbus_slot_device : public device_t,
public device_slot_interface
public device_slot_interface
{
public:
// construction/destruction

2
src/emu/bus/abcbus/lux10828.h
View File

@ -52,7 +52,7 @@
// ======================> luxor_55_10828_device
class luxor_55_10828_device : public device_t,
public device_abcbus_card_interface
public device_abcbus_card_interface
{
public:
// construction/destruction

10
src/emu/bus/abcbus/lux21046.c
View File

@ -497,9 +497,9 @@ int luxor_55_21046_device::abcbus_csb()
UINT8 luxor_55_21046_device::abcbus_stat()
{
/*
bit description
0 3A pin 8
1 4B Q1
2 4B Q2
@ -508,7 +508,7 @@ UINT8 luxor_55_21046_device::abcbus_stat()
5 PAL16R4 pin 17
6 S1/A: PREN*, S1/B: 4B Q6
7 S5/A: PAL16R4 pin 16 inverted, S5/B: 4B Q7
*/
UINT8 data = 0;
@ -730,11 +730,11 @@ WRITE8_MEMBER( luxor_55_21046_device::_8a_w )
/*
if (BIT(data, 2))
{
m_fdc->set_unscaled_clock(XTAL_16MHz/16);
m_fdc->set_unscaled_clock(XTAL_16MHz/16);
}
else
{
m_fdc->set_unscaled_clock(XTAL_16MHz/8);
m_fdc->set_unscaled_clock(XTAL_16MHz/8);
}
*/
}

2
src/emu/bus/abcbus/lux21046.h
View File

@ -51,7 +51,7 @@
// ======================> luxor_55_21046_device
class luxor_55_21046_device : public device_t,
public device_abcbus_card_interface
public device_abcbus_card_interface
{
public:
// construction/destruction

70
src/emu/bus/abcbus/lux21056.c
View File

@ -11,47 +11,47 @@
/*
Use the CHDMAN utility to create a 5MB image for ABC 850:
Use the CHDMAN utility to create a 5MB image for ABC 850:
$ chdman createhd -o /path/to/ro202.chd -chs 321,4,17 -ss 512
$ chdman createhd -o /path/to/basf6185.chd -chs 440,6,32 -ss 256
$ chdman createhd -o /path/to/ro202.chd -chs 321,4,17 -ss 512
$ chdman createhd -o /path/to/basf6185.chd -chs 440,6,32 -ss 256
or a 10MB image for ABC 852:
or a 10MB image for ABC 852:
$ chdman createhd -o /path/to/nec5126.chd -chs 615,4,17 -ss 512
$ chdman createhd -o /path/to/nec5126.chd -chs 615,4,17 -ss 512
or a 20MB image for ABC 856:
or a 20MB image for ABC 856:
$ chdman createhd -o /path/to/micr1325.chd -chs 1024,8,33 -ss 256
$ chdman createhd -o /path/to/micr1325.chd -chs 1024,8,33 -ss 256
Start the abc800 emulator with the ABC 850 attached on the ABC bus,
with the new CHD and a UFD-DOS floppy mounted:
$ mess abc800m -bus hdd -bus:hdd:io2 xebec,bios=ro202 -flop1 ufd631 -hard ro202.chd
$ mess abc800m -bus hdd -bus:hdd:io2 xebec,bios=basf6185 -flop1 ufd631 -hard basf6185.chd
$ mess abc800m -bus hdd -bus:hdd:io2 xebec,bios=nec5126 -flop1 ufd631 -hard nec5126.chd
$ mess abc800m -bus hdd -bus:hdd:io2 xebec,bios=micr1325 -flop1 ufd631 -hard micr1325.chd
Start the abc800 emulator with the ABC 850 attached on the ABC bus,
with the new CHD and a UFD-DOS floppy mounted:
Configure the floppy controller for use with an ABC 850:
$ mess abc800m -bus hdd -bus:hdd:io2 xebec,bios=ro202 -flop1 ufd631 -hard ro202.chd
$ mess abc800m -bus hdd -bus:hdd:io2 xebec,bios=basf6185 -flop1 ufd631 -hard basf6185.chd
$ mess abc800m -bus hdd -bus:hdd:io2 xebec,bios=nec5126 -flop1 ufd631 -hard nec5126.chd
$ mess abc800m -bus hdd -bus:hdd:io2 xebec,bios=micr1325 -flop1 ufd631 -hard micr1325.chd
- Drive 0 Sides: Double
- Drive 1 Sides: Double
- Drive 0 Tracks: 40 or 80 depending on the UFD DOS image used
- Drive 1 Tracks: 40 or 80 depending on the UFD DOS image used
- Card Address: 44 (ABC 832/834/850)
Configure the floppy controller for use with an ABC 850:
Reset the emulated machine by pressing F3.
- Drive 0 Sides: Double
- Drive 1 Sides: Double
- Drive 0 Tracks: 40 or 80 depending on the UFD DOS image used
- Drive 1 Tracks: 40 or 80 depending on the UFD DOS image used
- Card Address: 44 (ABC 832/834/850)
You should now see the following text at the top of the screen:
Reset the emulated machine by pressing F3.
DOS är UFD-DOS ver. 19
DR_: motsvarar MF_:
You should now see the following text at the top of the screen:
Enter "BYE" to get into the UFD-DOS command prompt.
Enter "DOSGEN,F HD0:" to start the formatting utility.
Enter "J", and enter "J" to confirm the formatting.
DOS ??r UFD-DOS ver. 19
DR_: motsvarar MF_:
To Be Continued...
Enter "BYE" to get into the UFD-DOS command prompt.
Enter "DOSGEN,F HD0:" to start the formatting utility.
Enter "J", and enter "J" to confirm the formatting.
To Be Continued...
*/
@ -68,7 +68,7 @@
#define SASIBUS_TAG "sasi"
#define STAT_DIR \
BIT(m_stat, 6)
BIT(m_stat, 6)
@ -445,19 +445,19 @@ void luxor_55_21056_device::abcbus_c3(UINT8 data)
READ8_MEMBER( luxor_55_21056_device::sasi_status_r )
{
/*
bit description
0 RDY
1 REQ
2 I/O
3 C/D
4 MSG
5 BSY
6
7
*/
6
7
*/
UINT8 data = 0;

4
src/emu/bus/abcbus/lux21056.h
View File

@ -32,7 +32,7 @@
// ======================> luxor_55_21056_device
class luxor_55_21056_device : public device_t,
public device_abcbus_card_interface
public device_abcbus_card_interface
{
public:
// construction/destruction
@ -64,7 +64,7 @@ public:
DECLARE_WRITE_LINE_MEMBER( sasi_bsy_w );
DECLARE_WRITE_LINE_MEMBER( sasi_io_w );
DECLARE_WRITE_LINE_MEMBER( sasi_req_w );
protected:
// device-level overrides
virtual void device_start();

2
src/emu/bus/adamnet/fdc.h
View File

@ -29,7 +29,7 @@
// ======================> adam_fdc_device
class adam_fdc_device : public device_t,
public device_adamnet_card_interface
public device_adamnet_card_interface
{
public:
// construction/destruction

2
src/emu/bus/c64/partner.c
View File

@ -198,7 +198,7 @@ int c64_partner_cartridge_device::c64_game_r(offs_t offset, int sphi2, int ba, i
{
switch ((offset >> 13) & 0x03)
{
case 0: case 1: case 3:
case 0: case 1: case 3:
game = 0;
break;
}

2
src/emu/bus/c64/partner.h
View File

@ -26,7 +26,7 @@
// ======================> c64_partner_cartridge_device
class c64_partner_cartridge_device : public device_t,
public device_c64_expansion_card_interface
public device_c64_expansion_card_interface
{
public:
// construction/destruction

62
src/emu/bus/c64/tdos.c
View File

@ -92,26 +92,26 @@ Drive cable pinout
ULA pinout
----------
_____ _____
1 |* \_/ | 40
2 | | 39
3 | | 38
4 | | 37
1 |* \_/ | 40
2 | | 39
3 | | 38
4 | | 37
5 | | 36 GND
6 | | 35
RD 7 | | 34
_D5 8 | | 33
RxC 9 | | 32
RxD 10 | XZ-2085-1 | 31
11 | | 30
WD 12 | | 29
TxC 13 | | 28
TxD 14 | | 27
D7 15 | | 26
6 | | 35
RD 7 | | 34
_D5 8 | | 33
RxC 9 | | 32
RxD 10 | XZ-2085-1 | 31
11 | | 30
WD 12 | | 29
TxC 13 | | 28
TxD 14 | | 27
D7 15 | | 26
WG 16 | | 25 +5V
17 | | 24 XTAL2
18 | | 23 XTAL1
RS 19 | | 22 GND
20 |_____________| 21
20 |_____________| 21
BASIC commands (SYS 32768 to activate)
@ -281,18 +281,18 @@ UINT8 c64_tdos_cartridge_device::c64_cd_r(address_space &space, offs_t offset, U
case 2:
/*
bit description
0
1
2
3
4
0
1
2
3
4
5 drive MS
6 drive WP
7 drive RY
*/
break;
}
@ -320,18 +320,18 @@ void c64_tdos_cartridge_device::c64_cd_w(address_space &space, offs_t offset, UI
case 1:
/*
bit description
0
1
2
3
4
0
1
2
3
4
5 ULA pin 8, inverted
6 drive MO
7 ULA pin 15
*/
break;

4
src/emu/bus/centronics/ctronics.c
View File

@ -2,8 +2,8 @@
Centronics printer interface
license: MAME, GPL-2.0+
copyright-holders: Dirk Best
license: MAME, GPL-2.0+
copyright-holders: Dirk Best
***************************************************************************/

4
src/emu/bus/centronics/ctronics.h
View File

@ -2,8 +2,8 @@
Centronics printer interface
license: MAME, GPL-2.0+
copyright-holders: Dirk Best
license: MAME, GPL-2.0+
copyright-holders: Dirk Best
***************************************************************************/

2
src/emu/bus/ieee488/c2031.h
View File

@ -30,7 +30,7 @@
// ======================> c2031_device
class c2031_device : public device_t,
public device_ieee488_interface
public device_ieee488_interface
{
public:
// construction/destruction

2
src/emu/bus/isbx/compis_fdc.c
View File

@ -16,7 +16,7 @@
// MACROS / CONSTANTS
//**************************************************************************
#define I8272_TAG "ic13"
#define I8272_TAG "ic13"

2
src/emu/bus/isbx/compis_fdc.h
View File

@ -28,7 +28,7 @@
// ======================> compis_fdc_device
class compis_fdc_device : public device_t,
public device_isbx_card_interface
public device_isbx_card_interface
{
public:
// construction/destruction

4
src/emu/bus/isbx/isbx.h
View File

@ -99,7 +99,7 @@ protected:
// ======================> isbx_slot_device
class isbx_slot_device : public device_t,
public device_slot_interface
public device_slot_interface
{
public:
// construction/destruction
@ -109,7 +109,7 @@ public:
template<class _mintr1> void set_mintr1_callback(_mintr1 mintr1) { m_write_mintr1.set_callback(mintr1); }
template<class _mdrqt> void set_mdrqt_callback(_mdrqt mdrqt) { m_write_mdrqt.set_callback(mdrqt); }
template<class _mwait> void set_mwait_callback(_mwait mwait) { m_write_mwait.set_callback(mwait); }
// computer interface
DECLARE_READ8_MEMBER( mcs0_r ) { return m_card ? m_card->mcs0_r(space, offset) : 0xff; }
DECLARE_WRITE8_MEMBER( mcs0_w ) { if (m_card) m_card->mcs0_w(space, offset, data); }

2
src/emu/bus/plus4/c1551.h
View File

@ -34,7 +34,7 @@
// ======================> c1551_device
class c1551_device : public device_t,
public device_plus4_expansion_card_interface
public device_plus4_expansion_card_interface
{
public:
// construction/destruction

4
src/emu/cpu/i8089/i8089.c
View File

@ -2,8 +2,8 @@
Intel 8089 I/O Processor
license: MAME, GPL-2.0+
copyright-holders: Dirk Best
license: MAME, GPL-2.0+
copyright-holders: Dirk Best
***************************************************************************/

4
src/emu/cpu/i8089/i8089.h
View File

@ -2,8 +2,8 @@
Intel 8089 I/O Processor
license: MAME, GPL-2.0+
copyright-holders: Dirk Best
license: MAME, GPL-2.0+
copyright-holders: Dirk Best
***************************************************************************/

4
src/emu/cpu/i8089/i8089_channel.c
View File

@ -2,8 +2,8 @@
Intel 8089 I/O Processor
license: MAME, GPL-2.0+
copyright-holders: Dirk Best
license: MAME, GPL-2.0+
copyright-holders: Dirk Best
I/O channel

4
src/emu/cpu/i8089/i8089_channel.h
View File

@ -2,8 +2,8 @@
Intel 8089 I/O Processor
license: MAME, GPL-2.0+
copyright-holders: Dirk Best
license: MAME, GPL-2.0+
copyright-holders: Dirk Best
I/O channel

4
src/emu/cpu/i8089/i8089_dasm.c
View File

@ -2,8 +2,8 @@
Intel 8089 I/O Processor
license: MAME, GPL-2.0+
copyright-holders: Dirk Best
license: MAME, GPL-2.0+
copyright-holders: Dirk Best
Disassembler

4
src/emu/cpu/i8089/i8089_ops.c
View File

@ -2,8 +2,8 @@
Intel 8089 I/O Processor
license: MAME, GPL-2.0+
copyright-holders: Dirk Best
license: MAME, GPL-2.0+
copyright-holders: Dirk Best
Opcode implementations

17
src/emu/cpu/nec/nec.c
View File

@ -364,14 +364,14 @@ void nec_common_device::device_start()
Mod_RM.RM.b[i] = breg_name[i & 7];
}
m_no_interrupt = 0;
m_prefetch_count = 0;
m_prefetch_reset = 0;
m_prefix_base = 0;
m_seg_prefix = 0;
m_EA = 0;
m_EO = 0;
m_E16 = 0;
m_no_interrupt = 0;
m_prefetch_count = 0;
m_prefetch_reset = 0;
m_prefix_base = 0;
m_seg_prefix = 0;
m_EA = 0;
m_EO = 0;
m_E16 = 0;
save_item(NAME(m_regs.w));
save_item(NAME(m_sregs));
@ -522,4 +522,3 @@ void nec_common_device::execute_run()
do_prefetch(prev_ICount);
}
}

1
src/emu/cpu/nec/v25.c
View File

@ -745,4 +745,3 @@ void v25_common_device::execute_run()
do_prefetch(prev_ICount);
}
}

22
src/emu/cpu/rsp/rsp.c
View File

@ -66,11 +66,11 @@ INLINE rsp_state *get_safe_token(device_t *device)
#define ACCUM_M(x) rsp->accum[((x))].w[2]
#define ACCUM_L(x) rsp->accum[((x))].w[1]
#define CARRY 0
#define COMPARE 1
#define CLIP1 2
#define ZERO 3
#define CLIP2 4
#define CARRY 0
#define COMPARE 1
#define CLIP1 2
#define ZERO 3
#define CLIP2 4
#define CARRY_FLAG(x) (rsp->vflag[CARRY][x & 7] != 0 ? 0xffff : 0)
#define COMPARE_FLAG(x) (rsp->vflag[COMPARE][x & 7] != 0 ? 0xffff : 0)
@ -78,7 +78,7 @@ INLINE rsp_state *get_safe_token(device_t *device)
#define ZERO_FLAG(x) (rsp->vflag[ZERO][x & 7] != 0 ? 0xffff : 0)
#define CLIP2_FLAG(x) (rsp->vflag[CLIP2][x & 7] != 0 ? 0xffff : 0)
#define CLEAR_CARRY_FLAGS() { memset(rsp->vflag[0], 0, 16); }
#define CLEAR_CARRY_FLAGS() { memset(rsp->vflag[0], 0, 16); }
#define CLEAR_COMPARE_FLAGS() { memset(rsp->vflag[1], 0, 16); }
#define CLEAR_CLIP1_FLAGS() { memset(rsp->vflag[2], 0, 16); }
#define CLEAR_ZERO_FLAGS() { memset(rsp->vflag[3], 0, 16); }
@ -309,11 +309,11 @@ static CPU_INIT( rsp )
rsp->v[regIdx].d[0] = 0;
rsp->v[regIdx].d[1] = 0;
}
CLEAR_CARRY_FLAGS();
CLEAR_COMPARE_FLAGS();
CLEAR_CLIP1_FLAGS();
CLEAR_ZERO_FLAGS();
CLEAR_CLIP2_FLAGS();
CLEAR_CARRY_FLAGS();
CLEAR_COMPARE_FLAGS();
CLEAR_CLIP1_FLAGS();
CLEAR_ZERO_FLAGS();
CLEAR_CLIP2_FLAGS();
//rsp->square_root_res = 0;
//rsp->square_root_high = 0;
rsp->reciprocal_res = 0;

7860
src/emu/cpu/rsp/rspdrc.c
View File

File diff suppressed because it is too large Load Diff

5
src/emu/cpu/saturn/saturn.c
View File

@ -60,7 +60,7 @@ saturn_device::saturn_device(const machine_config &mconfig, const char *tag, dev
, m_program_config("program", ENDIANNESS_LITTLE, 8, 20, 0)
, m_out_func(*this)
, m_in_func(*this)
, m_reset_func(*this)
, m_reset_func(*this)
, m_config_func(*this)
, m_unconfig_func(*this)
, m_id_func(*this)
@ -97,7 +97,7 @@ void saturn_device::device_start()
m_out_func.resolve_safe();
m_in_func.resolve_safe(0);
m_reset_func.resolve_safe();
m_reset_func.resolve_safe();
m_config_func.resolve_safe();
m_unconfig_func.resolve_safe();
m_id_func.resolve_safe(0);
@ -420,4 +420,3 @@ INT64 saturn_device::Reg64Int(Saturn64 r)
x |= (INT64) r[i] << (4*i);
return x;
}

1
src/emu/cpu/scudsp/scudsp.c
View File

@ -997,7 +997,6 @@ void scudsp_cpu_device::device_start()
void scudsp_cpu_device::device_reset()
{
}
void scudsp_cpu_device::execute_set_input(int irqline, int state)

18
src/emu/cpu/scudsp/scudsp.h
View File

@ -59,7 +59,7 @@ union SCUDSPREG16 {
};
class scudsp_cpu_device : public cpu_device,
public scudsp_interface
public scudsp_interface
{
public:
// construction/destruction
@ -75,7 +75,7 @@ public:
/* port 3 */
DECLARE_READ32_MEMBER( ram_address_r );
DECLARE_WRITE32_MEMBER( ram_address_w );
// virtual DECLARE_ADDRESS_MAP(map, 32) = 0;
// virtual DECLARE_ADDRESS_MAP(map, 32) = 0;
protected:
// device-level overrides
@ -108,17 +108,17 @@ private:
address_space_config m_program_config;
address_space_config m_data_config;
UINT8 m_pc; /* registers */
UINT32 m_flags; /* flags */
UINT8 m_pc; /* registers */
UINT32 m_flags; /* flags */
UINT8 m_ra;
UINT8 m_ct0,m_ct1,m_ct2,m_ct3;
UINT8 m_delay; /* Delay */
UINT8 m_top; /*Jump Command memory*/
UINT16 m_lop; /*Counter Register*/ /*12-bits*/
UINT8 m_delay; /* Delay */
UINT8 m_top; /*Jump Command memory*/
UINT16 m_lop; /*Counter Register*/ /*12-bits*/
SCUDSPREG32 m_rx; /*X-Bus register*/
INT64 m_mul; /*Multiplier register*//*48-bits*/
INT64 m_mul; /*Multiplier register*//*48-bits*/
SCUDSPREG32 m_ry; /*Y-Bus register*/
INT64 m_alu; /*ALU register*/ /*48-bits*/
INT64 m_alu; /*ALU register*/ /*48-bits*/
SCUDSPREG16 m_ph; /*ALU high register*/
SCUDSPREG32 m_pl; /*ALU low register*/
SCUDSPREG16 m_ach; /*ALU external high register*/

2
src/emu/cpu/sh2/sh2drc.c
View File

@ -4,7 +4,7 @@
sh2drc.c
Universal machine language-based SH-2 emulator.
***************************************************************************/
#include "emu.h"

2
src/emu/imagedev/serial.h
View File

@ -102,6 +102,6 @@ extern const device_type SERIAL;
#define MCFG_SERIAL_ADD(_tag,_config) \
MCFG_DEVICE_ADD(_tag, SERIAL, 0) \
MCFG_DEVICE_ADD(_tag, SERIAL, 0) \
MCFG_DEVICE_CONFIG(_config)
#endif /* __IMAGEDEV_SERIAL_H__ */

4
src/emu/ioport.c
View File

@ -1814,7 +1814,7 @@ void ioport_field::get_user_settings(user_settings &settings)
settings.centerdelta = m_live->analog->centerdelta();
settings.reverse = m_live->analog->reverse();
}
// non-analog settings
else
{
@ -3207,7 +3207,7 @@ bool ioport_manager::load_game_config(xml_data_node *portnode, int type, int pla
{
// fetch the value
field->live().value = xml_get_attribute_int(portnode, "value", field->defvalue());
// fetch yes/no for toggle setting
const char *togstring = xml_get_attribute_string(portnode, "toggle", NULL);
if (togstring != NULL)

6
src/emu/machine/6525tpi.h
View File

@ -78,7 +78,7 @@ public:
DECLARE_WRITE8_MEMBER( pa_w );
DECLARE_WRITE8_MEMBER( pb_w );
DECLARE_WRITE8_MEMBER( pc_w );
UINT8 get_ddr_a();
UINT8 get_ddr_b();
UINT8 get_ddr_c();
@ -88,7 +88,7 @@ protected:
virtual void device_config_complete();
virtual void device_start();
virtual void device_reset();
private:
// internal state
devcb_resolved_write_line m_out_irq_func;
@ -111,7 +111,7 @@ private:
UINT8 m_air;
UINT8 m_irq_level[5];
void set_interrupt();
void clear_interrupt();
};

8
src/emu/machine/74145.c
View File

@ -1,11 +1,11 @@
/*****************************************************************************
*
* TTL74145
* TTL74145
*
* license: MAME, GPL-2.0+
* copyright-holders: Dirk Best
* license: MAME, GPL-2.0+
* copyright-holders: Dirk Best
*
* BCD-to-Decimal decoder
* BCD-to-Decimal decoder
*
* __ __
* 0-| v |-VCC

4
src/emu/machine/74145.h
View File

@ -2,8 +2,8 @@
TTL74145
license: MAME, GPL-2.0+
copyright-holders: Dirk Best
license: MAME, GPL-2.0+
copyright-holders: Dirk Best
BCD-to-Decimal decoder

2
src/emu/machine/74181.c
View File

@ -46,7 +46,7 @@ void ttl74181_device::device_start()
save_item(NAME(m_s));
save_item(NAME(m_m));
save_item(NAME(m_c));
update();
}

3
src/emu/machine/er59256.c
View File

@ -29,7 +29,6 @@ er59256_device::er59256_device(const machine_config &mconfig, const char *tag, d
m_command(0),
m_flags(0)
{
}
//-------------------------------------------------
@ -54,7 +53,7 @@ void er59256_device::device_start()
m_command=CMD_INVALID;
m_flags&= ~FLAG_DATA_LOADED;
save_item(NAME(m_eerom));
save_item(NAME(m_io_bits));
save_item(NAME(m_old_io_bits));

8
src/emu/machine/er59256.h
View File

@ -26,16 +26,16 @@ public:
UINT8 get_iobits();
void preload_rom(const UINT16 *rom_data, int count);
UINT8 data_loaded();
protected:
// device-level overrides
virtual void device_config_complete();
virtual void device_start();
virtual void device_stop();
private:
// internal state
/* The actual memory */
UINT16 m_eerom[EEROM_WORDS];
@ -58,7 +58,7 @@ private:
/* Write enable and write in progress flags */
UINT8 m_flags;
void decode_command();
};

16
src/emu/machine/i80130.c
View File

@ -142,14 +142,14 @@ machine_config_constructor i80130_device::device_mconfig_additions() const
i80130_device::i80130_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, I80130, "I80130", tag, owner, clock, "i80130", __FILE__),
m_pic(*this, "pic"),
m_pit(*this, "pit"),
m_write_irq(*this),
m_write_ack(*this),
m_write_lir(*this),
m_write_systick(*this),
m_write_delay(*this),
m_write_baud(*this)
m_pic(*this, "pic"),
m_pit(*this, "pit"),
m_write_irq(*this),
m_write_ack(*this),
m_write_lir(*this),
m_write_systick(*this),
m_write_delay(*this),
m_write_baud(*this)
{
}

4
src/emu/machine/ins8154.c
View File

@ -2,8 +2,8 @@
National Semiconductor INS8154
license: MAME, GPL-2.0+
copyright-holders: Dirk Best
license: MAME, GPL-2.0+
copyright-holders: Dirk Best
N-Channel 128-by-8 Bit RAM Input/Output (RAM I/O)

4
src/emu/machine/ins8154.h
View File

@ -2,8 +2,8 @@
National Semiconductor INS8154
license: MAME, GPL-2.0+
copyright-holders: Dirk Best
license: MAME, GPL-2.0+
copyright-holders: Dirk Best
N-Channel 128-by-8 Bit RAM Input/Output (RAM I/O)

6
src/emu/machine/mc146818.c
View File

@ -186,7 +186,7 @@ void mc146818_device::nvram_default()
if (m_region != NULL)
{
UINT32 bytes = m_region->bytes();
if (bytes > data_size())
bytes = data_size();
@ -237,7 +237,7 @@ int mc146818_device::to_ram(int a)
{
if (!(m_data[REG_B] & REG_B_DM))
return dec_2_bcd(a);
return a;
}
@ -250,7 +250,7 @@ int mc146818_device::from_ram(int a)
{
if (!(m_data[REG_B] & REG_B_DM))
return bcd_2_dec(a);
return a;
}

2
src/emu/machine/mc146818.h
View File

@ -171,5 +171,5 @@ private:
// device type definition
extern const device_type MC146818;
#endif /* __MC146818_H__ */

8
src/emu/machine/mc6846.h
View File

@ -52,7 +52,7 @@ public:
/* partial access to internal state */
UINT16 get_preset(); /* timer interval - 1 in us */
protected:
// device-level overrides
virtual void device_config_complete();
@ -61,7 +61,7 @@ protected:
private:
// internal state
/* registers */
UINT8 m_csr; /* 0,4: combination status register */
UINT8 m_pcr; /* 1: peripheral control register */
@ -104,12 +104,12 @@ private:
int m_old_cif;
int m_old_cto;
inline UINT16 counter();
inline void update_irq();
inline void update_cto();
inline void timer_launch();
TIMER_CALLBACK_MEMBER(timer_expire);
TIMER_CALLBACK_MEMBER(timer_one_shot);
};

6
src/emu/machine/mc6854.c
View File

@ -186,11 +186,11 @@ mc6854_device::mc6854_device(const machine_config &mconfig, const char *tag, dev
m_fpos(0)
{
for (int i = 0; i < MC6854_FIFO_SIZE; i++)
{
{
m_tfifo[i] = 0;
m_rfifo[i] = 0;
}
for (int i = 0; i < MAX_FRAME_LENGTH; i++)
{
m_frame[i] = 0;
@ -379,7 +379,7 @@ void mc6854_device::tfifo_terminate( )
TIMER_CALLBACK_MEMBER(mc6854_device::tfifo_cb)
{
device_t* device = (device_t*) ptr;
int i, data = m_tfifo[ MC6854_FIFO_SIZE - 1 ];
if ( ! m_tstate )

6
src/emu/machine/mc6854.h
View File

@ -107,18 +107,18 @@ private:
5 = 8-bit logical control field(s)
6 = variable-length data field(s)
*/
void send_bits( UINT32 data, int len, int zi );
void tfifo_push( UINT8 data );
void tfifo_terminate( );
TIMER_CALLBACK_MEMBER(tfifo_cb);
void tfifo_clear( );
void rfifo_push( UINT8 d );
void rfifo_terminate( );
UINT8 rfifo_pop( );
void rfifo_clear( );
void update_sr2( );
void update_sr1( );
};

67
src/emu/machine/ncr5380n.c
View File

@ -3,13 +3,13 @@
ncr5380n.c
Implementation of the NCR 5380, aka the Zilog Z5380
TODO:
- IRQs
- Target mode
40801766 - IIx ROM waiting point for "next read fails"
*********************************************************************/
#include "emu.h"
@ -78,7 +78,7 @@ void ncr5380n_device::device_reset()
void ncr5380n_device::reset_soft()
{
state = IDLE;
scsi_bus->ctrl_w(scsi_refid, 0, S_ALL); // clear any signals we're driving
scsi_bus->ctrl_w(scsi_refid, 0, S_ALL); // clear any signals we're driving
scsi_bus->ctrl_wait(scsi_refid, S_ALL, S_ALL);
status = 0;
drq = false;
@ -97,13 +97,13 @@ void ncr5380n_device::scsi_ctrl_changed()
{
UINT32 ctrl = scsi_bus->ctrl_r();
// printf("scsi_ctrl_changed: lines now %x\n", ctrl);
// printf("scsi_ctrl_changed: lines now %x\n", ctrl);
/* if ((ctrl & (S_PHASE_MASK|S_SEL|S_BSY)) != last_phase)
{
printf("phase now %d, REQ %x SEL %x BSY %x\n", ctrl & S_PHASE_MASK, ctrl & S_REQ, ctrl & S_SEL, ctrl & S_BSY);
last_phase = (S_PHASE_MASK|S_SEL|S_BSY);
}*/
/* if ((ctrl & (S_PHASE_MASK|S_SEL|S_BSY)) != last_phase)
{
printf("phase now %d, REQ %x SEL %x BSY %x\n", ctrl & S_PHASE_MASK, ctrl & S_REQ, ctrl & S_SEL, ctrl & S_BSY);
last_phase = (S_PHASE_MASK|S_SEL|S_BSY);
}*/
// recalculate phase match
m_busstatus &= ~BAS_PHASEMATCH;
@ -117,7 +117,7 @@ void ncr5380n_device::scsi_ctrl_changed()
// if BSY drops or the phase goes mismatch, that terminates the DMA
if ((!(ctrl & S_BSY)) || !(m_busstatus & BAS_PHASEMATCH))
{
// printf("BSY dropped or phase mismatch during DMA, ending DMA\n");
// printf("BSY dropped or phase mismatch during DMA, ending DMA\n");
m_mode &= ~MODE_DMA;
m_busstatus |= BAS_ENDOFDMA;
drq_clear();
@ -162,7 +162,7 @@ void ncr5380n_device::step(bool timeout)
int win;
for(win=7; win>=0 && !(data & (1<<win)); win--);
// printf("arb complete: data %02x win %02x scsi_id %02x\n", data, win, scsi_id);
// printf("arb complete: data %02x win %02x scsi_id %02x\n", data, win, scsi_id);
if(win != scsi_id) {
scsi_bus->data_w(scsi_refid, 0);
scsi_bus->ctrl_w(scsi_refid, 0, S_ALL);
@ -222,7 +222,7 @@ void ncr5380n_device::step(bool timeout)
state = state & STATE_MASK;
step(false);
drq_set(); // raise DRQ now that we've completed
drq_set(); // raise DRQ now that we've completed
break;
default:
@ -252,21 +252,21 @@ void ncr5380n_device::recv_byte()
void ncr5380n_device::function_bus_complete()
{
state = IDLE;
// istatus |= I_FUNCTION|I_BUS;
// istatus |= I_FUNCTION|I_BUS;
check_irq();
}
void ncr5380n_device::function_complete()
{
state = IDLE;
// istatus |= I_FUNCTION;
// istatus |= I_FUNCTION;
check_irq();
}
void ncr5380n_device::bus_complete()
{
state = IDLE;
// istatus |= I_BUS;
// istatus |= I_BUS;
check_irq();
}
@ -309,7 +309,7 @@ WRITE8_MEMBER(ncr5380n_device::icmd_w)
// asserting to drive the data bus?
if ((data & IC_DBUS) && !(m_icommand & IC_DBUS))
{
// printf("%s: driving data bus with %02x\n", tag(), m_outdata);
// printf("%s: driving data bus with %02x\n", tag(), m_outdata);
scsi_bus->data_w(scsi_refid, m_outdata);
delay(2);
}
@ -327,7 +327,7 @@ WRITE8_MEMBER(ncr5380n_device::icmd_w)
(data & IC_SEL ? S_SEL : 0) |
(data & IC_ATN ? S_ATN : 0);
// printf("%s: changing control lines %04x\n", tag(), newdata);
// printf("%s: changing control lines %04x\n", tag(), newdata);
scsi_bus->ctrl_w(scsi_refid, newdata, S_RST|S_ACK|S_BSY|S_SEL|S_ATN);
}
@ -342,11 +342,11 @@ READ8_MEMBER(ncr5380n_device::mode_r)
WRITE8_MEMBER(ncr5380n_device::mode_w)
{
// printf("%s: mode_w %02x (%08x)\n", tag(), data, space.device().safe_pc());
// printf("%s: mode_w %02x (%08x)\n", tag(), data, space.device().safe_pc());
// arbitration bit being set?
if ((data & MODE_ARBITRATE) && !(m_mode & MODE_ARBITRATE))
{
// if SEL is selected and the assert SEL bit in the initiator
// if SEL is selected and the assert SEL bit in the initiator
// command register is clear, fail
if ((scsi_bus->ctrl_r() & S_SEL) && !(m_icommand & IC_SEL))
{
@ -355,7 +355,7 @@ WRITE8_MEMBER(ncr5380n_device::mode_w)
else
{
seq = 0;
// state = DISC_SEL_ARBITRATION;
// state = DISC_SEL_ARBITRATION;
arbitrate();
}
}
@ -363,20 +363,20 @@ WRITE8_MEMBER(ncr5380n_device::mode_w)
{
// arbitration in progress bit ONLY clears when the host disables arbitration. (thanks, Zilog Z8530 manual!)
// the Apple II High Speed SCSI Card boot code explicitly requires this.
m_icommand &= ~ IC_ARBITRATION;
m_icommand &= ~ IC_ARBITRATION;
}
m_mode = data;
}
READ8_MEMBER(ncr5380n_device::command_r)
{
// logerror("%s: command_r %02x (%08x)\n", tag(), m_tcommand, space.device().safe_pc());
// logerror("%s: command_r %02x (%08x)\n", tag(), m_tcommand, space.device().safe_pc());
return m_tcommand;
}
WRITE8_MEMBER(ncr5380n_device::command_w)
{
// printf("%s: command_w %02x (%08x)\n", tag(), data, space.device().safe_pc());
// printf("%s: command_w %02x (%08x)\n", tag(), data, space.device().safe_pc());
m_tcommand = data;
// recalculate phase match
@ -390,11 +390,11 @@ WRITE8_MEMBER(ncr5380n_device::command_w)
void ncr5380n_device::arbitrate()
{
m_icommand &= ~IC_ARBLOST;
m_icommand |= IC_ARBITRATION; // set in progress flag
m_icommand |= IC_ARBITRATION; // set in progress flag
state = (state & STATE_MASK) | (ARB_COMPLETE << SUB_SHIFT);
scsi_bus->data_w(scsi_refid, m_outdata);
scsi_bus->ctrl_w(scsi_refid, S_BSY, S_BSY);
m_icommand |= IC_BSY; // make sure BSY shows in icommand (Zilog 5380 manual suggests this behavior, Apple II High-Speed SCSI Card firmware requires it)
m_icommand |= IC_BSY; // make sure BSY shows in icommand (Zilog 5380 manual suggests this behavior, Apple II High-Speed SCSI Card firmware requires it)
delay(11);
}
@ -411,7 +411,7 @@ void ncr5380n_device::check_irq()
READ8_MEMBER(ncr5380n_device::status_r)
{
UINT32 ctrl = scsi_bus->ctrl_r();
UINT8 res = status |
UINT8 res = status |
(ctrl & S_RST ? ST_RST : 0) |
(ctrl & S_BSY ? ST_BSY : 0) |
(ctrl & S_REQ ? ST_REQ : 0) |
@ -420,7 +420,7 @@ READ8_MEMBER(ncr5380n_device::status_r)
(ctrl & S_INP ? ST_IO : 0) |
(ctrl & S_SEL ? ST_SEL : 0);
// printf("%s: status_r %02x (%08x)\n", tag(), res, space.device().safe_pc());
// printf("%s: status_r %02x (%08x)\n", tag(), res, space.device().safe_pc());
return res;
}
@ -435,7 +435,7 @@ READ8_MEMBER(ncr5380n_device::busandstatus_r)
(ctrl & S_ATN ? BAS_ATN : 0) |
(ctrl & S_ACK ? BAS_ACK : 0);
// printf("%s: busandstatus_r %02x (%08x)\n", tag(), res, space.device().safe_pc());
// printf("%s: busandstatus_r %02x (%08x)\n", tag(), res, space.device().safe_pc());
return res;
}
@ -463,7 +463,7 @@ READ8_MEMBER(ncr5380n_device::resetparityirq_r)
WRITE8_MEMBER(ncr5380n_device::startdmainitrx_w)
{
// printf("%02x to start dma initiator Rx\n", data);
// printf("%02x to start dma initiator Rx\n", data);
recv_byte();
}
@ -495,7 +495,7 @@ UINT8 ncr5380n_device::dma_r()
void ncr5380n_device::drq_set()
{
if(!drq)
if(!drq)
{
drq = true;
m_busstatus |= BAS_DMAREQUEST;
@ -505,7 +505,7 @@ void ncr5380n_device::drq_set()
void ncr5380n_device::drq_clear()
{
if(drq)
if(drq)
{
drq = false;
m_busstatus &= ~BAS_DMAREQUEST;
@ -547,7 +547,7 @@ READ8_MEMBER(ncr5380n_device::read)
WRITE8_MEMBER(ncr5380n_device::write)
{
// printf("%x to 5380 @ %x\n", data, offset);
// printf("%x to 5380 @ %x\n", data, offset);
switch (offset & 7)
{
case 0:
@ -583,4 +583,3 @@ WRITE8_MEMBER(ncr5380n_device::write)
break;
}
}

6
src/emu/machine/pd4990a.h
View File

@ -20,14 +20,14 @@ class upd4990a_old_device : public device_t
public:
upd4990a_old_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
~upd4990a_old_device() {}
/* this should be refactored, once RTCs get unified */
void addretrace();
DECLARE_READ8_MEMBER( testbit_r );
DECLARE_READ8_MEMBER( databit_r );
DECLARE_WRITE16_MEMBER( control_16_w );
protected:
// device-level overrides
virtual void device_config_complete();
@ -59,7 +59,7 @@ private:
int m_clock_line;
int m_command_line; //??
void increment_month();
void increment_day();
void readbit();

4
src/emu/machine/ram.c
View File

@ -2,8 +2,8 @@
RAM device
license: MAME, GPL-2.0+
copyright-holders: Dirk Best
license: MAME, GPL-2.0+
copyright-holders: Dirk Best
Provides a configurable amount of RAM to drivers

4
src/emu/machine/ram.h
View File

@ -2,8 +2,8 @@
RAM device
license: MAME, GPL-2.0+
copyright-holders: Dirk Best
license: MAME, GPL-2.0+
copyright-holders: Dirk Best
Provides a configurable amount of RAM to drivers

2
src/emu/mame.c
View File

@ -148,7 +148,7 @@ int mame_execute(emu_options &options, osd_interface &osd)
bool exit_pending = false;
int error = MAMERR_NONE;
// We need to preprocess the config files once to determine the web server's configuration
// We need to preprocess the config files once to determine the web server's configuration
if (options.read_config())
{
options.revert(OPTION_PRIORITY_INI);

7
src/emu/netlist/devices/net_lib.c
View File

@ -340,7 +340,6 @@ NETLIB_START(nic7448)
NETLIB_UPDATE(nic7448)
{
if (INPLOGIC(m_BIQ) && !INPLOGIC(m_LTQ))
{
sub.update_outputs(8);
@ -502,7 +501,6 @@ NETLIB_UPDATE(nic7474)
NETLIB_START(nic7474)
{
register_sub(sub, "sub");
register_input(sub, "CLK", sub.m_clk, net_input_t::INP_STATE_LH);
register_input("D", m_D);
@ -817,7 +815,7 @@ NETLIB_UPDATE(nic74107A)
else if (!sub.m_Q2)
sub.m_clk.activate_hl();
//if (!sub.m_Q2 & INPLOGIC(m_clrQ))
// sub.m_clk.activate_hl();
// sub.m_clk.activate_hl();
}
NETLIB_START(nic74153)
@ -977,7 +975,7 @@ static const net_device_t_base_factory *netregistry[] =
ENTRY(netdev_analog_const, NETDEV_ANALOG_CONST)
ENTRY(netdev_logic_input, NETDEV_LOGIC_INPUT)
ENTRY(netdev_analog_input, NETDEV_ANALOG_INPUT)
ENTRY(netdev_log, NETDEV_LOG)
ENTRY(netdev_log, NETDEV_LOG)
ENTRY(netdev_clock, NETDEV_CLOCK)
ENTRY(netdev_mainclock, NETDEV_MAINCLOCK)
ENTRY(netdev_analog_callback,NETDEV_CALLBACK)
@ -1040,4 +1038,3 @@ net_device_t *net_create_device_by_name(const astring &name, netlist_setup_t &se
fatalerror("Class %s required for IC %s not found!\n", name.cstr(), icname.cstr());
return NULL; // appease code analysis
}

16
src/emu/netlist/devices/net_lib.h
View File

@ -57,7 +57,7 @@
#include "nld_7400.h"
// this is a bad hack
#define USE_OLD7493 (0)
#define USE_OLD7493 (0)
// ----------------------------------------------------------------------------------------
// Special chips
@ -87,8 +87,8 @@
NET_CONNECT(_name, S, _S) \
NET_CONNECT(_name, R, _R)
#define NETDEV_LOG(_name, _I) \
NET_REGISTER_DEV(netdev_log, _name) \
#define NETDEV_LOG(_name, _I) \
NET_REGISTER_DEV(netdev_log, _name) \
NET_CONNECT(_name, I, _I)
@ -356,7 +356,7 @@ NETLIB_SUBDEVICE(nic7474sub,
);
NETLIB_DEVICE(nic7474,
NETLIB_NAME(nic7474sub) sub;
NETLIB_NAME(nic7474sub) sub;
ttl_input_t m_D;
ttl_input_t m_clrQ;
@ -389,7 +389,7 @@ NETLIB_SUBDEVICE(nic74107Asub,
);
NETLIB_DEVICE(nic74107A,
NETLIB_NAME(nic74107Asub) sub;
NETLIB_NAME(nic74107Asub) sub;
ttl_input_t m_J;
ttl_input_t m_K;
@ -400,7 +400,7 @@ NETLIB_DEVICE(nic74107A,
class NETLIB_NAME(nic74107) : public NETLIB_NAME(nic74107A)
{
public:
NETLIB_NAME(nic74107) ()
NETLIB_NAME(nic74107) ()
: NETLIB_NAME(nic74107A) () {}
};
@ -480,7 +480,7 @@ NETLIB_SUBDEVICE(nic9316_sub,
);
NETLIB_DEVICE(nic9316,
NETLIB_NAME(nic9316_sub) sub;
NETLIB_NAME(nic9316_sub) sub;
ttl_input_t m_ENP;
ttl_input_t m_ENT;
ttl_input_t m_CLRQ;
@ -543,7 +543,7 @@ NETLIB_SUBDEVICE(nic7448_sub,
NETLIB_DEVICE(nic7448,
NETLIB_NAME(nic7448_sub) sub;
NETLIB_NAME(nic7448_sub) sub;
ttl_input_t m_LTQ;
ttl_input_t m_BIQ;

2
src/emu/netlist/devices/nld_7400.c
View File

@ -2,5 +2,3 @@
* nld_7400.c
*
*/

6
src/emu/netlist/devices/nld_7400.h
View File

@ -35,9 +35,9 @@
#define NLD_7400_H_
#define TTL_7400_NAND(_name, _A, _B) \
NET_REGISTER_DEV(7400, _name) \
NET_CONNECT(_name, A, _A) \
NET_CONNECT(_name, B, _B)
NET_REGISTER_DEV(7400, _name) \
NET_CONNECT(_name, A, _A) \
NET_CONNECT(_name, B, _B)
NETLIB_SIGNAL(7400, 2, 0, 0);

402
src/emu/netlist/devices/nld_signal.h
View File

@ -15,12 +15,12 @@
// ----------------------------------------------------------------------------------------
#define NETLIB_SIGNAL(_name, _num_input, _check, _invert) \
class NETLIB_NAME(_name) : public net_signal_t<_num_input, _check, _invert> \
{ \
public: \
ATTR_COLD NETLIB_NAME(_name) () \
: net_signal_t<_num_input, _check, _invert>() { } \
}
class NETLIB_NAME(_name) : public net_signal_t<_num_input, _check, _invert> \
{ \
public: \
ATTR_COLD NETLIB_NAME(_name) () \
: net_signal_t<_num_input, _check, _invert>() { } \
}
// ----------------------------------------------------------------------------------------
// net_signal_t
@ -30,46 +30,46 @@ template <int _numdev>
class net_signal_base_t : public net_device_t
{
public:
net_signal_base_t()
: net_device_t(), m_active(1) { }
net_signal_base_t()
: net_device_t(), m_active(1) { }
ATTR_COLD void start()
{
const char *sIN[8] = { "I1", "I2", "I3", "I4", "I5", "I6", "I7", "I8" };
ATTR_COLD void start()
{
const char *sIN[8] = { "I1", "I2", "I3", "I4", "I5", "I6", "I7", "I8" };
register_output("Q", m_Q);
for (int i=0; i < _numdev; i++)
{
register_input(sIN[i], m_i[i], net_input_t::INP_STATE_ACTIVE);
}
m_Q.initial(1);
}
register_output("Q", m_Q);
for (int i=0; i < _numdev; i++)
{
register_input(sIN[i], m_i[i], net_input_t::INP_STATE_ACTIVE);
}
m_Q.initial(1);
}
#if (USE_DEACTIVE_DEVICE)
ATTR_HOT void inc_active()
{
if (m_active == 0)
{
update();
}
m_active++;
}
ATTR_HOT void inc_active()
{
if (m_active == 0)
{
update();
}
m_active++;
}
ATTR_HOT void dec_active()
{
m_active--;
if (m_active == 0)
{
for (int i = 0; i< _numdev; i++)
m_i[i].inactivate();
}
}
ATTR_HOT void dec_active()
{
m_active--;
if (m_active == 0)
{
for (int i = 0; i< _numdev; i++)
m_i[i].inactivate();
}
}
#endif
public:
ttl_input_t m_i[_numdev];
ttl_output_t m_Q;
INT8 m_active;
ttl_input_t m_i[_numdev];
ttl_output_t m_Q;
INT8 m_active;
};
@ -77,72 +77,72 @@ template <int _numdev, int _check, int _invert>
class net_signal_t : public net_device_t
{
public:
net_signal_t()
: net_device_t(), m_active(1)
{
m_Q.initial(1);
}
net_signal_t()
: net_device_t(), m_active(1)
{
m_Q.initial(1);
}
ATTR_COLD void start()
{
const char *sIN[8] = { "A", "B", "C", "D", "E", "F", "G", "H" };
ATTR_COLD void start()
{
const char *sIN[8] = { "A", "B", "C", "D", "E", "F", "G", "H" };
register_output("Q", m_Q);
for (int i=0; i < _numdev; i++)
{
register_input(sIN[i], m_i[i], net_input_t::INP_STATE_ACTIVE);
}
}
register_output("Q", m_Q);
for (int i=0; i < _numdev; i++)
{
register_input(sIN[i], m_i[i], net_input_t::INP_STATE_ACTIVE);
}
}
#if (USE_DEACTIVE_DEVICE)
ATTR_HOT void inc_active()
{
if (m_active == 0)
{
update();
}
m_active++;
}
#if (USE_DEACTIVE_DEVICE)
ATTR_HOT void inc_active()
{
if (m_active == 0)
{
update();
}
m_active++;
}
ATTR_HOT void dec_active()
{
m_active--;
if (m_active == 0)
{
for (int i = 0; i< _numdev; i++)
m_i[i].inactivate();
}
}
#endif
ATTR_HOT void dec_active()
{
m_active--;
if (m_active == 0)
{
for (int i = 0; i< _numdev; i++)
m_i[i].inactivate();
}
}
#endif
virtual void update()
{
static const netlist_time times[2] = { NLTIME_FROM_NS(22), NLTIME_FROM_NS(15) };
int pos = -1;
virtual void update()
{
static const netlist_time times[2] = { NLTIME_FROM_NS(22), NLTIME_FROM_NS(15) };
int pos = -1;
for (int i = 0; i< _numdev; i++)
{
this->m_i[i].activate();
if (INPLOGIC(this->m_i[i]) == _check)
{
OUTLOGIC(this->m_Q, _check ^ (1 ^ _invert), times[_check]);// ? 15000 : 22000);
pos = i;
break;
}
}
if (pos >= 0)
{
for (int i = 0; i < _numdev; i++)
if (i != pos)
this->m_i[i].inactivate();
} else
OUTLOGIC(this->m_Q,_check ^ (_invert), times[1-_check]);// ? 22000 : 15000);
}
for (int i = 0; i< _numdev; i++)
{
this->m_i[i].activate();
if (INPLOGIC(this->m_i[i]) == _check)
{
OUTLOGIC(this->m_Q, _check ^ (1 ^ _invert), times[_check]);// ? 15000 : 22000);
pos = i;
break;
}
}
if (pos >= 0)
{
for (int i = 0; i < _numdev; i++)
if (i != pos)
this->m_i[i].inactivate();
} else
OUTLOGIC(this->m_Q,_check ^ (_invert), times[1-_check]);// ? 22000 : 15000);
}
public:
ttl_input_t m_i[_numdev];
ttl_output_t m_Q;
INT8 m_active;
ttl_input_t m_i[_numdev];
ttl_output_t m_Q;
INT8 m_active;
};
#if 1
@ -150,71 +150,71 @@ template <int _check, int _invert>
class xx_net_signal_t: public net_device_t
{
public:
xx_net_signal_t()
: net_device_t(), m_active(1)
{
m_Q.initial(1);
}
xx_net_signal_t()
: net_device_t(), m_active(1)
{
m_Q.initial(1);
}
ATTR_COLD void start()
{
const char *sIN[2] = { "A", "B" };
ATTR_COLD void start()
{
const char *sIN[2] = { "A", "B" };
register_output("Q", m_Q);
for (int i=0; i < 2; i++)
{
register_input(sIN[i], m_i[i], net_input_t::INP_STATE_ACTIVE);
}
}
register_output("Q", m_Q);
for (int i=0; i < 2; i++)
{
register_input(sIN[i], m_i[i], net_input_t::INP_STATE_ACTIVE);
}
}
#if (USE_DEACTIVE_DEVICE)
ATTR_HOT void inc_active()
{
if (m_active == 0)
{
update();
}
m_active++;
}
#if (USE_DEACTIVE_DEVICE)
ATTR_HOT void inc_active()
{
if (m_active == 0)
{
update();
}
m_active++;
}
ATTR_HOT void dec_active()
{
m_active--;
if (m_active == 0)
{
m_i[0].inactivate();
m_i[1].inactivate();
}
}
#endif
ATTR_HOT void dec_active()
{
m_active--;
if (m_active == 0)
{
m_i[0].inactivate();
m_i[1].inactivate();
}
}
#endif
ATTR_HOT ATTR_ALIGN void update()
{
const netlist_time times[2] = { NLTIME_FROM_NS(22), NLTIME_FROM_NS(15) };
ATTR_HOT ATTR_ALIGN void update()
{
const netlist_time times[2] = { NLTIME_FROM_NS(22), NLTIME_FROM_NS(15) };
int res = _invert ^ 1 ^_check;
m_i[0].activate();
m_i[1].activate();
if (INPLOGIC(m_i[0]) ^ _check)
{
if (INPLOGIC(m_i[1]) ^ _check)
{
res = _invert ^ _check;
}
else
m_i[0].inactivate();
} else {
if (INPLOGIC(m_i[1]) ^ _check)
m_i[1].inactivate();
}
OUTLOGIC(m_Q, res, times[(res & 1) ^ 1]);// ? 22000 : 15000);
}
int res = _invert ^ 1 ^_check;
m_i[0].activate();
m_i[1].activate();
if (INPLOGIC(m_i[0]) ^ _check)
{
if (INPLOGIC(m_i[1]) ^ _check)
{
res = _invert ^ _check;
}
else
m_i[0].inactivate();
} else {
if (INPLOGIC(m_i[1]) ^ _check)
m_i[1].inactivate();
}
OUTLOGIC(m_Q, res, times[(res & 1) ^ 1]);// ? 22000 : 15000);
}
public:
ttl_input_t m_i[2];
ttl_output_t m_Q;
INT8 m_active;
ttl_input_t m_i[2];
ttl_output_t m_Q;
INT8 m_active;
};
#endif
@ -226,58 +226,58 @@ template <UINT8 _check, UINT8 _invert>
class net_signal_t<3, _check, _invert> : public net_device_t
{
public:
net_signal_t() : net_device_t(), m_active(1) { }
net_signal_t() : net_device_t(), m_active(1) { }
ATTR_COLD void start()
{
const char *sIN[3] = { "I1", "I2", "I3" };
ATTR_COLD void start()
{
const char *sIN[3] = { "I1", "I2", "I3" };
register_output("Q", m_Q);
for (int i=0; i < 3; i++)
{
register_input(sIN[i], m_i[i], net_input_t::INP_STATE_ACTIVE);
}
m_Q.initial(1);
}
register_output("Q", m_Q);
for (int i=0; i < 3; i++)
{
register_input(sIN[i], m_i[i], net_input_t::INP_STATE_ACTIVE);
}
m_Q.initial(1);
}
ATTR_HOT ATTR_ALIGN void update()
{
const netlist_time times[2] = { NLTIME_FROM_NS(22), NLTIME_FROM_NS(15) };
//const UINT8 res_tab[4] = {1, 1, 1, 0 };
//const UINT8 ai1[4] = {0, 1, 0, 0 };
//const UINT8 ai2[4] = {1, 0, 1, 0 };
ATTR_HOT ATTR_ALIGN void update()
{
const netlist_time times[2] = { NLTIME_FROM_NS(22), NLTIME_FROM_NS(15) };
//const UINT8 res_tab[4] = {1, 1, 1, 0 };
//const UINT8 ai1[4] = {0, 1, 0, 0 };
//const UINT8 ai2[4] = {1, 0, 1, 0 };
UINT8 res = _invert ^ 1 ^_check;
m_i[0].activate();
if (INPLOGIC(m_i[0]) ^ _check)
{
m_i[1].activate();
if (INPLOGIC(m_i[1]) ^ _check)
{
m_i[2].activate();
if (INPLOGIC(m_i[2]) ^ _check)
{
res = _invert ^ _check;
}
else
m_i[1].inactivate();
}
else
{
if (INPLOGIC(m_i[2]) ^ _check)
m_i[2].inactivate();
m_i[0].inactivate();
}
} else {
if (INPLOGIC(m_i[1]) ^ _check)
m_i[1].inactivate();
}
OUTLOGIC(m_Q, res, times[1 - res]);// ? 22000 : 15000);
}
UINT8 res = _invert ^ 1 ^_check;
m_i[0].activate();
if (INPLOGIC(m_i[0]) ^ _check)
{
m_i[1].activate();
if (INPLOGIC(m_i[1]) ^ _check)
{
m_i[2].activate();
if (INPLOGIC(m_i[2]) ^ _check)
{
res = _invert ^ _check;
}
else
m_i[1].inactivate();
}
else
{
if (INPLOGIC(m_i[2]) ^ _check)
m_i[2].inactivate();
m_i[0].inactivate();
}
} else {
if (INPLOGIC(m_i[1]) ^ _check)
m_i[1].inactivate();
}
OUTLOGIC(m_Q, res, times[1 - res]);// ? 22000 : 15000);
}
public:
ttl_input_t m_i[3];
ttl_output_t m_Q;
INT8 m_active;
ttl_input_t m_i[3];
ttl_output_t m_Q;
INT8 m_active;
};
@ -288,8 +288,8 @@ template <int _check, int _invert>
class net_signal_t<2, _check, _invert> : public xx_net_signal_t<_check, _invert>
{
public:
net_signal_t()
: xx_net_signal_t<_check, _invert>() { }
net_signal_t()
: xx_net_signal_t<_check, _invert>() { }
};

10
src/emu/netlist/devices/nld_system.h
View File

@ -17,12 +17,12 @@
// ----------------------------------------------------------------------------------------
#define NETDEV_TTL_CONST(_name, _v) \
NET_REGISTER_DEV(netdev_ttl_const, _name) \
NETDEV_PARAM(_name.CONST, _v)
NET_REGISTER_DEV(netdev_ttl_const, _name) \
NETDEV_PARAM(_name.CONST, _v)
#define NETDEV_ANALOG_CONST(_name, _v) \
NET_REGISTER_DEV(netdev_analog_const, _name) \
NETDEV_PARAM(_name.CONST, _v)
NET_REGISTER_DEV(netdev_analog_const, _name) \
NETDEV_PARAM(_name.CONST, _v)
// ----------------------------------------------------------------------------------------
// netdev_*_const
@ -58,7 +58,7 @@ NETLIB_DEVICE_WITH_PARAMS(netdev_mainclock,
class NETLIB_NAME(netdev_analog_callback) : public net_device_t
{
public:
NETLIB_NAME(netdev_analog_callback)()
NETLIB_NAME(netdev_analog_callback)()
: net_device_t() { }
ATTR_COLD void start()

2
src/emu/netlist/netlist.mak
View File

@ -22,4 +22,4 @@ NETLISTOBJS+= \
$(NETLISTOBJ)/nl_base.o \
$(NETLISTOBJ)/nl_parser.o \
$(NETLISTOBJ)/devices/net_lib.o \

23
src/emu/netlist/nl_base.c
View File

@ -13,9 +13,9 @@
netlist_base_t::netlist_base_t()
: m_mainclock(NULL),
m_time_ps(netlist_time::zero),
m_rem(0),
m_div(NETLIST_DIV)
m_time_ps(netlist_time::zero),
m_rem(0),
m_div(NETLIST_DIV)
{
}
@ -30,11 +30,11 @@ ATTR_COLD void netlist_base_t::set_mainclock_dev(NETLIB_NAME(netdev_mainclock) *
ATTR_COLD void netlist_base_t::reset()
{
m_time_ps = netlist_time::zero;
m_rem = 0;
m_queue.clear();
if (m_mainclock != NULL)
m_mainclock->m_Q.set_time(netlist_time::zero);
m_time_ps = netlist_time::zero;
m_rem = 0;
m_queue.clear();
if (m_mainclock != NULL)
m_mainclock->m_Q.set_time(netlist_time::zero);
}
@ -195,9 +195,9 @@ ATTR_HOT ATTR_ALIGN const netlist_sig_t netlist_core_device_t::INPLOGIC_PASSIVE(
net_device_t::net_device_t()
: netlist_core_device_t(),
m_inputs(20),
m_setup(NULL),
m_variable_input_count(false)
m_inputs(20),
m_setup(NULL),
m_variable_input_count(false)
{
}
@ -311,7 +311,6 @@ ATTR_HOT inline void net_output_t::update_dev(const net_input_t *inp, const UINT
ATTR_HOT inline void net_output_t::update_devs()
{
assert(m_num_cons != 0);
const UINT32 masks[4] = { 1, 5, 3, 1 };

52
src/emu/netlist/nl_base.h
View File

@ -38,7 +38,7 @@ typedef delegate<void ()> net_update_delegate;
#define NETLIB_UPDATE(_chip) ATTR_HOT ATTR_ALIGN void NETLIB_NAME(_chip) :: update(void)
#define NETLIB_START(_chip) ATTR_COLD void NETLIB_NAME(_chip) :: start(void)
//#define NETLIB_CONSTRUCTOR(_chip) ATTR_COLD _chip :: _chip (netlist_setup_t &setup, const char *name)
// : net_device_t(setup, name)
// : net_device_t(setup, name)
#define NETLIB_UPDATE_PARAM(_chip) ATTR_HOT ATTR_ALIGN void NETLIB_NAME(_chip) :: update_param(void)
#define NETLIB_FUNC_VOID(_chip, _name, _params) ATTR_HOT ATTR_ALIGN inline void NETLIB_NAME(_chip) :: _name _params
@ -47,8 +47,8 @@ typedef delegate<void ()> net_update_delegate;
class NETLIB_NAME(_name) : public net_device_t \
{ \
public: \
NETLIB_NAME(_name) () \
: net_device_t() { } \
NETLIB_NAME(_name) () \
: net_device_t() { } \
protected: \
ATTR_HOT void update(); \
ATTR_HOT void start(); \
@ -59,9 +59,9 @@ typedef delegate<void ()> net_update_delegate;
class NETLIB_NAME(_name) : public netlist_core_device_t \
{ \
public: \
NETLIB_NAME(_name) () \
: netlist_core_device_t() \
{ } \
NETLIB_NAME(_name) () \
: netlist_core_device_t() \
{ } \
/*protected:*/ \
ATTR_HOT void update(); \
_priv \
@ -71,8 +71,8 @@ typedef delegate<void ()> net_update_delegate;
class NETLIB_NAME(_name) : public net_device_t \
{ \
public: \
NETLIB_NAME(_name) () \
: net_device_t() { } \
NETLIB_NAME(_name) () \
: net_device_t() { } \
ATTR_HOT void update_param(); \
ATTR_HOT void update(); \
ATTR_HOT void start(); \
@ -319,7 +319,7 @@ public:
: net_output_t(OUTPUT | SIGNAL_DIGITAL)
{
// Default to TTL
m_low_V = 0.1; // these depend on sinked/sourced current. Values should be suitable for typical applications.
m_low_V = 0.1; // these depend on sinked/sourced current. Values should be suitable for typical applications.
m_high_V = 4.8;
}
@ -774,34 +774,34 @@ ATTR_HOT inline const bool analog_input_t::is_highz() const
class net_device_t_base_factory
{
public:
net_device_t_base_factory(const astring &name, const astring &classname)
: m_name(name), m_classname(classname)
{}
net_device_t_base_factory(const astring &name, const astring &classname)
: m_name(name), m_classname(classname)
{}
virtual ~net_device_t_base_factory() {}
virtual ~net_device_t_base_factory() {}
virtual net_device_t *Create() const = 0;
virtual net_device_t *Create() const = 0;
const astring &name() const { return m_name; }
const astring &classname() const { return m_classname; }
const astring &name() const { return m_name; }
const astring &classname() const { return m_classname; }
protected:
astring m_name; /* device name */
astring m_classname; /* device class name */
astring m_name; /* device name */
astring m_classname; /* device class name */
};
template <class C>
class net_device_t_factory : public net_device_t_base_factory
{
public:
net_device_t_factory(const astring &name, const astring &classname)
: net_device_t_base_factory(name, classname) { }
net_device_t_factory(const astring &name, const astring &classname)
: net_device_t_base_factory(name, classname) { }
net_device_t *Create() const
{
net_device_t *r = new C();
//r->init(setup, name);
return r;
}
net_device_t *Create() const
{
net_device_t *r = new C();
//r->init(setup, name);
return r;
}
};
net_device_t *net_create_device_by_classname(const astring &classname, netlist_setup_t &setup, const astring &icname);

24
src/emu/netlist/nl_config.h
View File

@ -16,27 +16,27 @@
// SETUP
//============================================================
#define USE_DELEGATES (0)
#define USE_DELEGATES (0)
/*
* The next options needs -Wno-pmf-conversions to compile and gcc
* This is intended for non-mame usage.
*
*/
#define USE_PMFDELEGATES (0)
#define USE_PMFDELEGATES (0)
// Next if enabled adds 20% performance ... but is not guaranteed to be absolutely timing correct.
#define USE_DEACTIVE_DEVICE (0)
#define USE_DEACTIVE_DEVICE (0)
#define OUTPUT_MAX_CONNECTIONS (48)
#define OUTPUT_MAX_CONNECTIONS (48)
// Use nano-second resolution - Sufficient for now
#define NETLIST_INTERNAL_RES (U64(1000000000))
#define NETLIST_DIV_BITS (0)
//#define NETLIST_INTERNAL_RES (U64(1000000000000))
//#define NETLIST_DIV_BITS (10)
#define NETLIST_DIV (U64(1) << NETLIST_DIV_BITS)
#define NETLIST_MASK (NETLIST_DIV-1)
#define NETLIST_CLOCK (NETLIST_INTERNAL_RES / NETLIST_DIV)
#define NETLIST_INTERNAL_RES (U64(1000000000))
#define NETLIST_DIV_BITS (0)
//#define NETLIST_INTERNAL_RES (U64(1000000000000))
//#define NETLIST_DIV_BITS (10)
#define NETLIST_DIV (U64(1) << NETLIST_DIV_BITS)
#define NETLIST_MASK (NETLIST_DIV-1)
#define NETLIST_CLOCK (NETLIST_INTERNAL_RES / NETLIST_DIV)
#define NETLIST_HIGHIMP_V (1.23456e20) /* some voltage we should never see */
@ -54,7 +54,7 @@ typedef delegate<void (const double)> netlist_output_delegate;
#define NL_VERBOSE (0)
#define NL_KEEP_STATISTICS (0)
#define FATAL_ERROR_AFTER_NS (0) //(1000)
#define FATAL_ERROR_AFTER_NS (0) //(1000)
#if (NL_VERBOSE)
#define NL_VERBOSE_OUT(x) printf x

4
src/emu/netlist/nl_lists.h
View File

@ -118,8 +118,8 @@ public:
}
// profiling
INT32 m_prof_start;
INT32 m_prof_end;
INT32 m_prof_start;
INT32 m_prof_end;
INT32 m_prof_sortmove;
INT32 m_prof_sort;
private:

3
src/emu/netlist/nl_setup.c
View File

@ -87,7 +87,7 @@ void netlist_setup_t::remove_dev(const astring &name)
void netlist_setup_t::register_callback(const astring &devname, netlist_output_delegate delegate)
{
NETLIB_NAME(netdev_analog_callback) *dev = (NETLIB_NAME(netdev_analog_callback) *) m_devices.find(devname);
NETLIB_NAME(netdev_analog_callback) *dev = (NETLIB_NAME(netdev_analog_callback) *) m_devices.find(devname);
if (dev == NULL)
fatalerror("did not find device %s\n", devname.cstr());
dev->register_callback(delegate);
@ -315,4 +315,3 @@ void netlist_setup_t::print_stats()
printf("Queue Move %15d\n", m_netlist.m_queue.m_prof_sortmove);
}
}

1
src/emu/netlist/nl_setup.h
View File

@ -36,7 +36,6 @@
#define NETLIST_START(_name) \
ATTR_COLD void NETLIST_NAME(_name)(netlist_setup_t &netlist) \
{
#define NETLIST_END }
#define NETLIST_INCLUDE(_name) \

4
src/emu/sound/2608intf.c
View File

@ -226,7 +226,7 @@ ROM_START( ym2608 )
It was verified, using real YM2608, that this ADPCM stream produces 100% correct output signal.
*/
// see YM2608_ADPCM_ROM_addr table in fm.c for current sample offsets
// original offset comments from Jarek:
// original offset comments from Jarek:
// offset 0:
/* Source: 01BD.ROM */
/* Length: 448 / 0x000001C0 */
@ -257,5 +257,3 @@ const rom_entry *ym2608_device::device_rom_region() const
{
return ROM_NAME( ym2608 );
}

4
src/emu/sound/s14001a.c
View File

@ -17,12 +17,12 @@
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.
This library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
License along with this library; if not, write to the Free Software
Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA

6
src/emu/video/dl1416.c
View File

@ -1,9 +1,9 @@
/*****************************************************************************
*
* DL1416
* DL1416
*
* license: MAME, GPL-2.0+
* copyright-holders: Dirk Best
* license: MAME, GPL-2.0+
* copyright-holders: Dirk Best
*
* 4-Digit 16-Segment Alphanumeric Intelligent Display
* with Memory/Decoder/Driver

6
src/emu/video/dl1416.h
View File

@ -1,9 +1,9 @@
/*****************************************************************************
*
* DL1416
* DL1416
*
* license: MAME, GPL-2.0+
* copyright-holders: Dirk Best
* license: MAME, GPL-2.0+
* copyright-holders: Dirk Best
*
* 4-Digit 16-Segment Alphanumeric Intelligent Display
* with Memory/Decoder/Driver

14
src/emu/video/fixfreq.c
View File

@ -2,7 +2,7 @@
fixfreq.h
2013 Couriersud
2013 Couriersud
Fixed frequency monochrome monitor emulation
@ -57,13 +57,13 @@ const device_type FIXFREQ = &device_creator<fixedfreq_device>;
fixedfreq_device::fixedfreq_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source)
: device_t(mconfig, type, name, tag, owner, clock, shortname, source),
device_video_interface(mconfig, *this, false)
device_video_interface(mconfig, *this, false)
{
}
fixedfreq_device::fixedfreq_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, FIXFREQ, "FIXFREQ", tag, owner, clock, "fixfreq", __FILE__),
device_video_interface(mconfig, *this, false)
device_video_interface(mconfig, *this, false)
{
}
@ -85,7 +85,6 @@ void fixedfreq_device::device_config_complete()
void fixedfreq_device::device_start()
{
m_htotal = 0;
m_vtotal = 0;
@ -167,8 +166,8 @@ void fixedfreq_device::recompute_parameters(bool postload)
void fixedfreq_device::update_screen_parameters(attotime refresh)
{
rectangle visarea(
// m_hsync - m_hvisible,
// m_hsync - 1 ,
// m_hsync - m_hvisible,
// m_hsync - 1 ,
m_hbackporch - m_hfrontporch,
m_hbackporch - m_hfrontporch + m_hvisible - 1,
m_vbackporch - m_vfrontporch,
@ -222,7 +221,6 @@ UINT32 fixedfreq_device::screen_update(screen_device &screen, bitmap_rgb32 &bitm
void fixedfreq_device::update_vid(double newval, attotime cur_time)
{
bitmap_rgb32 *bm = m_bitmap[m_cur_bm];
int pixels = round((cur_time - m_line_time).as_double() / m_clock_period.as_double());
@ -292,5 +290,3 @@ void fixedfreq_device::update_vid(double newval, attotime cur_time)
/***************************************************************************/

5
src/emu/video/fixfreq.h
View File

@ -45,10 +45,9 @@ extern fixedfreq_interface fixedfreq_mode_ntsc720;
// ======================> vga_device
class fixedfreq_device : public device_t,
public device_video_interface,
public fixedfreq_interface
public device_video_interface,
public fixedfreq_interface
{
public:
// construction/destruction
fixedfreq_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);

10
src/emu/video/mb_vcu.c
View File

@ -64,9 +64,9 @@ inline void mb_vcu_device::write_byte(offs_t address, UINT8 data)
mb_vcu_device::mb_vcu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, MB_VCU, "Mazer Blazer custom VCU", tag, owner, clock, "mb_vcu", __FILE__),
device_memory_interface(mconfig, *this),
device_video_interface(mconfig, *this),
m_space_config("videoram", ENDIANNESS_LITTLE, 8, 19, 0, NULL, *ADDRESS_MAP_NAME(mb_vcu_vram))
device_memory_interface(mconfig, *this),
device_video_interface(mconfig, *this),
m_space_config("videoram", ENDIANNESS_LITTLE, 8, 19, 0, NULL, *ADDRESS_MAP_NAME(mb_vcu_vram))
{
}
@ -144,7 +144,7 @@ void mb_vcu_device::device_reset()
//**************************************************************************
// READ/WRITE HANDLERS
//**************************************************************************
// UINT8 *pcg = memregion("sub2")->base();
// UINT8 *pcg = memregion("sub2")->base();
READ8_MEMBER( mb_vcu_device::read_ram )
{
@ -296,7 +296,7 @@ READ8_MEMBER( mb_vcu_device::load_set_clr )
{
int xi,yi;
int dstx,dsty;
// UINT8 dot;
// UINT8 dot;
int bits = 0;
if(m_mode == 0x13 || m_mode == 0x03)
{

6
src/emu/video/mb_vcu.h
View File

@ -35,9 +35,9 @@ struct mb_vcu_interface
// ======================> mb_vcu_device
class mb_vcu_device : public device_t,
public device_memory_interface,
public device_video_interface,
public mb_vcu_interface
public device_memory_interface,
public device_video_interface,
public mb_vcu_interface
{
public:
// construction/destruction

4
src/emu/video/vector.c
View File

@ -131,13 +131,13 @@ const device_type VECTOR = &device_creator<vector_device>;
vector_device::vector_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source)
: device_t(mconfig, type, name, tag, owner, clock, shortname, source),
device_video_interface(mconfig, *this)
device_video_interface(mconfig, *this)
{
}
vector_device::vector_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, VECTOR, "VECTOR", tag, owner, clock, "vector", __FILE__),
device_video_interface(mconfig, *this)
device_video_interface(mconfig, *this)
{
}

19
src/emu/video/vector.h
View File

@ -9,7 +9,7 @@
#define VECTOR_COLOR444(c) \
MAKE_RGB(pal4bit((c) >> 8), pal4bit((c) >> 4), pal4bit((c) >> 0))
/* The vertices are buffered here */
struct point
@ -22,29 +22,28 @@ struct point
arg1(0),
arg2(0),
status(0) {}
int x; int y;
rgb_t col;
int intensity;
int arg1; int arg2; /* start/end in pixel array or clipping info */
int status; /* for dirty and clipping handling */
};
class vector_device : public device_t,
public device_video_interface
{
class vector_device : public device_t,
public device_video_interface
{
public:
// construction/destruction
vector_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
vector_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source);
UINT32 screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
void clear_list();
void add_point(int x, int y, rgb_t color, int intensity);
void add_clip(int minx, int miny, int maxx, int maxy);
void set_flicker(float m_flicker_correction);
float get_flicker();
@ -53,7 +52,7 @@ public:
// device-level overrides
virtual void device_start();
private:
static int m_flicker; /* beam flicker value */
static float m_flicker_correction;

16
src/emu/webengine.c
View File

@ -49,15 +49,15 @@ static void get_qsvar(const struct mg_request_info *request_info,
}
char* websanitize_statefilename ( char* unsanitized )
{
// It's important that we remove any dangerous characters from any filename
{
// It's important that we remove any dangerous characters from any filename
// we receive from a web client. This can be a serious security hole.
// As MAME/MESS policy is lowercase filenames, also lowercase it.
char* sanitized = new char[64];
int insertpoint =0;
char charcompare;
while (*unsanitized != 0)
{
charcompare = *unsanitized;
@ -78,7 +78,7 @@ char* websanitize_statefilename ( char* unsanitized )
sanitized[insertpoint] = '\0'; // Make sure we're null-terminated.
}
unsanitized++;
}
}
return (sanitized);
}
@ -92,8 +92,8 @@ int web_engine::json_game_handler(struct mg_connection *conn)
data["parent"] = m_machine->system().parent;
data["source_file"] = m_machine->system().source_file;
data["flags"] = m_machine->system().flags;
data["ispaused"] = m_machine->paused();
data["ispaused"] = m_machine->paused();
Json::FastWriter writer;
const char *json = writer.write(data).c_str();
// Send HTTP reply to the client
@ -199,7 +199,7 @@ int web_engine::begin_request_handler(struct mg_connection *conn)
else if(!strcmp(cmd_name,"savestate"))
{
char cmd_val[64];
get_qsvar(request_info, "val", cmd_val, sizeof(cmd_val));
get_qsvar(request_info, "val", cmd_val, sizeof(cmd_val));
char *filename = websanitize_statefilename(cmd_val);
m_machine->schedule_save(filename);
}

118
src/lib/softfloat/fsincos.c
View File

@ -565,10 +565,10 @@ float128 OddPoly(float128 x, float128 *arr, unsigned n)
}
/*----------------------------------------------------------------------------
| Scales extended double-precision floating-point value in operand `a' by
| value `b'. The function truncates the value in the second operand 'b' to
| Scales extended double-precision floating-point value in operand `a' by
| value `b'. The function truncates the value in the second operand 'b' to
| an integral value and adds that value to the exponent of the operand 'a'.
| The operation performed according to the IEC/IEEE Standard for Binary
| The operation performed according to the IEC/IEEE Standard for Binary
| Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/
@ -576,70 +576,70 @@ extern floatx80 propagateFloatx80NaN( floatx80 a, floatx80 b );
floatx80 floatx80_scale(floatx80 a, floatx80 b)
{
sbits32 aExp, bExp;
bits64 aSig, bSig;
sbits32 aExp, bExp;
bits64 aSig, bSig;
// handle unsupported extended double-precision floating encodings
// handle unsupported extended double-precision floating encodings
/* if (floatx80_is_unsupported(a) || floatx80_is_unsupported(b))
{
float_raise(float_flag_invalid);
return floatx80_default_nan;
}*/
aSig = extractFloatx80Frac(a);
aExp = extractFloatx80Exp(a);
int aSign = extractFloatx80Sign(a);
bSig = extractFloatx80Frac(b);
bExp = extractFloatx80Exp(b);
int bSign = extractFloatx80Sign(b);
aSig = extractFloatx80Frac(a);
aExp = extractFloatx80Exp(a);
int aSign = extractFloatx80Sign(a);
bSig = extractFloatx80Frac(b);
bExp = extractFloatx80Exp(b);
int bSign = extractFloatx80Sign(b);
if (aExp == 0x7FFF) {
if ((bits64) (aSig<<1) || ((bExp == 0x7FFF) && (bits64) (bSig<<1)))
{
return propagateFloatx80NaN(a, b);
}
if ((bExp == 0x7FFF) && bSign) {
float_raise(float_flag_invalid);
return floatx80_default_nan;
}
if (bSig && (bExp == 0)) float_raise(float_flag_denormal);
return a;
}
if (bExp == 0x7FFF) {
if ((bits64) (bSig<<1)) return propagateFloatx80NaN(a, b);
if ((aExp | aSig) == 0) {
if (! bSign) {
float_raise(float_flag_invalid);
return floatx80_default_nan;
}
return a;
}
if (aSig && (aExp == 0)) float_raise(float_flag_denormal);
if (bSign) return packFloatx80(aSign, 0, 0);
return packFloatx80(aSign, 0x7FFF, U64(0x8000000000000000));
}
if (aExp == 0) {
if (aSig == 0) return a;
float_raise(float_flag_denormal);
normalizeFloatx80Subnormal(aSig, &aExp, &aSig);
}
if (bExp == 0) {
if (bSig == 0) return a;
float_raise(float_flag_denormal);
normalizeFloatx80Subnormal(bSig, &bExp, &bSig);
}
if (aExp == 0x7FFF) {
if ((bits64) (aSig<<1) || ((bExp == 0x7FFF) && (bits64) (bSig<<1)))
{
return propagateFloatx80NaN(a, b);
}
if ((bExp == 0x7FFF) && bSign) {
float_raise(float_flag_invalid);
return floatx80_default_nan;
}
if (bSig && (bExp == 0)) float_raise(float_flag_denormal);
return a;
}
if (bExp == 0x7FFF) {
if ((bits64) (bSig<<1)) return propagateFloatx80NaN(a, b);
if ((aExp | aSig) == 0) {
if (! bSign) {
float_raise(float_flag_invalid);
return floatx80_default_nan;
}
return a;
}
if (aSig && (aExp == 0)) float_raise(float_flag_denormal);
if (bSign) return packFloatx80(aSign, 0, 0);
return packFloatx80(aSign, 0x7FFF, U64(0x8000000000000000));
}
if (aExp == 0) {
if (aSig == 0) return a;
float_raise(float_flag_denormal);
normalizeFloatx80Subnormal(aSig, &aExp, &aSig);
}
if (bExp == 0) {
if (bSig == 0) return a;
float_raise(float_flag_denormal);
normalizeFloatx80Subnormal(bSig, &bExp, &bSig);
}
if (bExp > 0x400E) {
/* generate appropriate overflow/underflow */
return roundAndPackFloatx80(80, aSign,
bSign ? -0x3FFF : 0x7FFF, aSig, 0);
}
if (bExp < 0x3FFF) return a;
if (bExp > 0x400E) {
/* generate appropriate overflow/underflow */
return roundAndPackFloatx80(80, aSign,
bSign ? -0x3FFF : 0x7FFF, aSig, 0);
}
if (bExp < 0x3FFF) return a;
int shiftCount = 0x403E - bExp;
bSig >>= shiftCount;
sbits32 scale = bSig;
if (bSign) scale = -scale; /* -32768..32767 */
return
roundAndPackFloatx80(80, aSign, aExp+scale, aSig, 0);
int shiftCount = 0x403E - bExp;
bSig >>= shiftCount;
sbits32 scale = bSig;
if (bSign) scale = -scale; /* -32768..32767 */
return
roundAndPackFloatx80(80, aSign, aExp+scale, aSig, 0);
}

4
src/lib/softfloat/softfloat.h
View File

@ -89,8 +89,8 @@ enum {
*----------------------------------------------------------------------------*/
extern int8 float_exception_flags;
enum {
float_flag_invalid = 0x01, float_flag_denormal = 0x02, float_flag_divbyzero = 0x04, float_flag_overflow = 0x08,
float_flag_underflow = 0x10, float_flag_inexact = 0x20
float_flag_invalid = 0x01, float_flag_denormal = 0x02, float_flag_divbyzero = 0x04, float_flag_overflow = 0x08,
float_flag_underflow = 0x10, float_flag_inexact = 0x20
};
/*----------------------------------------------------------------------------

8
src/mame/audio/n8080.c
View File

@ -569,7 +569,7 @@ MACHINE_CONFIG_FRAGMENT( spacefev_sound )
MCFG_SOUND_START_OVERRIDE(n8080_state,spacefev)
MCFG_SOUND_RESET_OVERRIDE(n8080_state,spacefev)
/* basic machine hardware */
MCFG_CPU_ADD("audiocpu", I8035, 6000000)
MCFG_CPU_PROGRAM_MAP(n8080_sound_cpu_map)
@ -590,10 +590,10 @@ MACHINE_CONFIG_END
MACHINE_CONFIG_FRAGMENT( sheriff_sound )
MCFG_SOUND_START_OVERRIDE(n8080_state,sheriff)
MCFG_SOUND_RESET_OVERRIDE(n8080_state,sheriff)
/* basic machine hardware */
MCFG_CPU_ADD("audiocpu", I8035, 6000000)
MCFG_CPU_PROGRAM_MAP(n8080_sound_cpu_map)
@ -615,7 +615,7 @@ MACHINE_CONFIG_FRAGMENT( helifire_sound )
MCFG_SOUND_START_OVERRIDE(n8080_state,helifire)
MCFG_SOUND_RESET_OVERRIDE(n8080_state,helifire)
/* basic machine hardware */
MCFG_CPU_ADD("audiocpu", I8035, 6000000)
MCFG_CPU_PROGRAM_MAP(n8080_sound_cpu_map)

6
src/mame/audio/pleiads.c
View File

@ -57,8 +57,8 @@ void pleiads_sound_device::device_config_complete()
void pleiads_sound_device::device_start()
{
/* The real values are _unknown_!
* I took the ones from Naughty Boy / Pop Flamer
*/
* I took the ones from Naughty Boy / Pop Flamer
*/
/* charge 10u?? (C??) through 330K?? (R??) -> 3.3s */
m_pa5.charge_time = 3.3;
@ -669,7 +669,7 @@ void pleiads_sound_device::common_start()
}
m_channel = machine().sound().stream_alloc(*this, 0, 1, machine().sample_rate(), this);
save_item(NAME(m_sound_latch_a));
save_item(NAME(m_sound_latch_b));
save_item(NAME(m_sound_latch_c));

14
src/mame/audio/pleiads.h
View File

@ -6,7 +6,7 @@ struct pl_t_state
counter(0),
output(0),
max_freq(0) {}
int counter;
int output;
int max_freq;
@ -18,8 +18,8 @@ struct pl_c_state
counter(0),
level(0),
charge_time(0),
discharge_time(0) {}
discharge_time(0) {}
int counter;
int level;
double charge_time;
@ -32,7 +32,7 @@ struct pl_n_state
counter(0),
polyoffs(0),
freq(0) {}
int counter;
int polyoffs;
int freq;
@ -49,7 +49,7 @@ public:
DECLARE_WRITE8_MEMBER( control_a_w );
DECLARE_WRITE8_MEMBER( control_b_w );
DECLARE_WRITE8_MEMBER( control_c_w );
protected:
// device-level overrides
virtual void device_config_complete();
@ -57,7 +57,7 @@ protected:
// sound stream update overrides
virtual void sound_stream_update(sound_stream &stream, stream_sample_t **inputs, stream_sample_t **outputs, int samples);
void common_start();
inline int tone1(int samplerate);
inline int update_pb4(int samplerate);
@ -68,7 +68,7 @@ protected:
inline int tone4(int samplerate);
inline int update_c_pa6(int samplerate);
inline int noise(int samplerate);
// internal state
tms36xx_device *m_tms;
sound_stream *m_channel;

16
src/mame/audio/s11c_bg.c
View File

@ -12,12 +12,12 @@ const device_type S11C_BG = &device_creator<s11c_bg_device>;
s11c_bg_device::s11c_bg_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig,S11C_BG,"Williams System 11C background music",tag,owner,clock, "s11c_bg", __FILE__),
m_cpu(*this,"bgcpu"),
m_ym2151(*this,"ym2151"),
m_hc55516(*this,"hc55516_bg"),
m_dac1(*this,"dac1"),
m_pia40(*this,"pia40"),
m_cpubank(*this,"bgbank")
m_cpu(*this,"bgcpu"),
m_ym2151(*this,"ym2151"),
m_hc55516(*this,"hc55516_bg"),
m_dac1(*this,"dac1"),
m_pia40(*this,"pia40"),
m_cpubank(*this,"bgbank")
{
}
@ -54,12 +54,12 @@ WRITE8_MEMBER( s11c_bg_device::pia40_pa_w )
WRITE_LINE_MEMBER( s11c_bg_device::pia40_cb2_w)
{
// m_pia34->cb1_w(state); // To Widget MCB1 through CPU Data interface
// m_pia34->cb1_w(state); // To Widget MCB1 through CPU Data interface
}
WRITE8_MEMBER( s11c_bg_device::pia40_pb_w )
{
// m_pia34->portb_w(data);
// m_pia34->portb_w(data);
}
WRITE_LINE_MEMBER( s11c_bg_device::pia40_ca2_w)

8
src/mame/audio/segag80r.c
View File

@ -55,7 +55,7 @@ void sega005_sound_device::device_config_complete()
void sega005_sound_device::device_start()
{
segag80r_state *state = machine().driver_data<segag80r_state>();
/* create the stream */
m_sega005_stream = machine().sound().stream_alloc(*this, 0, 1, SEGA005_COUNTER_FREQ, this);
@ -454,7 +454,7 @@ MACHINE_CONFIG_FRAGMENT( 005_sound_board )
MCFG_I8255A_ADD( "ppi8255", ppi8255_005_intf )
/* sound hardware */
MCFG_SAMPLES_ADD("samples", sega005_samples_interface)
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.25)
@ -617,7 +617,7 @@ static const samples_interface spaceod_samples_interface =
MACHINE_CONFIG_FRAGMENT( spaceod_sound_board )
/* sound hardware */
MCFG_SAMPLES_ADD("samples", spaceod_samples_interface)
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.25)
MACHINE_CONFIG_END
@ -764,7 +764,7 @@ MACHINE_CONFIG_FRAGMENT( monsterb_sound_board )
MCFG_I8243_ADD("audio_8243", NOOP, WRITE8(segag80r_state,n7751_rom_control_w))
/* sound hardware */
MCFG_SAMPLES_ADD("samples", monsterb_samples_interface)
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.25)

23
src/mame/audio/segasnd.c
View File

@ -97,7 +97,7 @@ void speech_sound_device::device_config_complete()
void speech_sound_device::device_start()
{
m_speech = machine().root_device().memregion("speech")->base();
save_item(NAME(m_latch));
save_item(NAME(m_t0));
save_item(NAME(m_p2));
@ -155,7 +155,7 @@ WRITE8_MEMBER( speech_sound_device::p2_w )
void speech_sound_device::drq_w(device_t *device, int level)
{
speech_sound_device *speech = device->machine().device<speech_sound_device>("segaspeech");
speech->m_drq = (level == ASSERT_LINE);
}
@ -220,9 +220,9 @@ static ADDRESS_MAP_START( speech_portmap, AS_IO, 8, driver_device )
AM_RANGE(0x00, 0xff) AM_DEVREAD("segaspeech", speech_sound_device, rom_r)
AM_RANGE(0x00, 0xff) AM_DEVWRITE("speech", sp0250_device, write)
AM_RANGE(MCS48_PORT_P1, MCS48_PORT_P1) AM_DEVREADWRITE("segaspeech", speech_sound_device, p1_r, p1_w)
AM_RANGE(MCS48_PORT_P2, MCS48_PORT_P2) AM_DEVWRITE("segaspeech", speech_sound_device, p2_w)
AM_RANGE(MCS48_PORT_T0, MCS48_PORT_T0) AM_DEVREAD("segaspeech", speech_sound_device, t0_r)
AM_RANGE(MCS48_PORT_T1, MCS48_PORT_T1) AM_DEVREAD("segaspeech", speech_sound_device, t1_r)
AM_RANGE(MCS48_PORT_P2, MCS48_PORT_P2) AM_DEVWRITE("segaspeech", speech_sound_device, p2_w)
AM_RANGE(MCS48_PORT_T0, MCS48_PORT_T0) AM_DEVREAD("segaspeech", speech_sound_device, t0_r)
AM_RANGE(MCS48_PORT_T1, MCS48_PORT_T1) AM_DEVREAD("segaspeech", speech_sound_device, t1_r)
ADDRESS_MAP_END
@ -286,7 +286,7 @@ usb_sound_device::usb_sound_device(const machine_config &mconfig, device_type ty
m_noise_subcount(0)
{
}
usb_sound_device::usb_sound_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, SEGAUSB, "Sega Universal Sound Board", tag, owner, clock, "segausb", __FILE__),
device_sound_interface(mconfig, *this),
@ -310,14 +310,13 @@ void usb_sound_device::device_config_complete()
void usb_sound_device::device_start()
{
filter_state temp;
int tchan, tgroup;
/* find the CPU we are associated with */
m_maincpu = machine().device("maincpu");
assert(m_maincpu != NULL);
/* allocate RAM */
m_program_ram = (UINT8 *)memshare("pgmram")->ptr();
m_work_ram = auto_alloc_array(machine(), UINT8, 0x400);
@ -918,7 +917,7 @@ MACHINE_CONFIG_END
machine_config_constructor usb_sound_device::device_mconfig_additions() const
{
return MACHINE_CONFIG_NAME( segausb );
return MACHINE_CONFIG_NAME( segausb );
}
const device_type SEGAUSBROM = &device_creator<usb_rom_sound_device>;
@ -927,7 +926,7 @@ usb_rom_sound_device::usb_rom_sound_device(const machine_config &mconfig, const
: usb_sound_device(mconfig, SEGAUSBROM, "Sega Universal Sound Board with ROM", tag, owner, clock, "segausbrom", __FILE__)
{
}
static ADDRESS_MAP_START( usb_map_rom, AS_PROGRAM, 8, usb_sound_device )
AM_RANGE(0x0000, 0x0fff) AM_ROM AM_REGION(":usbcpu", 0)
ADDRESS_MAP_END
@ -941,8 +940,8 @@ MACHINE_CONFIG_FRAGMENT( segausb_rom )
MCFG_TIMER_DRIVER_ADD_PERIODIC("usb_timer", usb_sound_device, increment_t1_clock_timer_cb, attotime::from_hz(USB_2MHZ_CLOCK / 256))
MACHINE_CONFIG_END
machine_config_constructor usb_rom_sound_device::device_mconfig_additions() const
{
return MACHINE_CONFIG_NAME( segausb_rom );
return MACHINE_CONFIG_NAME( segausb_rom );
}

60
src/mame/audio/segasnd.h
View File

@ -17,16 +17,16 @@ public:
DECLARE_WRITE8_MEMBER( data_w );
DECLARE_WRITE8_MEMBER( control_w );
DECLARE_READ8_MEMBER( t0_r );
DECLARE_READ8_MEMBER( t1_r );
DECLARE_READ8_MEMBER( p1_r );
DECLARE_READ8_MEMBER( rom_r );
DECLARE_WRITE8_MEMBER( p1_w );
DECLARE_WRITE8_MEMBER( p2_w );
static void drq_w(device_t *device, int level);
protected:
// device-level overrides
virtual void device_config_complete();
@ -34,7 +34,7 @@ protected:
// sound stream update overrides
virtual void sound_stream_update(sound_stream &stream, stream_sample_t **inputs, stream_sample_t **outputs, int samples);
private:
// internal state
UINT8 m_drq;
@ -58,7 +58,7 @@ struct filter_state
filter_state():
capval(0),
exponent(0) {}
double capval; /* current capacitor value */
double exponent; /* constant exponent */
};
@ -78,7 +78,7 @@ struct timer8253_channel
subcount(0),
count(0),
remain(0) {}
UINT8 holding; /* holding until counts written? */
UINT8 latchmode; /* latching mode */
UINT8 latchtoggle; /* latching state */
@ -102,7 +102,7 @@ struct timer8253
env[2] = 0;
config = 0;
}
timer8253_channel chan[3]; /* three channels' worth of information */
double env[3]; /* envelope value for each channel */
filter_state chan_filter[2]; /* filter states for the first two channels */
@ -119,23 +119,23 @@ public:
usb_sound_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source);
usb_sound_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
~usb_sound_device() {}
required_device<i8035_device> m_ourcpu; /* CPU index of the 8035 */
required_device<i8035_device> m_ourcpu; /* CPU index of the 8035 */
DECLARE_READ8_MEMBER( status_r );
DECLARE_WRITE8_MEMBER( data_w );
DECLARE_READ8_MEMBER( ram_r );
DECLARE_WRITE8_MEMBER( ram_w );
DECLARE_READ8_MEMBER( p1_r );
DECLARE_WRITE8_MEMBER( p1_w );
DECLARE_WRITE8_MEMBER( p2_w );
DECLARE_READ8_MEMBER( t1_r );
DECLARE_READ8_MEMBER( workram_r );
DECLARE_WRITE8_MEMBER( workram_w );
TIMER_DEVICE_CALLBACK_MEMBER( increment_t1_clock_timer_cb );
protected:
// device-level overrides
virtual machine_config_constructor device_mconfig_additions() const;
@ -145,21 +145,21 @@ protected:
// sound stream update overrides
virtual void sound_stream_update(sound_stream &stream, stream_sample_t **inputs, stream_sample_t **outputs, int samples);
private:
// internal state
sound_stream *m_stream; /* output stream */
device_t *m_maincpu;
UINT8 m_in_latch; /* input latch */
UINT8 m_out_latch; /* output latch */
UINT8 m_last_p2_value; /* current P2 output value */
UINT8 * m_program_ram; /* pointer to program RAM */
UINT8 * m_work_ram; /* pointer to work RAM */
UINT8 m_work_ram_bank; /* currently selected work RAM bank */
UINT8 m_t1_clock; /* T1 clock value */
UINT8 m_t1_clock_mask; /* T1 clock mask (configured via jumpers) */
timer8253 m_timer_group[3]; /* 3 groups of timers */
UINT8 m_timer_mode[3]; /* mode control for each group */
sound_stream *m_stream; /* output stream */
device_t *m_maincpu;
UINT8 m_in_latch; /* input latch */
UINT8 m_out_latch; /* output latch */
UINT8 m_last_p2_value; /* current P2 output value */
UINT8 * m_program_ram; /* pointer to program RAM */
UINT8 * m_work_ram; /* pointer to work RAM */
UINT8 m_work_ram_bank; /* currently selected work RAM bank */
UINT8 m_t1_clock; /* T1 clock value */
UINT8 m_t1_clock_mask; /* T1 clock mask (configured via jumpers) */
timer8253 m_timer_group[3]; /* 3 groups of timers */
UINT8 m_timer_mode[3]; /* mode control for each group */
UINT32 m_noise_shift;
UINT8 m_noise_state;
UINT8 m_noise_subcount;
@ -167,7 +167,7 @@ private:
double m_gate_rc2_exp[2];
filter_state m_final_filter;
filter_state m_noise_filters[5];
TIMER_CALLBACK_MEMBER( delayed_usb_data_w );
void timer_w(int which, UINT8 offset, UINT8 data);
void env_w(int which, UINT8 offset, UINT8 data);
@ -179,19 +179,19 @@ class usb_rom_sound_device : public usb_sound_device
{
public:
usb_rom_sound_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
~usb_rom_sound_device() {}
~usb_rom_sound_device() {}
protected:
// device-level overrides
virtual machine_config_constructor device_mconfig_additions() const;
};
extern const device_type SEGAUSBROM;
#define MCFG_SEGAUSB_ADD(_tag) \
MCFG_SOUND_ADD(_tag, SEGAUSB, 0) \
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0)
#define MCFG_SEGAUSBROM_ADD(_tag) \
MCFG_SOUND_ADD(_tag, SEGAUSBROM, 0) \
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0)

16
src/mame/audio/wpcsnd.c
View File

@ -13,13 +13,13 @@ const device_type WPCSND = &device_creator<wpcsnd_device>;
wpcsnd_device::wpcsnd_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig,WPCSND,"Williams WPC Sound",tag,owner,clock, "wpcsnd", __FILE__),
m_cpu(*this,"bgcpu"),
m_ym2151(*this,"ym2151"),
m_hc55516(*this,"hc55516"),
m_dac(*this,"dac"),
m_cpubank(*this,"rombank"),
m_fixedbank(*this,"fixed"),
m_reply_cb(*this)
m_cpu(*this,"bgcpu"),
m_ym2151(*this,"ym2151"),
m_hc55516(*this,"hc55516"),
m_dac(*this,"dac"),
m_cpubank(*this,"rombank"),
m_fixedbank(*this,"fixed"),
m_reply_cb(*this)
{
}
@ -164,6 +164,4 @@ WRITE8_MEMBER(wpcsnd_device::latch_w)
WRITE8_MEMBER(wpcsnd_device::volume_w)
{
}

14
src/mame/drivers/8080bw.c
View File

@ -7,7 +7,7 @@
Michael Strutts, Nicola Salmoria, Tormod Tjaberg, Mirko Buffoni
Lee Taylor, Valerio Verrando, Marco Cassili, Zsolt Vasvari, and others
Much information about Space Invaders PCBs and other Taito and Midway
Much information about Space Invaders PCBs and other Taito and Midway
sets and hardware contributed by Andrew Welburn
@ -78,10 +78,10 @@
for this set.
Does support flipscreen.
Does not have the color overlay circuitry nor places for it on the pcbs.
(Later TVNxxxxx are actually rebadged CVNxxxxx, see below)
(Later TVNxxxxx are actually rebadged CVNxxxxx, see below)
Came from factory with one of the SV or TV romsets.
Capable of running TV, SV or CV romsets.
This pcb set is probably the oldest one and was designed at Taito.
This pcb set is probably the oldest one and was designed at Taito.
* SVNxxxxx? (L-shaped pcbset) - B&W only, used on "Space Invaders" Upright
with 3-separate-sheets-of-gel 'strips' color overlay.
***TODO: this overlay might not be supported properly yet!
@ -94,10 +94,10 @@
which had a similar board shape?
* CVNxxxxx (3 layer pcbset) - Color, used on "T.T Space Invaders Color"
cocktail with electronic color overlay.
Does support flipscreen.
Does support flipscreen.
Note that later TVNxxxxx pcbsets are actually 'rebadged' CVNxxxxx
pcbsets with the color overlay circuitry unpopulated, and can be
'upgraded' to CVNxxxxx by adding a few components and proms.
'upgraded' to CVNxxxxx by adding a few components and proms.
Came from factory with one of the CV romsets.
Capable of running TV, SV or CV romsets.
* PVNxxxxx (2&3 layer pcbsets) - Color, used on "T.T Space Invaders Part
@ -113,7 +113,7 @@
SV0H, SV02, SV10, SV04, SV09, SV06 - sisv3 (rev 3) (Andy W calls this 'SV2')
SV0H, SV11, SV12, SV04, SV13, SV14 - sisv (rev 4, 5-digit scoring) (Andy W calls this 'SV3') (this set is likely newer than the TV0x sets)
TV01, TV02, TV03, TV04 - sitv1 (rev 1)
TV0H, TV02, TV03, TV04 - sitv (rev 2 with bug fixes)
TV0H, TV02, TV03, TV04 - sitv (rev 2 with bug fixes)
CV03, CV04, CV05, CV06 w/proms - undumped (but may be the same as one of the sisv sets with the roms combined to 2716 size)
CV17, CV18, CV19, CV20 w/proms - sicv
UV1, UV2, UV3, UV4, UV5, UV6, UV7, UV8, UV9, UV10 w/proms - undumped (probably same as pvxx set just split differently)
@ -4016,7 +4016,7 @@ ROM_START( cosmicmo ) /* Roms stamped with "II", denoting version II */
ROM_LOAD( "ii-7.h7", 0x4800, 0x0400, CRC(6a13b15b) SHA1(dc03a6c3e938cfd08d16bd1660899f951ba72ea2) )
/* There is no colour circuits or tracking on the game pcb, its a black and white composite video signal only */
/* The PCB is etched with Universal 7814A-3 */
/* The PCB is etched with Universal 7814A-3 */
ROM_END
ROM_START( cosmicm2 )

2
src/mame/drivers/cchasm.c
View File

@ -175,7 +175,7 @@ static MACHINE_CONFIG_START( cchasm, cchasm_state )
/* sound hardware */
MCFG_SPEAKER_STANDARD_MONO("mono")
MCFG_SOUND_ADD("ay1", AY8910, 1818182)

18
src/mame/drivers/cps1.c
View File

@ -4842,14 +4842,14 @@ ROM_END
/* B-Board 89625B-1 */
ROM_START( ffightj3 )
ROM_REGION( CODE_SIZE, "maincpu", 0 ) /* 68000 code */
ROM_LOAD16_BYTE( "ff_36.12f", 0x00000, 0x20000, CRC(ed988977) SHA1(c718e989206bd2b68832c8fcb5667397d500ebac) ) // == ffu_30.11f
ROM_LOAD16_BYTE( "ffj_42(__ffightj3).12h", 0x00001, 0x20000, CRC(07bf1c21) SHA1(f21a939fd92607c7f54816dedbcb3c5818cf4183) ) // == ffu_35.11h
ROM_LOAD16_BYTE( "ff_37.13f", 0x40000, 0x20000, CRC(dba5a476) SHA1(2f0176dd050f9630b914f1c1ca5d96215bcf567f) ) // == ffu_31.12f
ROM_LOAD16_BYTE( "ff_36.12f", 0x00000, 0x20000, CRC(ed988977) SHA1(c718e989206bd2b68832c8fcb5667397d500ebac) ) // == ffu_30.11f
ROM_LOAD16_BYTE( "ffj_42(__ffightj3).12h", 0x00001, 0x20000, CRC(07bf1c21) SHA1(f21a939fd92607c7f54816dedbcb3c5818cf4183) ) // == ffu_35.11h
ROM_LOAD16_BYTE( "ff_37.13f", 0x40000, 0x20000, CRC(dba5a476) SHA1(2f0176dd050f9630b914f1c1ca5d96215bcf567f) ) // == ffu_31.12f
ROM_LOAD16_BYTE( "ffj_43(__ffightj3).13h", 0x40001, 0x20000, CRC(fbeca028) SHA1(85eeed6a25b401d73d12896ca1e2bf7402c921ee) )
ROM_LOAD16_BYTE( "ff_34.10f", 0x80000, 0x20000, CRC(0c8dc3fc) SHA1(edcce3efd9cdd131ef0c96df15a68722d5c3498e) ) // == ff-32m.8h
ROM_LOAD16_BYTE( "ffj_40.10h", 0x80001, 0x20000, CRC(8075bab9) SHA1(f9c7405133f6fc5557c90e60e8ccc459e4f6fd7d) ) // == ff-32m.8h
ROM_LOAD16_BYTE( "ff_35.11f", 0xc0000, 0x20000, CRC(4a934121) SHA1(3982c261582755a0eac340d6d7ed96e6c263c8b6) ) // == ff-32m.8h
ROM_LOAD16_BYTE( "ffj_41.11h", 0xc0001, 0x20000, CRC(2af68154) SHA1(7d549cb38650b4b79c68ad6d0dfcefdd62be4e99) ) // == ff-32m.8h
ROM_LOAD16_BYTE( "ff_34.10f", 0x80000, 0x20000, CRC(0c8dc3fc) SHA1(edcce3efd9cdd131ef0c96df15a68722d5c3498e) ) // == ff-32m.8h
ROM_LOAD16_BYTE( "ffj_40.10h", 0x80001, 0x20000, CRC(8075bab9) SHA1(f9c7405133f6fc5557c90e60e8ccc459e4f6fd7d) ) // == ff-32m.8h
ROM_LOAD16_BYTE( "ff_35.11f", 0xc0000, 0x20000, CRC(4a934121) SHA1(3982c261582755a0eac340d6d7ed96e6c263c8b6) ) // == ff-32m.8h
ROM_LOAD16_BYTE( "ffj_41.11h", 0xc0001, 0x20000, CRC(2af68154) SHA1(7d549cb38650b4b79c68ad6d0dfcefdd62be4e99) ) // == ff-32m.8h
ROM_REGION( 0x200000, "gfx", 0 )
ROMX_LOAD( "ff_09.4b", 0x000000, 0x20000, CRC(5b116d0d) SHA1(a24e829fdfa043bd27b508d7cc0788ad80fd180e) , ROM_SKIP(7) )
@ -4886,7 +4886,7 @@ ROM_START( ffightj3 )
ROM_REGION( 0x0200, "bboardplds", 0 )
ROM_LOAD( "s222b.1a", 0x0000, 0x0117, NO_DUMP )
ROM_LOAD( "lwio.12e", 0x0000, 0x0117, CRC(ad52b90c) SHA1(f0fd6aeea515ee449320fe15684e6b3ab7f97bf4) ) // pal verification required
ROM_LOAD( "lwio.12e", 0x0000, 0x0117, CRC(ad52b90c) SHA1(f0fd6aeea515ee449320fe15684e6b3ab7f97bf4) ) // pal verification required
ROM_END
/* B-Board 91634B-2 */
@ -5864,7 +5864,7 @@ ROM_END
ROM_START( sf2ed )
ROM_REGION( CODE_SIZE, "maincpu", 0 ) /* 68000 code */
ROM_LOAD16_BYTE( "sf2e_30d.11e", 0x00000, 0x20000, CRC(4bb2657c) SHA1(b2d077296b77be7db371f953b7fc446a67d8a9d6) )
ROM_LOAD16_BYTE( "sf2e_37d.11f", 0x00001, 0x20000, CRC(102f4561) SHA1(2fc77cd3b2ecf8fadc4f8614cb200cf2cba4c616) ) //only rom different from sf2ud
ROM_LOAD16_BYTE( "sf2e_37d.11f", 0x00001, 0x20000, CRC(102f4561) SHA1(2fc77cd3b2ecf8fadc4f8614cb200cf2cba4c616) ) //only rom different from sf2ud
ROM_LOAD16_BYTE( "sf2e_31d.12e", 0x40000, 0x20000, CRC(d57b67d7) SHA1(43d0b47c9fada8d9b445caa4b96ac8493061aa8b) )
ROM_LOAD16_BYTE( "sf2e_38d.12f", 0x40001, 0x20000, CRC(9c8916ef) SHA1(a4629356a816454bcc1d7b41e70e147d4769a682) )
ROM_LOAD16_BYTE( "sf2e_28d.9e", 0x80000, 0x20000, CRC(175819d1) SHA1(c98b6b7af4e57735dbfb3d1e61ba1bfb9f145d33) )

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