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Cleanups and version bump

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This commit is contained in:
Miodrag Milanovic 2013-11-05 06:59:51 +00:00
parent 50cdc0f4ae
commit 44d5c1b8ab
236 changed files with 5626 additions and 5674 deletions
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18
hash/ibm5170.xml
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@ -3991,7 +3991,7 @@ Missing files come here
<description>Riki Coverdisk (June 1995) (Slovak)</description> <description>Riki Coverdisk (June 1995) (Slovak)</description>
<year>1995</year> <year>1995</year>
<publisher>Riki</publisher> <publisher>Riki</publisher>
<info name="Contents" value="Pyrotechnika" /> <info name="Contents" value="Pyrotechnika" />
<part name="flop1" interface="floppy_3_5"> <part name="flop1" interface="floppy_3_5">
<dataarea name="flop" size="1474560"> <dataarea name="flop" size="1474560">
<rom name="riki0695-10.ima" size="1474560" crc="632e1b1b" sha1="c61bc9516d7c39cf785ab5e9d496907f9b5f6e45" offset="0" status="baddump" /> <rom name="riki0695-10.ima" size="1474560" crc="632e1b1b" sha1="c61bc9516d7c39cf785ab5e9d496907f9b5f6e45" offset="0" status="baddump" />
@ -4003,7 +4003,7 @@ Missing files come here
<description>Riki Coverdisk (July 1995) (Slovak)</description> <description>Riki Coverdisk (July 1995) (Slovak)</description>
<year>1995</year> <year>1995</year>
<publisher>Riki</publisher> <publisher>Riki</publisher>
<info name="Contents" value="Super Stardust" /> <info name="Contents" value="Super Stardust" />
<part name="flop1" interface="floppy_3_5"> <part name="flop1" interface="floppy_3_5">
<dataarea name="flop" size="1474560"> <dataarea name="flop" size="1474560">
<rom name="riki0795-11.ima" size="1474560" crc="8cb11858" sha1="492d5c9df9ff4e6a85797295d4d8e5b12ed24b04" offset="0" status="baddump" /> <rom name="riki0795-11.ima" size="1474560" crc="8cb11858" sha1="492d5c9df9ff4e6a85797295d4d8e5b12ed24b04" offset="0" status="baddump" />
@ -4039,7 +4039,7 @@ Missing files come here
<description>Riki Coverdisk (November 1995) (Slovak)</description> <description>Riki Coverdisk (November 1995) (Slovak)</description>
<year>1995</year> <year>1995</year>
<publisher>Riki</publisher> <publisher>Riki</publisher>
<info name="Contents" value="Bleifuss" /> <info name="Contents" value="Bleifuss" />
<part name="flop1" interface="floppy_3_5"> <part name="flop1" interface="floppy_3_5">
<dataarea name="flop" size="1474560"> <dataarea name="flop" size="1474560">
<rom name="riki1195-14.ima" size="1474560" crc="bad9bdca" sha1="4425c59acb4c47fdb9f3f9b3322ef9cd5984ec5b" offset="0" status="baddump" /> <rom name="riki1195-14.ima" size="1474560" crc="bad9bdca" sha1="4425c59acb4c47fdb9f3f9b3322ef9cd5984ec5b" offset="0" status="baddump" />
@ -4063,7 +4063,7 @@ Missing files come here
<description>Riki Coverdisk (January 1996) (Slovak)</description> <description>Riki Coverdisk (January 1996) (Slovak)</description>
<year>1996</year> <year>1996</year>
<publisher>Riki</publisher> <publisher>Riki</publisher>
<info name="Contents" value="Jungle Book" /> <info name="Contents" value="Jungle Book" />
<part name="flop1" interface="floppy_3_5"> <part name="flop1" interface="floppy_3_5">
<dataarea name="flop" size="1474560"> <dataarea name="flop" size="1474560">
<rom name="riki0196-16.ima" size="1474560" crc="2d363851" sha1="5b1d8fc2bd16ecad559f15ada6c477241d5a4848" offset="0" status="baddump" /> <rom name="riki0196-16.ima" size="1474560" crc="2d363851" sha1="5b1d8fc2bd16ecad559f15ada6c477241d5a4848" offset="0" status="baddump" />
@ -4075,7 +4075,7 @@ Missing files come here
<description>Riki Coverdisk (February 1996) (Slovak)</description> <description>Riki Coverdisk (February 1996) (Slovak)</description>
<year>1996</year> <year>1996</year>
<publisher>Riki</publisher> <publisher>Riki</publisher>
<info name="Contents" value="Turrican II" /> <info name="Contents" value="Turrican II" />
<part name="flop1" interface="floppy_3_5"> <part name="flop1" interface="floppy_3_5">
<dataarea name="flop" size="1474560"> <dataarea name="flop" size="1474560">
<rom name="riki0296-17.ima" size="1474560" crc="0397885e" sha1="fbeb23616a222a87d0d3f1e1bb01d9468ea2e2d9" offset="0" status="baddump" /> <rom name="riki0296-17.ima" size="1474560" crc="0397885e" sha1="fbeb23616a222a87d0d3f1e1bb01d9468ea2e2d9" offset="0" status="baddump" />
@ -4087,7 +4087,7 @@ Missing files come here
<description>Riki Coverdisk (March 1996) (Slovak)</description> <description>Riki Coverdisk (March 1996) (Slovak)</description>
<year>1996</year> <year>1996</year>
<publisher>Riki</publisher> <publisher>Riki</publisher>
<info name="Contents" value="Worms" /> <info name="Contents" value="Worms" />
<part name="flop1" interface="floppy_3_5"> <part name="flop1" interface="floppy_3_5">
<dataarea name="flop" size="1474560"> <dataarea name="flop" size="1474560">
<rom name="riki0396-18.ima" size="1474560" crc="1884a1a5" sha1="3a3d1c942b7bdced7a65b0a3e3f65c583abdf03f" offset="0" status="baddump" /> <rom name="riki0396-18.ima" size="1474560" crc="1884a1a5" sha1="3a3d1c942b7bdced7a65b0a3e3f65c583abdf03f" offset="0" status="baddump" />
@ -4099,7 +4099,7 @@ Missing files come here
<description>Riki Coverdisk (April 1996) (Slovak)</description> <description>Riki Coverdisk (April 1996) (Slovak)</description>
<year>1996</year> <year>1996</year>
<publisher>Riki</publisher> <publisher>Riki</publisher>
<info name="Contents" value="Tempest 2000" /> <info name="Contents" value="Tempest 2000" />
<part name="flop1" interface="floppy_3_5"> <part name="flop1" interface="floppy_3_5">
<dataarea name="flop" size="1474560"> <dataarea name="flop" size="1474560">
<rom name="riki0496-19.ima" size="1474560" crc="5df023bd" sha1="684baaaa927db7102dec1872da18bc20ff4c780b" offset="0" status="baddump" /> <rom name="riki0496-19.ima" size="1474560" crc="5df023bd" sha1="684baaaa927db7102dec1872da18bc20ff4c780b" offset="0" status="baddump" />
@ -4111,7 +4111,7 @@ Missing files come here
<description>Riki Coverdisk (May 1996) (Slovak)</description> <description>Riki Coverdisk (May 1996) (Slovak)</description>
<year>1996</year> <year>1996</year>
<publisher>Riki</publisher> <publisher>Riki</publisher>
<info name="Contents" value="Virtual Snooker" /> <info name="Contents" value="Virtual Snooker" />
<part name="flop1" interface="floppy_3_5"> <part name="flop1" interface="floppy_3_5">
<dataarea name="flop" size="1474560"> <dataarea name="flop" size="1474560">
<rom name="riki0596-20.ima" size="1474560" crc="5704d5cd" sha1="c283c7dc070fc9cb8b90fec096a980f4c713746c" offset="0" status="baddump" /> <rom name="riki0596-20.ima" size="1474560" crc="5704d5cd" sha1="c283c7dc070fc9cb8b90fec096a980f4c713746c" offset="0" status="baddump" />
@ -4123,7 +4123,7 @@ Missing files come here
<description>Riki Coverdisk (June 1996) (Slovak)</description> <description>Riki Coverdisk (June 1996) (Slovak)</description>
<year>1996</year> <year>1996</year>
<publisher>Riki</publisher> <publisher>Riki</publisher>
<info name="Contents" value="World Rally Fever" /> <info name="Contents" value="World Rally Fever" />
<part name="flop1" interface="floppy_3_5"> <part name="flop1" interface="floppy_3_5">
<dataarea name="flop" size="1474560"> <dataarea name="flop" size="1474560">
<rom name="riki0696-21.ima" size="1474560" crc="e00c21c8" sha1="b05f84ecc7b8e42528395ac5282de8bd36b986b8" offset="0" status="baddump" /> <rom name="riki0696-21.ima" size="1474560" crc="e00c21c8" sha1="b05f84ecc7b8e42528395ac5282de8bd36b986b8" offset="0" status="baddump" />

6
hash/nes.xml
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@ -37501,11 +37501,11 @@
<feature name="batt?" value="BATTERY" /> <feature name="batt?" value="BATTERY" />
<dataarea name="prg" size="262144"> <dataarea name="prg" size="262144">
<!-- The PRG split ROMs have to be confirmed --> <!-- The PRG split ROMs have to be confirmed -->
<rom name="8-27 0 5-20.u1" size="131072" crc="06074289" sha1="7c5b4a7f51eb79458cbe7cb7e77aae4df6eac4f3" offset="0x00000" status="baddump" /> <!-- Actual label: 8/27 0 5:20 --> <rom name="8-27 0 5-20.u1" size="131072" crc="06074289" sha1="7c5b4a7f51eb79458cbe7cb7e77aae4df6eac4f3" offset="0x00000" status="baddump" /> <!-- Actual label: 8/27 0 5:20 -->
<rom name="8-27 1 5-20.u2" size="131072" crc="937992d7" sha1="e335b4c2dc3fc21effaa8a12d47677090c8b30c4" offset="0x20000" status="baddump" /> <!-- Actual label: 8/27 1 5:20 --> <rom name="8-27 1 5-20.u2" size="131072" crc="937992d7" sha1="e335b4c2dc3fc21effaa8a12d47677090c8b30c4" offset="0x20000" status="baddump" /> <!-- Actual label: 8/27 1 5:20 -->
</dataarea> </dataarea>
<dataarea name="chr" size="131072"> <dataarea name="chr" size="131072">
<rom name="t.s.b. chr 8-27.u5" size="131072" crc="e5f74c77" sha1="3657693f08c66d2db84bcf62fdd4c439603778f5" offset="00000" /> <!-- Actual label: T.S.B. CHR 8/27 --> <rom name="t.s.b. chr 8-27.u5" size="131072" crc="e5f74c77" sha1="3657693f08c66d2db84bcf62fdd4c439603778f5" offset="00000" /> <!-- Actual label: T.S.B. CHR 8/27 -->
</dataarea> </dataarea>
<!-- 8k WRAM on cartridge, battery backed up --> <!-- 8k WRAM on cartridge, battery backed up -->
<dataarea name="bwram" size="8192"> <dataarea name="bwram" size="8192">

2
src/emu/bus/a2bus/a2cffa.c
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@ -35,7 +35,7 @@ MACHINE_CONFIG_FRAGMENT( cffa2 )
MCFG_ATA_INTERFACE_ADD(CFFA2_ATA_TAG, ata_devices, "hdd", NULL, false) MCFG_ATA_INTERFACE_ADD(CFFA2_ATA_TAG, ata_devices, "hdd", NULL, false)
// not yet, the core explodes // not yet, the core explodes
// MCFG_SOFTWARE_LIST_ADD("hdd_list", "apple2gs_hdd") // MCFG_SOFTWARE_LIST_ADD("hdd_list", "apple2gs_hdd")
MACHINE_CONFIG_END MACHINE_CONFIG_END
ROM_START( cffa2 ) ROM_START( cffa2 )

4
src/emu/bus/a2bus/a2hsscsi.c
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@ -182,9 +182,9 @@ UINT8 a2bus_hsscsi_device::read_c0nx(address_space &space, UINT8 offset)
break; break;
case 0xc: case 0xc:
return 0x00; // indicate watchdog? return 0x00; // indicate watchdog?
case 0xe: // code at cf32 wants to RMW this without killing the ROM bank case 0xe: // code at cf32 wants to RMW this without killing the ROM bank
return m_c0ne; return m_c0ne;
case 0xf: case 0xf:

4
src/emu/bus/a2bus/a2scsi.c
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@ -15,14 +15,14 @@
C0na = RAM and ROM bank switching C0na = RAM and ROM bank switching
C0nb = reset 5380 C0nb = reset 5380
C0nc = set IIgs block mode C0nc = set IIgs block mode
C0nd = set pseudo-DMA C0nd = set pseudo-DMA
C0ne = read DRQ status in bit 7 C0ne = read DRQ status in bit 7
In IIgs block mode, any read from C800-CBFF window fetches In IIgs block mode, any read from C800-CBFF window fetches
the next byte from the 5380's DMA port. This lets you use the the next byte from the 5380's DMA port. This lets you use the
65816 MVN/MVP operations to burst-transfer up to 1K at a time. 65816 MVN/MVP operations to burst-transfer up to 1K at a time.
(Requires a cycle-by-cycle haltable 65816 core; don't install the (Requires a cycle-by-cycle haltable 65816 core; don't install the
GS/OS driver right now to avoid this) GS/OS driver right now to avoid this)
Pseudo-DMA works similarly to the Mac implementation; use C0n8 Pseudo-DMA works similarly to the Mac implementation; use C0n8
to read/write "DMA" bytes in that mode. to read/write "DMA" bytes in that mode.

2
src/emu/bus/abcbus/abcbus.h
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@ -204,7 +204,7 @@ public:
// ======================> abcbus_slot_device // ======================> abcbus_slot_device
class abcbus_slot_device : public device_t, class abcbus_slot_device : public device_t,
public device_slot_interface public device_slot_interface
{ {
public: public:
// construction/destruction // construction/destruction

2
src/emu/bus/abcbus/lux10828.h
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@ -52,7 +52,7 @@
// ======================> luxor_55_10828_device // ======================> luxor_55_10828_device
class luxor_55_10828_device : public device_t, class luxor_55_10828_device : public device_t,
public device_abcbus_card_interface public device_abcbus_card_interface
{ {
public: public:
// construction/destruction // construction/destruction

4
src/emu/bus/abcbus/lux21046.c
View File

@ -730,11 +730,11 @@ WRITE8_MEMBER( luxor_55_21046_device::_8a_w )
/* /*
if (BIT(data, 2)) if (BIT(data, 2))
{ {
m_fdc->set_unscaled_clock(XTAL_16MHz/16); m_fdc->set_unscaled_clock(XTAL_16MHz/16);
} }
else else
{ {
m_fdc->set_unscaled_clock(XTAL_16MHz/8); m_fdc->set_unscaled_clock(XTAL_16MHz/8);
} }
*/ */
} }

2
src/emu/bus/abcbus/lux21046.h
View File

@ -51,7 +51,7 @@
// ======================> luxor_55_21046_device // ======================> luxor_55_21046_device
class luxor_55_21046_device : public device_t, class luxor_55_21046_device : public device_t,
public device_abcbus_card_interface public device_abcbus_card_interface
{ {
public: public:
// construction/destruction // construction/destruction

56
src/emu/bus/abcbus/lux21056.c
View File

@ -11,47 +11,47 @@
/* /*
Use the CHDMAN utility to create a 5MB image for ABC 850: Use the CHDMAN utility to create a 5MB image for ABC 850:
$ chdman createhd -o /path/to/ro202.chd -chs 321,4,17 -ss 512 $ chdman createhd -o /path/to/ro202.chd -chs 321,4,17 -ss 512
$ chdman createhd -o /path/to/basf6185.chd -chs 440,6,32 -ss 256 $ chdman createhd -o /path/to/basf6185.chd -chs 440,6,32 -ss 256
or a 10MB image for ABC 852: or a 10MB image for ABC 852:
$ chdman createhd -o /path/to/nec5126.chd -chs 615,4,17 -ss 512 $ chdman createhd -o /path/to/nec5126.chd -chs 615,4,17 -ss 512
or a 20MB image for ABC 856: or a 20MB image for ABC 856:
$ chdman createhd -o /path/to/micr1325.chd -chs 1024,8,33 -ss 256 $ chdman createhd -o /path/to/micr1325.chd -chs 1024,8,33 -ss 256
Start the abc800 emulator with the ABC 850 attached on the ABC bus, Start the abc800 emulator with the ABC 850 attached on the ABC bus,
with the new CHD and a UFD-DOS floppy mounted: with the new CHD and a UFD-DOS floppy mounted:
$ mess abc800m -bus hdd -bus:hdd:io2 xebec,bios=ro202 -flop1 ufd631 -hard ro202.chd $ mess abc800m -bus hdd -bus:hdd:io2 xebec,bios=ro202 -flop1 ufd631 -hard ro202.chd
$ mess abc800m -bus hdd -bus:hdd:io2 xebec,bios=basf6185 -flop1 ufd631 -hard basf6185.chd $ mess abc800m -bus hdd -bus:hdd:io2 xebec,bios=basf6185 -flop1 ufd631 -hard basf6185.chd
$ mess abc800m -bus hdd -bus:hdd:io2 xebec,bios=nec5126 -flop1 ufd631 -hard nec5126.chd $ mess abc800m -bus hdd -bus:hdd:io2 xebec,bios=nec5126 -flop1 ufd631 -hard nec5126.chd
$ mess abc800m -bus hdd -bus:hdd:io2 xebec,bios=micr1325 -flop1 ufd631 -hard micr1325.chd $ mess abc800m -bus hdd -bus:hdd:io2 xebec,bios=micr1325 -flop1 ufd631 -hard micr1325.chd
Configure the floppy controller for use with an ABC 850: Configure the floppy controller for use with an ABC 850:
- Drive 0 Sides: Double - Drive 0 Sides: Double
- Drive 1 Sides: Double - Drive 1 Sides: Double
- Drive 0 Tracks: 40 or 80 depending on the UFD DOS image used - Drive 0 Tracks: 40 or 80 depending on the UFD DOS image used
- Drive 1 Tracks: 40 or 80 depending on the UFD DOS image used - Drive 1 Tracks: 40 or 80 depending on the UFD DOS image used
- Card Address: 44 (ABC 832/834/850) - Card Address: 44 (ABC 832/834/850)
Reset the emulated machine by pressing F3. Reset the emulated machine by pressing F3.
You should now see the following text at the top of the screen: You should now see the following text at the top of the screen:
DOS är UFD-DOS ver. 19 DOS ??r UFD-DOS ver. 19
DR_: motsvarar MF_: DR_: motsvarar MF_:
Enter "BYE" to get into the UFD-DOS command prompt. Enter "BYE" to get into the UFD-DOS command prompt.
Enter "DOSGEN,F HD0:" to start the formatting utility. Enter "DOSGEN,F HD0:" to start the formatting utility.
Enter "J", and enter "J" to confirm the formatting. Enter "J", and enter "J" to confirm the formatting.
To Be Continued... To Be Continued...
*/ */
@ -68,7 +68,7 @@
#define SASIBUS_TAG "sasi" #define SASIBUS_TAG "sasi"
#define STAT_DIR \ #define STAT_DIR \
BIT(m_stat, 6) BIT(m_stat, 6)

2
src/emu/bus/abcbus/lux21056.h
View File

@ -32,7 +32,7 @@
// ======================> luxor_55_21056_device // ======================> luxor_55_21056_device
class luxor_55_21056_device : public device_t, class luxor_55_21056_device : public device_t,
public device_abcbus_card_interface public device_abcbus_card_interface
{ {
public: public:
// construction/destruction // construction/destruction

2
src/emu/bus/adamnet/fdc.h
View File

@ -29,7 +29,7 @@
// ======================> adam_fdc_device // ======================> adam_fdc_device
class adam_fdc_device : public device_t, class adam_fdc_device : public device_t,
public device_adamnet_card_interface public device_adamnet_card_interface
{ {
public: public:
// construction/destruction // construction/destruction

2
src/emu/bus/c64/partner.c
View File

@ -198,7 +198,7 @@ int c64_partner_cartridge_device::c64_game_r(offs_t offset, int sphi2, int ba, i
{ {
switch ((offset >> 13) & 0x03) switch ((offset >> 13) & 0x03)
{ {
case 0: case 1: case 3: case 0: case 1: case 3:
game = 0; game = 0;
break; break;
} }

2
src/emu/bus/c64/partner.h
View File

@ -26,7 +26,7 @@
// ======================> c64_partner_cartridge_device // ======================> c64_partner_cartridge_device
class c64_partner_cartridge_device : public device_t, class c64_partner_cartridge_device : public device_t,
public device_c64_expansion_card_interface public device_c64_expansion_card_interface
{ {
public: public:
// construction/destruction // construction/destruction

4
src/emu/bus/centronics/ctronics.c
View File

@ -2,8 +2,8 @@
Centronics printer interface Centronics printer interface
license: MAME, GPL-2.0+ license: MAME, GPL-2.0+
copyright-holders: Dirk Best copyright-holders: Dirk Best
***************************************************************************/ ***************************************************************************/

4
src/emu/bus/centronics/ctronics.h
View File

@ -2,8 +2,8 @@
Centronics printer interface Centronics printer interface
license: MAME, GPL-2.0+ license: MAME, GPL-2.0+
copyright-holders: Dirk Best copyright-holders: Dirk Best
***************************************************************************/ ***************************************************************************/

2
src/emu/bus/ieee488/c2031.h
View File

@ -30,7 +30,7 @@
// ======================> c2031_device // ======================> c2031_device
class c2031_device : public device_t, class c2031_device : public device_t,
public device_ieee488_interface public device_ieee488_interface
{ {
public: public:
// construction/destruction // construction/destruction

2
src/emu/bus/isbx/compis_fdc.c
View File

@ -16,7 +16,7 @@
// MACROS / CONSTANTS // MACROS / CONSTANTS
//************************************************************************** //**************************************************************************
#define I8272_TAG "ic13" #define I8272_TAG "ic13"

2
src/emu/bus/isbx/compis_fdc.h
View File

@ -28,7 +28,7 @@
// ======================> compis_fdc_device // ======================> compis_fdc_device
class compis_fdc_device : public device_t, class compis_fdc_device : public device_t,
public device_isbx_card_interface public device_isbx_card_interface
{ {
public: public:
// construction/destruction // construction/destruction

2
src/emu/bus/isbx/isbx.h
View File

@ -99,7 +99,7 @@ protected:
// ======================> isbx_slot_device // ======================> isbx_slot_device
class isbx_slot_device : public device_t, class isbx_slot_device : public device_t,
public device_slot_interface public device_slot_interface
{ {
public: public:
// construction/destruction // construction/destruction

2
src/emu/bus/plus4/c1551.h
View File

@ -34,7 +34,7 @@
// ======================> c1551_device // ======================> c1551_device
class c1551_device : public device_t, class c1551_device : public device_t,
public device_plus4_expansion_card_interface public device_plus4_expansion_card_interface
{ {
public: public:
// construction/destruction // construction/destruction

4
src/emu/cpu/i8089/i8089.c
View File

@ -2,8 +2,8 @@
Intel 8089 I/O Processor Intel 8089 I/O Processor
license: MAME, GPL-2.0+ license: MAME, GPL-2.0+
copyright-holders: Dirk Best copyright-holders: Dirk Best
***************************************************************************/ ***************************************************************************/

4
src/emu/cpu/i8089/i8089.h
View File

@ -2,8 +2,8 @@
Intel 8089 I/O Processor Intel 8089 I/O Processor
license: MAME, GPL-2.0+ license: MAME, GPL-2.0+
copyright-holders: Dirk Best copyright-holders: Dirk Best
***************************************************************************/ ***************************************************************************/

4
src/emu/cpu/i8089/i8089_channel.c
View File

@ -2,8 +2,8 @@
Intel 8089 I/O Processor Intel 8089 I/O Processor
license: MAME, GPL-2.0+ license: MAME, GPL-2.0+
copyright-holders: Dirk Best copyright-holders: Dirk Best
I/O channel I/O channel

4
src/emu/cpu/i8089/i8089_channel.h
View File

@ -2,8 +2,8 @@
Intel 8089 I/O Processor Intel 8089 I/O Processor
license: MAME, GPL-2.0+ license: MAME, GPL-2.0+
copyright-holders: Dirk Best copyright-holders: Dirk Best
I/O channel I/O channel

4
src/emu/cpu/i8089/i8089_dasm.c
View File

@ -2,8 +2,8 @@
Intel 8089 I/O Processor Intel 8089 I/O Processor
license: MAME, GPL-2.0+ license: MAME, GPL-2.0+
copyright-holders: Dirk Best copyright-holders: Dirk Best
Disassembler Disassembler

4
src/emu/cpu/i8089/i8089_ops.c
View File

@ -2,8 +2,8 @@
Intel 8089 I/O Processor Intel 8089 I/O Processor
license: MAME, GPL-2.0+ license: MAME, GPL-2.0+
copyright-holders: Dirk Best copyright-holders: Dirk Best
Opcode implementations Opcode implementations

17
src/emu/cpu/nec/nec.c
View File

@ -364,14 +364,14 @@ void nec_common_device::device_start()
Mod_RM.RM.b[i] = breg_name[i & 7]; Mod_RM.RM.b[i] = breg_name[i & 7];
} }
m_no_interrupt = 0; m_no_interrupt = 0;
m_prefetch_count = 0; m_prefetch_count = 0;
m_prefetch_reset = 0; m_prefetch_reset = 0;
m_prefix_base = 0; m_prefix_base = 0;
m_seg_prefix = 0; m_seg_prefix = 0;
m_EA = 0; m_EA = 0;
m_EO = 0; m_EO = 0;
m_E16 = 0; m_E16 = 0;
save_item(NAME(m_regs.w)); save_item(NAME(m_regs.w));
save_item(NAME(m_sregs)); save_item(NAME(m_sregs));
@ -522,4 +522,3 @@ void nec_common_device::execute_run()
do_prefetch(prev_ICount); do_prefetch(prev_ICount);
} }
} }

1
src/emu/cpu/nec/v25.c
View File

@ -745,4 +745,3 @@ void v25_common_device::execute_run()
do_prefetch(prev_ICount); do_prefetch(prev_ICount);
} }
} }

22
src/emu/cpu/rsp/rsp.c
View File

@ -66,11 +66,11 @@ INLINE rsp_state *get_safe_token(device_t *device)
#define ACCUM_M(x) rsp->accum[((x))].w[2] #define ACCUM_M(x) rsp->accum[((x))].w[2]
#define ACCUM_L(x) rsp->accum[((x))].w[1] #define ACCUM_L(x) rsp->accum[((x))].w[1]
#define CARRY 0 #define CARRY 0
#define COMPARE 1 #define COMPARE 1
#define CLIP1 2 #define CLIP1 2
#define ZERO 3 #define ZERO 3
#define CLIP2 4 #define CLIP2 4
#define CARRY_FLAG(x) (rsp->vflag[CARRY][x & 7] != 0 ? 0xffff : 0) #define CARRY_FLAG(x) (rsp->vflag[CARRY][x & 7] != 0 ? 0xffff : 0)
#define COMPARE_FLAG(x) (rsp->vflag[COMPARE][x & 7] != 0 ? 0xffff : 0) #define COMPARE_FLAG(x) (rsp->vflag[COMPARE][x & 7] != 0 ? 0xffff : 0)
@ -78,7 +78,7 @@ INLINE rsp_state *get_safe_token(device_t *device)
#define ZERO_FLAG(x) (rsp->vflag[ZERO][x & 7] != 0 ? 0xffff : 0) #define ZERO_FLAG(x) (rsp->vflag[ZERO][x & 7] != 0 ? 0xffff : 0)
#define CLIP2_FLAG(x) (rsp->vflag[CLIP2][x & 7] != 0 ? 0xffff : 0) #define CLIP2_FLAG(x) (rsp->vflag[CLIP2][x & 7] != 0 ? 0xffff : 0)
#define CLEAR_CARRY_FLAGS() { memset(rsp->vflag[0], 0, 16); } #define CLEAR_CARRY_FLAGS() { memset(rsp->vflag[0], 0, 16); }
#define CLEAR_COMPARE_FLAGS() { memset(rsp->vflag[1], 0, 16); } #define CLEAR_COMPARE_FLAGS() { memset(rsp->vflag[1], 0, 16); }
#define CLEAR_CLIP1_FLAGS() { memset(rsp->vflag[2], 0, 16); } #define CLEAR_CLIP1_FLAGS() { memset(rsp->vflag[2], 0, 16); }
#define CLEAR_ZERO_FLAGS() { memset(rsp->vflag[3], 0, 16); } #define CLEAR_ZERO_FLAGS() { memset(rsp->vflag[3], 0, 16); }
@ -309,11 +309,11 @@ static CPU_INIT( rsp )
rsp->v[regIdx].d[0] = 0; rsp->v[regIdx].d[0] = 0;
rsp->v[regIdx].d[1] = 0; rsp->v[regIdx].d[1] = 0;
} }
CLEAR_CARRY_FLAGS(); CLEAR_CARRY_FLAGS();
CLEAR_COMPARE_FLAGS(); CLEAR_COMPARE_FLAGS();
CLEAR_CLIP1_FLAGS(); CLEAR_CLIP1_FLAGS();
CLEAR_ZERO_FLAGS(); CLEAR_ZERO_FLAGS();
CLEAR_CLIP2_FLAGS(); CLEAR_CLIP2_FLAGS();
//rsp->square_root_res = 0; //rsp->square_root_res = 0;
//rsp->square_root_high = 0; //rsp->square_root_high = 0;
rsp->reciprocal_res = 0; rsp->reciprocal_res = 0;

7860
src/emu/cpu/rsp/rspdrc.c
View File

File diff suppressed because it is too large Load Diff

1
src/emu/cpu/saturn/saturn.c
View File

@ -420,4 +420,3 @@ INT64 saturn_device::Reg64Int(Saturn64 r)
x |= (INT64) r[i] << (4*i); x |= (INT64) r[i] << (4*i);
return x; return x;
} }

1
src/emu/cpu/scudsp/scudsp.c
View File

@ -997,7 +997,6 @@ void scudsp_cpu_device::device_start()
void scudsp_cpu_device::device_reset() void scudsp_cpu_device::device_reset()
{ {
} }
void scudsp_cpu_device::execute_set_input(int irqline, int state) void scudsp_cpu_device::execute_set_input(int irqline, int state)

18
src/emu/cpu/scudsp/scudsp.h
View File

@ -59,7 +59,7 @@ union SCUDSPREG16 {
}; };
class scudsp_cpu_device : public cpu_device, class scudsp_cpu_device : public cpu_device,
public scudsp_interface public scudsp_interface
{ {
public: public:
// construction/destruction // construction/destruction
@ -75,7 +75,7 @@ public:
/* port 3 */ /* port 3 */
DECLARE_READ32_MEMBER( ram_address_r ); DECLARE_READ32_MEMBER( ram_address_r );
DECLARE_WRITE32_MEMBER( ram_address_w ); DECLARE_WRITE32_MEMBER( ram_address_w );
// virtual DECLARE_ADDRESS_MAP(map, 32) = 0; // virtual DECLARE_ADDRESS_MAP(map, 32) = 0;
protected: protected:
// device-level overrides // device-level overrides
@ -108,17 +108,17 @@ private:
address_space_config m_program_config; address_space_config m_program_config;
address_space_config m_data_config; address_space_config m_data_config;
UINT8 m_pc; /* registers */ UINT8 m_pc; /* registers */
UINT32 m_flags; /* flags */ UINT32 m_flags; /* flags */
UINT8 m_ra; UINT8 m_ra;
UINT8 m_ct0,m_ct1,m_ct2,m_ct3; UINT8 m_ct0,m_ct1,m_ct2,m_ct3;
UINT8 m_delay; /* Delay */ UINT8 m_delay; /* Delay */
UINT8 m_top; /*Jump Command memory*/ UINT8 m_top; /*Jump Command memory*/
UINT16 m_lop; /*Counter Register*/ /*12-bits*/ UINT16 m_lop; /*Counter Register*/ /*12-bits*/
SCUDSPREG32 m_rx; /*X-Bus register*/ SCUDSPREG32 m_rx; /*X-Bus register*/
INT64 m_mul; /*Multiplier register*//*48-bits*/ INT64 m_mul; /*Multiplier register*//*48-bits*/
SCUDSPREG32 m_ry; /*Y-Bus register*/ SCUDSPREG32 m_ry; /*Y-Bus register*/
INT64 m_alu; /*ALU register*/ /*48-bits*/ INT64 m_alu; /*ALU register*/ /*48-bits*/
SCUDSPREG16 m_ph; /*ALU high register*/ SCUDSPREG16 m_ph; /*ALU high register*/
SCUDSPREG32 m_pl; /*ALU low register*/ SCUDSPREG32 m_pl; /*ALU low register*/
SCUDSPREG16 m_ach; /*ALU external high register*/ SCUDSPREG16 m_ach; /*ALU external high register*/

2
src/emu/imagedev/serial.h
View File

@ -102,6 +102,6 @@ extern const device_type SERIAL;
#define MCFG_SERIAL_ADD(_tag,_config) \ #define MCFG_SERIAL_ADD(_tag,_config) \
MCFG_DEVICE_ADD(_tag, SERIAL, 0) \ MCFG_DEVICE_ADD(_tag, SERIAL, 0) \
MCFG_DEVICE_CONFIG(_config) MCFG_DEVICE_CONFIG(_config)
#endif /* __IMAGEDEV_SERIAL_H__ */ #endif /* __IMAGEDEV_SERIAL_H__ */

8
src/emu/machine/74145.c
View File

@ -1,11 +1,11 @@
/***************************************************************************** /*****************************************************************************
* *
* TTL74145 * TTL74145
* *
* license: MAME, GPL-2.0+ * license: MAME, GPL-2.0+
* copyright-holders: Dirk Best * copyright-holders: Dirk Best
* *
* BCD-to-Decimal decoder * BCD-to-Decimal decoder
* *
* __ __ * __ __
* 0-| v |-VCC * 0-| v |-VCC

4
src/emu/machine/74145.h
View File

@ -2,8 +2,8 @@
TTL74145 TTL74145
license: MAME, GPL-2.0+ license: MAME, GPL-2.0+
copyright-holders: Dirk Best copyright-holders: Dirk Best
BCD-to-Decimal decoder BCD-to-Decimal decoder

1
src/emu/machine/er59256.c
View File

@ -29,7 +29,6 @@ er59256_device::er59256_device(const machine_config &mconfig, const char *tag, d
m_command(0), m_command(0),
m_flags(0) m_flags(0)
{ {
} }
//------------------------------------------------- //-------------------------------------------------

16
src/emu/machine/i80130.c
View File

@ -142,14 +142,14 @@ machine_config_constructor i80130_device::device_mconfig_additions() const
i80130_device::i80130_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) i80130_device::i80130_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, I80130, "I80130", tag, owner, clock, "i80130", __FILE__), : device_t(mconfig, I80130, "I80130", tag, owner, clock, "i80130", __FILE__),
m_pic(*this, "pic"), m_pic(*this, "pic"),
m_pit(*this, "pit"), m_pit(*this, "pit"),
m_write_irq(*this), m_write_irq(*this),
m_write_ack(*this), m_write_ack(*this),
m_write_lir(*this), m_write_lir(*this),
m_write_systick(*this), m_write_systick(*this),
m_write_delay(*this), m_write_delay(*this),
m_write_baud(*this) m_write_baud(*this)
{ {
} }

4
src/emu/machine/ins8154.c
View File

@ -2,8 +2,8 @@
National Semiconductor INS8154 National Semiconductor INS8154
license: MAME, GPL-2.0+ license: MAME, GPL-2.0+
copyright-holders: Dirk Best copyright-holders: Dirk Best
N-Channel 128-by-8 Bit RAM Input/Output (RAM I/O) N-Channel 128-by-8 Bit RAM Input/Output (RAM I/O)

4
src/emu/machine/ins8154.h
View File

@ -2,8 +2,8 @@
National Semiconductor INS8154 National Semiconductor INS8154
license: MAME, GPL-2.0+ license: MAME, GPL-2.0+
copyright-holders: Dirk Best copyright-holders: Dirk Best
N-Channel 128-by-8 Bit RAM Input/Output (RAM I/O) N-Channel 128-by-8 Bit RAM Input/Output (RAM I/O)

51
src/emu/machine/ncr5380n.c
View File

@ -78,7 +78,7 @@ void ncr5380n_device::device_reset()
void ncr5380n_device::reset_soft() void ncr5380n_device::reset_soft()
{ {
state = IDLE; state = IDLE;
scsi_bus->ctrl_w(scsi_refid, 0, S_ALL); // clear any signals we're driving scsi_bus->ctrl_w(scsi_refid, 0, S_ALL); // clear any signals we're driving
scsi_bus->ctrl_wait(scsi_refid, S_ALL, S_ALL); scsi_bus->ctrl_wait(scsi_refid, S_ALL, S_ALL);
status = 0; status = 0;
drq = false; drq = false;
@ -97,13 +97,13 @@ void ncr5380n_device::scsi_ctrl_changed()
{ {
UINT32 ctrl = scsi_bus->ctrl_r(); UINT32 ctrl = scsi_bus->ctrl_r();
// printf("scsi_ctrl_changed: lines now %x\n", ctrl); // printf("scsi_ctrl_changed: lines now %x\n", ctrl);
/* if ((ctrl & (S_PHASE_MASK|S_SEL|S_BSY)) != last_phase) /* if ((ctrl & (S_PHASE_MASK|S_SEL|S_BSY)) != last_phase)
{ {
printf("phase now %d, REQ %x SEL %x BSY %x\n", ctrl & S_PHASE_MASK, ctrl & S_REQ, ctrl & S_SEL, ctrl & S_BSY); printf("phase now %d, REQ %x SEL %x BSY %x\n", ctrl & S_PHASE_MASK, ctrl & S_REQ, ctrl & S_SEL, ctrl & S_BSY);
last_phase = (S_PHASE_MASK|S_SEL|S_BSY); last_phase = (S_PHASE_MASK|S_SEL|S_BSY);
}*/ }*/
// recalculate phase match // recalculate phase match
m_busstatus &= ~BAS_PHASEMATCH; m_busstatus &= ~BAS_PHASEMATCH;
@ -117,7 +117,7 @@ void ncr5380n_device::scsi_ctrl_changed()
// if BSY drops or the phase goes mismatch, that terminates the DMA // if BSY drops or the phase goes mismatch, that terminates the DMA
if ((!(ctrl & S_BSY)) || !(m_busstatus & BAS_PHASEMATCH)) if ((!(ctrl & S_BSY)) || !(m_busstatus & BAS_PHASEMATCH))
{ {
// printf("BSY dropped or phase mismatch during DMA, ending DMA\n"); // printf("BSY dropped or phase mismatch during DMA, ending DMA\n");
m_mode &= ~MODE_DMA; m_mode &= ~MODE_DMA;
m_busstatus |= BAS_ENDOFDMA; m_busstatus |= BAS_ENDOFDMA;
drq_clear(); drq_clear();
@ -162,7 +162,7 @@ void ncr5380n_device::step(bool timeout)
int win; int win;
for(win=7; win>=0 && !(data & (1<<win)); win--); for(win=7; win>=0 && !(data & (1<<win)); win--);
// printf("arb complete: data %02x win %02x scsi_id %02x\n", data, win, scsi_id); // printf("arb complete: data %02x win %02x scsi_id %02x\n", data, win, scsi_id);
if(win != scsi_id) { if(win != scsi_id) {
scsi_bus->data_w(scsi_refid, 0); scsi_bus->data_w(scsi_refid, 0);
scsi_bus->ctrl_w(scsi_refid, 0, S_ALL); scsi_bus->ctrl_w(scsi_refid, 0, S_ALL);
@ -222,7 +222,7 @@ void ncr5380n_device::step(bool timeout)
state = state & STATE_MASK; state = state & STATE_MASK;
step(false); step(false);
drq_set(); // raise DRQ now that we've completed drq_set(); // raise DRQ now that we've completed
break; break;
default: default:
@ -252,21 +252,21 @@ void ncr5380n_device::recv_byte()
void ncr5380n_device::function_bus_complete() void ncr5380n_device::function_bus_complete()
{ {
state = IDLE; state = IDLE;
// istatus |= I_FUNCTION|I_BUS; // istatus |= I_FUNCTION|I_BUS;
check_irq(); check_irq();
} }
void ncr5380n_device::function_complete() void ncr5380n_device::function_complete()
{ {
state = IDLE; state = IDLE;
// istatus |= I_FUNCTION; // istatus |= I_FUNCTION;
check_irq(); check_irq();
} }
void ncr5380n_device::bus_complete() void ncr5380n_device::bus_complete()
{ {
state = IDLE; state = IDLE;
// istatus |= I_BUS; // istatus |= I_BUS;
check_irq(); check_irq();
} }
@ -309,7 +309,7 @@ WRITE8_MEMBER(ncr5380n_device::icmd_w)
// asserting to drive the data bus? // asserting to drive the data bus?
if ((data & IC_DBUS) && !(m_icommand & IC_DBUS)) if ((data & IC_DBUS) && !(m_icommand & IC_DBUS))
{ {
// printf("%s: driving data bus with %02x\n", tag(), m_outdata); // printf("%s: driving data bus with %02x\n", tag(), m_outdata);
scsi_bus->data_w(scsi_refid, m_outdata); scsi_bus->data_w(scsi_refid, m_outdata);
delay(2); delay(2);
} }
@ -327,7 +327,7 @@ WRITE8_MEMBER(ncr5380n_device::icmd_w)
(data & IC_SEL ? S_SEL : 0) | (data & IC_SEL ? S_SEL : 0) |
(data & IC_ATN ? S_ATN : 0); (data & IC_ATN ? S_ATN : 0);
// printf("%s: changing control lines %04x\n", tag(), newdata); // printf("%s: changing control lines %04x\n", tag(), newdata);
scsi_bus->ctrl_w(scsi_refid, newdata, S_RST|S_ACK|S_BSY|S_SEL|S_ATN); scsi_bus->ctrl_w(scsi_refid, newdata, S_RST|S_ACK|S_BSY|S_SEL|S_ATN);
} }
@ -342,7 +342,7 @@ READ8_MEMBER(ncr5380n_device::mode_r)
WRITE8_MEMBER(ncr5380n_device::mode_w) WRITE8_MEMBER(ncr5380n_device::mode_w)
{ {
// printf("%s: mode_w %02x (%08x)\n", tag(), data, space.device().safe_pc()); // printf("%s: mode_w %02x (%08x)\n", tag(), data, space.device().safe_pc());
// arbitration bit being set? // arbitration bit being set?
if ((data & MODE_ARBITRATE) && !(m_mode & MODE_ARBITRATE)) if ((data & MODE_ARBITRATE) && !(m_mode & MODE_ARBITRATE))
{ {
@ -355,7 +355,7 @@ WRITE8_MEMBER(ncr5380n_device::mode_w)
else else
{ {
seq = 0; seq = 0;
// state = DISC_SEL_ARBITRATION; // state = DISC_SEL_ARBITRATION;
arbitrate(); arbitrate();
} }
} }
@ -370,13 +370,13 @@ WRITE8_MEMBER(ncr5380n_device::mode_w)
READ8_MEMBER(ncr5380n_device::command_r) READ8_MEMBER(ncr5380n_device::command_r)
{ {
// logerror("%s: command_r %02x (%08x)\n", tag(), m_tcommand, space.device().safe_pc()); // logerror("%s: command_r %02x (%08x)\n", tag(), m_tcommand, space.device().safe_pc());
return m_tcommand; return m_tcommand;
} }
WRITE8_MEMBER(ncr5380n_device::command_w) WRITE8_MEMBER(ncr5380n_device::command_w)
{ {
// printf("%s: command_w %02x (%08x)\n", tag(), data, space.device().safe_pc()); // printf("%s: command_w %02x (%08x)\n", tag(), data, space.device().safe_pc());
m_tcommand = data; m_tcommand = data;
// recalculate phase match // recalculate phase match
@ -390,11 +390,11 @@ WRITE8_MEMBER(ncr5380n_device::command_w)
void ncr5380n_device::arbitrate() void ncr5380n_device::arbitrate()
{ {
m_icommand &= ~IC_ARBLOST; m_icommand &= ~IC_ARBLOST;
m_icommand |= IC_ARBITRATION; // set in progress flag m_icommand |= IC_ARBITRATION; // set in progress flag
state = (state & STATE_MASK) | (ARB_COMPLETE << SUB_SHIFT); state = (state & STATE_MASK) | (ARB_COMPLETE << SUB_SHIFT);
scsi_bus->data_w(scsi_refid, m_outdata); scsi_bus->data_w(scsi_refid, m_outdata);
scsi_bus->ctrl_w(scsi_refid, S_BSY, S_BSY); scsi_bus->ctrl_w(scsi_refid, S_BSY, S_BSY);
m_icommand |= IC_BSY; // make sure BSY shows in icommand (Zilog 5380 manual suggests this behavior, Apple II High-Speed SCSI Card firmware requires it) m_icommand |= IC_BSY; // make sure BSY shows in icommand (Zilog 5380 manual suggests this behavior, Apple II High-Speed SCSI Card firmware requires it)
delay(11); delay(11);
} }
@ -420,7 +420,7 @@ READ8_MEMBER(ncr5380n_device::status_r)
(ctrl & S_INP ? ST_IO : 0) | (ctrl & S_INP ? ST_IO : 0) |
(ctrl & S_SEL ? ST_SEL : 0); (ctrl & S_SEL ? ST_SEL : 0);
// printf("%s: status_r %02x (%08x)\n", tag(), res, space.device().safe_pc()); // printf("%s: status_r %02x (%08x)\n", tag(), res, space.device().safe_pc());
return res; return res;
} }
@ -435,7 +435,7 @@ READ8_MEMBER(ncr5380n_device::busandstatus_r)
(ctrl & S_ATN ? BAS_ATN : 0) | (ctrl & S_ATN ? BAS_ATN : 0) |
(ctrl & S_ACK ? BAS_ACK : 0); (ctrl & S_ACK ? BAS_ACK : 0);
// printf("%s: busandstatus_r %02x (%08x)\n", tag(), res, space.device().safe_pc()); // printf("%s: busandstatus_r %02x (%08x)\n", tag(), res, space.device().safe_pc());
return res; return res;
} }
@ -463,7 +463,7 @@ READ8_MEMBER(ncr5380n_device::resetparityirq_r)
WRITE8_MEMBER(ncr5380n_device::startdmainitrx_w) WRITE8_MEMBER(ncr5380n_device::startdmainitrx_w)
{ {
// printf("%02x to start dma initiator Rx\n", data); // printf("%02x to start dma initiator Rx\n", data);
recv_byte(); recv_byte();
} }
@ -547,7 +547,7 @@ READ8_MEMBER(ncr5380n_device::read)
WRITE8_MEMBER(ncr5380n_device::write) WRITE8_MEMBER(ncr5380n_device::write)
{ {
// printf("%x to 5380 @ %x\n", data, offset); // printf("%x to 5380 @ %x\n", data, offset);
switch (offset & 7) switch (offset & 7)
{ {
case 0: case 0:
@ -583,4 +583,3 @@ WRITE8_MEMBER(ncr5380n_device::write)
break; break;
} }
} }

4
src/emu/machine/ram.c
View File

@ -2,8 +2,8 @@
RAM device RAM device
license: MAME, GPL-2.0+ license: MAME, GPL-2.0+
copyright-holders: Dirk Best copyright-holders: Dirk Best
Provides a configurable amount of RAM to drivers Provides a configurable amount of RAM to drivers

4
src/emu/machine/ram.h
View File

@ -2,8 +2,8 @@
RAM device RAM device
license: MAME, GPL-2.0+ license: MAME, GPL-2.0+
copyright-holders: Dirk Best copyright-holders: Dirk Best
Provides a configurable amount of RAM to drivers Provides a configurable amount of RAM to drivers

2
src/emu/mame.c
View File

@ -148,7 +148,7 @@ int mame_execute(emu_options &options, osd_interface &osd)
bool exit_pending = false; bool exit_pending = false;
int error = MAMERR_NONE; int error = MAMERR_NONE;
// We need to preprocess the config files once to determine the web server's configuration // We need to preprocess the config files once to determine the web server's configuration
if (options.read_config()) if (options.read_config())
{ {
options.revert(OPTION_PRIORITY_INI); options.revert(OPTION_PRIORITY_INI);

7
src/emu/netlist/devices/net_lib.c
View File

@ -340,7 +340,6 @@ NETLIB_START(nic7448)
NETLIB_UPDATE(nic7448) NETLIB_UPDATE(nic7448)
{ {
if (INPLOGIC(m_BIQ) && !INPLOGIC(m_LTQ)) if (INPLOGIC(m_BIQ) && !INPLOGIC(m_LTQ))
{ {
sub.update_outputs(8); sub.update_outputs(8);
@ -502,7 +501,6 @@ NETLIB_UPDATE(nic7474)
NETLIB_START(nic7474) NETLIB_START(nic7474)
{ {
register_sub(sub, "sub"); register_sub(sub, "sub");
register_input(sub, "CLK", sub.m_clk, net_input_t::INP_STATE_LH); register_input(sub, "CLK", sub.m_clk, net_input_t::INP_STATE_LH);
register_input("D", m_D); register_input("D", m_D);
@ -817,7 +815,7 @@ NETLIB_UPDATE(nic74107A)
else if (!sub.m_Q2) else if (!sub.m_Q2)
sub.m_clk.activate_hl(); sub.m_clk.activate_hl();
//if (!sub.m_Q2 & INPLOGIC(m_clrQ)) //if (!sub.m_Q2 & INPLOGIC(m_clrQ))
// sub.m_clk.activate_hl(); // sub.m_clk.activate_hl();
} }
NETLIB_START(nic74153) NETLIB_START(nic74153)
@ -977,7 +975,7 @@ static const net_device_t_base_factory *netregistry[] =
ENTRY(netdev_analog_const, NETDEV_ANALOG_CONST) ENTRY(netdev_analog_const, NETDEV_ANALOG_CONST)
ENTRY(netdev_logic_input, NETDEV_LOGIC_INPUT) ENTRY(netdev_logic_input, NETDEV_LOGIC_INPUT)
ENTRY(netdev_analog_input, NETDEV_ANALOG_INPUT) ENTRY(netdev_analog_input, NETDEV_ANALOG_INPUT)
ENTRY(netdev_log, NETDEV_LOG) ENTRY(netdev_log, NETDEV_LOG)
ENTRY(netdev_clock, NETDEV_CLOCK) ENTRY(netdev_clock, NETDEV_CLOCK)
ENTRY(netdev_mainclock, NETDEV_MAINCLOCK) ENTRY(netdev_mainclock, NETDEV_MAINCLOCK)
ENTRY(netdev_analog_callback,NETDEV_CALLBACK) ENTRY(netdev_analog_callback,NETDEV_CALLBACK)
@ -1040,4 +1038,3 @@ net_device_t *net_create_device_by_name(const astring &name, netlist_setup_t &se
fatalerror("Class %s required for IC %s not found!\n", name.cstr(), icname.cstr()); fatalerror("Class %s required for IC %s not found!\n", name.cstr(), icname.cstr());
return NULL; // appease code analysis return NULL; // appease code analysis
} }

16
src/emu/netlist/devices/net_lib.h
View File

@ -57,7 +57,7 @@
#include "nld_7400.h" #include "nld_7400.h"
// this is a bad hack // this is a bad hack
#define USE_OLD7493 (0) #define USE_OLD7493 (0)
// ---------------------------------------------------------------------------------------- // ----------------------------------------------------------------------------------------
// Special chips // Special chips
@ -87,8 +87,8 @@
NET_CONNECT(_name, S, _S) \ NET_CONNECT(_name, S, _S) \
NET_CONNECT(_name, R, _R) NET_CONNECT(_name, R, _R)
#define NETDEV_LOG(_name, _I) \ #define NETDEV_LOG(_name, _I) \
NET_REGISTER_DEV(netdev_log, _name) \ NET_REGISTER_DEV(netdev_log, _name) \
NET_CONNECT(_name, I, _I) NET_CONNECT(_name, I, _I)
@ -356,7 +356,7 @@ NETLIB_SUBDEVICE(nic7474sub,
); );
NETLIB_DEVICE(nic7474, NETLIB_DEVICE(nic7474,
NETLIB_NAME(nic7474sub) sub; NETLIB_NAME(nic7474sub) sub;
ttl_input_t m_D; ttl_input_t m_D;
ttl_input_t m_clrQ; ttl_input_t m_clrQ;
@ -389,7 +389,7 @@ NETLIB_SUBDEVICE(nic74107Asub,
); );
NETLIB_DEVICE(nic74107A, NETLIB_DEVICE(nic74107A,
NETLIB_NAME(nic74107Asub) sub; NETLIB_NAME(nic74107Asub) sub;
ttl_input_t m_J; ttl_input_t m_J;
ttl_input_t m_K; ttl_input_t m_K;
@ -400,7 +400,7 @@ NETLIB_DEVICE(nic74107A,
class NETLIB_NAME(nic74107) : public NETLIB_NAME(nic74107A) class NETLIB_NAME(nic74107) : public NETLIB_NAME(nic74107A)
{ {
public: public:
NETLIB_NAME(nic74107) () NETLIB_NAME(nic74107) ()
: NETLIB_NAME(nic74107A) () {} : NETLIB_NAME(nic74107A) () {}
}; };
@ -480,7 +480,7 @@ NETLIB_SUBDEVICE(nic9316_sub,
); );
NETLIB_DEVICE(nic9316, NETLIB_DEVICE(nic9316,
NETLIB_NAME(nic9316_sub) sub; NETLIB_NAME(nic9316_sub) sub;
ttl_input_t m_ENP; ttl_input_t m_ENP;
ttl_input_t m_ENT; ttl_input_t m_ENT;
ttl_input_t m_CLRQ; ttl_input_t m_CLRQ;
@ -543,7 +543,7 @@ NETLIB_SUBDEVICE(nic7448_sub,
NETLIB_DEVICE(nic7448, NETLIB_DEVICE(nic7448,
NETLIB_NAME(nic7448_sub) sub; NETLIB_NAME(nic7448_sub) sub;
ttl_input_t m_LTQ; ttl_input_t m_LTQ;
ttl_input_t m_BIQ; ttl_input_t m_BIQ;

2
src/emu/netlist/devices/nld_7400.c
View File

@ -2,5 +2,3 @@
* nld_7400.c * nld_7400.c
* *
*/ */

6
src/emu/netlist/devices/nld_7400.h
View File

@ -35,9 +35,9 @@
#define NLD_7400_H_ #define NLD_7400_H_
#define TTL_7400_NAND(_name, _A, _B) \ #define TTL_7400_NAND(_name, _A, _B) \
NET_REGISTER_DEV(7400, _name) \ NET_REGISTER_DEV(7400, _name) \
NET_CONNECT(_name, A, _A) \ NET_CONNECT(_name, A, _A) \
NET_CONNECT(_name, B, _B) NET_CONNECT(_name, B, _B)
NETLIB_SIGNAL(7400, 2, 0, 0); NETLIB_SIGNAL(7400, 2, 0, 0);

402
src/emu/netlist/devices/nld_signal.h
View File

@ -15,12 +15,12 @@
// ---------------------------------------------------------------------------------------- // ----------------------------------------------------------------------------------------
#define NETLIB_SIGNAL(_name, _num_input, _check, _invert) \ #define NETLIB_SIGNAL(_name, _num_input, _check, _invert) \
class NETLIB_NAME(_name) : public net_signal_t<_num_input, _check, _invert> \ class NETLIB_NAME(_name) : public net_signal_t<_num_input, _check, _invert> \
{ \ { \
public: \ public: \
ATTR_COLD NETLIB_NAME(_name) () \ ATTR_COLD NETLIB_NAME(_name) () \
: net_signal_t<_num_input, _check, _invert>() { } \ : net_signal_t<_num_input, _check, _invert>() { } \
} }
// ---------------------------------------------------------------------------------------- // ----------------------------------------------------------------------------------------
// net_signal_t // net_signal_t
@ -30,46 +30,46 @@ template <int _numdev>
class net_signal_base_t : public net_device_t class net_signal_base_t : public net_device_t
{ {
public: public:
net_signal_base_t() net_signal_base_t()
: net_device_t(), m_active(1) { } : net_device_t(), m_active(1) { }
ATTR_COLD void start() ATTR_COLD void start()
{ {
const char *sIN[8] = { "I1", "I2", "I3", "I4", "I5", "I6", "I7", "I8" }; const char *sIN[8] = { "I1", "I2", "I3", "I4", "I5", "I6", "I7", "I8" };
register_output("Q", m_Q); register_output("Q", m_Q);
for (int i=0; i < _numdev; i++) for (int i=0; i < _numdev; i++)
{ {
register_input(sIN[i], m_i[i], net_input_t::INP_STATE_ACTIVE); register_input(sIN[i], m_i[i], net_input_t::INP_STATE_ACTIVE);
} }
m_Q.initial(1); m_Q.initial(1);
} }
#if (USE_DEACTIVE_DEVICE) #if (USE_DEACTIVE_DEVICE)
ATTR_HOT void inc_active() ATTR_HOT void inc_active()
{ {
if (m_active == 0) if (m_active == 0)
{ {
update(); update();
} }
m_active++; m_active++;
} }
ATTR_HOT void dec_active() ATTR_HOT void dec_active()
{ {
m_active--; m_active--;
if (m_active == 0) if (m_active == 0)
{ {
for (int i = 0; i< _numdev; i++) for (int i = 0; i< _numdev; i++)
m_i[i].inactivate(); m_i[i].inactivate();
} }
} }
#endif #endif
public: public:
ttl_input_t m_i[_numdev]; ttl_input_t m_i[_numdev];
ttl_output_t m_Q; ttl_output_t m_Q;
INT8 m_active; INT8 m_active;
}; };
@ -77,72 +77,72 @@ template <int _numdev, int _check, int _invert>
class net_signal_t : public net_device_t class net_signal_t : public net_device_t
{ {
public: public:
net_signal_t() net_signal_t()
: net_device_t(), m_active(1) : net_device_t(), m_active(1)
{ {
m_Q.initial(1); m_Q.initial(1);
} }
ATTR_COLD void start() ATTR_COLD void start()
{ {
const char *sIN[8] = { "A", "B", "C", "D", "E", "F", "G", "H" }; const char *sIN[8] = { "A", "B", "C", "D", "E", "F", "G", "H" };
register_output("Q", m_Q); register_output("Q", m_Q);
for (int i=0; i < _numdev; i++) for (int i=0; i < _numdev; i++)
{ {
register_input(sIN[i], m_i[i], net_input_t::INP_STATE_ACTIVE); register_input(sIN[i], m_i[i], net_input_t::INP_STATE_ACTIVE);
} }
} }
#if (USE_DEACTIVE_DEVICE) #if (USE_DEACTIVE_DEVICE)
ATTR_HOT void inc_active() ATTR_HOT void inc_active()
{ {
if (m_active == 0) if (m_active == 0)
{ {
update(); update();
} }
m_active++; m_active++;
} }
ATTR_HOT void dec_active() ATTR_HOT void dec_active()
{ {
m_active--; m_active--;
if (m_active == 0) if (m_active == 0)
{ {
for (int i = 0; i< _numdev; i++) for (int i = 0; i< _numdev; i++)
m_i[i].inactivate(); m_i[i].inactivate();
} }
} }
#endif #endif
virtual void update() virtual void update()
{ {
static const netlist_time times[2] = { NLTIME_FROM_NS(22), NLTIME_FROM_NS(15) }; static const netlist_time times[2] = { NLTIME_FROM_NS(22), NLTIME_FROM_NS(15) };
int pos = -1; int pos = -1;
for (int i = 0; i< _numdev; i++) for (int i = 0; i< _numdev; i++)
{ {
this->m_i[i].activate(); this->m_i[i].activate();
if (INPLOGIC(this->m_i[i]) == _check) if (INPLOGIC(this->m_i[i]) == _check)
{ {
OUTLOGIC(this->m_Q, _check ^ (1 ^ _invert), times[_check]);// ? 15000 : 22000); OUTLOGIC(this->m_Q, _check ^ (1 ^ _invert), times[_check]);// ? 15000 : 22000);
pos = i; pos = i;
break; break;
} }
} }
if (pos >= 0) if (pos >= 0)
{ {
for (int i = 0; i < _numdev; i++) for (int i = 0; i < _numdev; i++)
if (i != pos) if (i != pos)
this->m_i[i].inactivate(); this->m_i[i].inactivate();
} else } else
OUTLOGIC(this->m_Q,_check ^ (_invert), times[1-_check]);// ? 22000 : 15000); OUTLOGIC(this->m_Q,_check ^ (_invert), times[1-_check]);// ? 22000 : 15000);
} }
public: public:
ttl_input_t m_i[_numdev]; ttl_input_t m_i[_numdev];
ttl_output_t m_Q; ttl_output_t m_Q;
INT8 m_active; INT8 m_active;
}; };
#if 1 #if 1
@ -150,71 +150,71 @@ template <int _check, int _invert>
class xx_net_signal_t: public net_device_t class xx_net_signal_t: public net_device_t
{ {
public: public:
xx_net_signal_t() xx_net_signal_t()
: net_device_t(), m_active(1) : net_device_t(), m_active(1)
{ {
m_Q.initial(1); m_Q.initial(1);
} }
ATTR_COLD void start() ATTR_COLD void start()
{ {
const char *sIN[2] = { "A", "B" }; const char *sIN[2] = { "A", "B" };
register_output("Q", m_Q); register_output("Q", m_Q);
for (int i=0; i < 2; i++) for (int i=0; i < 2; i++)
{ {
register_input(sIN[i], m_i[i], net_input_t::INP_STATE_ACTIVE); register_input(sIN[i], m_i[i], net_input_t::INP_STATE_ACTIVE);
} }
} }
#if (USE_DEACTIVE_DEVICE) #if (USE_DEACTIVE_DEVICE)
ATTR_HOT void inc_active() ATTR_HOT void inc_active()
{ {
if (m_active == 0) if (m_active == 0)
{ {
update(); update();
} }
m_active++; m_active++;
} }
ATTR_HOT void dec_active() ATTR_HOT void dec_active()
{ {
m_active--; m_active--;
if (m_active == 0) if (m_active == 0)
{ {
m_i[0].inactivate(); m_i[0].inactivate();
m_i[1].inactivate(); m_i[1].inactivate();
} }
} }
#endif #endif
ATTR_HOT ATTR_ALIGN void update() ATTR_HOT ATTR_ALIGN void update()
{ {
const netlist_time times[2] = { NLTIME_FROM_NS(22), NLTIME_FROM_NS(15) }; const netlist_time times[2] = { NLTIME_FROM_NS(22), NLTIME_FROM_NS(15) };
int res = _invert ^ 1 ^_check; int res = _invert ^ 1 ^_check;
m_i[0].activate(); m_i[0].activate();
m_i[1].activate(); m_i[1].activate();
if (INPLOGIC(m_i[0]) ^ _check) if (INPLOGIC(m_i[0]) ^ _check)
{ {
if (INPLOGIC(m_i[1]) ^ _check) if (INPLOGIC(m_i[1]) ^ _check)
{ {
res = _invert ^ _check; res = _invert ^ _check;
} }
else else
m_i[0].inactivate(); m_i[0].inactivate();
} else { } else {
if (INPLOGIC(m_i[1]) ^ _check) if (INPLOGIC(m_i[1]) ^ _check)
m_i[1].inactivate(); m_i[1].inactivate();
} }
OUTLOGIC(m_Q, res, times[(res & 1) ^ 1]);// ? 22000 : 15000); OUTLOGIC(m_Q, res, times[(res & 1) ^ 1]);// ? 22000 : 15000);
} }
public: public:
ttl_input_t m_i[2]; ttl_input_t m_i[2];
ttl_output_t m_Q; ttl_output_t m_Q;
INT8 m_active; INT8 m_active;
}; };
#endif #endif
@ -226,58 +226,58 @@ template <UINT8 _check, UINT8 _invert>
class net_signal_t<3, _check, _invert> : public net_device_t class net_signal_t<3, _check, _invert> : public net_device_t
{ {
public: public:
net_signal_t() : net_device_t(), m_active(1) { } net_signal_t() : net_device_t(), m_active(1) { }
ATTR_COLD void start() ATTR_COLD void start()
{ {
const char *sIN[3] = { "I1", "I2", "I3" }; const char *sIN[3] = { "I1", "I2", "I3" };
register_output("Q", m_Q); register_output("Q", m_Q);
for (int i=0; i < 3; i++) for (int i=0; i < 3; i++)
{ {
register_input(sIN[i], m_i[i], net_input_t::INP_STATE_ACTIVE); register_input(sIN[i], m_i[i], net_input_t::INP_STATE_ACTIVE);
} }
m_Q.initial(1); m_Q.initial(1);
} }
ATTR_HOT ATTR_ALIGN void update() ATTR_HOT ATTR_ALIGN void update()
{ {
const netlist_time times[2] = { NLTIME_FROM_NS(22), NLTIME_FROM_NS(15) }; const netlist_time times[2] = { NLTIME_FROM_NS(22), NLTIME_FROM_NS(15) };
//const UINT8 res_tab[4] = {1, 1, 1, 0 }; //const UINT8 res_tab[4] = {1, 1, 1, 0 };
//const UINT8 ai1[4] = {0, 1, 0, 0 }; //const UINT8 ai1[4] = {0, 1, 0, 0 };
//const UINT8 ai2[4] = {1, 0, 1, 0 }; //const UINT8 ai2[4] = {1, 0, 1, 0 };
UINT8 res = _invert ^ 1 ^_check; UINT8 res = _invert ^ 1 ^_check;
m_i[0].activate(); m_i[0].activate();
if (INPLOGIC(m_i[0]) ^ _check) if (INPLOGIC(m_i[0]) ^ _check)
{ {
m_i[1].activate(); m_i[1].activate();
if (INPLOGIC(m_i[1]) ^ _check) if (INPLOGIC(m_i[1]) ^ _check)
{ {
m_i[2].activate(); m_i[2].activate();
if (INPLOGIC(m_i[2]) ^ _check) if (INPLOGIC(m_i[2]) ^ _check)
{ {
res = _invert ^ _check; res = _invert ^ _check;
} }
else else
m_i[1].inactivate(); m_i[1].inactivate();
} }
else else
{ {
if (INPLOGIC(m_i[2]) ^ _check) if (INPLOGIC(m_i[2]) ^ _check)
m_i[2].inactivate(); m_i[2].inactivate();
m_i[0].inactivate(); m_i[0].inactivate();
} }
} else { } else {
if (INPLOGIC(m_i[1]) ^ _check) if (INPLOGIC(m_i[1]) ^ _check)
m_i[1].inactivate(); m_i[1].inactivate();
} }
OUTLOGIC(m_Q, res, times[1 - res]);// ? 22000 : 15000); OUTLOGIC(m_Q, res, times[1 - res]);// ? 22000 : 15000);
} }
public: public:
ttl_input_t m_i[3]; ttl_input_t m_i[3];
ttl_output_t m_Q; ttl_output_t m_Q;
INT8 m_active; INT8 m_active;
}; };
@ -288,8 +288,8 @@ template <int _check, int _invert>
class net_signal_t<2, _check, _invert> : public xx_net_signal_t<_check, _invert> class net_signal_t<2, _check, _invert> : public xx_net_signal_t<_check, _invert>
{ {
public: public:
net_signal_t() net_signal_t()
: xx_net_signal_t<_check, _invert>() { } : xx_net_signal_t<_check, _invert>() { }
}; };

10
src/emu/netlist/devices/nld_system.h
View File

@ -17,12 +17,12 @@
// ---------------------------------------------------------------------------------------- // ----------------------------------------------------------------------------------------
#define NETDEV_TTL_CONST(_name, _v) \ #define NETDEV_TTL_CONST(_name, _v) \
NET_REGISTER_DEV(netdev_ttl_const, _name) \ NET_REGISTER_DEV(netdev_ttl_const, _name) \
NETDEV_PARAM(_name.CONST, _v) NETDEV_PARAM(_name.CONST, _v)
#define NETDEV_ANALOG_CONST(_name, _v) \ #define NETDEV_ANALOG_CONST(_name, _v) \
NET_REGISTER_DEV(netdev_analog_const, _name) \ NET_REGISTER_DEV(netdev_analog_const, _name) \
NETDEV_PARAM(_name.CONST, _v) NETDEV_PARAM(_name.CONST, _v)
// ---------------------------------------------------------------------------------------- // ----------------------------------------------------------------------------------------
// netdev_*_const // netdev_*_const
@ -58,7 +58,7 @@ NETLIB_DEVICE_WITH_PARAMS(netdev_mainclock,
class NETLIB_NAME(netdev_analog_callback) : public net_device_t class NETLIB_NAME(netdev_analog_callback) : public net_device_t
{ {
public: public:
NETLIB_NAME(netdev_analog_callback)() NETLIB_NAME(netdev_analog_callback)()
: net_device_t() { } : net_device_t() { }
ATTR_COLD void start() ATTR_COLD void start()

23
src/emu/netlist/nl_base.c
View File

@ -13,9 +13,9 @@
netlist_base_t::netlist_base_t() netlist_base_t::netlist_base_t()
: m_mainclock(NULL), : m_mainclock(NULL),
m_time_ps(netlist_time::zero), m_time_ps(netlist_time::zero),
m_rem(0), m_rem(0),
m_div(NETLIST_DIV) m_div(NETLIST_DIV)
{ {
} }
@ -30,11 +30,11 @@ ATTR_COLD void netlist_base_t::set_mainclock_dev(NETLIB_NAME(netdev_mainclock) *
ATTR_COLD void netlist_base_t::reset() ATTR_COLD void netlist_base_t::reset()
{ {
m_time_ps = netlist_time::zero; m_time_ps = netlist_time::zero;
m_rem = 0; m_rem = 0;
m_queue.clear(); m_queue.clear();
if (m_mainclock != NULL) if (m_mainclock != NULL)
m_mainclock->m_Q.set_time(netlist_time::zero); m_mainclock->m_Q.set_time(netlist_time::zero);
} }
@ -195,9 +195,9 @@ ATTR_HOT ATTR_ALIGN const netlist_sig_t netlist_core_device_t::INPLOGIC_PASSIVE(
net_device_t::net_device_t() net_device_t::net_device_t()
: netlist_core_device_t(), : netlist_core_device_t(),
m_inputs(20), m_inputs(20),
m_setup(NULL), m_setup(NULL),
m_variable_input_count(false) m_variable_input_count(false)
{ {
} }
@ -311,7 +311,6 @@ ATTR_HOT inline void net_output_t::update_dev(const net_input_t *inp, const UINT
ATTR_HOT inline void net_output_t::update_devs() ATTR_HOT inline void net_output_t::update_devs()
{ {
assert(m_num_cons != 0); assert(m_num_cons != 0);
const UINT32 masks[4] = { 1, 5, 3, 1 }; const UINT32 masks[4] = { 1, 5, 3, 1 };

52
src/emu/netlist/nl_base.h
View File

@ -38,7 +38,7 @@ typedef delegate<void ()> net_update_delegate;
#define NETLIB_UPDATE(_chip) ATTR_HOT ATTR_ALIGN void NETLIB_NAME(_chip) :: update(void) #define NETLIB_UPDATE(_chip) ATTR_HOT ATTR_ALIGN void NETLIB_NAME(_chip) :: update(void)
#define NETLIB_START(_chip) ATTR_COLD void NETLIB_NAME(_chip) :: start(void) #define NETLIB_START(_chip) ATTR_COLD void NETLIB_NAME(_chip) :: start(void)
//#define NETLIB_CONSTRUCTOR(_chip) ATTR_COLD _chip :: _chip (netlist_setup_t &setup, const char *name) //#define NETLIB_CONSTRUCTOR(_chip) ATTR_COLD _chip :: _chip (netlist_setup_t &setup, const char *name)
// : net_device_t(setup, name) // : net_device_t(setup, name)
#define NETLIB_UPDATE_PARAM(_chip) ATTR_HOT ATTR_ALIGN void NETLIB_NAME(_chip) :: update_param(void) #define NETLIB_UPDATE_PARAM(_chip) ATTR_HOT ATTR_ALIGN void NETLIB_NAME(_chip) :: update_param(void)
#define NETLIB_FUNC_VOID(_chip, _name, _params) ATTR_HOT ATTR_ALIGN inline void NETLIB_NAME(_chip) :: _name _params #define NETLIB_FUNC_VOID(_chip, _name, _params) ATTR_HOT ATTR_ALIGN inline void NETLIB_NAME(_chip) :: _name _params
@ -47,8 +47,8 @@ typedef delegate<void ()> net_update_delegate;
class NETLIB_NAME(_name) : public net_device_t \ class NETLIB_NAME(_name) : public net_device_t \
{ \ { \
public: \ public: \
NETLIB_NAME(_name) () \ NETLIB_NAME(_name) () \
: net_device_t() { } \ : net_device_t() { } \
protected: \ protected: \
ATTR_HOT void update(); \ ATTR_HOT void update(); \
ATTR_HOT void start(); \ ATTR_HOT void start(); \
@ -59,9 +59,9 @@ typedef delegate<void ()> net_update_delegate;
class NETLIB_NAME(_name) : public netlist_core_device_t \ class NETLIB_NAME(_name) : public netlist_core_device_t \
{ \ { \
public: \ public: \
NETLIB_NAME(_name) () \ NETLIB_NAME(_name) () \
: netlist_core_device_t() \ : netlist_core_device_t() \
{ } \ { } \
/*protected:*/ \ /*protected:*/ \
ATTR_HOT void update(); \ ATTR_HOT void update(); \
_priv \ _priv \
@ -71,8 +71,8 @@ typedef delegate<void ()> net_update_delegate;
class NETLIB_NAME(_name) : public net_device_t \ class NETLIB_NAME(_name) : public net_device_t \
{ \ { \
public: \ public: \
NETLIB_NAME(_name) () \ NETLIB_NAME(_name) () \
: net_device_t() { } \ : net_device_t() { } \
ATTR_HOT void update_param(); \ ATTR_HOT void update_param(); \
ATTR_HOT void update(); \ ATTR_HOT void update(); \
ATTR_HOT void start(); \ ATTR_HOT void start(); \
@ -319,7 +319,7 @@ public:
: net_output_t(OUTPUT | SIGNAL_DIGITAL) : net_output_t(OUTPUT | SIGNAL_DIGITAL)
{ {
// Default to TTL // Default to TTL
m_low_V = 0.1; // these depend on sinked/sourced current. Values should be suitable for typical applications. m_low_V = 0.1; // these depend on sinked/sourced current. Values should be suitable for typical applications.
m_high_V = 4.8; m_high_V = 4.8;
} }
@ -774,34 +774,34 @@ ATTR_HOT inline const bool analog_input_t::is_highz() const
class net_device_t_base_factory class net_device_t_base_factory
{ {
public: public:
net_device_t_base_factory(const astring &name, const astring &classname) net_device_t_base_factory(const astring &name, const astring &classname)
: m_name(name), m_classname(classname) : m_name(name), m_classname(classname)
{} {}
virtual ~net_device_t_base_factory() {} virtual ~net_device_t_base_factory() {}
virtual net_device_t *Create() const = 0; virtual net_device_t *Create() const = 0;
const astring &name() const { return m_name; } const astring &name() const { return m_name; }
const astring &classname() const { return m_classname; } const astring &classname() const { return m_classname; }
protected: protected:
astring m_name; /* device name */ astring m_name; /* device name */
astring m_classname; /* device class name */ astring m_classname; /* device class name */
}; };
template <class C> template <class C>
class net_device_t_factory : public net_device_t_base_factory class net_device_t_factory : public net_device_t_base_factory
{ {
public: public:
net_device_t_factory(const astring &name, const astring &classname) net_device_t_factory(const astring &name, const astring &classname)
: net_device_t_base_factory(name, classname) { } : net_device_t_base_factory(name, classname) { }
net_device_t *Create() const net_device_t *Create() const
{ {
net_device_t *r = new C(); net_device_t *r = new C();
//r->init(setup, name); //r->init(setup, name);
return r; return r;
} }
}; };
net_device_t *net_create_device_by_classname(const astring &classname, netlist_setup_t &setup, const astring &icname); net_device_t *net_create_device_by_classname(const astring &classname, netlist_setup_t &setup, const astring &icname);

24
src/emu/netlist/nl_config.h
View File

@ -16,27 +16,27 @@
// SETUP // SETUP
//============================================================ //============================================================
#define USE_DELEGATES (0) #define USE_DELEGATES (0)
/* /*
* The next options needs -Wno-pmf-conversions to compile and gcc * The next options needs -Wno-pmf-conversions to compile and gcc
* This is intended for non-mame usage. * This is intended for non-mame usage.
* *
*/ */
#define USE_PMFDELEGATES (0) #define USE_PMFDELEGATES (0)
// Next if enabled adds 20% performance ... but is not guaranteed to be absolutely timing correct. // Next if enabled adds 20% performance ... but is not guaranteed to be absolutely timing correct.
#define USE_DEACTIVE_DEVICE (0) #define USE_DEACTIVE_DEVICE (0)
#define OUTPUT_MAX_CONNECTIONS (48) #define OUTPUT_MAX_CONNECTIONS (48)
// Use nano-second resolution - Sufficient for now // Use nano-second resolution - Sufficient for now
#define NETLIST_INTERNAL_RES (U64(1000000000)) #define NETLIST_INTERNAL_RES (U64(1000000000))
#define NETLIST_DIV_BITS (0) #define NETLIST_DIV_BITS (0)
//#define NETLIST_INTERNAL_RES (U64(1000000000000)) //#define NETLIST_INTERNAL_RES (U64(1000000000000))
//#define NETLIST_DIV_BITS (10) //#define NETLIST_DIV_BITS (10)
#define NETLIST_DIV (U64(1) << NETLIST_DIV_BITS) #define NETLIST_DIV (U64(1) << NETLIST_DIV_BITS)
#define NETLIST_MASK (NETLIST_DIV-1) #define NETLIST_MASK (NETLIST_DIV-1)
#define NETLIST_CLOCK (NETLIST_INTERNAL_RES / NETLIST_DIV) #define NETLIST_CLOCK (NETLIST_INTERNAL_RES / NETLIST_DIV)
#define NETLIST_HIGHIMP_V (1.23456e20) /* some voltage we should never see */ #define NETLIST_HIGHIMP_V (1.23456e20) /* some voltage we should never see */
@ -54,7 +54,7 @@ typedef delegate<void (const double)> netlist_output_delegate;
#define NL_VERBOSE (0) #define NL_VERBOSE (0)
#define NL_KEEP_STATISTICS (0) #define NL_KEEP_STATISTICS (0)
#define FATAL_ERROR_AFTER_NS (0) //(1000) #define FATAL_ERROR_AFTER_NS (0) //(1000)
#if (NL_VERBOSE) #if (NL_VERBOSE)
#define NL_VERBOSE_OUT(x) printf x #define NL_VERBOSE_OUT(x) printf x

4
src/emu/netlist/nl_lists.h
View File

@ -118,8 +118,8 @@ public:
} }
// profiling // profiling
INT32 m_prof_start; INT32 m_prof_start;
INT32 m_prof_end; INT32 m_prof_end;
INT32 m_prof_sortmove; INT32 m_prof_sortmove;
INT32 m_prof_sort; INT32 m_prof_sort;
private: private:

3
src/emu/netlist/nl_setup.c
View File

@ -87,7 +87,7 @@ void netlist_setup_t::remove_dev(const astring &name)
void netlist_setup_t::register_callback(const astring &devname, netlist_output_delegate delegate) void netlist_setup_t::register_callback(const astring &devname, netlist_output_delegate delegate)
{ {
NETLIB_NAME(netdev_analog_callback) *dev = (NETLIB_NAME(netdev_analog_callback) *) m_devices.find(devname); NETLIB_NAME(netdev_analog_callback) *dev = (NETLIB_NAME(netdev_analog_callback) *) m_devices.find(devname);
if (dev == NULL) if (dev == NULL)
fatalerror("did not find device %s\n", devname.cstr()); fatalerror("did not find device %s\n", devname.cstr());
dev->register_callback(delegate); dev->register_callback(delegate);
@ -315,4 +315,3 @@ void netlist_setup_t::print_stats()
printf("Queue Move %15d\n", m_netlist.m_queue.m_prof_sortmove); printf("Queue Move %15d\n", m_netlist.m_queue.m_prof_sortmove);
} }
} }

1
src/emu/netlist/nl_setup.h
View File

@ -36,7 +36,6 @@
#define NETLIST_START(_name) \ #define NETLIST_START(_name) \
ATTR_COLD void NETLIST_NAME(_name)(netlist_setup_t &netlist) \ ATTR_COLD void NETLIST_NAME(_name)(netlist_setup_t &netlist) \
{ {
#define NETLIST_END } #define NETLIST_END }
#define NETLIST_INCLUDE(_name) \ #define NETLIST_INCLUDE(_name) \

2
src/emu/sound/2608intf.c
View File

@ -257,5 +257,3 @@ const rom_entry *ym2608_device::device_rom_region() const
{ {
return ROM_NAME( ym2608 ); return ROM_NAME( ym2608 );
} }

6
src/emu/video/dl1416.c
View File

@ -1,9 +1,9 @@
/***************************************************************************** /*****************************************************************************
* *
* DL1416 * DL1416
* *
* license: MAME, GPL-2.0+ * license: MAME, GPL-2.0+
* copyright-holders: Dirk Best * copyright-holders: Dirk Best
* *
* 4-Digit 16-Segment Alphanumeric Intelligent Display * 4-Digit 16-Segment Alphanumeric Intelligent Display
* with Memory/Decoder/Driver * with Memory/Decoder/Driver

6
src/emu/video/dl1416.h
View File

@ -1,9 +1,9 @@
/***************************************************************************** /*****************************************************************************
* *
* DL1416 * DL1416
* *
* license: MAME, GPL-2.0+ * license: MAME, GPL-2.0+
* copyright-holders: Dirk Best * copyright-holders: Dirk Best
* *
* 4-Digit 16-Segment Alphanumeric Intelligent Display * 4-Digit 16-Segment Alphanumeric Intelligent Display
* with Memory/Decoder/Driver * with Memory/Decoder/Driver

14
src/emu/video/fixfreq.c
View File

@ -2,7 +2,7 @@
fixfreq.h fixfreq.h
2013 Couriersud 2013 Couriersud
Fixed frequency monochrome monitor emulation Fixed frequency monochrome monitor emulation
@ -57,13 +57,13 @@ const device_type FIXFREQ = &device_creator<fixedfreq_device>;
fixedfreq_device::fixedfreq_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source) fixedfreq_device::fixedfreq_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source)
: device_t(mconfig, type, name, tag, owner, clock, shortname, source), : device_t(mconfig, type, name, tag, owner, clock, shortname, source),
device_video_interface(mconfig, *this, false) device_video_interface(mconfig, *this, false)
{ {
} }
fixedfreq_device::fixedfreq_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) fixedfreq_device::fixedfreq_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, FIXFREQ, "FIXFREQ", tag, owner, clock, "fixfreq", __FILE__), : device_t(mconfig, FIXFREQ, "FIXFREQ", tag, owner, clock, "fixfreq", __FILE__),
device_video_interface(mconfig, *this, false) device_video_interface(mconfig, *this, false)
{ {
} }
@ -85,7 +85,6 @@ void fixedfreq_device::device_config_complete()
void fixedfreq_device::device_start() void fixedfreq_device::device_start()
{ {
m_htotal = 0; m_htotal = 0;
m_vtotal = 0; m_vtotal = 0;
@ -167,8 +166,8 @@ void fixedfreq_device::recompute_parameters(bool postload)
void fixedfreq_device::update_screen_parameters(attotime refresh) void fixedfreq_device::update_screen_parameters(attotime refresh)
{ {
rectangle visarea( rectangle visarea(
// m_hsync - m_hvisible, // m_hsync - m_hvisible,
// m_hsync - 1 , // m_hsync - 1 ,
m_hbackporch - m_hfrontporch, m_hbackporch - m_hfrontporch,
m_hbackporch - m_hfrontporch + m_hvisible - 1, m_hbackporch - m_hfrontporch + m_hvisible - 1,
m_vbackporch - m_vfrontporch, m_vbackporch - m_vfrontporch,
@ -222,7 +221,6 @@ UINT32 fixedfreq_device::screen_update(screen_device &screen, bitmap_rgb32 &bitm
void fixedfreq_device::update_vid(double newval, attotime cur_time) void fixedfreq_device::update_vid(double newval, attotime cur_time)
{ {
bitmap_rgb32 *bm = m_bitmap[m_cur_bm]; bitmap_rgb32 *bm = m_bitmap[m_cur_bm];
int pixels = round((cur_time - m_line_time).as_double() / m_clock_period.as_double()); int pixels = round((cur_time - m_line_time).as_double() / m_clock_period.as_double());
@ -292,5 +290,3 @@ void fixedfreq_device::update_vid(double newval, attotime cur_time)
/***************************************************************************/ /***************************************************************************/

5
src/emu/video/fixfreq.h
View File

@ -45,10 +45,9 @@ extern fixedfreq_interface fixedfreq_mode_ntsc720;
// ======================> vga_device // ======================> vga_device
class fixedfreq_device : public device_t, class fixedfreq_device : public device_t,
public device_video_interface, public device_video_interface,
public fixedfreq_interface public fixedfreq_interface
{ {
public: public:
// construction/destruction // construction/destruction
fixedfreq_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock); fixedfreq_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);

10
src/emu/video/mb_vcu.c
View File

@ -64,9 +64,9 @@ inline void mb_vcu_device::write_byte(offs_t address, UINT8 data)
mb_vcu_device::mb_vcu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) mb_vcu_device::mb_vcu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, MB_VCU, "Mazer Blazer custom VCU", tag, owner, clock, "mb_vcu", __FILE__), : device_t(mconfig, MB_VCU, "Mazer Blazer custom VCU", tag, owner, clock, "mb_vcu", __FILE__),
device_memory_interface(mconfig, *this), device_memory_interface(mconfig, *this),
device_video_interface(mconfig, *this), device_video_interface(mconfig, *this),
m_space_config("videoram", ENDIANNESS_LITTLE, 8, 19, 0, NULL, *ADDRESS_MAP_NAME(mb_vcu_vram)) m_space_config("videoram", ENDIANNESS_LITTLE, 8, 19, 0, NULL, *ADDRESS_MAP_NAME(mb_vcu_vram))
{ {
} }
@ -144,7 +144,7 @@ void mb_vcu_device::device_reset()
//************************************************************************** //**************************************************************************
// READ/WRITE HANDLERS // READ/WRITE HANDLERS
//************************************************************************** //**************************************************************************
// UINT8 *pcg = memregion("sub2")->base(); // UINT8 *pcg = memregion("sub2")->base();
READ8_MEMBER( mb_vcu_device::read_ram ) READ8_MEMBER( mb_vcu_device::read_ram )
{ {
@ -296,7 +296,7 @@ READ8_MEMBER( mb_vcu_device::load_set_clr )
{ {
int xi,yi; int xi,yi;
int dstx,dsty; int dstx,dsty;
// UINT8 dot; // UINT8 dot;
int bits = 0; int bits = 0;
if(m_mode == 0x13 || m_mode == 0x03) if(m_mode == 0x13 || m_mode == 0x03)
{ {

6
src/emu/video/mb_vcu.h
View File

@ -35,9 +35,9 @@ struct mb_vcu_interface
// ======================> mb_vcu_device // ======================> mb_vcu_device
class mb_vcu_device : public device_t, class mb_vcu_device : public device_t,
public device_memory_interface, public device_memory_interface,
public device_video_interface, public device_video_interface,
public mb_vcu_interface public mb_vcu_interface
{ {
public: public:
// construction/destruction // construction/destruction

4
src/emu/video/vector.c
View File

@ -131,13 +131,13 @@ const device_type VECTOR = &device_creator<vector_device>;
vector_device::vector_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source) vector_device::vector_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source)
: device_t(mconfig, type, name, tag, owner, clock, shortname, source), : device_t(mconfig, type, name, tag, owner, clock, shortname, source),
device_video_interface(mconfig, *this) device_video_interface(mconfig, *this)
{ {
} }
vector_device::vector_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) vector_device::vector_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, VECTOR, "VECTOR", tag, owner, clock, "vector", __FILE__), : device_t(mconfig, VECTOR, "VECTOR", tag, owner, clock, "vector", __FILE__),
device_video_interface(mconfig, *this) device_video_interface(mconfig, *this)
{ {
} }

3
src/emu/video/vector.h
View File

@ -31,9 +31,8 @@ struct point
}; };
class vector_device : public device_t, class vector_device : public device_t,
public device_video_interface public device_video_interface
{ {
public: public:
// construction/destruction // construction/destruction
vector_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock); vector_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);

2
src/emu/webengine.c
View File

@ -92,7 +92,7 @@ int web_engine::json_game_handler(struct mg_connection *conn)
data["parent"] = m_machine->system().parent; data["parent"] = m_machine->system().parent;
data["source_file"] = m_machine->system().source_file; data["source_file"] = m_machine->system().source_file;
data["flags"] = m_machine->system().flags; data["flags"] = m_machine->system().flags;
data["ispaused"] = m_machine->paused(); data["ispaused"] = m_machine->paused();
Json::FastWriter writer; Json::FastWriter writer;
const char *json = writer.write(data).c_str(); const char *json = writer.write(data).c_str();

112
src/lib/softfloat/fsincos.c
View File

@ -576,70 +576,70 @@ extern floatx80 propagateFloatx80NaN( floatx80 a, floatx80 b );
floatx80 floatx80_scale(floatx80 a, floatx80 b) floatx80 floatx80_scale(floatx80 a, floatx80 b)
{ {
sbits32 aExp, bExp; sbits32 aExp, bExp;
bits64 aSig, bSig; bits64 aSig, bSig;
// handle unsupported extended double-precision floating encodings // handle unsupported extended double-precision floating encodings
/* if (floatx80_is_unsupported(a) || floatx80_is_unsupported(b)) /* if (floatx80_is_unsupported(a) || floatx80_is_unsupported(b))
{ {
float_raise(float_flag_invalid); float_raise(float_flag_invalid);
return floatx80_default_nan; return floatx80_default_nan;
}*/ }*/
aSig = extractFloatx80Frac(a); aSig = extractFloatx80Frac(a);
aExp = extractFloatx80Exp(a); aExp = extractFloatx80Exp(a);
int aSign = extractFloatx80Sign(a); int aSign = extractFloatx80Sign(a);
bSig = extractFloatx80Frac(b); bSig = extractFloatx80Frac(b);
bExp = extractFloatx80Exp(b); bExp = extractFloatx80Exp(b);
int bSign = extractFloatx80Sign(b); int bSign = extractFloatx80Sign(b);
if (aExp == 0x7FFF) { if (aExp == 0x7FFF) {
if ((bits64) (aSig<<1) || ((bExp == 0x7FFF) && (bits64) (bSig<<1))) if ((bits64) (aSig<<1) || ((bExp == 0x7FFF) && (bits64) (bSig<<1)))
{ {
return propagateFloatx80NaN(a, b); return propagateFloatx80NaN(a, b);
} }
if ((bExp == 0x7FFF) && bSign) { if ((bExp == 0x7FFF) && bSign) {
float_raise(float_flag_invalid); float_raise(float_flag_invalid);
return floatx80_default_nan; return floatx80_default_nan;
} }
if (bSig && (bExp == 0)) float_raise(float_flag_denormal); if (bSig && (bExp == 0)) float_raise(float_flag_denormal);
return a; return a;
} }
if (bExp == 0x7FFF) { if (bExp == 0x7FFF) {
if ((bits64) (bSig<<1)) return propagateFloatx80NaN(a, b); if ((bits64) (bSig<<1)) return propagateFloatx80NaN(a, b);
if ((aExp | aSig) == 0) { if ((aExp | aSig) == 0) {
if (! bSign) { if (! bSign) {
float_raise(float_flag_invalid); float_raise(float_flag_invalid);
return floatx80_default_nan; return floatx80_default_nan;
} }
return a; return a;
} }
if (aSig && (aExp == 0)) float_raise(float_flag_denormal); if (aSig && (aExp == 0)) float_raise(float_flag_denormal);
if (bSign) return packFloatx80(aSign, 0, 0); if (bSign) return packFloatx80(aSign, 0, 0);
return packFloatx80(aSign, 0x7FFF, U64(0x8000000000000000)); return packFloatx80(aSign, 0x7FFF, U64(0x8000000000000000));
} }
if (aExp == 0) { if (aExp == 0) {
if (aSig == 0) return a; if (aSig == 0) return a;
float_raise(float_flag_denormal); float_raise(float_flag_denormal);
normalizeFloatx80Subnormal(aSig, &aExp, &aSig); normalizeFloatx80Subnormal(aSig, &aExp, &aSig);
} }
if (bExp == 0) { if (bExp == 0) {
if (bSig == 0) return a; if (bSig == 0) return a;
float_raise(float_flag_denormal); float_raise(float_flag_denormal);
normalizeFloatx80Subnormal(bSig, &bExp, &bSig); normalizeFloatx80Subnormal(bSig, &bExp, &bSig);
} }
if (bExp > 0x400E) { if (bExp > 0x400E) {
/* generate appropriate overflow/underflow */ /* generate appropriate overflow/underflow */
return roundAndPackFloatx80(80, aSign, return roundAndPackFloatx80(80, aSign,
bSign ? -0x3FFF : 0x7FFF, aSig, 0); bSign ? -0x3FFF : 0x7FFF, aSig, 0);
} }
if (bExp < 0x3FFF) return a; if (bExp < 0x3FFF) return a;
int shiftCount = 0x403E - bExp; int shiftCount = 0x403E - bExp;
bSig >>= shiftCount; bSig >>= shiftCount;
sbits32 scale = bSig; sbits32 scale = bSig;
if (bSign) scale = -scale; /* -32768..32767 */ if (bSign) scale = -scale; /* -32768..32767 */
return return
roundAndPackFloatx80(80, aSign, aExp+scale, aSig, 0); roundAndPackFloatx80(80, aSign, aExp+scale, aSig, 0);
} }

4
src/lib/softfloat/softfloat.h
View File

@ -89,8 +89,8 @@ enum {
*----------------------------------------------------------------------------*/ *----------------------------------------------------------------------------*/
extern int8 float_exception_flags; extern int8 float_exception_flags;
enum { enum {
float_flag_invalid = 0x01, float_flag_denormal = 0x02, float_flag_divbyzero = 0x04, float_flag_overflow = 0x08, float_flag_invalid = 0x01, float_flag_denormal = 0x02, float_flag_divbyzero = 0x04, float_flag_overflow = 0x08,
float_flag_underflow = 0x10, float_flag_inexact = 0x20 float_flag_underflow = 0x10, float_flag_inexact = 0x20
}; };
/*---------------------------------------------------------------------------- /*----------------------------------------------------------------------------

4
src/mame/audio/pleiads.c
View File

@ -57,8 +57,8 @@ void pleiads_sound_device::device_config_complete()
void pleiads_sound_device::device_start() void pleiads_sound_device::device_start()
{ {
/* The real values are _unknown_! /* The real values are _unknown_!
* I took the ones from Naughty Boy / Pop Flamer * I took the ones from Naughty Boy / Pop Flamer
*/ */
/* charge 10u?? (C??) through 330K?? (R??) -> 3.3s */ /* charge 10u?? (C??) through 330K?? (R??) -> 3.3s */
m_pa5.charge_time = 3.3; m_pa5.charge_time = 3.3;

16
src/mame/audio/s11c_bg.c
View File

@ -12,12 +12,12 @@ const device_type S11C_BG = &device_creator<s11c_bg_device>;
s11c_bg_device::s11c_bg_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) s11c_bg_device::s11c_bg_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig,S11C_BG,"Williams System 11C background music",tag,owner,clock, "s11c_bg", __FILE__), : device_t(mconfig,S11C_BG,"Williams System 11C background music",tag,owner,clock, "s11c_bg", __FILE__),
m_cpu(*this,"bgcpu"), m_cpu(*this,"bgcpu"),
m_ym2151(*this,"ym2151"), m_ym2151(*this,"ym2151"),
m_hc55516(*this,"hc55516_bg"), m_hc55516(*this,"hc55516_bg"),
m_dac1(*this,"dac1"), m_dac1(*this,"dac1"),
m_pia40(*this,"pia40"), m_pia40(*this,"pia40"),
m_cpubank(*this,"bgbank") m_cpubank(*this,"bgbank")
{ {
} }
@ -54,12 +54,12 @@ WRITE8_MEMBER( s11c_bg_device::pia40_pa_w )
WRITE_LINE_MEMBER( s11c_bg_device::pia40_cb2_w) WRITE_LINE_MEMBER( s11c_bg_device::pia40_cb2_w)
{ {
// m_pia34->cb1_w(state); // To Widget MCB1 through CPU Data interface // m_pia34->cb1_w(state); // To Widget MCB1 through CPU Data interface
} }
WRITE8_MEMBER( s11c_bg_device::pia40_pb_w ) WRITE8_MEMBER( s11c_bg_device::pia40_pb_w )
{ {
// m_pia34->portb_w(data); // m_pia34->portb_w(data);
} }
WRITE_LINE_MEMBER( s11c_bg_device::pia40_ca2_w) WRITE_LINE_MEMBER( s11c_bg_device::pia40_ca2_w)

7
src/mame/audio/segasnd.c
View File

@ -220,9 +220,9 @@ static ADDRESS_MAP_START( speech_portmap, AS_IO, 8, driver_device )
AM_RANGE(0x00, 0xff) AM_DEVREAD("segaspeech", speech_sound_device, rom_r) AM_RANGE(0x00, 0xff) AM_DEVREAD("segaspeech", speech_sound_device, rom_r)
AM_RANGE(0x00, 0xff) AM_DEVWRITE("speech", sp0250_device, write) AM_RANGE(0x00, 0xff) AM_DEVWRITE("speech", sp0250_device, write)
AM_RANGE(MCS48_PORT_P1, MCS48_PORT_P1) AM_DEVREADWRITE("segaspeech", speech_sound_device, p1_r, p1_w) AM_RANGE(MCS48_PORT_P1, MCS48_PORT_P1) AM_DEVREADWRITE("segaspeech", speech_sound_device, p1_r, p1_w)
AM_RANGE(MCS48_PORT_P2, MCS48_PORT_P2) AM_DEVWRITE("segaspeech", speech_sound_device, p2_w) AM_RANGE(MCS48_PORT_P2, MCS48_PORT_P2) AM_DEVWRITE("segaspeech", speech_sound_device, p2_w)
AM_RANGE(MCS48_PORT_T0, MCS48_PORT_T0) AM_DEVREAD("segaspeech", speech_sound_device, t0_r) AM_RANGE(MCS48_PORT_T0, MCS48_PORT_T0) AM_DEVREAD("segaspeech", speech_sound_device, t0_r)
AM_RANGE(MCS48_PORT_T1, MCS48_PORT_T1) AM_DEVREAD("segaspeech", speech_sound_device, t1_r) AM_RANGE(MCS48_PORT_T1, MCS48_PORT_T1) AM_DEVREAD("segaspeech", speech_sound_device, t1_r)
ADDRESS_MAP_END ADDRESS_MAP_END
@ -310,7 +310,6 @@ void usb_sound_device::device_config_complete()
void usb_sound_device::device_start() void usb_sound_device::device_start()
{ {
filter_state temp; filter_state temp;
int tchan, tgroup; int tchan, tgroup;

28
src/mame/audio/segasnd.h
View File

@ -119,7 +119,7 @@ public:
usb_sound_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source); usb_sound_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source);
usb_sound_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock); usb_sound_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
~usb_sound_device() {} ~usb_sound_device() {}
required_device<i8035_device> m_ourcpu; /* CPU index of the 8035 */ required_device<i8035_device> m_ourcpu; /* CPU index of the 8035 */
DECLARE_READ8_MEMBER( status_r ); DECLARE_READ8_MEMBER( status_r );
DECLARE_WRITE8_MEMBER( data_w ); DECLARE_WRITE8_MEMBER( data_w );
@ -148,18 +148,18 @@ protected:
private: private:
// internal state // internal state
sound_stream *m_stream; /* output stream */ sound_stream *m_stream; /* output stream */
device_t *m_maincpu; device_t *m_maincpu;
UINT8 m_in_latch; /* input latch */ UINT8 m_in_latch; /* input latch */
UINT8 m_out_latch; /* output latch */ UINT8 m_out_latch; /* output latch */
UINT8 m_last_p2_value; /* current P2 output value */ UINT8 m_last_p2_value; /* current P2 output value */
UINT8 * m_program_ram; /* pointer to program RAM */ UINT8 * m_program_ram; /* pointer to program RAM */
UINT8 * m_work_ram; /* pointer to work RAM */ UINT8 * m_work_ram; /* pointer to work RAM */
UINT8 m_work_ram_bank; /* currently selected work RAM bank */ UINT8 m_work_ram_bank; /* currently selected work RAM bank */
UINT8 m_t1_clock; /* T1 clock value */ UINT8 m_t1_clock; /* T1 clock value */
UINT8 m_t1_clock_mask; /* T1 clock mask (configured via jumpers) */ UINT8 m_t1_clock_mask; /* T1 clock mask (configured via jumpers) */
timer8253 m_timer_group[3]; /* 3 groups of timers */ timer8253 m_timer_group[3]; /* 3 groups of timers */
UINT8 m_timer_mode[3]; /* mode control for each group */ UINT8 m_timer_mode[3]; /* mode control for each group */
UINT32 m_noise_shift; UINT32 m_noise_shift;
UINT8 m_noise_state; UINT8 m_noise_state;
UINT8 m_noise_subcount; UINT8 m_noise_subcount;
@ -179,7 +179,7 @@ class usb_rom_sound_device : public usb_sound_device
{ {
public: public:
usb_rom_sound_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock); usb_rom_sound_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
~usb_rom_sound_device() {} ~usb_rom_sound_device() {}
protected: protected:
// device-level overrides // device-level overrides

16
src/mame/audio/wpcsnd.c
View File

@ -13,13 +13,13 @@ const device_type WPCSND = &device_creator<wpcsnd_device>;
wpcsnd_device::wpcsnd_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) wpcsnd_device::wpcsnd_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig,WPCSND,"Williams WPC Sound",tag,owner,clock, "wpcsnd", __FILE__), : device_t(mconfig,WPCSND,"Williams WPC Sound",tag,owner,clock, "wpcsnd", __FILE__),
m_cpu(*this,"bgcpu"), m_cpu(*this,"bgcpu"),
m_ym2151(*this,"ym2151"), m_ym2151(*this,"ym2151"),
m_hc55516(*this,"hc55516"), m_hc55516(*this,"hc55516"),
m_dac(*this,"dac"), m_dac(*this,"dac"),
m_cpubank(*this,"rombank"), m_cpubank(*this,"rombank"),
m_fixedbank(*this,"fixed"), m_fixedbank(*this,"fixed"),
m_reply_cb(*this) m_reply_cb(*this)
{ {
} }
@ -164,6 +164,4 @@ WRITE8_MEMBER(wpcsnd_device::latch_w)
WRITE8_MEMBER(wpcsnd_device::volume_w) WRITE8_MEMBER(wpcsnd_device::volume_w)
{ {
} }

2
src/mame/drivers/8080bw.c
View File

@ -4016,7 +4016,7 @@ ROM_START( cosmicmo ) /* Roms stamped with "II", denoting version II */
ROM_LOAD( "ii-7.h7", 0x4800, 0x0400, CRC(6a13b15b) SHA1(dc03a6c3e938cfd08d16bd1660899f951ba72ea2) ) ROM_LOAD( "ii-7.h7", 0x4800, 0x0400, CRC(6a13b15b) SHA1(dc03a6c3e938cfd08d16bd1660899f951ba72ea2) )
/* There is no colour circuits or tracking on the game pcb, its a black and white composite video signal only */ /* There is no colour circuits or tracking on the game pcb, its a black and white composite video signal only */
/* The PCB is etched with Universal 7814A-3 */ /* The PCB is etched with Universal 7814A-3 */
ROM_END ROM_END
ROM_START( cosmicm2 ) ROM_START( cosmicm2 )

18
src/mame/drivers/cps1.c
View File

@ -4842,14 +4842,14 @@ ROM_END
/* B-Board 89625B-1 */ /* B-Board 89625B-1 */
ROM_START( ffightj3 ) ROM_START( ffightj3 )
ROM_REGION( CODE_SIZE, "maincpu", 0 ) /* 68000 code */ ROM_REGION( CODE_SIZE, "maincpu", 0 ) /* 68000 code */
ROM_LOAD16_BYTE( "ff_36.12f", 0x00000, 0x20000, CRC(ed988977) SHA1(c718e989206bd2b68832c8fcb5667397d500ebac) ) // == ffu_30.11f ROM_LOAD16_BYTE( "ff_36.12f", 0x00000, 0x20000, CRC(ed988977) SHA1(c718e989206bd2b68832c8fcb5667397d500ebac) ) // == ffu_30.11f
ROM_LOAD16_BYTE( "ffj_42(__ffightj3).12h", 0x00001, 0x20000, CRC(07bf1c21) SHA1(f21a939fd92607c7f54816dedbcb3c5818cf4183) ) // == ffu_35.11h ROM_LOAD16_BYTE( "ffj_42(__ffightj3).12h", 0x00001, 0x20000, CRC(07bf1c21) SHA1(f21a939fd92607c7f54816dedbcb3c5818cf4183) ) // == ffu_35.11h
ROM_LOAD16_BYTE( "ff_37.13f", 0x40000, 0x20000, CRC(dba5a476) SHA1(2f0176dd050f9630b914f1c1ca5d96215bcf567f) ) // == ffu_31.12f ROM_LOAD16_BYTE( "ff_37.13f", 0x40000, 0x20000, CRC(dba5a476) SHA1(2f0176dd050f9630b914f1c1ca5d96215bcf567f) ) // == ffu_31.12f
ROM_LOAD16_BYTE( "ffj_43(__ffightj3).13h", 0x40001, 0x20000, CRC(fbeca028) SHA1(85eeed6a25b401d73d12896ca1e2bf7402c921ee) ) ROM_LOAD16_BYTE( "ffj_43(__ffightj3).13h", 0x40001, 0x20000, CRC(fbeca028) SHA1(85eeed6a25b401d73d12896ca1e2bf7402c921ee) )
ROM_LOAD16_BYTE( "ff_34.10f", 0x80000, 0x20000, CRC(0c8dc3fc) SHA1(edcce3efd9cdd131ef0c96df15a68722d5c3498e) ) // == ff-32m.8h ROM_LOAD16_BYTE( "ff_34.10f", 0x80000, 0x20000, CRC(0c8dc3fc) SHA1(edcce3efd9cdd131ef0c96df15a68722d5c3498e) ) // == ff-32m.8h
ROM_LOAD16_BYTE( "ffj_40.10h", 0x80001, 0x20000, CRC(8075bab9) SHA1(f9c7405133f6fc5557c90e60e8ccc459e4f6fd7d) ) // == ff-32m.8h ROM_LOAD16_BYTE( "ffj_40.10h", 0x80001, 0x20000, CRC(8075bab9) SHA1(f9c7405133f6fc5557c90e60e8ccc459e4f6fd7d) ) // == ff-32m.8h
ROM_LOAD16_BYTE( "ff_35.11f", 0xc0000, 0x20000, CRC(4a934121) SHA1(3982c261582755a0eac340d6d7ed96e6c263c8b6) ) // == ff-32m.8h ROM_LOAD16_BYTE( "ff_35.11f", 0xc0000, 0x20000, CRC(4a934121) SHA1(3982c261582755a0eac340d6d7ed96e6c263c8b6) ) // == ff-32m.8h
ROM_LOAD16_BYTE( "ffj_41.11h", 0xc0001, 0x20000, CRC(2af68154) SHA1(7d549cb38650b4b79c68ad6d0dfcefdd62be4e99) ) // == ff-32m.8h ROM_LOAD16_BYTE( "ffj_41.11h", 0xc0001, 0x20000, CRC(2af68154) SHA1(7d549cb38650b4b79c68ad6d0dfcefdd62be4e99) ) // == ff-32m.8h
ROM_REGION( 0x200000, "gfx", 0 ) ROM_REGION( 0x200000, "gfx", 0 )
ROMX_LOAD( "ff_09.4b", 0x000000, 0x20000, CRC(5b116d0d) SHA1(a24e829fdfa043bd27b508d7cc0788ad80fd180e) , ROM_SKIP(7) ) ROMX_LOAD( "ff_09.4b", 0x000000, 0x20000, CRC(5b116d0d) SHA1(a24e829fdfa043bd27b508d7cc0788ad80fd180e) , ROM_SKIP(7) )
@ -4886,7 +4886,7 @@ ROM_START( ffightj3 )
ROM_REGION( 0x0200, "bboardplds", 0 ) ROM_REGION( 0x0200, "bboardplds", 0 )
ROM_LOAD( "s222b.1a", 0x0000, 0x0117, NO_DUMP ) ROM_LOAD( "s222b.1a", 0x0000, 0x0117, NO_DUMP )
ROM_LOAD( "lwio.12e", 0x0000, 0x0117, CRC(ad52b90c) SHA1(f0fd6aeea515ee449320fe15684e6b3ab7f97bf4) ) // pal verification required ROM_LOAD( "lwio.12e", 0x0000, 0x0117, CRC(ad52b90c) SHA1(f0fd6aeea515ee449320fe15684e6b3ab7f97bf4) ) // pal verification required
ROM_END ROM_END
/* B-Board 91634B-2 */ /* B-Board 91634B-2 */
@ -5864,7 +5864,7 @@ ROM_END
ROM_START( sf2ed ) ROM_START( sf2ed )
ROM_REGION( CODE_SIZE, "maincpu", 0 ) /* 68000 code */ ROM_REGION( CODE_SIZE, "maincpu", 0 ) /* 68000 code */
ROM_LOAD16_BYTE( "sf2e_30d.11e", 0x00000, 0x20000, CRC(4bb2657c) SHA1(b2d077296b77be7db371f953b7fc446a67d8a9d6) ) ROM_LOAD16_BYTE( "sf2e_30d.11e", 0x00000, 0x20000, CRC(4bb2657c) SHA1(b2d077296b77be7db371f953b7fc446a67d8a9d6) )
ROM_LOAD16_BYTE( "sf2e_37d.11f", 0x00001, 0x20000, CRC(102f4561) SHA1(2fc77cd3b2ecf8fadc4f8614cb200cf2cba4c616) ) //only rom different from sf2ud ROM_LOAD16_BYTE( "sf2e_37d.11f", 0x00001, 0x20000, CRC(102f4561) SHA1(2fc77cd3b2ecf8fadc4f8614cb200cf2cba4c616) ) //only rom different from sf2ud
ROM_LOAD16_BYTE( "sf2e_31d.12e", 0x40000, 0x20000, CRC(d57b67d7) SHA1(43d0b47c9fada8d9b445caa4b96ac8493061aa8b) ) ROM_LOAD16_BYTE( "sf2e_31d.12e", 0x40000, 0x20000, CRC(d57b67d7) SHA1(43d0b47c9fada8d9b445caa4b96ac8493061aa8b) )
ROM_LOAD16_BYTE( "sf2e_38d.12f", 0x40001, 0x20000, CRC(9c8916ef) SHA1(a4629356a816454bcc1d7b41e70e147d4769a682) ) ROM_LOAD16_BYTE( "sf2e_38d.12f", 0x40001, 0x20000, CRC(9c8916ef) SHA1(a4629356a816454bcc1d7b41e70e147d4769a682) )
ROM_LOAD16_BYTE( "sf2e_28d.9e", 0x80000, 0x20000, CRC(175819d1) SHA1(c98b6b7af4e57735dbfb3d1e61ba1bfb9f145d33) ) ROM_LOAD16_BYTE( "sf2e_28d.9e", 0x80000, 0x20000, CRC(175819d1) SHA1(c98b6b7af4e57735dbfb3d1e61ba1bfb9f145d33) )

4
src/mame/drivers/cps2.c
View File

@ -8179,8 +8179,8 @@ ROM_END
ROM_START( xmvsfar1 ) ROM_START( xmvsfar1 )
ROM_REGION( CODE_SIZE, "maincpu", 0 ) /* 68000 code */ ROM_REGION( CODE_SIZE, "maincpu", 0 ) /* 68000 code */
ROM_LOAD16_WORD_SWAP( "xvsa.03", 0x000000, 0x80000, CRC(520054df) SHA1(98fd30aeb4cc9120607434f258a1c00204d75d63) ) /* Missing revision letter */ ROM_LOAD16_WORD_SWAP( "xvsa.03", 0x000000, 0x80000, CRC(520054df) SHA1(98fd30aeb4cc9120607434f258a1c00204d75d63) ) /* Missing revision letter */
ROM_LOAD16_WORD_SWAP( "xvsa.04", 0x080000, 0x80000, CRC(13086e55) SHA1(0d9a4b2a4278a98423155702c66df3f2e1e8ef56) ) /* Missing revision letter */ ROM_LOAD16_WORD_SWAP( "xvsa.04", 0x080000, 0x80000, CRC(13086e55) SHA1(0d9a4b2a4278a98423155702c66df3f2e1e8ef56) ) /* Missing revision letter */
ROM_LOAD16_WORD_SWAP( "xvs.05a", 0x100000, 0x80000, CRC(7db6025d) SHA1(2d74f48f83f45359bfaca28ab686625766af12ee) ) ROM_LOAD16_WORD_SWAP( "xvs.05a", 0x100000, 0x80000, CRC(7db6025d) SHA1(2d74f48f83f45359bfaca28ab686625766af12ee) )
ROM_LOAD16_WORD_SWAP( "xvs.06a", 0x180000, 0x80000, CRC(e8e2c75c) SHA1(929408cb5d98e95cec75ea58e4701b0cbdbcd016) ) ROM_LOAD16_WORD_SWAP( "xvs.06a", 0x180000, 0x80000, CRC(e8e2c75c) SHA1(929408cb5d98e95cec75ea58e4701b0cbdbcd016) )
ROM_LOAD16_WORD_SWAP( "xvs.07", 0x200000, 0x80000, CRC(08f0abed) SHA1(ef16c376232dba63b0b9bc3aa0640f9001ccb68a) ) ROM_LOAD16_WORD_SWAP( "xvs.07", 0x200000, 0x80000, CRC(08f0abed) SHA1(ef16c376232dba63b0b9bc3aa0640f9001ccb68a) )

2
src/mame/drivers/cps3.c
View File

@ -3853,5 +3853,3 @@ GAME( 1999, jojobaner1,jojoba, jojoba, cps3_jojo, cps3_state, jojoba, ROT0
GAME( 1999, cps3boot, 0, sfiii3, cps3_jojo, cps3_state, cps3boot, ROT0, "bootleg", "CPS3 Multi-game bootleg for HD6417095 type SH2 (New Generation, 3rd Strike, JoJo's Venture, JoJo's Bizarre Adventure, Red Earth)", GAME_IMPERFECT_GRAPHICS ) GAME( 1999, cps3boot, 0, sfiii3, cps3_jojo, cps3_state, cps3boot, ROT0, "bootleg", "CPS3 Multi-game bootleg for HD6417095 type SH2 (New Generation, 3rd Strike, JoJo's Venture, JoJo's Bizarre Adventure, Red Earth)", GAME_IMPERFECT_GRAPHICS )
// this does not play Red Earth or the 2 Jojo games. New Generation and 3rd Strike have been heavily modified to work with the separate code/data encryption a dead cart / 2nd Impact cart has. Selecting the other games will give an 'invalid CD' message. // this does not play Red Earth or the 2 Jojo games. New Generation and 3rd Strike have been heavily modified to work with the separate code/data encryption a dead cart / 2nd Impact cart has. Selecting the other games will give an 'invalid CD' message.
GAME( 1999, cps3boota, cps3boot, sfiii3, cps3_jojo, cps3_state, sfiii2, ROT0, "bootleg", "CPS3 Multi-game bootleg for dead security cart (New Generation, 2nd Impact, 3rd Strike)", GAME_IMPERFECT_GRAPHICS ) GAME( 1999, cps3boota, cps3boot, sfiii3, cps3_jojo, cps3_state, sfiii2, ROT0, "bootleg", "CPS3 Multi-game bootleg for dead security cart (New Generation, 2nd Impact, 3rd Strike)", GAME_IMPERFECT_GRAPHICS )

6
src/mame/drivers/gunpey.c
View File

@ -4,9 +4,9 @@
Gunpey (c) 2000 Banpresto Gunpey (c) 2000 Banpresto
TODO: TODO:
- compression scheme used by the Axell video chip, game is playable but several gfxs are - compression scheme used by the Axell video chip, game is playable but several gfxs are
still broken. still broken.
============================================================================================= =============================================================================================
ASM code study: ASM code study:

6
src/mame/drivers/hideseek.c
View File

@ -49,7 +49,6 @@ public:
void hideseek_state::video_start() void hideseek_state::video_start()
{ {
} }
@ -66,7 +65,7 @@ static ADDRESS_MAP_START( mem_map, AS_PROGRAM, 32, hideseek_state )
AM_RANGE(0x01000000, 0x01ffffff) AM_RAM // DRAM AM_RANGE(0x01000000, 0x01ffffff) AM_RAM // DRAM
AM_RANGE(0xffff8000, 0xffff87ff) AM_RAM // HD64F7045F28 i/os AM_RANGE(0xffff8000, 0xffff87ff) AM_RAM // HD64F7045F28 i/os
AM_RANGE(0xfffff000, 0xffffffff) AM_RAM // on-chip RAM AM_RANGE(0xfffff000, 0xffffffff) AM_RAM // on-chip RAM
// AM_RANGE(0x06000000, 0x07ffffff) AM_ROM AM_REGION("blit_data", 0) // AM_RANGE(0x06000000, 0x07ffffff) AM_ROM AM_REGION("blit_data", 0)
ADDRESS_MAP_END ADDRESS_MAP_END
@ -98,7 +97,7 @@ static MACHINE_CONFIG_START( hideseek, hideseek_state )
/* basic machine hardware */ /* basic machine hardware */
MCFG_CPU_ADD("maincpu", SH2, 7372800 * 4 ) MCFG_CPU_ADD("maincpu", SH2, 7372800 * 4 )
MCFG_CPU_PROGRAM_MAP(mem_map) MCFG_CPU_PROGRAM_MAP(mem_map)
// MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", hideseek_state, hideseek_scanline, "screen", 0, 1) // MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", hideseek_state, hideseek_scanline, "screen", 0, 1)
/* video hardware */ /* video hardware */
MCFG_SCREEN_ADD("screen", RASTER) MCFG_SCREEN_ADD("screen", RASTER)
@ -148,7 +147,6 @@ ROM_END
DRIVER_INIT_MEMBER(hideseek_state,hideseek) DRIVER_INIT_MEMBER(hideseek_state,hideseek)
{ {
} }

22
src/mame/drivers/igs017.c
View File

@ -75,7 +75,7 @@ public:
optional_device<igs025_device> m_igs025; // Mj Shuang Long Qiang Zhu 2 optional_device<igs025_device> m_igs025; // Mj Shuang Long Qiang Zhu 2
optional_device<igs022_device> m_igs022; // Mj Shuang Long Qiang Zhu 2 optional_device<igs022_device> m_igs022; // Mj Shuang Long Qiang Zhu 2
void igs025_to_igs022_callback( void ); void igs025_to_igs022_callback( void );
int m_toggle; int m_toggle;
int m_debug_addr; int m_debug_addr;
@ -1098,11 +1098,11 @@ DRIVER_INIT_MEMBER(igs017_state,lhzb2)
lhzb2_patch_rom(); lhzb2_patch_rom();
// install and configure protection device(s) // install and configure protection device(s)
// m_maincpu->space(AS_PROGRAM).install_readwrite_handler(0xda5610, 0xda5613, read16_delegate(FUNC(igs025_device::killbld_igs025_prot_r), (igs025_device*)m_igs025), write16_delegate(FUNC(igs025_device::killbld_igs025_prot_w), (igs025_device*)m_igs025)); // m_maincpu->space(AS_PROGRAM).install_readwrite_handler(0xda5610, 0xda5613, read16_delegate(FUNC(igs025_device::killbld_igs025_prot_r), (igs025_device*)m_igs025), write16_delegate(FUNC(igs025_device::killbld_igs025_prot_w), (igs025_device*)m_igs025));
// m_igs022->m_sharedprotram = m_sharedprotram; // m_igs022->m_sharedprotram = m_sharedprotram;
// m_igs025->m_kb_source_data = dw3_source_data; // m_igs025->m_kb_source_data = dw3_source_data;
// m_igs025->m_kb_source_data_offset = 0; // m_igs025->m_kb_source_data_offset = 0;
// m_igs025->m_kb_game_id = 0x00060000; // m_igs025->m_kb_game_id = 0x00060000;
} }
@ -1282,11 +1282,11 @@ DRIVER_INIT_MEMBER(igs017_state,slqz2)
slqz2_patch_rom(); slqz2_patch_rom();
// install and configure protection device(s) // install and configure protection device(s)
// m_maincpu->space(AS_PROGRAM).install_readwrite_handler(0xda5610, 0xda5613, read16_delegate(FUNC(igs025_device::killbld_igs025_prot_r), (igs025_device*)m_igs025), write16_delegate(FUNC(igs025_device::killbld_igs025_prot_w), (igs025_device*)m_igs025)); // m_maincpu->space(AS_PROGRAM).install_readwrite_handler(0xda5610, 0xda5613, read16_delegate(FUNC(igs025_device::killbld_igs025_prot_r), (igs025_device*)m_igs025), write16_delegate(FUNC(igs025_device::killbld_igs025_prot_w), (igs025_device*)m_igs025));
// m_igs022->m_sharedprotram = m_sharedprotram; // m_igs022->m_sharedprotram = m_sharedprotram;
// m_igs025->m_kb_source_data = dw3_source_data; // m_igs025->m_kb_source_data = dw3_source_data;
// m_igs025->m_kb_source_data_offset = 0; // m_igs025->m_kb_source_data_offset = 0;
// m_igs025->m_kb_game_id = 0x00060000; // m_igs025->m_kb_game_id = 0x00060000;
} }
// spkrform // spkrform

70
src/mame/drivers/jaguar.c
View File

@ -1114,40 +1114,40 @@ TODO: this needs to be device-ized, of course ...
---- ---- ---- ---x set to enable irq ---- ---- ---- ---x set to enable irq
[0x04]: DSA control register [0x04]: DSA control register
[0x0a]: DSA TX/RX data (sends commands with this) [0x0a]: DSA TX/RX data (sends commands with this)
0x01 Play Title (?) 0x01 Play Title (?)
0x02 Stop 0x02 Stop
0x03 Read TOC 0x03 Read TOC
0x04 Pause 0x04 Pause
0x05 Unpause 0x05 Unpause
0x09 Get Title Len 0x09 Get Title Len
0x0a Open Tray 0x0a Open Tray
0x0b Close Tray 0x0b Close Tray
0x0d Get Comp Time 0x0d Get Comp Time
0x10 Goto ABS Min 0x10 Goto ABS Min
0x11 Goto ABS Sec 0x11 Goto ABS Sec
0x12 Goto ABS Frame 0x12 Goto ABS Frame
0x14 Read Long TOC 0x14 Read Long TOC
0x15 Set Mode 0x15 Set Mode
0x16 Get Error 0x16 Get Error
0x17 Clear Error 0x17 Clear Error
0x18 Spin Up 0x18 Spin Up
0x20 Play AB Min 0x20 Play AB Min
0x21 Play AB Sec 0x21 Play AB Sec
0x22 Play AB Frame 0x22 Play AB Frame
0x23 Stop AB Min 0x23 Stop AB Min
0x24 Stop AB Sec 0x24 Stop AB Sec
0x25 Stop AB Frame 0x25 Stop AB Frame
0x26 AB Release 0x26 AB Release
0x50 Get Disc Status 0x50 Get Disc Status
0x51 Set Volume 0x51 Set Volume
0x54 Get Maxsession 0x54 Get Maxsession
0x70 Set DAC mode (?) 0x70 Set DAC mode (?)
0xa0-0xaf User Define (???) 0xa0-0xaf User Define (???)
0xf0 Service 0xf0 Service
0xf1 Sledge 0xf1 Sledge
0xf2 Focus 0xf2 Focus
0xf3 Turntable 0xf3 Turntable
0xf4 Radial 0xf4 Radial
[0x10]: I2S bus control register [0x10]: I2S bus control register
[0x14]: CD subcode control register [0x14]: CD subcode control register
@ -1930,7 +1930,7 @@ DRIVER_INIT_MEMBER(jaguar_state,jaguarcd)
{ {
m_hacks_enabled = false; m_hacks_enabled = false;
save_item(NAME(m_joystick_data)); save_item(NAME(m_joystick_data));
// cart_start(); // cart_start();
m_is_jagcd = true; m_is_jagcd = true;
for (int i=0;i<0x20000/4;i++) // the cd bios is bigger.. check for (int i=0;i<0x20000/4;i++) // the cd bios is bigger.. check

3
src/mame/drivers/jpmsys5.c
View File

@ -6,7 +6,7 @@
driver by Phil Bennett driver by Phil Bennett
AWP bits J.Wallace, D. Haywood AWP bits J.Wallace, D. Haywood
Video System Games supported: Video System Games supported:
* Monopoly * Monopoly
@ -490,7 +490,6 @@ WRITE_LINE_MEMBER(jpmsys5_state::pia_irq)
READ8_MEMBER(jpmsys5_state::u29_porta_r) READ8_MEMBER(jpmsys5_state::u29_porta_r)
{ {
int combined_meter = MechMtr_GetActivity(0) | MechMtr_GetActivity(1) | int combined_meter = MechMtr_GetActivity(0) | MechMtr_GetActivity(1) |
MechMtr_GetActivity(2) | MechMtr_GetActivity(3) | MechMtr_GetActivity(2) | MechMtr_GetActivity(3) |
MechMtr_GetActivity(4) | MechMtr_GetActivity(5) | MechMtr_GetActivity(4) | MechMtr_GetActivity(5) |

4
src/mame/drivers/lethalj.c
View File

@ -618,8 +618,8 @@ static INPUT_PORTS_START( franticf ) // how do the directional inputs work?
PORT_DIPSETTING( 0x8000, DEF_STR( Off ) ) PORT_DIPSETTING( 0x8000, DEF_STR( Off ) )
PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
// PORT_START("PADDLE") // PORT_START("PADDLE")
// PORT_BIT( 0x00ff, 0x0000, IPT_PADDLE ) PORT_PLAYER(1) PORT_SENSITIVITY(50) PORT_KEYDELTA(8) PORT_CENTERDELTA(0) PORT_REVERSE // PORT_BIT( 0x00ff, 0x0000, IPT_PADDLE ) PORT_PLAYER(1) PORT_SENSITIVITY(50) PORT_KEYDELTA(8) PORT_CENTERDELTA(0) PORT_REVERSE
INPUT_PORTS_END INPUT_PORTS_END

6
src/mame/drivers/m92.c
View File

@ -46,9 +46,9 @@ System notes:
Glitch list! Glitch list!
All games: All games:
Flip screen/Cocktail Mode is unsupported (offsetted screens, and also Irem Skins Game Flip screen/Cocktail Mode is unsupported (offsetted screens, and also Irem Skins Game
hangs at title screen when flip is enabled), it's also unknown where exactly it's tied. hangs at title screen when flip is enabled), it's also unknown where exactly it's tied.
Gunforce: Gunforce:
Animated water sometimes doesn't appear on level 5 (but it Animated water sometimes doesn't appear on level 5 (but it

6
src/mame/drivers/mazerbla.c
View File

@ -89,8 +89,8 @@ master z80
[0x0792]: z80 regs check [0x0792]: z80 regs check
[0x0924]: z80 SP reg check [0x0924]: z80 SP reg check
(following two happens quite often, basically after every POST test) (following two happens quite often, basically after every POST test)
[0x08e1]: writes 0xaa to led i/o port [0x08e1]: writes 0xaa to led i/o port
[0x08d2]: writes 0x02 to A, then 0 to led i/o port [0x08d2]: writes 0x02 to A, then 0 to led i/o port
[0x07d7]: checks ROM 0x0000-0x1fff [0x07d7]: checks ROM 0x0000-0x1fff
[0x07ee]: checks ROM 0x2000-0x3fff [0x07ee]: checks ROM 0x2000-0x3fff
[0x0805]: checks ROM 0x4000-0x5fff [0x0805]: checks ROM 0x4000-0x5fff
@ -105,7 +105,7 @@ master z80
[0x08ab]: shared RAM check, values at 0xc000-0xc7ff must be 0x00 (otherwise wait until they are) [0x08ab]: shared RAM check, values at 0xc000-0xc7ff must be 0x00 (otherwise wait until they are)
[0x08c2]: writes 0 to shared RAM [0x08c2]: writes 0 to shared RAM
[0x000d]: clears RAM 0xe0fb, 0xe0fd, 0xe0fe (word) [0x000d]: clears RAM 0xe0fb, 0xe0fd, 0xe0fe (word)
[0x2138]: puts a 1 to 0xe0fb [0x2138]: puts a 1 to 0xe0fb
[0x0021]: clears i/o at 0x6a (lamps), clears 0xe563, 0xe004, 0xe000, 0xe001, 0xe007, 0xe002, 0xe003, 0xe005, [0x0021]: clears i/o at 0x6a (lamps), clears 0xe563, 0xe004, 0xe000, 0xe001, 0xe007, 0xe002, 0xe003, 0xe005,
0xc04f, 0xe572, enables IM 2, clears 0xe581 / 0xe583 (word), puts default initials (0x2274->0xe058) 0xc04f, 0xe572, enables IM 2, clears 0xe581 / 0xe583 (word), puts default initials (0x2274->0xe058)

15
src/mame/drivers/namconb1.c
View File

@ -667,16 +667,16 @@ READ32_MEMBER(namconb1_state::custom_key_r)
switch( m_gametype ) switch( m_gametype )
{ {
/* /*
Gunbullet/Point Blank keycus notes (thanks Guru): Gunbullet/Point Blank keycus notes (thanks Guru):
These games use the keycus in an unconventional way. Instead of reading it for a PRNG or a These games use the keycus in an unconventional way. Instead of reading it for a PRNG or a
magic value, it writes a scratch value to the keycus once per frame. magic value, it writes a scratch value to the keycus once per frame.
On hardware, if there is no keycus or the wrong keycus is present, this write will stall the On hardware, if there is no keycus or the wrong keycus is present, this write will stall the
68000 (probably nothing completes the bus cycle in that case) and the game will hang instead 68000 (probably nothing completes the bus cycle in that case) and the game will hang instead
of booting. of booting.
Patching these writes out causes the game to run fine with no keycus present. Patching these writes out causes the game to run fine with no keycus present.
*/ */
case NAMCONB1_GUNBULET: case NAMCONB1_GUNBULET:
return 0; return 0;
@ -2046,4 +2046,3 @@ GAME( 1994, vshoot, 0, namconb1, namconb1, namconb1_state, vshoot, RO
GAME( 1994, outfxies, 0, namconb2, outfxies, namconb1_state, outfxies, ROT0, "Namco", "The Outfoxies (World, OU2)", GAME_IMPERFECT_SOUND ) GAME( 1994, outfxies, 0, namconb2, outfxies, namconb1_state, outfxies, ROT0, "Namco", "The Outfoxies (World, OU2)", GAME_IMPERFECT_SOUND )
GAME( 1994, outfxiesj,outfxies, namconb2, outfxies, namconb1_state, outfxies, ROT0, "Namco", "The Outfoxies (Japan, OU1)", GAME_IMPERFECT_SOUND ) GAME( 1994, outfxiesj,outfxies, namconb2, outfxies, namconb1_state, outfxies, ROT0, "Namco", "The Outfoxies (Japan, OU1)", GAME_IMPERFECT_SOUND )
GAME( 1995, machbrkr, 0, namconb2, namconb1, namconb1_state, machbrkr, ROT0, "Namco", "Mach Breakers - Numan Athletics 2 (Japan)", GAME_IMPERFECT_SOUND ) GAME( 1995, machbrkr, 0, namconb2, namconb1, namconb1_state, machbrkr, ROT0, "Namco", "Mach Breakers - Numan Athletics 2 (Japan)", GAME_IMPERFECT_SOUND )

2
src/mame/drivers/namcops2.c
View File

@ -531,7 +531,7 @@ ROM_START( fateulcb )
ROM_REGION(0x840000, "key", ROMREGION_ERASE00) ROM_REGION(0x840000, "key", ROMREGION_ERASE00)
ROM_LOAD( "fates-dongle.bin", 0x000000, 0x840000, CRC(b0f15996) SHA1(8161c61f18700ddaeecd89bf3a7fb685431355e7) ) ROM_LOAD( "fates-dongle.bin", 0x000000, 0x840000, CRC(b0f15996) SHA1(8161c61f18700ddaeecd89bf3a7fb685431355e7) )
DISK_REGION("dvd") // actually HDD for this game DISK_REGION("dvd") // actually HDD for this game
DISK_IMAGE_READONLY( "fateulcb", 0, SHA1(073e67a5219ad53292716093b8c35deb20761c04) ) DISK_IMAGE_READONLY( "fateulcb", 0, SHA1(073e67a5219ad53292716093b8c35deb20761c04) )
ROM_END ROM_END

2
src/mame/drivers/neogeo.c
View File

@ -1058,7 +1058,7 @@ static INPUT_PORTS_START( neogeo )
PORT_BIT( 0x0800, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("Previous Game") PORT_CODE(KEYCODE_4) PORT_BIT( 0x0800, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("Previous Game") PORT_CODE(KEYCODE_4)
PORT_BIT( 0x7000, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_CUSTOM_MEMBER(DEVICE_SELF, neogeo_state, get_memcard_status, NULL) PORT_BIT( 0x7000, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_CUSTOM_MEMBER(DEVICE_SELF, neogeo_state, get_memcard_status, NULL)
PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_SPECIAL ) /* Hardware type (AES=0, MVS=1) Some games check this and show */ PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_SPECIAL ) /* Hardware type (AES=0, MVS=1) Some games check this and show */
/* a piracy warning screen if the hardware and BIOS don't match */ /* a piracy warning screen if the hardware and BIOS don't match */
PORT_START("AUDIO/COIN") PORT_START("AUDIO/COIN")
PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_COIN1 )

6
src/mame/drivers/pong.c
View File

@ -48,7 +48,7 @@ TODO:
*/ */
#define MASTER_CLOCK 7159000 #define MASTER_CLOCK 7159000
#define V_TOTAL (0x105+1) // 262 #define V_TOTAL (0x105+1) // 262
#define H_TOTAL (0x1C6+1) // 454 #define H_TOTAL (0x1C6+1) // 454
#define HBSTART (H_TOTAL) #define HBSTART (H_TOTAL)
@ -334,7 +334,7 @@ static NETLIST_START(pong_schematics)
NE555N_MSTABLE(ic_b9, 256VQ, P1) NE555N_MSTABLE(ic_b9, 256VQ, P1)
NETDEV_PARAM(ic_b9.R, RES_K(90)) NETDEV_PARAM(ic_b9.R, RES_K(90))
NETDEV_PARAM(ic_b9.C, CAP_U(.1)) NETDEV_PARAM(ic_b9.C, CAP_U(.1))
NETDEV_PARAM(ic_b9.VL, 0.5) // 1N914 NETDEV_PARAM(ic_b9.VL, 0.5) // 1N914
TTL_7404_INVERT(ic_c9b, ic_b9.Q) TTL_7404_INVERT(ic_c9b, ic_b9.Q)
TTL_7400_NAND(ic_b7b, ic_a7b.Q, hsyncQ) TTL_7400_NAND(ic_b7b, ic_a7b.Q, hsyncQ)
TTL_7493(ic_b8, ic_b7b.Q, ic_b8.QA, ic_b9.Q, ic_b9.Q) TTL_7493(ic_b8, ic_b7b.Q, ic_b8.QA, ic_b9.Q, ic_b9.Q)
@ -351,7 +351,7 @@ static NETLIST_START(pong_schematics)
NE555N_MSTABLE(ic_a9, 256VQ, P2) NE555N_MSTABLE(ic_a9, 256VQ, P2)
NETDEV_PARAM(ic_a9.R, RES_K(90)) NETDEV_PARAM(ic_a9.R, RES_K(90))
NETDEV_PARAM(ic_a9.C, CAP_U(.1)) NETDEV_PARAM(ic_a9.C, CAP_U(.1))
NETDEV_PARAM(ic_a9.VL, 0.5) // 1N914 NETDEV_PARAM(ic_a9.VL, 0.5) // 1N914
TTL_7404_INVERT(ic_c9a, ic_a9.Q) TTL_7404_INVERT(ic_c9a, ic_a9.Q)
TTL_7400_NAND(ic_b7c, ic_a7a.Q, hsyncQ) TTL_7400_NAND(ic_b7c, ic_a7a.Q, hsyncQ)
TTL_7493(ic_a8, ic_b7c.Q, ic_a8.QA, ic_a9.Q, ic_a9.Q) TTL_7493(ic_a8, ic_b7c.Q, ic_a8.QA, ic_a9.Q, ic_a9.Q)

52
src/mame/drivers/s11c.c
View File

@ -35,13 +35,13 @@ static ADDRESS_MAP_START( s11c_audio_map, AS_PROGRAM, 8, s11c_state )
AM_RANGE(0xc000, 0xffff) AM_ROMBANK("bank1") AM_RANGE(0xc000, 0xffff) AM_ROMBANK("bank1")
ADDRESS_MAP_END ADDRESS_MAP_END
static ADDRESS_MAP_START( s11c_bg_map, AS_PROGRAM, 8, s11c_state ) static ADDRESS_MAP_START( s11c_bg_map, AS_PROGRAM, 8, s11c_state )
AM_RANGE(0x0000, 0x07ff) AM_RAM AM_RANGE(0x0000, 0x07ff) AM_RAM
AM_RANGE(0x2000, 0x2001) AM_MIRROR(0x1ffe) AM_DEVREADWRITE("ym2151", ym2151_device, read, write) AM_RANGE(0x2000, 0x2001) AM_MIRROR(0x1ffe) AM_DEVREADWRITE("ym2151", ym2151_device, read, write)
AM_RANGE(0x4000, 0x4003) AM_MIRROR(0x1ffc) AM_DEVREADWRITE("pia40", pia6821_device, read, write) AM_RANGE(0x4000, 0x4003) AM_MIRROR(0x1ffc) AM_DEVREADWRITE("pia40", pia6821_device, read, write)
AM_RANGE(0x6000, 0x67ff) AM_WRITE(bg_speech_digit_w) AM_RANGE(0x6000, 0x67ff) AM_WRITE(bg_speech_digit_w)
AM_RANGE(0x6800, 0x6fff) AM_WRITE(bg_speech_clock_w) AM_RANGE(0x6800, 0x6fff) AM_WRITE(bg_speech_clock_w)
AM_RANGE(0x7800, 0x7fff) AM_WRITE(bgbank_w) AM_RANGE(0x7800, 0x7fff) AM_WRITE(bgbank_w)
AM_RANGE(0x8000, 0xffff) AM_ROMBANK("bgbank") AM_RANGE(0x8000, 0xffff) AM_ROMBANK("bgbank")
ADDRESS_MAP_END ADDRESS_MAP_END
*/ */
@ -128,24 +128,24 @@ INPUT_PORTS_END
/* /*
WRITE8_MEMBER( s11c_state::bgbank_w ) WRITE8_MEMBER( s11c_state::bgbank_w )
{ {
UINT8 bank = ((data & 0x04) >> 2) | ((data & 0x03) << 1); UINT8 bank = ((data & 0x04) >> 2) | ((data & 0x03) << 1);
membank("bgbank")->set_entry(bank); membank("bgbank")->set_entry(bank);
// popmessage("BG bank set to %02x (%i)",data,bank); // popmessage("BG bank set to %02x (%i)",data,bank);
} }
*/ */
MACHINE_RESET_MEMBER( s11c_state, s11c ) MACHINE_RESET_MEMBER( s11c_state, s11c )
{ {
// membank("bgbank")->set_entry(0); // membank("bgbank")->set_entry(0);
// reset the CPUs again, so that the CPUs are starting with the right vectors (otherwise sound may die on reset) // reset the CPUs again, so that the CPUs are starting with the right vectors (otherwise sound may die on reset)
// m_bgcpu->set_input_line(INPUT_LINE_RESET,PULSE_LINE); // m_bgcpu->set_input_line(INPUT_LINE_RESET,PULSE_LINE);
} }
DRIVER_INIT_MEMBER(s11c_state,s11c) DRIVER_INIT_MEMBER(s11c_state,s11c)
{ {
emu_timer* timer = timer_alloc(TIMER_IRQ); emu_timer* timer = timer_alloc(TIMER_IRQ);
// UINT8 *BGROM = memregion("bgcpu")->base(); // UINT8 *BGROM = memregion("bgcpu")->base();
// membank("bgbank")->configure_entries(0, 8, &BGROM[0x10000], 0x8000); // membank("bgbank")->configure_entries(0, 8, &BGROM[0x10000], 0x8000);
// membank("bgbank")->set_entry(0); // membank("bgbank")->set_entry(0);
set_invert(true); set_invert(true);
set_timer(timer); set_timer(timer);
timer->adjust(attotime::from_ticks(S11_IRQ_CYCLES,E_CLOCK),1); timer->adjust(attotime::from_ticks(S11_IRQ_CYCLES,E_CLOCK),1);
@ -265,18 +265,18 @@ static const pia6821_interface pia34_intf =
//static const pia6821_interface pia40_intf = //static const pia6821_interface pia40_intf =
//{ //{
// DEVCB_NULL, /* port A in */ // DEVCB_NULL, /* port A in */
// DEVCB_NULL, /* port B in */ // DEVCB_NULL, /* port B in */
// DEVCB_NULL, /* line CA1 in */ // DEVCB_NULL, /* line CA1 in */
// DEVCB_NULL, /* line CB1 in */ // DEVCB_NULL, /* line CB1 in */
// DEVCB_LINE_VCC, /* line CA2 in */ // DEVCB_LINE_VCC, /* line CA2 in */
// DEVCB_NULL, /* line CB2 in */ // DEVCB_NULL, /* line CB2 in */
// DEVCB_DRIVER_MEMBER(s11_state, pia40_pa_w), /* port A out */ // DEVCB_DRIVER_MEMBER(s11_state, pia40_pa_w), /* port A out */
// DEVCB_DRIVER_MEMBER(s11_state, pia40_pb_w), /* port B out */ // DEVCB_DRIVER_MEMBER(s11_state, pia40_pb_w), /* port B out */
// DEVCB_DRIVER_LINE_MEMBER(s11b_state, pia40_ca2_w), /* line CA2 out */ // DEVCB_DRIVER_LINE_MEMBER(s11b_state, pia40_ca2_w), /* line CA2 out */
// DEVCB_DRIVER_LINE_MEMBER(s11_state, pia40_cb2_w), /* line CB2 out */ // DEVCB_DRIVER_LINE_MEMBER(s11_state, pia40_cb2_w), /* line CB2 out */
// DEVCB_CPU_INPUT_LINE("bgcpu", M6809_FIRQ_LINE), /* IRQA */ // DEVCB_CPU_INPUT_LINE("bgcpu", M6809_FIRQ_LINE), /* IRQA */
// DEVCB_CPU_INPUT_LINE("bgcpu", INPUT_LINE_NMI) /* IRQB */ // DEVCB_CPU_INPUT_LINE("bgcpu", INPUT_LINE_NMI) /* IRQB */
//}; //};
static MACHINE_CONFIG_START( s11c, s11c_state ) static MACHINE_CONFIG_START( s11c, s11c_state )

4
src/mame/drivers/sderby.c
View File

@ -321,9 +321,9 @@ static ADDRESS_MAP_START( sderby2_map, AS_PROGRAM, 16, sderby_state )
AM_RANGE(0x308008, 0x308009) AM_WRITE(sderby_out_w) /* output port */ AM_RANGE(0x308008, 0x308009) AM_WRITE(sderby_out_w) /* output port */
AM_RANGE(0x30800e, 0x30800f) AM_DEVREADWRITE8("oki", okim6295_device, read, write, 0x00ff) AM_RANGE(0x30800e, 0x30800f) AM_DEVREADWRITE8("oki", okim6295_device, read, write, 0x00ff)
AM_RANGE(0x380000, 0x380fff) AM_WRITE(paletteram_RRRRRGGGGGBBBBBx_word_w) AM_SHARE("paletteram") AM_RANGE(0x380000, 0x380fff) AM_WRITE(paletteram_RRRRRGGGGGBBBBBx_word_w) AM_SHARE("paletteram")
AM_RANGE(0x300000, 0x300001) AM_WRITENOP /* unknown... write 0x01 in game, and 0x00 on reset */ //MOD AM_RANGE(0x300000, 0x300001) AM_WRITENOP /* unknown... write 0x01 in game, and 0x00 on reset */ //MOD
AM_RANGE(0xcf0000, 0xcf07ff) AM_RAM AM_SHARE("nvram") AM_RANGE(0xcf0000, 0xcf07ff) AM_RAM AM_SHARE("nvram")
AM_RANGE(0xcfc000, 0xcfffff) AM_RAM //MOD AM_RANGE(0xcfc000, 0xcfffff) AM_RAM //MOD
ADDRESS_MAP_END ADDRESS_MAP_END

34
src/mame/drivers/stv.c
View File

@ -9,31 +9,31 @@
TODO: TODO:
- clean this up! - clean this up!
- Properly emulate the protection chips, used by several games (check stvprot.c for more info) - Properly emulate the protection chips, used by several games (check stvprot.c for more info)
(per-game issues) (per-game issues)
- stress: accesses the Sound Memory Expansion Area (0x05a80000-0x05afffff), unknown purpose; - stress: accesses the Sound Memory Expansion Area (0x05a80000-0x05afffff), unknown purpose;
- smleague / finlarch: it randomly hangs / crashes,it works if you use a ridiculous MCFG_INTERLEAVE number,might need strict - smleague / finlarch: it randomly hangs / crashes,it works if you use a ridiculous MCFG_INTERLEAVE number,might need strict
SH-2 synching or it's actually a m68k comms issue. SH-2 synching or it's actually a m68k comms issue.
- groovef: ugly back screen color, caused by incorrect usage of the Color Calculation function. - groovef: ugly back screen color, caused by incorrect usage of the Color Calculation function.
- myfairld: Apparently this game gives a black screen (either test mode and in-game mode),but let it wait for about - myfairld: Apparently this game gives a black screen (either test mode and in-game mode),but let it wait for about
10 seconds and the game will load everything. This is because of a hellishly slow m68k sub-routine located at 54c2. 10 seconds and the game will load everything. This is because of a hellishly slow m68k sub-routine located at 54c2.
Likely to not be a bug but an in-game design issue. Likely to not be a bug but an in-game design issue.
- danchih / danchiq: currently hangs randomly (regression). - danchih / danchiq: currently hangs randomly (regression).
- batmanfr: Missing sound,caused by an extra ADSP chip which is on the cart.The CPU is a - batmanfr: Missing sound,caused by an extra ADSP chip which is on the cart.The CPU is a
ADSP-2181,and it's the same used by NBA Jam Extreme (ZN game). ADSP-2181,and it's the same used by NBA Jam Extreme (ZN game).
- vfremix: when you play as Akira, there is a problem with third match: game doesn't upload all textures - vfremix: when you play as Akira, there is a problem with third match: game doesn't upload all textures
and tiles and doesn't enable display, although gameplay is normal - wait a while to get back and tiles and doesn't enable display, although gameplay is normal - wait a while to get back
to title screen after losing a match to title screen after losing a match
- vfremix: various problems with SCU DSP: Jeffry causes a black screen hang. Akira's kick sometimes - vfremix: various problems with SCU DSP: Jeffry causes a black screen hang. Akira's kick sometimes
sends the opponent out of the ring from whatever position. sends the opponent out of the ring from whatever position.
************************************************************************************************************************/ ************************************************************************************************************************/

6
src/mame/drivers/thepit.c
View File

@ -114,8 +114,8 @@ HT-01B
************************************************************* *************************************************************
Desert Dan (C)1982 by Video Optics Desert Dan (C)1982 by Video Optics
pinout pinout
------------- -------------
--------------------------------------------------- ---------------------------------------------------
@ -138,7 +138,7 @@ HT-01B
LEFT | S | 15 | LEFT | S | 15 |
RIGHT | T | 16 | RIGHT | T | 16 |
SPK + | U | 17 | SPK - (GND) SPK + | U | 17 | SPK - (GND)
| V | 18 | | V | 18 |
SYNC (COMP) | W | 19 | RED SYNC (COMP) | W | 19 | RED
GREEN | X | 20 | BLUE GREEN | X | 20 | BLUE
+ 12 | Y | 21 | + 12 + 12 | Y | 21 | + 12

4
src/mame/drivers/tumbleb.c
View File

@ -1912,7 +1912,7 @@ static INPUT_PORTS_START( carket )
PORT_DIPSETTING( 0x0006, DEF_STR( Normal ) ) PORT_DIPSETTING( 0x0006, DEF_STR( Normal ) )
PORT_DIPSETTING( 0x0002, DEF_STR( Hard ) ) PORT_DIPSETTING( 0x0002, DEF_STR( Hard ) )
PORT_DIPSETTING( 0x0004, DEF_STR( Very_Hard ) ) PORT_DIPSETTING( 0x0004, DEF_STR( Very_Hard ) )
PORT_DIPNAME( 0x0038, 0x0038, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW1:5,4,3") /* Tested correct */ PORT_DIPNAME( 0x0038, 0x0038, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW1:5,4,3") /* Tested correct */
PORT_DIPSETTING( 0x0000, DEF_STR( 5C_1C ) ) PORT_DIPSETTING( 0x0000, DEF_STR( 5C_1C ) )
PORT_DIPSETTING( 0x0020, DEF_STR( 4C_1C ) ) PORT_DIPSETTING( 0x0020, DEF_STR( 4C_1C ) )
PORT_DIPSETTING( 0x0010, DEF_STR( 3C_1C ) ) PORT_DIPSETTING( 0x0010, DEF_STR( 3C_1C ) )
@ -1924,7 +1924,7 @@ static INPUT_PORTS_START( carket )
PORT_DIPNAME( 0x0040, 0x0040, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW1:2") /* Test Mode shows Language: Korean / English, but doesn't work?? */ PORT_DIPNAME( 0x0040, 0x0040, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW1:2") /* Test Mode shows Language: Korean / English, but doesn't work?? */
PORT_DIPSETTING( 0x0040, DEF_STR( Off ) ) PORT_DIPSETTING( 0x0040, DEF_STR( Off ) )
PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
PORT_DIPNAME( 0x0080, 0x0000, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW1:1") PORT_DIPNAME( 0x0080, 0x0000, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW1:1")
PORT_DIPSETTING( 0x0080, DEF_STR( Off ) ) PORT_DIPSETTING( 0x0080, DEF_STR( Off ) )
PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) PORT_DIPSETTING( 0x0000, DEF_STR( On ) )

8
src/mame/drivers/twin16.c
View File

@ -734,10 +734,10 @@ static MACHINE_CONFIG_START( twin16, twin16_state )
MCFG_SCREEN_ADD("screen", RASTER) MCFG_SCREEN_ADD("screen", RASTER)
MCFG_SCREEN_RAW_PARAMS(XTAL_18_432MHz/2, 576, 0, 40*8, 264, 2*8, 30*8) MCFG_SCREEN_RAW_PARAMS(XTAL_18_432MHz/2, 576, 0, 40*8, 264, 2*8, 30*8)
// MCFG_SCREEN_REFRESH_RATE(((double)XTAL_18_432MHz / 2) / (576 * 264)) // MCFG_SCREEN_REFRESH_RATE(((double)XTAL_18_432MHz / 2) / (576 * 264))
// MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2062)) // 32 lines // MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2062)) // 32 lines
// MCFG_SCREEN_SIZE(40*8, 32*8) // MCFG_SCREEN_SIZE(40*8, 32*8)
// MCFG_SCREEN_VISIBLE_AREA(0, 40*8-1, 2*8, 30*8-1) // MCFG_SCREEN_VISIBLE_AREA(0, 40*8-1, 2*8, 30*8-1)
MCFG_SCREEN_UPDATE_DRIVER(twin16_state, screen_update_twin16) MCFG_SCREEN_UPDATE_DRIVER(twin16_state, screen_update_twin16)
MCFG_SCREEN_VBLANK_DRIVER(twin16_state, screen_eof_twin16) MCFG_SCREEN_VBLANK_DRIVER(twin16_state, screen_eof_twin16)

5
src/mame/drivers/wallc.c
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@ -395,8 +395,8 @@ A15 (Output enable, not in equation)
D2 D2
D3 D3
D4 D4
D5 (2 times) D5 (2 times)
D7 (2 times) D7 (2 times)
Pal output Pal output
D2 (via not to cpu) D2 (via not to cpu)
@ -432,7 +432,6 @@ DRIVER_INIT_MEMBER(wallc_state,sidam)
for (i=0; i<0x2000; i++) for (i=0; i<0x2000; i++)
{ {
switch (i & 0x4a) // A1, A3, A6 switch (i & 0x4a) // A1, A3, A6
{ {
case 0x00: case 0x00:

18
src/mame/drivers/wpc_dcs.c
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@ -106,15 +106,15 @@ static INPUT_PORTS_START( wpc_dcs )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("Begin Test / Enter") PORT_CODE(KEYCODE_ENTER_PAD) PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("Begin Test / Enter") PORT_CODE(KEYCODE_ENTER_PAD)
// DCS games tend to use unneeded inputs here for extra switches (like STTNG putting the spinner switch here) // DCS games tend to use unneeded inputs here for extra switches (like STTNG putting the spinner switch here)
/* PORT_START("FLIP") /* PORT_START("FLIP")
PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("Right Flipper EOS") PORT_CODE(KEYCODE_RSHIFT) PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("Right Flipper EOS") PORT_CODE(KEYCODE_RSHIFT)
PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("Right Flipper Button") PORT_CODE(KEYCODE_RSHIFT) PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("Right Flipper Button") PORT_CODE(KEYCODE_RSHIFT)
PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("Left Flipper EOS") PORT_CODE(KEYCODE_LSHIFT) PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("Left Flipper EOS") PORT_CODE(KEYCODE_LSHIFT)
PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("Left Flipper Button") PORT_CODE(KEYCODE_LSHIFT) PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("Left Flipper Button") PORT_CODE(KEYCODE_LSHIFT)
PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("Upper Right Flipper EOS") PORT_CODE(KEYCODE_RSHIFT) PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("Upper Right Flipper EOS") PORT_CODE(KEYCODE_RSHIFT)
PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("Upper Right Flipper Button") PORT_CODE(KEYCODE_RSHIFT) PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("Upper Right Flipper Button") PORT_CODE(KEYCODE_RSHIFT)
PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("Upper Left Flipper EOS") PORT_CODE(KEYCODE_LSHIFT) PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("Upper Left Flipper EOS") PORT_CODE(KEYCODE_LSHIFT)
PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("Upper Left Flipper Button") PORT_CODE(KEYCODE_LSHIFT) PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("Upper Left Flipper Button") PORT_CODE(KEYCODE_LSHIFT)
*/ */
PORT_START("DIPS") PORT_START("DIPS")
PORT_DIPNAME(0x01,0x01,"Switch 1") PORT_DIPLOCATION("SWA:1") PORT_DIPNAME(0x01,0x01,"Switch 1") PORT_DIPLOCATION("SWA:1")

4
src/mame/etc/template_cpu.h
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@ -52,8 +52,8 @@ protected:
private: private:
address_space_config m_program_config; address_space_config m_program_config;
UINT8 m_pc; /* registers */ UINT8 m_pc; /* registers */
UINT8 m_flags; /* flags */ UINT8 m_flags; /* flags */
address_space *m_program; address_space *m_program;
address_space *m_data; address_space *m_data;
int m_icount; int m_icount;

2
src/mame/includes/1943.h
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@ -37,7 +37,7 @@ public:
int m_bg2_on; int m_bg2_on;
/* protection */ /* protection */
UINT8 m_prot_value; UINT8 m_prot_value;
DECLARE_WRITE8_MEMBER(c1943_protection_w); DECLARE_WRITE8_MEMBER(c1943_protection_w);
DECLARE_READ8_MEMBER(c1943_protection_r); DECLARE_READ8_MEMBER(c1943_protection_r);
DECLARE_READ8_MEMBER(_1943b_c007_r); DECLARE_READ8_MEMBER(_1943b_c007_r);

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