(MESS) c128: Fixed keyboard and C64 mode. (nw)

(MESS) c64: Cleanup. (nw)
(MESS) mos6566: Implemented FAST register and removed hacks from interface. (nw)
This commit is contained in:
Curt Coder 2012-10-18 14:17:00 +00:00
parent befda9da82
commit 44f7329aa7
9 changed files with 235 additions and 266 deletions

View File

@ -2,12 +2,9 @@
TODO:
- C64 mode charrom read
- fix fast serial
- K0-K2 key line read
- clean up inputs
- expansion DMA
- inherit from c64_state and use common members from there
*/
@ -46,6 +43,9 @@ inline void c128_state::check_interrupts()
int irq = m_cia1_irq || m_vic_irq || m_exp_irq;
int nmi = m_cia2_irq || restore || m_exp_nmi;
//int aec = m_exp_dma && m_z80_busack;
//int rdy = m_vic_aec && m_z80en && m_vic_ba;
//int busreq = !m_z80en || !(m_z80_busack && !aec)
m_maincpu->set_input_line(INPUT_LINE_IRQ0, irq);
@ -79,23 +79,11 @@ void c128_state::read_pla(offs_t offset, offs_t ca, offs_t vma, int ba, int rw,
m_game = m_exp->game_r(ca, ba, rw, m_hiram);
m_exrom = m_exp->exrom_r(ca, ba, rw, m_hiram);
UINT32 input = clk << 26 | !m_va14 << 25 | m_charen << 24 |
UINT32 input = clk << 26 | m_va14 << 25 | m_charen << 24 |
m_hiram << 23 | m_loram << 22 | ba << 21 | VMA5 << 20 | VMA4 << 19 | ms0 << 18 | ms1 << 17 | ms2 << 16 |
m_exrom << 15 | m_game << 14 | rw << 13 | aec << 12 | A10 << 11 | A11 << 10 | A12 << 9 | A13 << 8 |
A14 << 7 | A15 << 6 | z80io << 5 | m_z80en << 4 | ms3 << 3 | vicfix << 2 | dmaack << 1 | _128_256;
/*
000000000001111111112222222
012345678901234567890123456
--11--------0------10---0-- 000000000000000001
---0--------0-1----10----1- 000000000000000001
---0--------0--0---10----1- 000000000000000001
---0--1101--111-------1-0-- 000000000000000001
---0--1101--111--------10-- 000000000000000001
---0--1101--11-0-------10-- 000000000000000001
---11-1101--11--100-------- 000000000000000001
*/
UINT32 data = m_pla->read(input);
*sden = BIT(data, 0);
@ -169,46 +157,46 @@ UINT8 c128_state::read_memory(address_space &space, offs_t offset, offs_t vma, i
{
data = m_ram->pointer()[ma];
}
else if (!cas1)
if (!cas1)
{
data = m_ram->pointer()[0x10000 | ma];
}
}
else if (!rom1)
if (!rom1)
{
// CR: data = m_rom1[(ms3 << 14) | ((BIT(ta, 14) && BIT(offset, 13)) << 13) | (ta & 0x1000) | (offset & 0xfff)];
data = m_rom1[((BIT(ta, 14) && BIT(offset, 13)) << 13) | (ta & 0x1000) | (offset & 0xfff)];
}
else if (!rom2)
if (!rom2)
{
data = m_rom2[offset & 0x3fff];
}
else if (!rom3)
if (!rom3)
{
// CR: data = m_rom3[(BIT(offset, 15) << 14) | (offset & 0x3fff)];
data = m_rom3[offset & 0x3fff];
}
else if (!rom4)
if (!rom4)
{
data = m_rom4[(ta & 0x1000) | (offset & 0x2fff)];
}
else if (!charom)
if (!charom)
{
data = m_charom[(ms3 << 12) | (ta & 0xf00) | sa];
}
else if (!colorram)
if (!colorram && aec)
{
data = m_color_ram[(clrbank << 10) | (ta & 0x300) | sa] & 0x0f;
}
else if (!vic)
if (!vic)
{
data = m_vic->read(space, offset & 0x3f);
}
else if (!from1)
if (!from1)
{
data = m_from[offset & 0x7fff];
}
else if (!iocs && BIT(offset, 10))
if (!iocs && BIT(offset, 10))
{
switch ((BIT(offset, 11) << 2) | ((offset >> 8) & 0x03))
{
@ -277,20 +265,20 @@ void c128_state::write_memory(address_space &space, offs_t offset, offs_t vma, U
{
m_ram->pointer()[ma] = data;
}
else if (!cas1)
if (!cas1)
{
m_ram->pointer()[0x10000 | ma] = data;
}
}
else if (!colorram && !gwe)
if (!colorram && !gwe)
{
m_color_ram[(clrbank << 10) | (ta & 0x300) | sa] = data | 0xf0;
m_color_ram[(clrbank << 10) | (ta & 0x300) | sa] = data & 0x0f;
}
else if (!vic)
if (!vic)
{
m_vic->write(space, offset & 0x3f, data);
}
else if (!iocs && BIT(offset, 10))
if (!iocs && BIT(offset, 10))
{
switch ((BIT(offset, 11) << 2) | ((offset >> 8) & 0x03))
{
@ -504,7 +492,7 @@ ADDRESS_MAP_END
static INPUT_PORTS_START( c128 )
PORT_INCLUDE( common_cbm_keyboard ) /* ROW0 -> ROW7 */
PORT_START( "KP0" )
PORT_START( "K0" )
PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_1_PAD) PORT_CHAR(UCHAR_MAMEKEY(1_PAD))
PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_7_PAD) PORT_CHAR(UCHAR_MAMEKEY(7_PAD))
PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_4_PAD) PORT_CHAR(UCHAR_MAMEKEY(4_PAD))
@ -514,7 +502,7 @@ static INPUT_PORTS_START( c128 )
PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_8_PAD) PORT_CHAR(UCHAR_MAMEKEY(8_PAD))
PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Help") PORT_CODE(KEYCODE_F7) PORT_CHAR(UCHAR_MAMEKEY(PGUP))
PORT_START( "KP1" )
PORT_START( "K1" )
PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_3_PAD) PORT_CHAR(UCHAR_MAMEKEY(3_PAD))
PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_9_PAD) PORT_CHAR(UCHAR_MAMEKEY(9_PAD))
PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_6_PAD) PORT_CHAR(UCHAR_MAMEKEY(6_PAD))
@ -524,7 +512,7 @@ static INPUT_PORTS_START( c128 )
PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_MINUS_PAD) PORT_CHAR(UCHAR_MAMEKEY(PLUS_PAD))
PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_ESC) PORT_CHAR(UCHAR_MAMEKEY(ESC))
PORT_START( "KP2" )
PORT_START( "K2" )
PORT_CONFNAME( 0x80, 0x00, "No Scroll (switch)") PORT_CODE(KEYCODE_F9)
PORT_CONFSETTING( 0x00, DEF_STR( Off ) )
PORT_CONFSETTING( 0x80, DEF_STR( On ) )
@ -751,7 +739,7 @@ WRITE_LINE_MEMBER( c128_state::mmu_z80en_w )
if (m_reset)
{
m_subcpu->reset();
//m_subcpu->set_state_int(M8502_PC, 0xff3d);
m_reset = 0;
}
}
@ -800,25 +788,13 @@ static MOS8722_INTERFACE( mmu_intf )
INTERRUPT_GEN_MEMBER( c128_state::frame_interrupt )
{
static const char *const c128ports[] = { "KP0", "KP1", "KP2" };
check_interrupts();
/* common keys input ports */
cbm_common_interrupt(&device);
/* Fix Me! Currently, neither left Shift nor Shift Lock work in c128, but reading the correspondent input produces a bug!
Hence, we overwrite the actual reading as it never happens */
if ((ioport("SPECIAL")->read() & 0x40)) //
// hack in ShiftLock
if ((ioport("SPECIAL")->read() & 0x40))
c64_keyline[1] |= 0x80;
/* c128 specific: keypad input ports */
for (int i = 0; i < 3; i++)
{
UINT8 value = 0xff;
value &= ~ioport(c128ports[i])->read();
m_keyline[i] = value;
}
}
WRITE_LINE_MEMBER( c128_state::vic_irq_w )
@ -828,16 +804,18 @@ WRITE_LINE_MEMBER( c128_state::vic_irq_w )
check_interrupts();
}
WRITE8_MEMBER( c128_state::vic_k_w )
{
m_vic_k = data;
}
static MOS8564_INTERFACE( vic_intf )
{
SCREEN_VIC_TAG,
Z80A_TAG,
M8502_TAG,
DEVCB_DRIVER_LINE_MEMBER(c128_state, vic_irq_w),
DEVCB_NULL,
DEVCB_NULL,
DEVCB_NULL,
DEVCB_NULL,
DEVCB_NULL
DEVCB_DRIVER_MEMBER(c128_state, vic_k_w)
};
@ -953,14 +931,13 @@ READ8_MEMBER( c128_state::cia1_pb_r )
UINT8 data = 0xff;
UINT8 cia0porta = m_cia1->pa_r();
//vic2e_device_interface *intf = dynamic_cast<vic2e_device_interface*>(&m_vic);
data &= cbm_common_cia0_port_b_r(m_cia1, cia0porta);
/*
if (!intf->k0_r()) data &= m_keyline[0];
if (!intf->k1_r()) data &= m_keyline[1];
if (!intf->k2_r()) data &= m_keyline[2];
*/
if (!BIT(m_vic_k, 0)) data &= ~ioport("K0")->read();
if (!BIT(m_vic_k, 1)) data &= ~ioport("K1")->read();
if (!BIT(m_vic_k, 2)) data &= ~ioport("K2")->read();
return data;
}
@ -1242,12 +1219,18 @@ static PET_DATASSETTE_PORT_INTERFACE( datassette_intf )
READ8_MEMBER( c128_state::exp_dma_r )
{
return m_subcpu->space(AS_PROGRAM).read_byte(offset);
int ba = 0, aec = 1, z80io = 1;
offs_t vma = 0;
return read_memory(space, offset, vma, ba, aec, z80io);
}
WRITE8_MEMBER( c128_state::exp_dma_w )
{
m_subcpu->space(AS_PROGRAM).write_byte(offset, data);
int ba = 0, aec = 1, z80io = 1;
offs_t vma = 0;
return write_memory(space, offset, data, vma, ba, aec, z80io);
}
WRITE_LINE_MEMBER( c128_state::exp_irq_w )
@ -1266,7 +1249,9 @@ WRITE_LINE_MEMBER( c128_state::exp_nmi_w )
WRITE_LINE_MEMBER( c128_state::exp_dma_w )
{
// TODO
m_exp_dma = state;
check_interrupts();
}
WRITE_LINE_MEMBER( c128_state::exp_reset_w )
@ -1314,7 +1299,6 @@ static C64_USER_PORT_INTERFACE( user_intf )
void c128_state::machine_start()
{
cbm_common_init();
m_keyline[0] = m_keyline[1] = m_keyline[2] = 0xff;
// find memory regions
m_rom1 = memregion(M8502_TAG)->base();
@ -1326,11 +1310,34 @@ void c128_state::machine_start()
// allocate memory
m_color_ram.allocate(0x800);
// state saving
save_item(NAME(m_z80en));
save_item(NAME(m_loram));
save_item(NAME(m_hiram));
save_item(NAME(m_charen));
save_item(NAME(m_game));
save_item(NAME(m_exrom));
save_item(NAME(m_reset));
save_item(NAME(m_va14));
save_item(NAME(m_va15));
save_item(NAME(m_clrbank));
save_item(NAME(m_cnt1));
save_item(NAME(m_sp1));
save_item(NAME(m_iec_data_out));
save_item(NAME(m_cia1_irq));
save_item(NAME(m_cia2_irq));
save_item(NAME(m_vic_irq));
save_item(NAME(m_exp_irq));
save_item(NAME(m_exp_nmi));
save_item(NAME(m_exp_dma));
save_item(NAME(m_cass_rd));
save_item(NAME(m_iec_srq));
}
//-------------------------------------------------
// MACHINE_RESET( c64 )
// MACHINE_RESET( c128 )
//-------------------------------------------------
void c128_state::machine_reset()
@ -1361,15 +1368,15 @@ void c128_state::machine_reset()
static MACHINE_CONFIG_START( ntsc, c128_state )
// basic hardware
MCFG_CPU_ADD(Z80A_TAG, Z80, VIC6567_CLOCK)
MCFG_CPU_PROGRAM_MAP( z80_mem)
MCFG_CPU_IO_MAP( z80_io)
MCFG_CPU_ADD(Z80A_TAG, Z80, VIC6567_CLOCK*2)
MCFG_CPU_PROGRAM_MAP(z80_mem)
MCFG_CPU_IO_MAP(z80_io)
MCFG_CPU_VBLANK_INT_DRIVER(SCREEN_VIC_TAG, c128_state, frame_interrupt)
MCFG_QUANTUM_PERFECT_CPU(Z80A_TAG)
MCFG_CPU_ADD(M8502_TAG, M8502, VIC6567_CLOCK)
MCFG_CPU_PROGRAM_MAP( m8502_mem)
MCFG_CPU_CONFIG( cpu_intf )
MCFG_CPU_PROGRAM_MAP(m8502_mem)
MCFG_CPU_CONFIG(cpu_intf)
MCFG_CPU_VBLANK_INT_DRIVER(SCREEN_VIC_TAG, c128_state, frame_interrupt)
MCFG_QUANTUM_PERFECT_CPU(M8502_TAG)
@ -1474,15 +1481,15 @@ MACHINE_CONFIG_END
static MACHINE_CONFIG_START( pal, c128_state )
// basic hardware
MCFG_CPU_ADD(Z80A_TAG, Z80, VIC6569_CLOCK)
MCFG_CPU_PROGRAM_MAP( z80_mem)
MCFG_CPU_ADD(Z80A_TAG, Z80, VIC6569_CLOCK*2)
MCFG_CPU_PROGRAM_MAP(z80_mem)
MCFG_CPU_IO_MAP(z80_io)
MCFG_CPU_VBLANK_INT_DRIVER(SCREEN_VIC_TAG, c128_state, frame_interrupt)
MCFG_QUANTUM_PERFECT_CPU(Z80A_TAG)
MCFG_CPU_ADD(M8502_TAG, M8502, VIC6569_CLOCK)
MCFG_CPU_PROGRAM_MAP( m8502_mem)
MCFG_CPU_CONFIG( cpu_intf )
MCFG_CPU_PROGRAM_MAP(m8502_mem)
MCFG_CPU_CONFIG(cpu_intf)
MCFG_CPU_VBLANK_INT_DRIVER(SCREEN_VIC_TAG, c128_state, frame_interrupt)
MCFG_QUANTUM_PERFECT_CPU(M8502_TAG)
@ -1606,10 +1613,10 @@ ROM_END
//-------------------------------------------------
// ROM( c128ger )
// ROM( c128_de )
//-------------------------------------------------
ROM_START( c128ger )
ROM_START( c128_de )
ROM_REGION( 0x10000, M8502_TAG, 0 )
ROM_DEFAULT_BIOS("r4")
ROM_LOAD( "251913-01.u32", 0x0000, 0x4000, CRC(0010ec31) SHA1(765372a0e16cbb0adf23a07b80f6b682b39fbf88) )
@ -1635,10 +1642,10 @@ ROM_END
//-------------------------------------------------
// ROM( c128sfi )
// ROM( c128_se )
//-------------------------------------------------
ROM_START( c128sfi )
ROM_START( c128_se )
ROM_REGION( 0x10000, M8502_TAG, 0 )
ROM_LOAD( "325182-01.u32", 0x0000, 0x4000, CRC(2aff27d3) SHA1(267654823c4fdf2167050f41faa118218d2569ce) ) // "C128 64 Sw/Fi"
ROM_LOAD( "318018-02.u33", 0x4000, 0x4000, CRC(2ee6e2fa) SHA1(60e1491e1d5782e3cf109f518eb73427609badc6) )
@ -1723,10 +1730,10 @@ ROM_END
//-------------------------------------------------
// ROM( c128drde )
// ROM( c128dr_de )
//-------------------------------------------------
ROM_START( c128drde )
ROM_START( c128dr_de )
ROM_REGION( 0x10000, M8502_TAG, 0 )
ROM_LOAD( "318022-02.u34", 0x4000, 0x8000, CRC(af1ae1e8) SHA1(953dcdf5784a6b39ef84dd6fd968c7a03d8d6816) )
ROM_LOAD( "318077-01.u32", 0x0000, 0x4000, CRC(eb6e2c8f) SHA1(6b3d891fedabb5335f388a5d2a71378472ea60f4) )
@ -1745,10 +1752,10 @@ ROM_END
//-------------------------------------------------
// ROM( c128drsw )
// ROM( c128dr_se )
//-------------------------------------------------
ROM_START( c128drsw )
ROM_START( c128dr_se )
ROM_REGION( 0x10000, M8502_TAG, 0 )
ROM_LOAD( "318022-02.u34", 0x4000, 0x8000, CRC(af1ae1e8) SHA1(953dcdf5784a6b39ef84dd6fd968c7a03d8d6816) )
ROM_LOAD( "318034-01.u32", 0x0000, 0x4000, CRC(cb4e1719) SHA1(9b0a0cef56d00035c611e07170f051ee5e63aa3a) )
@ -1778,18 +1785,18 @@ ROM_END
// SYSTEM DRIVERS
//**************************************************************************
// YEAR NAME PARENT COMPAT MACHINE INPUT INIT COMPANY FULLNAME FLAGS
COMP( 1985, c128, 0, 0, c128, c128, driver_device, 0, "Commodore Business Machines", "Commodore 128 (NTSC)", GAME_NOT_WORKING | GAME_SUPPORTS_SAVE )
COMP( 1985, c128sfi, c128, 0, c128pal, c128swe, driver_device, 0, "Commodore Business Machines", "Commodore 128 (Sweden/Finland)", GAME_NOT_WORKING | GAME_SUPPORTS_SAVE )
//COMP( 1985, c128fra, c128, 0, c128pal, c128fra, driver_device, 0, "Commodore Business Machines", "Commodore 128 (France)", GAME_NOT_WORKING | GAME_SUPPORTS_SAVE )
COMP( 1985, c128ger, c128, 0, c128pal, c128ger, driver_device, 0, "Commodore Business Machines", "Commodore 128 (Germany)", GAME_NOT_WORKING | GAME_SUPPORTS_SAVE )
//COMP( 1985, c128nor, c128, 0, c128pal, c128ita, driver_device, 0, "Commodore Business Machines", "Commodore 128 (Norway)", GAME_NOT_WORKING | GAME_SUPPORTS_SAVE )
COMP( 1985, c128dpr, c128, 0, c128d, c128, driver_device, 0, "Commodore Business Machines", "Commodore 128D (NTSC, prototype)", GAME_NOT_WORKING | GAME_SUPPORTS_SAVE )
COMP( 1985, c128d, c128, 0, c128dpal, c128, driver_device, 0,"Commodore Business Machines", "Commodore 128D (PAL)", GAME_NOT_WORKING | GAME_SUPPORTS_SAVE )
// YEAR NAME PARENT COMPAT MACHINE INPUT INIT COMPANY FULLNAME FLAGS
COMP( 1985, c128, 0, 0, c128, c128, driver_device, 0, "Commodore Business Machines", "Commodore 128 (NTSC)", GAME_SUPPORTS_SAVE )
COMP( 1985, c128_se, c128, 0, c128pal, c128swe, driver_device, 0, "Commodore Business Machines", "Commodore 128 (Sweden/Finland)", GAME_SUPPORTS_SAVE )
//COMP( 1985, c128fra, c128, 0, c128pal, c128fra, driver_device, 0, "Commodore Business Machines", "Commodore 128 (France)", GAME_SUPPORTS_SAVE )
COMP( 1985, c128_de, c128, 0, c128pal, c128ger, driver_device, 0, "Commodore Business Machines", "Commodore 128 (Germany)", GAME_SUPPORTS_SAVE )
//COMP( 1985, c128nor, c128, 0, c128pal, c128ita, driver_device, 0, "Commodore Business Machines", "Commodore 128 (Norway)", GAME_SUPPORTS_SAVE )
COMP( 1985, c128dpr, c128, 0, c128d, c128, driver_device, 0, "Commodore Business Machines", "Commodore 128D (NTSC, prototype)", GAME_SUPPORTS_SAVE )
COMP( 1985, c128d, c128, 0, c128dpal, c128, driver_device, 0, "Commodore Business Machines", "Commodore 128D (PAL)", GAME_SUPPORTS_SAVE )
COMP( 1985, c128cr, c128, 0, c128, c128, driver_device, 0, "Commodore Business Machines", "Commodore 128CR (NTSC, prototype?)", GAME_NOT_WORKING | GAME_SUPPORTS_SAVE )
COMP( 1986, c128dcr, c128, 0, c128dcr, c128, driver_device, 0, "Commodore Business Machines", "Commodore 128DCR (NTSC)", GAME_NOT_WORKING | GAME_SUPPORTS_SAVE )
COMP( 1986, c128drde, c128, 0, c128dcrp, c128ger, driver_device, 0,"Commodore Business Machines", "Commodore 128DCR (Germany)", GAME_NOT_WORKING | GAME_SUPPORTS_SAVE )
COMP( 1985, c128cr, c128, 0, c128, c128, driver_device, 0, "Commodore Business Machines", "Commodore 128CR (NTSC, prototype)", GAME_SUPPORTS_SAVE )
COMP( 1986, c128dcr, c128, 0, c128dcr, c128, driver_device, 0, "Commodore Business Machines", "Commodore 128DCR (NTSC)", GAME_NOT_WORKING | GAME_SUPPORTS_SAVE )
COMP( 1986, c128dr_de, c128, 0, c128dcrp, c128ger, driver_device, 0, "Commodore Business Machines", "Commodore 128DCR (Germany)", GAME_NOT_WORKING | GAME_SUPPORTS_SAVE )
//COMP( 1986, c128drit, c128, 0, c128dcrp, c128ita, driver_device, 0,"Commodore Business Machines", "Commodore 128DCR (Italy)", GAME_NOT_WORKING | GAME_SUPPORTS_SAVE )
COMP( 1986, c128drsw, c128, 0, c128dcrp, c128swe, driver_device, 0,"Commodore Business Machines", "Commodore 128DCR (Sweden/Finland)", GAME_NOT_WORKING | GAME_SUPPORTS_SAVE )
COMP( 1986, c128d81, c128, 0, c128d81, c128, driver_device, 0, "Commodore Business Machines", "Commodore 128D/81 (NTSC, prototype)", GAME_NOT_WORKING | GAME_SUPPORTS_SAVE )
COMP( 1986, c128dr_se, c128, 0, c128dcrp, c128swe, driver_device, 0, "Commodore Business Machines", "Commodore 128DCR (Sweden/Finland)", GAME_NOT_WORKING | GAME_SUPPORTS_SAVE )
COMP( 1986, c128d81, c128, 0, c128d81, c128, driver_device, 0, "Commodore Business Machines", "Commodore 128D/81 (NTSC, prototype)", GAME_NOT_WORKING | GAME_SUPPORTS_SAVE )

View File

@ -7,7 +7,7 @@
- tsuit215 test failures
- IRQ (WRONG $DC0D)
- NMI (WRONG $DD0D)
- all CIA tests
- some CIA tests
- 64C PLA dump
- clean up inputs
@ -49,10 +49,16 @@ void c64_state::check_interrupts()
{
int restore = BIT(ioport("SPECIAL")->read(), 7);
m_maincpu->set_input_line(M6510_IRQ_LINE, m_cia1_irq || m_vic_irq || m_exp_irq);
m_maincpu->set_input_line(INPUT_LINE_NMI, m_cia2_irq || restore || m_exp_nmi);
int irq = m_cia1_irq || m_vic_irq || m_exp_irq;
int nmi = m_cia2_irq || restore || m_exp_nmi;
//int rdy = m_exp_dma && m_vic_ba;
m_cia1->flag_w(m_cass_rd && m_iec_srq);
m_maincpu->set_input_line(M6510_IRQ_LINE, irq);
m_maincpu->set_input_line(INPUT_LINE_NMI, nmi);
int flag = m_cass_rd && m_iec_srq;
m_cia1->flag_w(flag);
}
@ -62,15 +68,17 @@ void c64_state::check_interrupts()
//**************************************************************************
//-------------------------------------------------
// bankswitch -
// read_pla -
//-------------------------------------------------
void c64_state::bankswitch(offs_t offset, offs_t va, int rw, int aec, int ba, int cas, int *casram, int *basic, int *kernal, int *charom, int *grw, int *io, int *roml, int *romh)
void c64_state::read_pla(offs_t offset, offs_t va, int rw, int aec, int ba, int cas, int *casram, int *basic, int *kernal, int *charom, int *grw, int *io, int *roml, int *romh)
{
int game = m_exp->game_r(offset, ba, rw, m_hiram);
int exrom = m_exp->exrom_r(offset, ba, rw, m_hiram);
UINT32 input = VA12 << 15 | VA13 << 14 | game << 13 | exrom << 12 | rw << 11 | aec << 10 | ba << 9 | A12 << 8 | A13 << 7 | A14 << 6 | A15 << 5 | m_va14 << 4 | m_charen << 3 | m_hiram << 2 | m_loram << 1 | cas;
UINT32 input = VA12 << 15 | VA13 << 14 | game << 13 | exrom << 12 | rw << 11 | aec << 10 | ba << 9 | A12 << 8 |
A13 << 7 | A14 << 6 | A15 << 5 | m_va14 << 4 | m_charen << 3 | m_hiram << 2 | m_loram << 1 | cas;
UINT32 data = m_pla->read(input);
*casram = BIT(data, 0);
@ -88,13 +96,16 @@ void c64_state::bankswitch(offs_t offset, offs_t va, int rw, int aec, int ba, in
// read_memory -
//-------------------------------------------------
UINT8 c64_state::read_memory(address_space &space, offs_t offset, int ba, int casram, int basic, int kernal, int charom, int io, int roml, int romh)
UINT8 c64_state::read_memory(address_space &space, offs_t offset, offs_t va, int rw, int aec, int ba, int cas)
{
int casram, basic, kernal, charom, grw, io, roml, romh;
int io1 = 1, io2 = 1;
read_pla(offset, va, rw, !aec, ba, cas, &casram, &basic, &kernal, &charom, &grw, &io, &roml, &romh);
UINT8 data = 0xff;
if (ba)
if (!aec)
{
data = m_vic->bus_r();
}
@ -103,19 +114,19 @@ UINT8 c64_state::read_memory(address_space &space, offs_t offset, int ba, int ca
{
data = m_ram->pointer()[offset];
}
else if (!basic)
if (!basic)
{
data = m_basic[offset & 0x1fff];
}
else if (!kernal)
if (!kernal)
{
data = m_kernal[offset & 0x1fff];
}
else if (!charom)
if (!charom)
{
data = m_charom[offset & 0xfff];
}
else if (!io)
if (!io)
{
switch ((offset >> 10) & 0x03)
{
@ -128,7 +139,7 @@ UINT8 c64_state::read_memory(address_space &space, offs_t offset, int ba, int ca
break;
case 2: // COLOR
data = m_color_ram[offset & 0x3ff] | 0xf0;
data = m_color_ram[offset & 0x3ff] & 0x0f;
break;
case 3: // CIAS
@ -159,34 +170,17 @@ UINT8 c64_state::read_memory(address_space &space, offs_t offset, int ba, int ca
//-------------------------------------------------
// read -
// write_memory -
//-------------------------------------------------
READ8_MEMBER( c64_state::read )
void c64_state::write_memory(address_space &space, offs_t offset, UINT8 data, int rw, int aec, int ba, int cas)
{
offs_t va = 0;
int rw = 1, aec = 0, ba = 1, cas = 0;
int casram, basic, kernal, charom, grw, io, roml, romh;
bankswitch(offset, va, rw, aec, ba, cas, &casram, &basic, &kernal, &charom, &grw, &io, &roml, &romh);
return read_memory(space, offset, ba, casram, basic, kernal, charom, io, roml, romh);
}
//-------------------------------------------------
// write -
//-------------------------------------------------
WRITE8_MEMBER( c64_state::write )
{
offs_t va = 0;
int rw = 0, aec = 0, ba = 1, cas = 0;
int io1 = 1, io2 = 1;
int casram, basic, kernal, charom, grw, io, roml, romh;
bankswitch(offset, va, rw, aec, ba, cas, &casram, &basic, &kernal, &charom, &grw, &io, &roml, &romh);
read_pla(offset, va, rw, !aec, ba, cas, &casram, &basic, &kernal, &charom, &grw, &io, &roml, &romh);
if (offset < 0x0002)
{
// write to internal CPU register
@ -197,7 +191,7 @@ WRITE8_MEMBER( c64_state::write )
{
m_ram->pointer()[offset] = data;
}
else if (!io)
if (!io)
{
switch ((offset >> 10) & 0x03)
{
@ -240,19 +234,41 @@ WRITE8_MEMBER( c64_state::write )
}
//-------------------------------------------------
// read -
//-------------------------------------------------
READ8_MEMBER( c64_state::read )
{
offs_t va = 0;
int rw = 1, aec = 1, ba = 1, cas = 0;
return read_memory(space, offset, va, rw, aec, ba, cas);
}
//-------------------------------------------------
// write -
//-------------------------------------------------
WRITE8_MEMBER( c64_state::write )
{
int rw = 0, aec = 1, ba = 1, cas = 0;
write_memory(space, offset, data, rw, aec, ba, cas);
}
//-------------------------------------------------
// vic_videoram_r -
//-------------------------------------------------
READ8_MEMBER( c64_state::vic_videoram_r )
{
offset = (!m_va15 << 15) | (!m_va14 << 14) | offset;
offs_t va = (!m_va15 << 15) | (!m_va14 << 14) | offset;
int rw = 1, aec = 0, ba = 0, cas = 0;
int rw = 1, aec = 1, ba = 0, cas = 0;
int casram, basic, kernal, charom, grw, io, roml, romh;
bankswitch(0xffff, offset, rw, aec, ba, cas, &casram, &basic, &kernal, &charom, &grw, &io, &roml, &romh);
return read_memory(space, offset, ba, casram, basic, kernal, charom, io, roml, romh);
return read_memory(space, offset, va, rw, aec, ba, cas);
}
@ -386,9 +402,6 @@ static MOS6567_INTERFACE( vic_intf )
SCREEN_TAG,
M6510_TAG,
DEVCB_DRIVER_LINE_MEMBER(c64_state, vic_irq_w),
DEVCB_NULL, // RDY
DEVCB_NULL,
DEVCB_NULL,
DEVCB_NULL,
DEVCB_NULL
};
@ -844,6 +857,16 @@ WRITE_LINE_MEMBER( c64_state::exp_nmi_w )
check_interrupts();
}
WRITE_LINE_MEMBER( c64_state::exp_dma_w )
{
if (m_exp_dma != state)
{
m_exp_dma = state;
m_maincpu->set_input_line(INPUT_LINE_HALT, m_exp_dma);
}
}
WRITE_LINE_MEMBER( c64_state::exp_reset_w )
{
if (state == ASSERT_LINE)
@ -858,7 +881,7 @@ static C64_EXPANSION_INTERFACE( expansion_intf )
DEVCB_DRIVER_MEMBER(c64_state, exp_dma_w),
DEVCB_DRIVER_LINE_MEMBER(c64_state, exp_irq_w),
DEVCB_DRIVER_LINE_MEMBER(c64_state, exp_nmi_w),
DEVCB_CPU_INPUT_LINE(M6510_TAG, INPUT_LINE_HALT),
DEVCB_DRIVER_LINE_MEMBER(c64_state, exp_dma_w),
DEVCB_DRIVER_LINE_MEMBER(c64_state, exp_reset_w)
};
@ -907,6 +930,7 @@ void c64_state::machine_start()
save_item(NAME(m_vic_irq));
save_item(NAME(m_exp_irq));
save_item(NAME(m_exp_nmi));
save_item(NAME(m_exp_dma));
save_item(NAME(m_cass_rd));
save_item(NAME(m_iec_srq));
}
@ -974,7 +998,7 @@ static MACHINE_CONFIG_START( ntsc, c64_state )
// sound hardware
MCFG_SPEAKER_STANDARD_MONO("mono")
MCFG_SOUND_ADD(MOS6851_TAG, SID6581, VIC6567_CLOCK)
MCFG_SOUND_ADD(MOS6581_TAG, SID6581, VIC6567_CLOCK)
MCFG_SOUND_CONFIG(sid_intf)
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.00)
MCFG_SOUND_ADD("dac", DAC, 0)
@ -1050,7 +1074,7 @@ MACHINE_CONFIG_END
//-------------------------------------------------
static MACHINE_CONFIG_DERIVED_CLASS( ntsc_c, ntsc, c64c_state )
MCFG_SOUND_REPLACE(MOS6851_TAG, SID8580, VIC6567_CLOCK)
MCFG_SOUND_REPLACE(MOS6581_TAG, SID8580, VIC6567_CLOCK)
MCFG_SOUND_CONFIG(sid_intf)
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.00)
MACHINE_CONFIG_END
@ -1073,7 +1097,7 @@ static MACHINE_CONFIG_START( pal, c64_state )
// sound hardware
MCFG_SPEAKER_STANDARD_MONO("mono")
MCFG_SOUND_ADD(MOS6851_TAG, SID6581, VIC6569_CLOCK)
MCFG_SOUND_ADD(MOS6581_TAG, SID6581, VIC6569_CLOCK)
MCFG_SOUND_CONFIG(sid_intf)
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.00)
MCFG_SOUND_ADD("dac", DAC, 0)
@ -1127,7 +1151,7 @@ MACHINE_CONFIG_END
//-------------------------------------------------
static MACHINE_CONFIG_DERIVED_CLASS( pal_c, pal, c64c_state )
MCFG_SOUND_REPLACE(MOS6851_TAG, SID8580, VIC6569_CLOCK)
MCFG_SOUND_REPLACE(MOS6581_TAG, SID8580, VIC6569_CLOCK)
MCFG_SOUND_CONFIG(sid_intf)
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.00)
MACHINE_CONFIG_END
@ -1150,7 +1174,7 @@ static MACHINE_CONFIG_START( pal_gs, c64gs_state )
// sound hardware
MCFG_SPEAKER_STANDARD_MONO("mono")
MCFG_SOUND_ADD(MOS6851_TAG, SID8580, VIC6569_CLOCK)
MCFG_SOUND_ADD(MOS6581_TAG, SID8580, VIC6569_CLOCK)
MCFG_SOUND_CONFIG(sid_intf)
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.00)
MCFG_SOUND_ADD("dac", DAC, 0)

View File

@ -1041,9 +1041,6 @@ static MOS6567_INTERFACE( vic_intf )
M6509_TAG,
DEVCB_DRIVER_LINE_MEMBER(p500_state, vic_irq_w),
DEVCB_NULL, // RDY
DEVCB_NULL,
DEVCB_NULL,
DEVCB_NULL,
DEVCB_NULL
};

View File

@ -207,21 +207,6 @@ INTERRUPT_GEN_MEMBER(vic10_state::vic10_frame_interrupt)
cbm_common_interrupt(&device);
}
READ8_MEMBER( vic10_state::vic_lightpen_x_cb )
{
return ioport("LIGHTX")->read() & ~0x01;
}
READ8_MEMBER( vic10_state::vic_lightpen_y_cb )
{
return ioport("LIGHTY")->read() & ~0x01;
}
READ8_MEMBER( vic10_state::vic_lightpen_button_cb )
{
return ioport("OTHER")->read() & 0x04;
}
WRITE_LINE_MEMBER( vic10_state::vic_irq_w )
{
m_vic_irq = state;
@ -229,21 +214,13 @@ WRITE_LINE_MEMBER( vic10_state::vic_irq_w )
check_interrupts();
}
READ8_MEMBER( vic10_state::vic_rdy_cb )
{
return ioport("CYCLES")->read() & 0x07;
}
static MOS6566_INTERFACE( vic_intf )
{
SCREEN_TAG,
M6510_TAG,
DEVCB_DRIVER_LINE_MEMBER(vic10_state, vic_irq_w),
DEVCB_NULL,
DEVCB_DRIVER_MEMBER(vic10_state, vic_lightpen_x_cb),
DEVCB_DRIVER_MEMBER(vic10_state, vic_lightpen_y_cb),
DEVCB_DRIVER_MEMBER(vic10_state, vic_lightpen_button_cb),
DEVCB_DRIVER_MEMBER(vic10_state, vic_rdy_cb)
DEVCB_NULL
};

View File

@ -82,7 +82,8 @@ public:
m_exp_irq(CLEAR_LINE),
m_exp_nmi(CLEAR_LINE),
m_cass_rd(1),
m_iec_srq(1)
m_iec_srq(1),
m_vic_k(0x07)
{ }
required_device<legacy_cpu_device> m_maincpu;
@ -129,9 +130,8 @@ public:
DECLARE_READ_LINE_MEMBER( mmu_sense40_r );
INTERRUPT_GEN_MEMBER( frame_interrupt );
DECLARE_READ8_MEMBER( vic_dma_read );
DECLARE_READ8_MEMBER( vic_dma_read_color );
DECLARE_WRITE_LINE_MEMBER( vic_irq_w );
DECLARE_WRITE8_MEMBER( vic_k_w );
DECLARE_READ8_MEMBER( sid_potx_r );
DECLARE_READ8_MEMBER( sid_poty_r );
@ -194,11 +194,12 @@ public:
int m_vic_irq;
int m_exp_irq;
int m_exp_nmi;
int m_exp_dma;
int m_cass_rd;
int m_iec_srq;
// keyboard state
UINT8 m_keyline[3];
UINT8 m_vic_k;
};

View File

@ -3,7 +3,6 @@
#ifndef __C64__
#define __C64__
#include "emu.h"
#include "formats/cbm_snqk.h"
#include "includes/cbm.h"
@ -23,7 +22,7 @@
#define M6510_TAG "u7"
#define MOS6567_TAG "u19"
#define MOS6569_TAG "u19"
#define MOS6851_TAG "u18"
#define MOS6581_TAG "u18"
#define MOS6526_1_TAG "u1"
#define MOS6526_2_TAG "u2"
#define PLA_TAG "u17"
@ -39,7 +38,7 @@ public:
m_maincpu(*this, M6510_TAG),
m_pla(*this, PLA_TAG),
m_vic(*this, MOS6569_TAG),
m_sid(*this, MOS6851_TAG),
m_sid(*this, MOS6581_TAG),
m_cia1(*this, MOS6526_1_TAG),
m_cia2(*this, MOS6526_2_TAG),
m_iec(*this, CBM_IEC_TAG),
@ -82,8 +81,9 @@ public:
virtual void machine_reset();
void check_interrupts();
void bankswitch(offs_t offset, offs_t va, int rw, int aec, int ba, int cas, int *casram, int *basic, int *kernal, int *charom, int *grw, int *io, int *roml, int *romh);
UINT8 read_memory(address_space &space, offs_t offset, int ba, int casram, int basic, int kernal, int charom, int io, int roml, int romh);
void read_pla(offs_t offset, offs_t va, int rw, int aec, int ba, int cas, int *casram, int *basic, int *kernal, int *charom, int *grw, int *io, int *roml, int *romh);
UINT8 read_memory(address_space &space, offs_t offset, offs_t va, int rw, int aec, int ba, int cas);
void write_memory(address_space &space, offs_t offset, UINT8 data, int rw, int aec, int ba, int cas);
DECLARE_READ8_MEMBER( read );
DECLARE_WRITE8_MEMBER( write );
@ -115,6 +115,7 @@ public:
DECLARE_WRITE8_MEMBER( exp_dma_w );
DECLARE_WRITE_LINE_MEMBER( exp_irq_w );
DECLARE_WRITE_LINE_MEMBER( exp_nmi_w );
DECLARE_WRITE_LINE_MEMBER( exp_dma_w );
DECLARE_WRITE_LINE_MEMBER( exp_reset_w );
// memory state
@ -136,6 +137,7 @@ public:
int m_vic_irq;
int m_exp_irq;
int m_exp_nmi;
int m_exp_dma;
int m_cass_rd;
int m_iec_srq;
};

View File

@ -635,16 +635,16 @@ v364
c128 // Commodore 128 - NTSC
c128cr // Commodore 128CR - NTSC (proto?)
c128sfi // Commodore 128 - PAL (Swedish / Finnish)
//c128fra // Commodore 128 - PAL (French)
c128ger // Commodore 128 - PAL (German)
//c128nor // Commodore 128 - PAL (Norwegian)
c128_se // Commodore 128 - PAL (Swedish / Finnish)
//c128_rr // Commodore 128 - PAL (French)
c128_de // Commodore 128 - PAL (German)
//c128_no // Commodore 128 - PAL (Norwegian)
c128d // Commodore 128D - PAL
c128dpr // Commodore 128D - NTSC (proto)
c128dcr // Commodore 128DCR - NTSC
c128drde // Commodore 128DCR - PAL (German)
//c128drit // Commodore 128DCR - PAL (Italian)
c128drsw // Commodore 128DCR - PAL (Swedish)
c128dr_de // Commodore 128DCR - PAL (German)
//c128dr_it // Commodore 128DCR - PAL (Italian)
c128dr_se // Commodore 128DCR - PAL (Swedish)
c128d81 // Commodore 128D/81

View File

@ -22,7 +22,6 @@
- cleanup
- light pen
- remove RDY hack
- http://hitmen.c02.at/temp/palstuff/
*/
@ -86,7 +85,9 @@ enum
REGISTER_M4C,
REGISTER_M5C,
REGISTER_M6C,
REGISTER_M7C
REGISTER_M7C,
REGISTER_KCR,
REGISTER_FAST
};
@ -155,11 +156,6 @@ static const rgb_t PALETTE[] =
#define VIC2_X_VALUE ((LIGHTPEN_X_VALUE / 1.3) + 12)
#define VIC2_Y_VALUE ((LIGHTPEN_Y_VALUE ) + 10)
#define VIC2E_K0_LEVEL (m_reg[0x2f] & 0x01)
#define VIC2E_K1_LEVEL (m_reg[0x2f] & 0x02)
#define VIC2E_K2_LEVEL (m_reg[0x2f] & 0x04)
/* sprites 0 .. 7 */
#define SPRITEON(nr) (m_reg[0x15] & (1 << nr))
#define SPRITE_Y_EXPAND(nr) (m_reg[0x17] & (1 << nr))
@ -328,7 +324,7 @@ inline void mos6566_device::vic2_suspend_cpu()
if (m_device_suspended == 0)
{
m_first_ba_cycle = m_cycles_counter;
if (m_in_rdy_workaround_func(0) != 7 )
//if (m_in_rdy_workaround_func(0) != 7 )
{
// machine.firstcpu->suspend(SUSPEND_REASON_SPIN, 0);
}
@ -618,10 +614,7 @@ void mos6566_device::device_start()
// resolve callbacks
m_out_irq_func.resolve(m_out_irq_cb, *this);
m_out_rdy_func.resolve(m_out_rdy_cb, *this);
m_in_lightpen_x_func.resolve(m_in_x_cb, *this);
m_in_lightpen_y_func.resolve(m_in_y_cb, *this);
m_in_lightpen_button_func.resolve(m_in_button_cb, *this);
m_in_rdy_workaround_func.resolve(m_in_rdy_cb, *this);
m_out_k_func.resolve(m_out_k_cb, *this);
m_cpu = machine().device<cpu_device>(m_cpu_tag);
@ -838,8 +831,8 @@ void mos6566_device::execute_run()
// if (LIGHTPEN_BUTTON)
{
m_reg[0x13] = VIC2_X_VALUE;
m_reg[0x14] = VIC2_Y_VALUE;
// m_reg[0x13] = VIC2_X_VALUE;
// m_reg[0x14] = VIC2_Y_VALUE;
}
vic2_set_interrupt(8);
}
@ -1459,8 +1452,8 @@ void mos6569_device::execute_run()
// if (LIGHTPEN_BUTTON)
{
m_reg[0x13] = VIC2_X_VALUE;
m_reg[0x14] = VIC2_Y_VALUE;
// m_reg[0x13] = VIC2_X_VALUE;
// m_reg[0x14] = VIC2_Y_VALUE;
}
vic2_set_interrupt(8);
}
@ -1650,8 +1643,8 @@ void mos6569_device::execute_run()
m_raster_x = 0xfffc;
if ((m_in_rdy_workaround_func(0) == 0 ) && (m_is_bad_line))
m_rdy_cycles += (43+adjust(0));
// if ((m_in_rdy_workaround_func(0) == 0 ) && (m_is_bad_line))
// m_rdy_cycles += (43+adjust(0));
m_cycle++;
break;
@ -1665,8 +1658,8 @@ void mos6569_device::execute_run()
m_vc = m_vc_base;
if ((m_in_rdy_workaround_func(0) == 1 ) && (m_is_bad_line))
m_rdy_cycles += (42+adjust(0));
// if ((m_in_rdy_workaround_func(0) == 1 ) && (m_is_bad_line))
// m_rdy_cycles += (42+adjust(0));
m_cycle++;
break;
@ -1685,8 +1678,8 @@ void mos6569_device::execute_run()
m_ml_index = 0;
vic2_matrix_access();
if ((m_in_rdy_workaround_func(0) == 2 ) && (m_is_bad_line))
m_rdy_cycles += (41+adjust(0));
// if ((m_in_rdy_workaround_func(0) == 2 ) && (m_is_bad_line))
// m_rdy_cycles += (41+adjust(0));
m_cycle++;
break;
@ -1709,8 +1702,8 @@ void mos6569_device::execute_run()
vic2_matrix_access();
if ((m_in_rdy_workaround_func(0) == 3 ) && (m_is_bad_line))
m_rdy_cycles += (40+adjust(0));
// if ((m_in_rdy_workaround_func(0) == 3 ) && (m_is_bad_line))
// m_rdy_cycles += (40+adjust(0));
m_cycle++;
break;
@ -1746,8 +1739,8 @@ void mos6569_device::execute_run()
vic2_fetch_if_bad_line();
vic2_matrix_access();
if ((m_in_rdy_workaround_func(0) == 4 ) && (m_is_bad_line))
m_rdy_cycles += (40+adjust(0));
// if ((m_in_rdy_workaround_func(0) == 4 ) && (m_is_bad_line))
// m_rdy_cycles += (40+adjust(0));
m_cycle++;
break;
@ -2554,8 +2547,8 @@ READ8_MEMBER( mos6566_device::read )
val = m_reg[offset];
break;
case 0x2f:
case 0x30:
case REGISTER_KCR:
case REGISTER_FAST:
if (IS_VICIIE)
{
val = m_reg[offset];
@ -2782,18 +2775,26 @@ WRITE8_MEMBER( mos6566_device::write )
}
break;
case 0x2f:
case REGISTER_KCR:
if (IS_VICIIE)
{
DBG_LOG(2, "vic write", ("%.2x:%.2x\n", offset, data));
m_reg[offset] = data;
m_reg[offset] = data | 0xf8;
m_out_k_func(0, data & 0x07);
}
break;
case 0x30:
case REGISTER_FAST:
if (IS_VICIIE)
{
m_reg[offset] = data;
if (BIT(m_reg[offset], 0) != BIT(data, 0))
{
m_cpu->set_unscaled_clock(clock() << BIT(data, 0));
printf("clock %u\n",clock() << BIT(data, 0));
}
m_reg[offset] = data | 0xfc;
m_on = !BIT(data, 0);
}
break;
@ -2841,12 +2842,3 @@ UINT8 mos6566_device::bus_r()
{
return m_last_data;
}
READ_LINE_MEMBER( mos8564_device::k0_r ) { return VIC2E_K0_LEVEL; }
READ_LINE_MEMBER( mos8564_device::k1_r ) { return VIC2E_K1_LEVEL; }
READ_LINE_MEMBER( mos8564_device::k2_r ) { return VIC2E_K2_LEVEL; }
READ_LINE_MEMBER( mos8566_device::k0_r ) { return VIC2E_K0_LEVEL; }
READ_LINE_MEMBER( mos8566_device::k1_r ) { return VIC2E_K1_LEVEL; }
READ_LINE_MEMBER( mos8566_device::k2_r ) { return VIC2E_K2_LEVEL; }

View File

@ -291,11 +291,7 @@ struct mos6566_interface
devcb_write_line m_out_irq_cb;
devcb_write_line m_out_rdy_cb;
devcb_read8 m_in_x_cb;
devcb_read8 m_in_y_cb;
devcb_read8 m_in_button_cb;
devcb_read8 m_in_rdy_cb;
devcb_write8 m_out_k_cb;
};
@ -443,17 +439,9 @@ protected:
UINT64 m_first_ba_cycle;
UINT8 m_device_suspended;
/* IRQ */
devcb_resolved_write_line m_out_irq_func;
/* RDY */
devcb_resolved_write_line m_out_rdy_func;
devcb_resolved_read8 m_in_rdy_workaround_func;
/* lightpen */
devcb_resolved_read8 m_in_lightpen_button_func;
devcb_resolved_read8 m_in_lightpen_x_func;
devcb_resolved_read8 m_in_lightpen_y_func;
devcb_resolved_write8 m_out_k_func;
};
@ -477,29 +465,14 @@ public:
mos8562_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
};
class vic2e_device_interface
{
public:
vic2e_device_interface() {}
virtual ~vic2e_device_interface() {}
virtual DECLARE_READ_LINE_MEMBER( k0_r ) { return 1; }
virtual DECLARE_READ_LINE_MEMBER( k1_r ) { return 1; }
virtual DECLARE_READ_LINE_MEMBER( k2_r ) { return 1; }
};
// ======================> mos8564_device
class mos8564_device : public mos6567_device, public vic2e_device_interface
class mos8564_device : public mos6567_device
{
public:
// construction/destruction
mos8564_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
DECLARE_READ_LINE_MEMBER( k0_r );
DECLARE_READ_LINE_MEMBER( k1_r );
DECLARE_READ_LINE_MEMBER( k2_r );
};
@ -529,15 +502,11 @@ public:
// ======================> mos8566_device
class mos8566_device : public mos6569_device, public vic2e_device_interface
class mos8566_device : public mos6569_device
{
public:
// construction/destruction
mos8566_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
DECLARE_READ_LINE_MEMBER( k0_r );
DECLARE_READ_LINE_MEMBER( k1_r );
DECLARE_READ_LINE_MEMBER( k2_r );
};