mirror of
https://github.com/holub/mame
synced 2025-04-23 00:39:36 +03:00
-saa7191: Skeleton device for the Philips SAA7191 Digital Multistandard Colour Decoder (DSMD), nw
-sgi_mc: Fixed a silly oversight which should fix an Indigo 2 regression, nw -vino: Added kludge devcbs for I2C data out/in/stop, nw
This commit is contained in:
mooglyguy
parent
d4e2fbd306
commit
451066eaca
@ -3185,6 +3185,8 @@ files {
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MAME_DIR .. "src/mame/drivers/octane.cpp",
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MAME_DIR .. "src/mame/machine/vino.cpp",
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MAME_DIR .. "src/mame/machine/vino.h",
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MAME_DIR .. "src/mame/machine/saa7191.cpp",
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MAME_DIR .. "src/mame/machine/saa7191.h",
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MAME_DIR .. "src/mame/machine/sgi.cpp",
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MAME_DIR .. "src/mame/machine/sgi.h",
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MAME_DIR .. "src/mame/machine/hal2.cpp",
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@ -5,8 +5,9 @@
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* SGI IP22/IP24 Indigo2/Indy workstation
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*
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* Known Issues:
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* - The proper hookup for the MAC address is unknown, requiring
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* a fake MAC to be set up before any IRIX installers will proceed.
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* - The MAC address is supplied by the NVRAM, requiring the user to
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* use "setenv -f eaddr 08:00:69:xx:yy:zz" from the Indy boot PROM
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* before any IRIX installers will proceed.
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* - The Gentoo Linux live CD hangs on starting the kernel.
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*
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* Memory map:
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@ -68,6 +69,7 @@
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#include "bus/nscsi/hd.h"
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#include "machine/sgi.h"
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#include "machine/vino.h"
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#include "machine/saa7191.h"
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#include "machine/wd33c9x.h"
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#include "sound/cdda.h"
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@ -93,6 +95,7 @@ public:
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, m_ioc2(*this, "ioc2")
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, m_rtc(*this, "rtc")
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, m_vino(*this, "vino")
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, m_dmsd(*this, "dmsd")
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, m_gio64(*this, "gio64")
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, m_gio64_gfx(*this, "gio64_gfx")
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, m_gio64_exp0(*this, "gio64_exp0")
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@ -141,6 +144,7 @@ protected:
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required_device<ioc2_device> m_ioc2;
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required_device<ds1386_device> m_rtc;
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optional_device<vino_device> m_vino;
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optional_device<saa7191_device> m_dmsd;
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optional_device<gio64_device> m_gio64;
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optional_device<gio64_slot_device> m_gio64_gfx;
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optional_device<gio64_slot_device> m_gio64_exp0;
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@ -393,7 +397,13 @@ void ip24_state::ip24(machine_config &config)
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m_hpc3->set_addrmap(hpc3_device::AS_PIO6, &ip24_state::pio6_map);
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SGI_IOC2_GUINNESS(config, m_ioc2, m_maincpu);
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SAA7191(config, m_dmsd);
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VINO(config, m_vino);
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m_vino->i2c_data_out().set(m_dmsd, FUNC(saa7191_device::i2c_data_w));
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m_vino->i2c_data_in().set(m_dmsd, FUNC(saa7191_device::i2c_data_r));
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m_vino->i2c_stop().set(m_dmsd, FUNC(saa7191_device::i2c_stop_w));
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DS1386_8K(config, m_rtc, 32768);
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}
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231
src/mame/machine/saa7191.cpp
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231
src/mame/machine/saa7191.cpp
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@ -0,0 +1,231 @@
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// license:BSD-3-Clause
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// copyright-holders:Ryan Holtz
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/*********************************************************************
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saa7191.cpp
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Philips SAA7191B Digital Multistandard Colour Decoder (DMSD)
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TODO:
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- Actual functionality
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*********************************************************************/
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#include "emu.h"
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#include "saa7191.h"
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#define LOG_UNKNOWN (1 << 0)
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#define LOG_READS (1 << 1)
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#define LOG_WRITES (1 << 2)
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#define LOG_ERRORS (1 << 3)
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#define LOG_I2C_IGNORES (1 << 4)
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#define LOG_DEFAULT (LOG_READS | LOG_WRITES | LOG_ERRORS | LOG_I2C_IGNORES | LOG_UNKNOWN)
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#define VERBOSE (LOG_DEFAULT)
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#include "logmacro.h"
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DEFINE_DEVICE_TYPE(SAA7191, saa7191_device, "saa7191", "Philips SAA7191 DMSD")
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saa7191_device::saa7191_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
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: device_t(mconfig, SAA7191, tag, owner, clock)
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, m_chr_in(*this)
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, m_cvbs_in(*this)
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, m_y_out(*this)
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, m_uv_out(*this)
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, m_hs_out(*this)
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, m_vs_out(*this)
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{
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}
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void saa7191_device::device_start()
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{
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save_item(NAME(m_status));
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save_item(NAME(m_regs));
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save_item(NAME(m_i2c_write_addr));
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save_item(NAME(m_i2c_read_addr));
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save_item(NAME(m_i2c_subaddr));
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save_item(NAME(m_i2c_state));
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m_chr_in.resolve_safe(0);
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m_cvbs_in.resolve_safe(0);
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m_y_out.resolve_safe();
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m_uv_out.resolve_safe();
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m_hs_out.resolve_safe();
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m_vs_out.resolve_safe();
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m_input_clock = timer_alloc(TIMER_INPUT_CLOCK);
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m_input_clock->adjust(attotime::never);
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}
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void saa7191_device::device_reset()
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{
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m_status = 0;
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memset(m_regs, 0, sizeof(uint8_t) * REG_COUNT);
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m_i2c_write_addr = 0x8a;
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m_i2c_read_addr = 0x8b;
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m_i2c_subaddr = 0x00;
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m_i2c_state = I2C_STATE_IDLE;
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m_input_clock->adjust(attotime::never);
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}
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void saa7191_device::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr)
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{
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}
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WRITE8_MEMBER(saa7191_device::i2c_data_w)
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{
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switch (m_i2c_state)
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{
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case I2C_STATE_IDLE:
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if (data == m_i2c_write_addr)
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m_i2c_state = I2C_STATE_SUBADDR_WRITE;
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else if (data == m_i2c_read_addr)
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m_i2c_state = I2C_STATE_SUBADDR_READ;
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else
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LOGMASKED(LOG_I2C_IGNORES, "I2C idle, address %02x ignored (mine are R:%02x/W:%02x)\n", data, m_i2c_read_addr, m_i2c_write_addr);
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break;
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case I2C_STATE_SUBADDR_WRITE:
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m_i2c_subaddr = data;
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m_i2c_state = I2C_STATE_DATA_WRITE;
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break;
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case I2C_STATE_SUBADDR_READ:
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m_i2c_subaddr = data;
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m_i2c_state = I2C_STATE_DATA_READ;
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break;
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case I2C_STATE_DATA_WRITE:
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reg_w(space, m_i2c_subaddr, data);
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m_i2c_subaddr = (m_i2c_subaddr + 1) % REG_COUNT;
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break;
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case I2C_STATE_DATA_READ:
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LOGMASKED(LOG_ERRORS, "I2C is expecting a data read, but data was written, returning to idle\n");
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m_i2c_state = I2C_STATE_IDLE;
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break;
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default:
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LOGMASKED(LOG_ERRORS, "Unknown I2C state %d, returning to idle\n", m_i2c_state);
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m_i2c_state = I2C_STATE_IDLE;
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break;
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}
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}
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READ8_MEMBER(saa7191_device::i2c_data_r)
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{
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if (m_i2c_state != I2C_STATE_DATA_READ)
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{
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LOGMASKED(LOG_ERRORS, "i2c_data_r called, but we are in state %d and not expecting a data read, returning to idle\n", m_i2c_state);
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m_i2c_state = I2C_STATE_IDLE;
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return 0;
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}
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if (m_i2c_subaddr == 0x01)
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{
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LOGMASKED(LOG_READS, "i2c_data_r: Status = %02x\n", m_status);
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m_i2c_subaddr = (m_i2c_subaddr + 1) % REG_COUNT;
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return m_status;
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}
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LOGMASKED(LOG_UNKNOWN, "i2c_data_r: Unknown Sub-Address %02x, returning 0\n", m_i2c_subaddr);
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m_i2c_subaddr = (m_i2c_subaddr + 1) % REG_COUNT;
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return 0;
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}
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WRITE_LINE_MEMBER(saa7191_device::i2c_stop_w)
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{
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if (state)
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m_i2c_state = I2C_STATE_IDLE;
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}
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WRITE_LINE_MEMBER(saa7191_device::iicsa_w)
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{
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m_i2c_write_addr = state ? 0x8e : 0x8a;
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m_i2c_read_addr = m_i2c_write_addr | 1;
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}
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WRITE8_MEMBER(saa7191_device::reg_w)
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{
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if (m_i2c_subaddr < REG_COUNT)
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{
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m_regs[m_i2c_subaddr] = data;
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}
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switch (m_i2c_subaddr)
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{
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case REG_IDEL:
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LOGMASKED(LOG_WRITES, "i2c_data_w: Increment delay = %02x\n", data);
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break;
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case REG_HSYB:
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LOGMASKED(LOG_WRITES, "i2c_data_w: H sync begin, 50Hz = %02x\n", data);
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break;
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case REG_HSYS:
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LOGMASKED(LOG_WRITES, "i2c_data_w: H sync stop, 50Hz = %02x\n", data);
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break;
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case REG_HCLB:
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LOGMASKED(LOG_WRITES, "i2c_data_w: H clamp begin, 50Hz = %02x\n", data);
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break;
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case REG_HCLS:
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LOGMASKED(LOG_WRITES, "i2c_data_w: H clamp stop, 50Hz = %02x\n", data);
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break;
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case REG_HPHI:
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LOGMASKED(LOG_WRITES, "i2c_data_w: H sync after PHI1, 50Hz = %02x\n", data);
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break;
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case REG_LUMC:
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LOGMASKED(LOG_WRITES, "i2c_data_w: Luminance control = %02x\n", data);
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break;
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case REG_HUEC:
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LOGMASKED(LOG_WRITES, "i2c_data_w: Hue control = %02x\n", data);
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break;
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case REG_CKTQ:
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LOGMASKED(LOG_WRITES, "i2c_data_w: Colour killer threshold QAM = %02x\n", data);
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break;
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case REG_CKTS:
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LOGMASKED(LOG_WRITES, "i2c_data_w: Colour killer threshold SECAM = %02x\n", data);
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break;
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case REG_PLSE:
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LOGMASKED(LOG_WRITES, "i2c_data_w: PAL switch sensitivity = %02x\n", data);
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break;
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case REG_SESE:
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LOGMASKED(LOG_WRITES, "i2c_data_w: SECAM switch sensitivity = %02x\n", data);
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break;
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case REG_GAIN:
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LOGMASKED(LOG_WRITES, "i2c_data_w: Chroma gain control settings = %02x\n", data);
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break;
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case REG_STDC:
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LOGMASKED(LOG_WRITES, "i2c_data_w: Standard/mode control = %02x\n", data);
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break;
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case REG_IOCK:
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LOGMASKED(LOG_WRITES, "i2c_data_w: I/O and clock control = %02x\n", data);
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break;
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case REG_CTL1:
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LOGMASKED(LOG_WRITES, "i2c_data_w: Control #1 = %02x\n", data);
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break;
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case REG_CTL2:
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LOGMASKED(LOG_WRITES, "i2c_data_w: Control #2 = %02x\n", data);
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break;
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case REG_CHCV:
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LOGMASKED(LOG_WRITES, "i2c_data_w: Chroma gain reference = %02x\n", data);
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break;
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case REG_HS6B:
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LOGMASKED(LOG_WRITES, "i2c_data_w: H sync begin, 60Hz = %02x\n", data);
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break;
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case REG_HS6S:
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LOGMASKED(LOG_WRITES, "i2c_data_w: H sync stop, 60Hz = %02x\n", data);
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break;
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case REG_HC6B:
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LOGMASKED(LOG_WRITES, "i2c_data_w: H clamp begin, 60Hz = %02x\n", data);
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break;
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case REG_HC6S:
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LOGMASKED(LOG_WRITES, "i2c_data_w: H clamp stop, 60Hz = %02x\n", data);
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break;
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case REG_HP6I:
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LOGMASKED(LOG_WRITES, "i2c_data_w: H sync after PHI1, 60Hz = %02x\n", data);
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break;
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default:
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LOGMASKED(LOG_WRITES, "i2c_data_w: Unknown Register %02x = %02x (ignored)\n", m_i2c_subaddr, data);
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if (m_i2c_subaddr < REG_COUNT)
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{
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m_regs[m_i2c_subaddr] = 0;
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}
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break;
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}
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}
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177
src/mame/machine/saa7191.h
Normal file
177
src/mame/machine/saa7191.h
Normal file
@ -0,0 +1,177 @@
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// license:BSD-3-Clause
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// copyright-holders:Ryan Holtz
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/*********************************************************************
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saa7191.h
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Philips SAA7191B Digital Multistandard Colour Decoder (DMSD)
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TODO:
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- Actual functionality
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*********************************************************************/
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#ifndef MAME_MACHINE_SAA7191_H
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#define MAME_MACHINE_SAA7191_H
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#pragma once
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class saa7191_device : public device_t
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{
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public:
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saa7191_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0U);
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DECLARE_WRITE8_MEMBER(i2c_data_w);
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DECLARE_READ8_MEMBER(i2c_data_r);
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DECLARE_WRITE_LINE_MEMBER(i2c_stop_w);
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DECLARE_WRITE_LINE_MEMBER(iicsa_w);
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auto chr_in() { return m_chr_in.bind(); }
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auto cvbs_in() { return m_cvbs_in.bind(); }
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auto y_out() { return m_y_out.bind(); }
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auto uv_out() { return m_uv_out.bind(); }
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auto hs_out() { return m_hs_out.bind(); }
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auto vs_out() { return m_vs_out.bind(); }
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protected:
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// device-level overrides
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virtual void device_start() override;
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virtual void device_reset() override;
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virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) override;
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private:
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DECLARE_WRITE8_MEMBER(reg_w);
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enum
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{
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REG_IDEL = 0x00,
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REG_HSYB = 0x01,
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REG_HSYS = 0x02,
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REG_HCLB = 0x03,
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REG_HCLS = 0x04,
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REG_HPHI = 0x05,
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REG_LUMC = 0x06,
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REG_HUEC = 0x07,
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REG_CKTQ = 0x08,
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REG_CKTS = 0x09,
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REG_PLSE = 0x0a,
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REG_SESE = 0x0b,
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REG_GAIN = 0x0c,
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REG_STDC = 0x0d,
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REG_IOCK = 0x0e,
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REG_CTL1 = 0x0f,
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REG_CTL2 = 0x10,
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REG_CHCV = 0x11,
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REG_HS6B = 0x14,
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REG_HS6S = 0x15,
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REG_HC6B = 0x16,
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REG_HC6S = 0x17,
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REG_HP6I = 0x18,
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REG_COUNT,
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LUMC_APER_SHIFT = 0,
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LUMC_APER_MASK = (3 << LUMC_APER_SHIFT),
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LUMC_CORI_SHIFT = 2,
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LUMC_CORI_MASK = (3 << LUMC_CORI_SHIFT),
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LUMC_BPSS_SHIFT = 4,
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LUMC_BPSS_MASK = (3 << LUMC_BPSS_SHIFT),
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LUMC_PREF_BIT = 6,
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LUMC_PREF_MASK = (1 << LUMC_PREF_BIT),
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LUMC_BYPS_BIT = 7,
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LUMC_BYPS_MASK = (1 << LUMC_BYPS_BIT),
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CKTQ_SHIFT = 3,
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CKTQ_MASK = (0x1f << CKTQ_SHIFT),
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CKTS_SHIFT = 3,
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CKTS_MASK = (0x1f << CKTS_SHIFT),
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GAIN_LFIS_SHIFT = 5,
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GAIN_LFIS_MASK = (3 << GAIN_LFIS_SHIFT),
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GAIN_COLO_BIT = 7,
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GAIN_COLO_MASK = (1 << GAIN_COLO_BIT),
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GAIN_MASK = GAIN_LFIS_MASK | GAIN_COLO_MASK,
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STDC_SECS_BIT = 0,
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STDC_SECS_MASK = (1 << STDC_SECS_BIT),
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STDC_GPSW0_BIT = 1,
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STDC_GPSW0_MASK = (1 << STDC_GPSW0_BIT),
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STDC_HRMV_BIT = 2,
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STDC_HRMV_MASK = (1 << STDC_HRMV_BIT),
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STDC_NFEN_BIT = 3,
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STDC_NFEN_MASK = (1 << STDC_NFEN_BIT),
|
||||
STDC_VTRC_BIT = 7,
|
||||
STDC_VTRC_MASK = (1 << STDC_VTRC_BIT),
|
||||
STDC_MASK = STDC_SECS_MASK | STDC_GPSW0_MASK | STDC_HRMV_MASK | STDC_NFEN_MASK | STDC_VTRC_MASK,
|
||||
|
||||
IOCK_GPSW1_BIT = 0,
|
||||
IOCK_GPSW1_MASK = (1 << IOCK_GPSW1_BIT),
|
||||
IOCK_GPSW2_BIT = 1,
|
||||
IOCK_GPSW2_MASK = (1 << IOCK_GPSW2_BIT),
|
||||
IOCK_CHRS_BIT = 2,
|
||||
IOCK_CHRS_MASK = (1 << IOCK_CHRS_BIT),
|
||||
IOCK_OEDY_BIT = 3,
|
||||
IOCK_OEDY_MASK = (1 << IOCK_OEDY_BIT),
|
||||
IOCK_OEVS_BIT = 4,
|
||||
IOCK_OEVS_MASK = (1 << IOCK_OEVS_BIT),
|
||||
IOCK_OEHS_BIT = 5,
|
||||
IOCK_OEHS_MASK = (1 << IOCK_OEHS_BIT),
|
||||
IOCK_OEDC_BIT = 6,
|
||||
IOCK_OEDC_MASK = (1 << IOCK_OEDC_BIT),
|
||||
IOCK_HPLL_BIT = 7,
|
||||
IOCK_HPLL_MASK = (1 << IOCK_HPLL_BIT),
|
||||
|
||||
CTL1_YDEL_SHIFT = 0,
|
||||
CTL1_YDEL_MASK = (7 << CTL1_YDEL_SHIFT),
|
||||
CTL1_OFTS_BIT = 3,
|
||||
CTL1_OFTS_MASK = (1 << CTL1_OFTS_BIT),
|
||||
CTL1_SCEN_BIT = 4,
|
||||
CTL1_SCEN_MASK = (1 << CTL1_SCEN_BIT),
|
||||
CTL1_SXCR_BIT = 5,
|
||||
CTL1_SXCR_MASK = (1 << CTL1_SXCR_BIT),
|
||||
CTL1_FSEL_BIT = 6,
|
||||
CTL1_FSEL_MASK = (1 << CTL1_FSEL_BIT),
|
||||
CTL1_AUFD_BIT = 7,
|
||||
CTL1_AUFD_MASK = (1 << CTL1_AUFD_BIT),
|
||||
|
||||
CTL2_VNOI_SHIFT = 0,
|
||||
CTL2_VNOI_MASK = (3 << CTL2_VNOI_SHIFT),
|
||||
CTL2_HRFS_SHIFT = 2,
|
||||
CTL2_HRFS_MASK = (1 << CTL2_HRFS_SHIFT),
|
||||
CTL2_MASK = CTL2_VNOI_MASK | CTL2_HRFS_MASK
|
||||
};
|
||||
|
||||
enum
|
||||
{
|
||||
I2C_STATE_IDLE,
|
||||
I2C_STATE_SUBADDR_READ,
|
||||
I2C_STATE_SUBADDR_WRITE,
|
||||
I2C_STATE_DATA_READ,
|
||||
I2C_STATE_DATA_WRITE
|
||||
};
|
||||
|
||||
static constexpr device_timer_id TIMER_INPUT_CLOCK = 0;
|
||||
|
||||
emu_timer *m_input_clock;
|
||||
|
||||
uint8_t m_status;
|
||||
uint8_t m_regs[REG_COUNT];
|
||||
|
||||
uint8_t m_i2c_write_addr;
|
||||
uint8_t m_i2c_read_addr;
|
||||
uint8_t m_i2c_subaddr;
|
||||
int m_i2c_state;
|
||||
|
||||
devcb_read8 m_chr_in;
|
||||
devcb_read8 m_cvbs_in;
|
||||
|
||||
devcb_write8 m_y_out;
|
||||
devcb_write8 m_uv_out;
|
||||
devcb_write_line m_hs_out;
|
||||
devcb_write_line m_vs_out;
|
||||
};
|
||||
|
||||
DECLARE_DEVICE_TYPE(SAA7191, saa7191_device)
|
||||
|
||||
#endif // MAME_MACHINE_SAA7191_H
|
||||
@ -84,7 +84,7 @@ void sgi_mc_device::device_resolve_objects()
|
||||
void sgi_mc_device::device_start()
|
||||
{
|
||||
m_sys_id = 0x03; // rev. C MC
|
||||
m_sys_id = m_eisa_present() << 4;
|
||||
m_sys_id |= m_eisa_present() << 4;
|
||||
|
||||
m_rpss_timer = timer_alloc(TIMER_RPSS);
|
||||
m_rpss_timer->adjust(attotime::never);
|
||||
|
||||
@ -2,7 +2,7 @@
|
||||
// copyright-holders:Ryan Holtz
|
||||
/*********************************************************************
|
||||
|
||||
vino.c
|
||||
vino.cpp
|
||||
|
||||
Silicon Graphics VINO (Video-In, No Out) controller emulation
|
||||
|
||||
@ -23,6 +23,9 @@ DEFINE_DEVICE_TYPE(VINO, vino_device, "vino", "SGI VINO Controller")
|
||||
|
||||
vino_device::vino_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
|
||||
: device_t(mconfig, VINO, tag, owner, clock)
|
||||
, m_i2c_data_out(*this)
|
||||
, m_i2c_data_in(*this)
|
||||
, m_i2c_stop(*this)
|
||||
{
|
||||
}
|
||||
|
||||
@ -58,6 +61,10 @@ void vino_device::device_start()
|
||||
save_item(NAME(m_channels[i].m_fifo_gio_ptr), i);
|
||||
save_item(NAME(m_channels[i].m_fifo_video_ptr), i);
|
||||
}
|
||||
|
||||
m_i2c_data_out.resolve_safe();
|
||||
m_i2c_data_in.resolve_safe(0x00);
|
||||
m_i2c_stop.resolve_safe();
|
||||
}
|
||||
|
||||
void vino_device::device_reset()
|
||||
|
||||
@ -21,6 +21,10 @@ public:
|
||||
DECLARE_READ32_MEMBER(read);
|
||||
DECLARE_WRITE32_MEMBER(write);
|
||||
|
||||
auto i2c_data_out() { return m_i2c_data_out.bind(); }
|
||||
auto i2c_data_in() { return m_i2c_data_in.bind(); }
|
||||
auto i2c_stop() { return m_i2c_stop.bind(); }
|
||||
|
||||
protected:
|
||||
// device-level overrides
|
||||
virtual void device_start() override;
|
||||
@ -155,6 +159,10 @@ private:
|
||||
uint32_t m_i2c_ctrl;
|
||||
uint32_t m_i2c_data;
|
||||
channel_t m_channels[2];
|
||||
|
||||
devcb_write8 m_i2c_data_out;
|
||||
devcb_read8 m_i2c_data_in;
|
||||
devcb_write_line m_i2c_stop;
|
||||
};
|
||||
|
||||
DECLARE_DEVICE_TYPE(VINO, vino_device)
|
||||
|
||||
Loading…
Reference in New Issue
Block a user