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(mess) mega Soviet clone patch [shattered]

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- moves ec184*, iskr103* and mc1502 out of pc.c
- moves CGA font upload support to a subclass
- adds new drivers: poisk1, ec1847, pk88
- adds a skeleton of native iskr103* keyboard

i8089: implement remaining instructions and support execution from "io" space. [Carl]
(mess) isbc-215g: add intel isbc-215g hdd controller, read only for now [Carl]
(mess) isbc: add hdd support to isbc2861 (nw)
This commit is contained in:
cracyc 2013-12-22 21:17:17 +00:00
parent 2279ff026a
commit 452bae2722
51 changed files with 5208 additions and 1313 deletions
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26
.gitattributes vendored
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@ -763,6 +763,8 @@ src/emu/bus/nubus/pds30_sigmalview.c svneol=native#text/plain
src/emu/bus/nubus/pds30_sigmalview.h svneol=native#text/plain
src/emu/bus/pc_kbd/ec1841.c svneol=native#text/plain
src/emu/bus/pc_kbd/ec1841.h svneol=native#text/plain
src/emu/bus/pc_kbd/iskr1030.c svneol=native#text/plain
src/emu/bus/pc_kbd/iskr1030.h svneol=native#text/plain
src/emu/bus/pc_kbd/keyboards.c svneol=native#text/plain
src/emu/bus/pc_kbd/keyboards.h svneol=native#text/plain
src/emu/bus/pc_kbd/keytro.c svneol=native#text/plain
@ -6946,6 +6948,7 @@ src/mess/drivers/dragon.c svneol=native#text/plain
src/mess/drivers/dsb46.c svneol=native#text/plain
src/mess/drivers/dual68.c svneol=native#text/plain
src/mess/drivers/eacc.c svneol=native#text/plain
src/mess/drivers/ec184x.c svneol=native#text/plain
src/mess/drivers/ec65.c svneol=native#text/plain
src/mess/drivers/einstein.c svneol=native#text/plain
src/mess/drivers/electron.c svneol=native#text/plain
@ -7021,6 +7024,7 @@ src/mess/drivers/ipds.c svneol=native#text/plain
src/mess/drivers/iq151.c svneol=native#text/plain
src/mess/drivers/irisha.c svneol=native#text/plain
src/mess/drivers/isbc.c svneol=native#text/plain
src/mess/drivers/iskr103x.c svneol=native#text/plain
src/mess/drivers/itt3030.c svneol=native#text/plain
src/mess/drivers/jade.c svneol=native#text/plain
src/mess/drivers/jonos.c svneol=native#text/plain
@ -7058,6 +7062,7 @@ src/mess/drivers/mbc55x.c svneol=native#text/plain
src/mess/drivers/mbee.c svneol=native#text/plain
src/mess/drivers/mc10.c svneol=native#text/plain
src/mess/drivers/mc1000.c svneol=native#text/plain
src/mess/drivers/mc1502.c svneol=native#text/plain
src/mess/drivers/mc80.c svneol=native#text/plain
src/mess/drivers/mcb216.c svneol=native#text/plain
src/mess/drivers/mccpm.c svneol=native#text/plain
@ -7182,6 +7187,7 @@ src/mess/drivers/pmd85.c svneol=native#text/plain
src/mess/drivers/pmi80.c svneol=native#text/plain
src/mess/drivers/pocketc.c svneol=native#text/plain
src/mess/drivers/pockstat.c svneol=native#text/plain
src/mess/drivers/poisk1.c svneol=native#text/plain
src/mess/drivers/pokemini.c svneol=native#text/plain
src/mess/drivers/poly.c svneol=native#text/plain
src/mess/drivers/poly88.c svneol=native#text/plain
@ -7428,6 +7434,7 @@ src/mess/includes/dgn_beta.h svneol=native#text/plain
src/mess/includes/dgnalpha.h svneol=native#text/plain
src/mess/includes/dm7000.h svneol=native#text/plain
src/mess/includes/dragon.h svneol=native#text/plain
src/mess/includes/ec184x.h svneol=native#text/plain
src/mess/includes/einstein.h svneol=native#text/plain
src/mess/includes/electron.h svneol=native#text/plain
src/mess/includes/elf.h svneol=native#text/plain
@ -7468,6 +7475,7 @@ src/mess/includes/mbc55x.h svneol=native#text/plain
src/mess/includes/mbee.h svneol=native#text/plain
src/mess/includes/mboard.h svneol=native#text/plain
src/mess/includes/mc1000.h svneol=native#text/plain
src/mess/includes/mc1502.h svneol=native#text/plain
src/mess/includes/mc80.h svneol=native#text/plain
src/mess/includes/md_cons.h svneol=native#text/plain
src/mess/includes/micronic.h svneol=native#text/plain
@ -7518,6 +7526,7 @@ src/mess/includes/pk8020.h svneol=native#text/plain
src/mess/includes/plus4.h svneol=native#text/plain
src/mess/includes/pmd85.h svneol=native#text/plain
src/mess/includes/pocketc.h svneol=native#text/plain
src/mess/includes/poisk1.h svneol=native#text/plain
src/mess/includes/poly88.h svneol=native#text/plain
src/mess/includes/poly880.h svneol=native#text/plain
src/mess/includes/portfoli.h svneol=native#text/plain
@ -7917,6 +7926,8 @@ src/mess/machine/isa_wdxt_gen.c svneol=native#text/plain
src/mess/machine/isa_wdxt_gen.h svneol=native#text/plain
src/mess/machine/isa_xtide.c svneol=native#text/plain
src/mess/machine/isa_xtide.h svneol=native#text/plain
src/mess/machine/isbc_215g.c svneol=native#text/plain
src/mess/machine/isbc_215g.h svneol=native#text/plain
src/mess/machine/k7659kb.c svneol=native#text/plain
src/mess/machine/k7659kb.h svneol=native#text/plain
src/mess/machine/kay_kbd.c svneol=native#text/plain
@ -7924,6 +7935,7 @@ src/mess/machine/kaypro.c svneol=native#text/plain
src/mess/machine/kb3600.c svneol=native#text/plain
src/mess/machine/kb3600.h svneol=native#text/plain
src/mess/machine/kb_7007_3.h svneol=native#text/plain
src/mess/machine/kb_poisk1.h svneol=native#text/plain
src/mess/machine/kc.c svneol=native#text/plain
src/mess/machine/kc_keyb.c svneol=native#text/plain
src/mess/machine/kc_keyb.h svneol=native#text/plain
@ -7954,6 +7966,10 @@ src/mess/machine/mb89352.h svneol=native#text/plain
src/mess/machine/mbc55x.c svneol=native#text/plain
src/mess/machine/mbee.c svneol=native#text/plain
src/mess/machine/mboard.c svneol=native#text/plain
src/mess/machine/mc1502_fdc.c svneol=native#text/plain
src/mess/machine/mc1502_fdc.h svneol=native#text/plain
src/mess/machine/mc1502_rom.c svneol=native#text/plain
src/mess/machine/mc1502_rom.h svneol=native#text/plain
src/mess/machine/mc68328.c svneol=native#text/plain
src/mess/machine/mc68328.h svneol=native#text/plain
src/mess/machine/mc80.c svneol=native#text/plain
@ -8109,6 +8125,12 @@ src/mess/machine/orao.c svneol=native#text/plain
src/mess/machine/oric.c svneol=native#text/plain
src/mess/machine/orion.c svneol=native#text/plain
src/mess/machine/osborne1.c svneol=native#text/plain
src/mess/machine/p1_fdc.c svneol=native#text/plain
src/mess/machine/p1_fdc.h svneol=native#text/plain
src/mess/machine/p1_hdc.c svneol=native#text/plain
src/mess/machine/p1_hdc.h svneol=native#text/plain
src/mess/machine/p1_rom.c svneol=native#text/plain
src/mess/machine/p1_rom.h svneol=native#text/plain
src/mess/machine/p2000t.c svneol=native#text/plain
src/mess/machine/partner.c svneol=native#text/plain
src/mess/machine/pc.c svneol=native#text/plain
@ -8368,6 +8390,8 @@ src/mess/machine/x68k_scsiext.c svneol=native#text/plain
src/mess/machine/x68k_scsiext.h svneol=native#text/plain
src/mess/machine/x68kexp.c svneol=native#text/plain
src/mess/machine/x68kexp.h svneol=native#text/plain
src/mess/machine/xsu_cards.c svneol=native#text/plain
src/mess/machine/xsu_cards.h svneol=native#text/plain
src/mess/machine/z80bin.c svneol=native#text/plain
src/mess/machine/z80bin.h svneol=native#text/plain
src/mess/machine/z80ne.c svneol=native#text/plain
@ -8565,6 +8589,8 @@ src/mess/video/pecom.c svneol=native#text/plain
src/mess/video/pk8020.c svneol=native#text/plain
src/mess/video/pmd85.c svneol=native#text/plain
src/mess/video/pocketc.c svneol=native#text/plain
src/mess/video/poisk1.c svneol=native#text/plain
src/mess/video/poisk1.h svneol=native#text/plain
src/mess/video/poly88.c svneol=native#text/plain
src/mess/video/pp01.c svneol=native#text/plain
src/mess/video/primo.c svneol=native#text/plain

13
hash/ec1841.xml
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@ -64,12 +64,23 @@
<year>1988</year>
<publisher>MPO VT</publisher>
<part name="flop1" interface="floppy_5_25">
<dataarea name="flop" size="368640">
<dataarea name="flop" size="327680">
<rom name="ec1841-demo.ima" size="327680" sha1="692fc2c01ba1dbceb5626cd3c593ebf8c79d62c3" crc="c273098d" offset="0" />
</dataarea>
</part>
</software>
<software name="m86v32">
<description>Demo disk</description>
<year>1988</year>
<publisher>MPO VT</publisher>
<part name="flop1" interface="floppy_5_25">
<dataarea name="flop" size="327680">
<rom name="ec1841-m86-3.2.ima" size="327680" sha1="a51bf73114f9178348d0eda0db936fc1f3bd5aa0" crc="69ce32e4" offset="0" />
</dataarea>
</part>
</software>
<software name="tps2214">
<description>TPS release 2.2 changeset 14</description>
<year>1988</year>

12
hash/mc1502_flop.xml
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@ -13,7 +13,7 @@
</software>
XXX
-->
<softwarelist name="mc1502_flop" description="MC 1502 disk images">
<softwarelist name="mc1502_flop" description="MC-1502 disk images">
<software name="sfdos">
<description>Sigma Four DOS (modified MS-DOS x.xx)</description>
@ -26,13 +26,13 @@
</part>
</software>
<software name="ots">
<description>One Track System (alternate OS)</description>
<year>19??</year>
<software name="ots14">
<description>One Track System 1.4 (alternate OS)</description>
<year>1991</year>
<publisher>MMV</publisher>
<part name="flop1" interface="floppy_5_25">
<dataarea name="flop" size="737280">
<rom name="one-track-system.ima" size="737280" sha1="d7cdb37c00580fe9b4595bac1db588687d187590" crc="33831462" offset="0" />
<dataarea name="flop" size="694040">
<rom name="one-track-system.imd" size="694040" sha1="962e15ec0501d1bd249d05984efd9e9871fa2ce9" crc="62d4ef70" offset="0" />
</dataarea>
</part>
</software>

1
src/emu/bus/bus.mak
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@ -313,6 +313,7 @@ ifneq ($(filter PC_KBD,$(BUSES)),)
BUSOBJS += $(BUSOBJ)/pc_kbd/pc_kbdc.o
BUSOBJS += $(BUSOBJ)/pc_kbd/keyboards.o
BUSOBJS += $(BUSOBJ)/pc_kbd/ec1841.o
BUSOBJS += $(BUSOBJ)/pc_kbd/iskr1030.o
BUSOBJS += $(BUSOBJ)/pc_kbd/keytro.o
BUSOBJS += $(BUSOBJ)/pc_kbd/msnat.o
BUSOBJS += $(BUSOBJ)/pc_kbd/pc83.o

2
src/emu/bus/pc_kbd/ec1841.c
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@ -107,7 +107,7 @@ INPUT_PORTS_START( ec_1841_keyboard )
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_TAB) PORT_CHAR(UCHAR_MAMEKEY(TAB))
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_A) PORT_CHAR('a') PORT_CHAR('A')
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_Z) PORT_CHAR('z') PORT_CHAR('Z')
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("?59?") // 0x59 = Inf
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Inf") PORT_CODE(KEYCODE_SLASH_PAD) PORT_CHAR(UCHAR_MAMEKEY(SLASH_PAD)) // 0x59
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_MINUS_PAD) PORT_CHAR(UCHAR_MAMEKEY(MINUS_PAD))
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED )

454
src/emu/bus/pc_kbd/iskr1030.c Normal file
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@ -0,0 +1,454 @@
/**********************************************************************
Iskra-1030 and -1031 XX-key keyboard emulation
Copyright MESS Team.
Visit http://mamedev.org for licensing and usage restrictions.
*********************************************************************/
#include "iskr1030.h"
#define VERBOSE_DBG 1 /* general debug messages */
#define DBG_LOG(N,M,A) \
do { \
if(VERBOSE_DBG>=N) \
{ \
logerror("%11.6f at %s: ",machine().time().as_double(),machine().describe_context()); \
logerror A; \
} \
} while (0)
//**************************************************************************
// MACROS / CONSTANTS
//**************************************************************************
#define I8048_TAG "i8048"
//**************************************************************************
// DEVICE DEFINITIONS
//**************************************************************************
const device_type PC_KBD_ISKR_1030 = &device_creator<iskr_1030_keyboard_device>;
//-------------------------------------------------
// ROM( iskr_1030_keyboard )
//-------------------------------------------------
ROM_START( iskr_1030_keyboard )
ROM_REGION( 0x800, I8048_TAG, 0 )
// XXX add P/N etc
ROM_LOAD( "i1030.bin", 0x000, 0x800, CRC(7cac9c4b) SHA1(03959d3350e012ebfe61cee9c062b6c1fdd8766e) )
ROM_END
//-------------------------------------------------
// rom_region - device-specific ROM region
//-------------------------------------------------
const rom_entry *iskr_1030_keyboard_device::device_rom_region() const
{
return ROM_NAME( iskr_1030_keyboard );
}
//-------------------------------------------------
// ADDRESS_MAP( kb_io )
//-------------------------------------------------
static ADDRESS_MAP_START( iskr_1030_keyboard_io, AS_IO, 8, iskr_1030_keyboard_device )
AM_RANGE(0x00, 0xFF) AM_RAM
AM_RANGE(MCS48_PORT_P1, MCS48_PORT_P1) AM_READWRITE(p1_r, p1_w)
AM_RANGE(MCS48_PORT_P2, MCS48_PORT_P2) AM_WRITE(p2_w)
// AM_RANGE(MCS48_PORT_T0, MCS48_PORT_T0) AM_READ(t0_r)
AM_RANGE(MCS48_PORT_T1, MCS48_PORT_T1) AM_READ(t1_r)
ADDRESS_MAP_END
//-------------------------------------------------
// MACHINE_DRIVER( iskr_1030_keyboard )
//-------------------------------------------------
static MACHINE_CONFIG_FRAGMENT( iskr_1030_keyboard )
// XXX check
MCFG_CPU_ADD(I8048_TAG, I8048, MCS48_LC_CLOCK(IND_U(47), CAP_P(20.7)))
MCFG_CPU_IO_MAP(iskr_1030_keyboard_io)
MACHINE_CONFIG_END
//-------------------------------------------------
// machine_config_additions - device-specific
// machine configurations
//-------------------------------------------------
machine_config_constructor iskr_1030_keyboard_device::device_mconfig_additions() const
{
return MACHINE_CONFIG_NAME( iskr_1030_keyboard );
}
//-------------------------------------------------
// INPUT_PORTS( iskr_1030_keyboard )
//-------------------------------------------------
INPUT_PORTS_START( iskr_1030_keyboard )
PORT_START("MD00")
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_TAB) PORT_CHAR(UCHAR_MAMEKEY(TAB))
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_A) PORT_CHAR('a') PORT_CHAR('A')
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_Z) PORT_CHAR('z') PORT_CHAR('Z')
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("?59?") // 0x59 = Inf
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_MINUS_PAD) PORT_CHAR(UCHAR_MAMEKEY(MINUS_PAD))
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_START("MD01")
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_ESC) PORT_CHAR(UCHAR_MAMEKEY(ESC))
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_Q) PORT_CHAR('q') PORT_CHAR('Q')
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_S) PORT_CHAR('s') PORT_CHAR('S')
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_X) PORT_CHAR('x') PORT_CHAR('X')
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_SPACE) PORT_CHAR(' ')
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Keypad 7 Home") PORT_CODE(KEYCODE_7_PAD) PORT_CHAR(UCHAR_MAMEKEY(7_PAD))
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_START("MD02")
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_1) PORT_CHAR('1') PORT_CHAR('!')
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_W) PORT_CHAR('w') PORT_CHAR('W')
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_D) PORT_CHAR('d') PORT_CHAR('D')
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_C) PORT_CHAR('c') PORT_CHAR('C')
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_RCONTROL) // 0x5a = R/L (R)
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Keypad 8 "UTF8_UP) PORT_CODE(KEYCODE_8_PAD) PORT_CHAR(UCHAR_MAMEKEY(8_PAD))
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_START("MD03")
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_2) PORT_CHAR('2') PORT_CHAR('@')
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_E) PORT_CHAR('e') PORT_CHAR('E')
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_F) PORT_CHAR('f') PORT_CHAR('F')
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_V) PORT_CHAR('v') PORT_CHAR('V')
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_F12) PORT_CHAR(UCHAR_MAMEKEY(F12)) // 0x5b = Rus
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Keypad 9 PgUp") PORT_CODE(KEYCODE_9_PAD) PORT_CHAR(UCHAR_MAMEKEY(9_PAD))
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_START("MD04")
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_3) PORT_CHAR('3') PORT_CHAR('#')
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_R) PORT_CHAR('r') PORT_CHAR('R')
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_G) PORT_CHAR('g') PORT_CHAR('G')
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_B) PORT_CHAR('b') PORT_CHAR('B')
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_F1) PORT_CHAR(UCHAR_MAMEKEY(F1))
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Keypad 4 "UTF8_LEFT) PORT_CODE(KEYCODE_4_PAD) PORT_CHAR(UCHAR_MAMEKEY(4_PAD))
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_START("MD05")
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_4) PORT_CHAR('4') PORT_CHAR('$')
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_T) PORT_CHAR('t') PORT_CHAR('T')
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_H) PORT_CHAR('h') PORT_CHAR('H')
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_N) PORT_CHAR('n') PORT_CHAR('N')
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_F2) PORT_CHAR(UCHAR_MAMEKEY(F2))
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_5_PAD) PORT_CHAR(UCHAR_MAMEKEY(5_PAD))
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_START("MD06")
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_5) PORT_CHAR('5') PORT_CHAR('%')
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_Y) PORT_CHAR('y') PORT_CHAR('Y')
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_J) PORT_CHAR('j') PORT_CHAR('J')
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_M) PORT_CHAR('m') PORT_CHAR('M')
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_F3) PORT_CHAR(UCHAR_MAMEKEY(F3))
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Keypad 6 "UTF8_RIGHT) PORT_CODE(KEYCODE_6_PAD) PORT_CHAR(UCHAR_MAMEKEY(6_PAD))
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_START("MD07")
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_6) PORT_CHAR('6') PORT_CHAR('^')
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_U) PORT_CHAR('u') PORT_CHAR('U')
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_K) PORT_CHAR('k') PORT_CHAR('K')
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_TILDE) PORT_CHAR('`') PORT_CHAR('~')
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_F4) PORT_CHAR(UCHAR_MAMEKEY(F4))
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Keypad 1 End") PORT_CODE(KEYCODE_1_PAD) PORT_CHAR(UCHAR_MAMEKEY(1_PAD))
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_START("MD08")
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_7) PORT_CHAR('7') PORT_CHAR('&')
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_I) PORT_CHAR('i') PORT_CHAR('I')
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_L) PORT_CHAR('l') PORT_CHAR('L')
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("?2a?")
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_F5) PORT_CHAR(UCHAR_MAMEKEY(F5))
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Keypad 2 "UTF8_DOWN) PORT_CODE(KEYCODE_2_PAD) PORT_CHAR(UCHAR_MAMEKEY(2_PAD))
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_START("MD09")
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_8) PORT_CHAR('8') PORT_CHAR('*')
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_O) PORT_CHAR('o') PORT_CHAR('O')
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_OPENBRACE) PORT_CHAR('[') PORT_CHAR('{')
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("?5c?") // 0x5c = YO
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_F6) PORT_CHAR(UCHAR_MAMEKEY(F6))
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Keypad 3 PgDn") PORT_CODE(KEYCODE_3_PAD) PORT_CHAR(UCHAR_MAMEKEY(3_PAD))
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_START("MD10")
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_9) PORT_CHAR('9') PORT_CHAR('(')
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_P) PORT_CHAR('p') PORT_CHAR('P')
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_CLOSEBRACE) PORT_CHAR(']') PORT_CHAR('}')
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_COMMA) PORT_CHAR(',') PORT_CHAR('<')
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_F7) PORT_CHAR(UCHAR_MAMEKEY(F7))
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Keypad 0 Ins") PORT_CODE(KEYCODE_0_PAD) PORT_CHAR(UCHAR_MAMEKEY(0_PAD))
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_START("MD11")
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_0) PORT_CHAR('0') PORT_CHAR(')')
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("?36?")
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_COLON) PORT_CHAR(';') PORT_CHAR(':')
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_STOP) PORT_CHAR('.') PORT_CHAR('>')
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_F8) PORT_CHAR(UCHAR_MAMEKEY(F8))
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Keypad . Del") PORT_CODE(KEYCODE_DEL_PAD) PORT_CHAR(UCHAR_MAMEKEY(DEL_PAD))
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_START("MD12")
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_MINUS) PORT_CHAR('-') PORT_CHAR('_')
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("?3a?")
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_QUOTE) PORT_CHAR('\'') PORT_CHAR('"')
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_RSHIFT) PORT_CHAR(UCHAR_SHIFT_1) // 0x55
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_F9) PORT_CHAR(UCHAR_MAMEKEY(F9))
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_PLUS_PAD) PORT_CHAR(UCHAR_MAMEKEY(PLUS_PAD))
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_START("MD13")
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_EQUALS) PORT_CHAR('=') PORT_CHAR('+')
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_SLASH) PORT_CHAR('/') PORT_CHAR('?')
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_ENTER) PORT_CHAR(13)
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_CAPSLOCK) PORT_CHAR(UCHAR_MAMEKEY(CAPSLOCK)) // 0x56
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_F10) PORT_CHAR(UCHAR_MAMEKEY(F10))
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_START("MD14")
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_BACKSLASH) PORT_CHAR('\\') PORT_CHAR('|')
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_PRTSCR)
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_LALT) PORT_CHAR(UCHAR_MAMEKEY(LALT))
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_F11) PORT_CHAR(UCHAR_MAMEKEY(F11)) // 0x57 = Lat
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_NUMLOCK) PORT_CHAR(UCHAR_MAMEKEY(NUMLOCK))
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_START("MD15")
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_BACKSPACE) PORT_CHAR(8)
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_LCONTROL) PORT_CHAR(UCHAR_SHIFT_2)
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_LSHIFT) PORT_CHAR(UCHAR_SHIFT_1) // 0x54
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_RALT) // 0x58 = R/L (L)
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Scroll Lock Break") PORT_CODE(KEYCODE_SCRLOCK) PORT_CHAR(UCHAR_MAMEKEY(SCRLOCK))
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED )
INPUT_PORTS_END
//-------------------------------------------------
// input_ports - device-specific input ports
//-------------------------------------------------
ioport_constructor iskr_1030_keyboard_device::device_input_ports() const
{
return INPUT_PORTS_NAME( iskr_1030_keyboard );
}
//**************************************************************************
// LIVE DEVICE
//**************************************************************************
//-------------------------------------------------
// iskr_1030_keyboard_device - constructor
//-------------------------------------------------
iskr_1030_keyboard_device::iskr_1030_keyboard_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, PC_KBD_ISKR_1030, "Iskra-1030 Keyboard", tag, owner, clock, "kb_iskr1030", __FILE__),
device_pc_kbd_interface(mconfig, *this),
m_maincpu(*this, I8048_TAG),
m_md00(*this, "MD00"),
m_md01(*this, "MD01"),
m_md02(*this, "MD02"),
m_md03(*this, "MD03"),
m_md04(*this, "MD04"),
m_md05(*this, "MD05"),
m_md06(*this, "MD06"),
m_md07(*this, "MD07"),
m_md08(*this, "MD08"),
m_md09(*this, "MD09"),
m_md10(*this, "MD10"),
m_md11(*this, "MD11"),
m_md12(*this, "MD12"),
m_md13(*this, "MD13"),
m_md14(*this, "MD14"),
m_md15(*this, "MD15"),
m_p1(0),
m_p2(0),
m_q(0)
{
}
//-------------------------------------------------
// device_start - device-specific startup
//-------------------------------------------------
void iskr_1030_keyboard_device::device_start()
{
set_pc_kbdc_device();
// state saving
save_item(NAME(m_p1));
save_item(NAME(m_p2));
save_item(NAME(m_q));
}
//-------------------------------------------------
// device_reset - device-specific reset
//-------------------------------------------------
void iskr_1030_keyboard_device::device_reset()
{
}
//-------------------------------------------------
// clock_write -
//-------------------------------------------------
WRITE_LINE_MEMBER( iskr_1030_keyboard_device::clock_write )
{
DBG_LOG(1,0,( "%s: clock write %d\n", tag(), state));
m_maincpu->set_input_line(MCS48_INPUT_IRQ, state ? CLEAR_LINE : ASSERT_LINE);
}
//-------------------------------------------------
// data_write -
//-------------------------------------------------
WRITE_LINE_MEMBER( iskr_1030_keyboard_device::data_write )
{
DBG_LOG(1,0,( "%s: data write %d\n", tag(), state));
}
//-------------------------------------------------
// t0_r - XXX ENT0 CLK
//-------------------------------------------------
READ8_MEMBER( iskr_1030_keyboard_device::t0_r )
{
return 0;
// return clock_signal();
}
//-------------------------------------------------
// t1_r - OK
//-------------------------------------------------
READ8_MEMBER( iskr_1030_keyboard_device::t1_r )
{
UINT8 data = data_signal();
DBG_LOG(2,0,( "%s: t1_r %d\n", tag(), data));
return data;
}
//-------------------------------------------------
// p1_r -
//-------------------------------------------------
READ8_MEMBER( iskr_1030_keyboard_device::p1_r )
{
/*
bit description
0 -REQ IN
1 DATA IN
2
3
4
5
6
7
*/
UINT8 data = 0;
DBG_LOG(1,0,( "%s: p1_r %02x\n", tag(), data));
return data;
}
//-------------------------------------------------
// p2_w -
//-------------------------------------------------
WRITE8_MEMBER( iskr_1030_keyboard_device::p2_w )
{
/*
bit description
0
1
2
3
4
5 LED XXX
6 LED XXX
7 LED XXX
*/
DBG_LOG(1,0,( "%s: p2_w %02x\n", tag(), data));
m_p1 = data;
}
//-------------------------------------------------
// p1_w - OK
//-------------------------------------------------
WRITE8_MEMBER( iskr_1030_keyboard_device::p1_w )
{
/*
bit description
0 XXX
1 XXX
2 XXX
3 XXX
4 CLOCK out
5 DATA out (inverted!)
6 XXX
7 XXX
*/
DBG_LOG(1,0,( "%s: p1_w %02x (clk %d data %d)\n", tag(), data, BIT(data, 4), BIT(data, 5)));
m_pc_kbdc->data_write_from_kb(BIT(data, 5));
m_pc_kbdc->clock_write_from_kb(BIT(data, 4));
}

83
src/emu/bus/pc_kbd/iskr1030.h Normal file
View File

@ -0,0 +1,83 @@
/**********************************************************************
Iskra-1030 XX-key keyboard emulation
Copyright MESS Team.
Visit http://mamedev.org for licensing and usage restrictions.
*********************************************************************/
#pragma once
#ifndef __PC_KBD_ISKR_1030__
#define __PC_KBD_ISKR_1030__
#include "emu.h"
#include "cpu/mcs48/mcs48.h"
#include "pc_kbdc.h"
#include "machine/rescap.h"
//**************************************************************************
// TYPE DEFINITIONS
//**************************************************************************
// ======================> iskr_1030_keyboard_device
class iskr_1030_keyboard_device : public device_t,
public device_pc_kbd_interface
{
public:
// construction/destruction
iskr_1030_keyboard_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
// optional information overrides
virtual const rom_entry *device_rom_region() const;
virtual machine_config_constructor device_mconfig_additions() const;
virtual ioport_constructor device_input_ports() const;
DECLARE_READ8_MEMBER( p1_r );
DECLARE_WRITE8_MEMBER( p1_w );
DECLARE_WRITE8_MEMBER( p2_w );
DECLARE_READ8_MEMBER( t0_r );
DECLARE_READ8_MEMBER( t1_r );
protected:
// device-level overrides
virtual void device_start();
virtual void device_reset();
// device_pc_kbd_interface overrides
virtual DECLARE_WRITE_LINE_MEMBER( clock_write );
virtual DECLARE_WRITE_LINE_MEMBER( data_write );
private:
required_device<cpu_device> m_maincpu;
required_ioport m_md00;
required_ioport m_md01;
required_ioport m_md02;
required_ioport m_md03;
required_ioport m_md04;
required_ioport m_md05;
required_ioport m_md06;
required_ioport m_md07;
required_ioport m_md08;
required_ioport m_md09;
required_ioport m_md10;
required_ioport m_md11;
required_ioport m_md12;
required_ioport m_md13;
required_ioport m_md14;
required_ioport m_md15;
UINT8 m_p1;
UINT8 m_p2;
int m_q;
};
// device type definition
extern const device_type PC_KBD_ISKR_1030;
#endif

2
src/emu/bus/pc_kbd/keyboards.c
View File

@ -2,6 +2,7 @@
#include "emu.h"
#include "keyboards.h"
#include "ec1841.h"
#include "iskr1030.h"
#include "keytro.h"
#include "msnat.h"
#include "pc83.h"
@ -13,6 +14,7 @@ SLOT_INTERFACE_START(pc_xt_keyboards)
SLOT_INTERFACE(STR_KBD_IBM_PC_83, PC_KBD_IBM_PC_83)
SLOT_INTERFACE(STR_KBD_IBM_PC_XT_83, PC_KBD_IBM_PC_XT_83)
SLOT_INTERFACE(STR_KBD_EC_1841, PC_KBD_EC_1841)
SLOT_INTERFACE(STR_KBD_ISKR_1030, PC_KBD_ISKR_1030)
SLOT_INTERFACE_END

1
src/emu/bus/pc_kbd/keyboards.h
View File

@ -13,6 +13,7 @@
#define STR_KBD_IBM_PC_83 "pc"
#define STR_KBD_IBM_PC_XT_83 "pcxt"
#define STR_KBD_EC_1841 "ec1841"
#define STR_KBD_ISKR_1030 "iskr1030"
SLOT_INTERFACE_EXTERN(pc_xt_keyboards);

45
src/emu/cpu/i8089/i8089.c
View File

@ -241,17 +241,17 @@ void i8089_device::initialize()
m_sysbus = m_mem->read_byte(0xffff6);
// get system configuration block address
UINT16 scb_offset = read_word(0xffff8);
UINT16 scb_segment = read_word(0xffffa);
UINT16 scb_offset = read_word(0, 0xffff8);
UINT16 scb_segment = read_word(0, 0xffffa);
m_scb = ((scb_segment << 4) + scb_offset) & 0x0fffff;
// get system operation command
m_soc = read_byte(m_scb);
m_soc = read_byte(0, m_scb);
m_master = !m_sel;
// get control block address
UINT16 cb_offset = read_word(m_scb + 2);
UINT16 cb_segment = read_word(m_scb + 4);
UINT16 cb_offset = read_word(0, m_scb + 2);
UINT16 cb_segment = read_word(0, m_scb + 4);
offs_t cb_address = ((cb_segment << 4) + cb_offset) & 0x0fffff;
// initialize channels
@ -259,8 +259,8 @@ void i8089_device::initialize()
m_ch2->set_reg(i8089_channel::CP, cb_address + 8);
// clear busy
UINT16 ccw = read_word(cb_address);
write_word(cb_address, ccw & 0x00ff);
UINT16 ccw = read_word(0, cb_address);
write_word(0, cb_address, ccw & 0x00ff);
// done
m_initialized = true;
@ -278,49 +278,46 @@ void i8089_device::initialize()
}
}
UINT8 i8089_device::read_byte(offs_t address)
UINT8 i8089_device::read_byte(bool space, offs_t address)
{
assert(m_initialized);
return m_mem->read_byte(address);
return (space ? m_io : m_mem)->read_byte(address);
}
UINT16 i8089_device::read_word(offs_t address)
UINT16 i8089_device::read_word(bool space, offs_t address)
{
assert(m_initialized);
UINT16 data = 0xffff;
address_space *aspace = (space ? m_io : m_mem);
if (sysbus_width() && !(address & 1))
{
data = m_mem->read_word(address);
data = aspace->read_word(address);
}
else
{
data = m_mem->read_byte(address);
data |= m_mem->read_byte(address + 1) << 8;
data = aspace->read_byte(address);
data |= aspace->read_byte(address + 1) << 8;
}
return data;
}
void i8089_device::write_byte(offs_t address, UINT8 data)
void i8089_device::write_byte(bool space, offs_t address, UINT8 data)
{
assert(m_initialized);
m_mem->write_byte(address, data);
(space ? m_io : m_mem)->write_byte(address, data);
}
void i8089_device::write_word(offs_t address, UINT16 data)
void i8089_device::write_word(bool space, offs_t address, UINT16 data)
{
assert(m_initialized);
address_space *aspace = (space ? m_io : m_mem);
if (sysbus_width() && !(address & 1))
{
m_mem->write_word(address, data);
aspace->write_word(address, data);
}
else
{
m_mem->write_byte(address, data & 0xff);
m_mem->write_byte(address + 1, (data >> 8) & 0xff);
aspace->write_byte(address, data & 0xff);
aspace->write_byte(address + 1, (data >> 8) & 0xff);
}
}

10
src/emu/cpu/i8089/i8089.h
View File

@ -85,7 +85,7 @@ protected:
// device_disasm_interface overrides
virtual UINT32 disasm_min_opcode_bytes() const { return 1; }
virtual UINT32 disasm_max_opcode_bytes() const { return 6; }
virtual UINT32 disasm_max_opcode_bytes() const { return 7; }
virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options);
// device_state_interface overrides
@ -99,10 +99,10 @@ private:
bool remotebus_width() { return BIT(m_soc, 0); }
bool request_grant() { return BIT(m_soc, 1); }
UINT8 read_byte(offs_t address);
UINT16 read_word(offs_t address);
void write_byte(offs_t address, UINT8 data);
void write_word(offs_t address, UINT16 data);
UINT8 read_byte(bool space, offs_t address);
UINT16 read_word(bool space, offs_t address);
void write_byte(bool space, offs_t address, UINT8 data);
void write_word(bool space, offs_t address, UINT16 data);
required_device<i8089_channel> m_ch1;
required_device<i8089_channel> m_ch2;

301
src/emu/cpu/i8089/i8089_channel.c
View File

@ -104,9 +104,20 @@ void i8089_channel::device_reset()
// IMPLEMENTATION
//**************************************************************************
void i8089_channel::set_reg(int reg, int value, int tag)
void i8089_channel::set_reg(int reg, UINT32 value, int tag)
{
m_r[reg].w = value;
if((reg == BC) || (reg == IX) || (reg == CC) || (reg == MC))
{
m_r[reg].w = value & 0xffff;
return;
}
m_r[reg].w = value & 0xfffff;
if(reg == PP)
{
m_r[PP].t = 0;
return;
}
if (tag != -1)
m_r[reg].t = tag;
@ -122,47 +133,57 @@ bool i8089_channel::priority() { return BIT(m_r[PSW].w, 7); }
bool i8089_channel::chained() { return CC_CHAIN; }
bool i8089_channel::lock() { return CC_LOCK; }
UINT16 i8089_channel::displacement(int wb)
INT16 i8089_channel::displacement(int wb)
{
UINT16 displacement = 0;
INT16 displacement = 0;
if (wb == 1)
{
displacement = m_iop->read_byte(m_r[TP].w);
displacement = (INT16)((INT8)m_iop->read_byte(m_r[TP].t, m_r[TP].w));
set_reg(TP, m_r[TP].w + 1);
}
else if (wb == 2)
{
displacement = m_iop->read_word(m_r[TP].w);
displacement = (INT16)m_iop->read_word(m_r[TP].t, m_r[TP].w);
set_reg(TP, m_r[TP].w + 2);
}
return displacement;
}
UINT8 i8089_channel::offset(int aa)
UINT32 i8089_channel::offset(int aa, int mm, int w)
{
UINT8 offset = 0;
if (aa == 1)
UINT32 offset = 0;
switch(aa)
{
offset = m_iop->read_byte(m_r[TP].w);
set_reg(TP, m_r[TP].w + 1);
case 0:
offset = m_r[mm].w;
break;
case 1:
offset = m_r[mm].w + m_iop->read_byte(m_r[TP].t, m_r[TP].w);
set_reg(TP, m_r[TP].w + 1);
break;
case 2:
offset = m_r[mm].w + m_r[IX].w;
break;
case 3:
offset = m_r[mm].w + m_r[IX].w;
set_reg(IX, m_r[IX].w + (w ? 2 : 1));
break;
}
return offset;
return offset & 0xfffff;
}
UINT8 i8089_channel::imm8()
INT8 i8089_channel::imm8()
{
UINT8 imm8 = m_iop->read_byte(m_r[TP].w);
INT8 imm8 = (INT8)m_iop->read_byte(m_r[TP].t, m_r[TP].w);
set_reg(TP, m_r[TP].w + 1);
return imm8;
}
UINT16 i8089_channel::imm16()
INT16 i8089_channel::imm16()
{
UINT16 imm16 = m_iop->read_word(m_r[TP].w);
INT16 imm16 = (INT16)m_iop->read_word(m_r[TP].t, m_r[TP].w);
set_reg(TP, m_r[TP].w + 2);
return imm16;
}
@ -201,10 +222,6 @@ int i8089_channel::execute_run()
}
}
// todo: port transfers
if (CC_FUNC != 0x03)
fatalerror("%s('%s'): port transfer\n", shortname(), tag());
switch (m_dma_state)
{
case DMA_IDLE:
@ -229,29 +246,33 @@ int i8089_channel::execute_run()
// source is 16-bit?
if (BIT(m_r[PSW].w, 1))
{
m_dma_value = m_iop->read_word(m_r[GA + CC_SOURCE].w);
m_r[GA + CC_SOURCE].w += 2;
m_dma_value = m_iop->read_word(m_r[GA + CC_SOURCE].t, m_r[GA + CC_SOURCE].w);
if(CC_FUNC & 1)
m_r[GA + CC_SOURCE].w += 2;
m_r[BC].w -= 2;
}
// destination is 16-bit, byte count is even
else if (BIT(m_r[PSW].w, 0) && !(m_r[BC].w & 1))
{
m_dma_value = m_iop->read_byte(m_r[GA + CC_SOURCE].w);
m_r[GA + CC_SOURCE].w++;
m_dma_value = m_iop->read_byte(m_r[GA + CC_SOURCE].t, m_r[GA + CC_SOURCE].w);
if(CC_FUNC & 1)
m_r[GA + CC_SOURCE].w++;
m_r[BC].w--;
}
// destination is 16-bit, byte count is odd
else if (BIT(m_r[PSW].w, 0) && (m_r[BC].w & 1))
{
m_dma_value |= m_iop->read_byte(m_r[GA + CC_SOURCE].w) << 8;
m_r[GA + CC_SOURCE].w++;
m_dma_value |= m_iop->read_byte(m_r[GA + CC_SOURCE].t, m_r[GA + CC_SOURCE].w) << 8;
if(CC_FUNC & 1)
m_r[GA + CC_SOURCE].w++;
m_r[BC].w--;
}
// 8-bit transfer
else
{
m_dma_value = m_iop->read_byte(m_r[GA + CC_SOURCE].w);
m_r[GA + CC_SOURCE].w++;
m_dma_value = m_iop->read_byte(m_r[GA + CC_SOURCE].t, m_r[GA + CC_SOURCE].w);
if(CC_FUNC & 1)
m_r[GA + CC_SOURCE].w++;
m_r[BC].w--;
}
@ -284,8 +305,9 @@ int i8089_channel::execute_run()
// destination is 16-bit?
if (BIT(m_r[PSW].w, 0))
{
m_iop->write_word(m_r[GB - CC_SOURCE].w, m_dma_value);
m_r[GB - CC_SOURCE].w += 2;
m_iop->write_word(m_r[GB - CC_SOURCE].t, m_r[GB - CC_SOURCE].w, m_dma_value);
if(CC_FUNC & 2)
m_r[GB - CC_SOURCE].w += 2;
if (VERBOSE_DMA)
logerror("[ %04x ]\n", m_dma_value);
@ -293,8 +315,9 @@ int i8089_channel::execute_run()
// destination is 8-bit
else
{
m_iop->write_byte(m_r[GB - CC_SOURCE].w, m_dma_value & 0xff);
m_r[GB - CC_SOURCE].w++;
m_iop->write_byte(m_r[GB - CC_SOURCE].t, m_r[GB - CC_SOURCE].w, m_dma_value & 0xff);
if(CC_FUNC & 2)
m_r[GB - CC_SOURCE].w++;
if (VERBOSE_DMA)
logerror("[ %02x ]\n", m_dma_value & 0xff);
@ -323,10 +346,6 @@ int i8089_channel::execute_run()
else if (CC_TBC && m_r[BC].w == 0)
terminate_dma((CC_TBC - 1) * 4);
// terminate on external signal
else if (CC_TX)
fatalerror("%s('%s'): terminate on external signal not supported\n", shortname(), tag());
// terminate on single transfer
else if (CC_TS)
fatalerror("%s('%s'): terminate on single transfer not supported\n", shortname(), tag());
@ -350,7 +369,7 @@ int i8089_channel::execute_run()
if (VERBOSE_DMA)
logerror("%s('%s'): entering state: DMA_STORE_BYTE_HIGH[ %02x ]\n", shortname(), tag(), (m_dma_value >> 8) & 0xff);
m_iop->write_byte(m_r[GB - CC_SOURCE].w, (m_dma_value >> 8) & 0xff);
m_iop->write_byte(m_r[GA - CC_SOURCE].t, m_r[GB - CC_SOURCE].w, (m_dma_value >> 8) & 0xff);
m_r[GB - CC_SOURCE].w++;
m_dma_state = DMA_TERMINATE;
@ -371,7 +390,7 @@ int i8089_channel::execute_run()
m_r[PSW].w |= 1 << 6;
// fetch first two instruction bytes
UINT16 op = m_iop->read_word(m_r[TP].w);
UINT16 op = m_iop->read_word(m_r[TP].t, m_r[TP].w);
set_reg(TP, m_r[TP].w + 2);
// extract parameters
@ -388,7 +407,7 @@ int i8089_channel::execute_run()
// fix-up so we can use our register array
if (mm == BC) mm = PP;
UINT8 o;
UINT32 o;
UINT16 off, seg;
switch (opc)
@ -405,8 +424,8 @@ int i8089_channel::execute_run()
break;
case 0x02: // lpdi
off = imm16();
seg = imm16();
off = (UINT16)imm16();
seg = (UINT16)imm16();
lpdi(brp, seg, off);
break;
@ -415,74 +434,206 @@ int i8089_channel::execute_run()
else addbi_ri(brp, imm8());
break;
case 0x09: // or(b)i r, i
if (w) ori_ri(brp, imm16());
else orbi_ri(brp, imm8());
break;
case 0x0a: // and(b)i r, i
if (w) andi_ri(brp, imm16());
else andbi_ri(brp, imm8());
break;
case 0x0b: // not r
not_r(brp);
break;
case 0x0c: // mov(b)i r, i
if (w) movi_ri(brp, imm16());
else movbi_ri(brp, imm8());
break;
case 0x0e: // inc r
inc_r(brp);
break;
case 0x0f: // dec r
dec_r(brp);
break;
case 0x10: // jnz r
jnz_r(brp, displacement(wb));
break;
case 0x11: // jz r
jz_r(brp, displacement(wb));
break;
case 0x12: // hlt
if (BIT(brp, 0)) hlt();
else invalid(opc);
break;
case 0x13: // mov(b)i m, i
o = offset(aa, mm, w);
if (w) movi_mi(mm, imm16(), o);
else movbi_mi(mm, imm8(), o);
break;
case 0x20: // mov(b) r, m
if (w) mov_rm(brp, mm, offset(aa, mm, w));
else movb_rm(brp, mm, offset(aa, mm, w));
break;
case 0x21: // mov(b) m, r
if (w) mov_mr(mm, brp, offset(aa, mm, w));
else movb_mr(mm, brp, offset(aa, mm, w));
break;
case 0x22: // lpd
o = offset(aa);
o = offset(aa, mm, w);
lpd(brp, mm, o);
break;
case 0x28: // add(b) r, m
if (w) add_rm(brp, mm, offset(aa));
else addb_rm(brp, mm, offset(aa));
case 0x23: // movp p, m
movp_pm(brp, mm, offset(aa, mm, w));
break;
case 0x2a: // and(b) r, m
if (w) and_rm(brp, mm, offset(aa));
else andb_rm(brp, mm, offset(aa));
case 0x24: // mov(b) m, m
{
o = offset(aa, mm, w);
UINT16 op2 = m_iop->read_word(m_r[TP].t, m_r[TP].w);
set_reg(TP, m_r[TP].w + 2);
int mm2 = (op2 >> 8) & 0x03;
if (w) mov_mm(mm, mm2, o, offset((op2 >> 1) & 0x03, mm2, w));
else movb_mm(mm, mm2, o, offset((op2 >> 1) & 0x03, mm2, w));
break;
}
case 0x25: // tsl m, i, d
{
o = offset(aa, mm, w);
INT8 i = imm8();
tsl(mm, i, imm8(), o);
break;
}
case 0x26: // movp m, p
movp_mp(mm, brp, offset(aa, mm, w));
break;
case 0x27: // call
o = offset(aa);
o = offset(aa, mm, w);
call(mm, displacement(wb), o);
break;
case 0x28: // add(b) r, m
if (w) add_rm(brp, mm, offset(aa, mm, w));
else addb_rm(brp, mm, offset(aa, mm, w));
break;
case 0x29: // or(b) r, m
if (w) or_rm(brp, mm, offset(aa, mm, w));
else orb_rm(brp, mm, offset(aa, mm, w));
break;
case 0x2a: // and(b) r, m
if (w) and_rm(brp, mm, offset(aa, mm, w));
else andb_rm(brp, mm, offset(aa, mm, w));
break;
case 0x2b: // not(b) r, m
if (w) not_rm(brp, mm, offset(aa, mm, w));
else notb_rm(brp, mm, offset(aa, mm, w));
break;
case 0x2c: // jmce m, d
o = offset(aa, mm, w);
jmce(mm, displacement(wb), o);
break;
case 0x2d: // jmcne m, d
o = offset(aa, mm, w);
jmcne(mm, displacement(wb), o);
break;
case 0x2e: // jnbt m, b, d
o = offset(aa, mm, w);
jnbt(mm, brp, displacement(wb), o);
break;
case 0x2f: // jbt m, b, d
o = offset(aa, mm, w);
jbt(mm, brp, displacement(wb), o);
break;
case 0x30: // add(b)i m, i
o = offset(aa);
o = offset(aa, mm, w);
if (w) addi_mi(mm, imm16(), o);
else addbi_mi(mm, imm8(), o);
break;
case 0x31: // or(b)i m, i
o = offset(aa, mm, w);
if (w) ori_mi(mm, imm16(), o);
else orbi_mi(mm, imm8(), o);
break;
case 0x32: // and(b)i m, i
o = offset(aa);
o = offset(aa, mm, w);
if (w) andi_mi(mm, imm16(), o);
else andbi_mi(mm, imm8(), o);
break;
case 0x34: // add(b) m, r
if (w) add_mr(mm, brp, offset(aa));
else addb_mr(mm, brp, offset(aa));
if (w) add_mr(mm, brp, offset(aa, mm, w));
else addb_mr(mm, brp, offset(aa, mm, w));
break;
case 0x35: // or(b) m, r
if (w) or_mr(mm, brp, offset(aa, mm, w));
else orb_mr(mm, brp, offset(aa, mm, w));
break;
case 0x36: // and(b) m, r
if (w) and_mr(mm, brp, offset(aa));
else andb_mr(mm, brp, offset(aa));
if (w) and_mr(mm, brp, offset(aa, mm, w));
else andb_mr(mm, brp, offset(aa, mm, w));
break;
case 0x37: // not(b) m
if (w) not_m(mm, offset(aa, mm, w));
else notb_m(mm, offset(aa, mm, w));
break;
case 0x38: // jnz m
o = offset(aa, mm, w);
if(w) jnz_m(mm, displacement(wb), o);
else jnzb(mm, displacement(wb), o);
break;
case 0x39: // jz m
o = offset(aa, mm, w);
if(w) jz_m(mm, displacement(wb), o);
else jzb(mm, displacement(wb), o);
break;
case 0x3a: // inc(b) m
if (w) inc_m(mm, offset(aa, mm, w));
else incb(mm, offset(aa, mm, w));
break;
case 0x3b: // dec(b) m
if (w) dec_m(mm, offset(aa));
else decb(mm, offset(aa));
if (w) dec_m(mm, offset(aa, mm, w));
else decb(mm, offset(aa, mm, w));
break;
case 0x3d: // setb
setb(mm, brp, offset(aa, mm, w));
break;
case 0x3e: // clr
clr(mm, brp, offset(aa));
clr(mm, brp, offset(aa, mm, w));
break;
default:
@ -526,7 +677,7 @@ void i8089_channel::examine_ccw(UINT8 ccw)
void i8089_channel::attention()
{
// examine control byte
UINT8 ccw = m_iop->read_byte(m_r[CP].w);
UINT8 ccw = m_iop->read_byte(m_r[CP].t, m_r[CP].w);
switch (ccw & 0x07)
{
@ -545,12 +696,20 @@ void i8089_channel::attention()
examine_ccw(ccw);
lpd(PP, CP, 2);
movp_pm(TP, PP);
lpd(PP, CP, m_r[CP].w + 2);
movp_pm(TP, PP, m_r[PP].w);
movbi_mi(CP, 0xff, 1);
m_r[TP].t = 1;
m_r[PSW].w |= 1 << 2;
if (VERBOSE)
{
logerror("%s('%s'): ---- starting channel ----\n", shortname(), tag());
logerror("%s('%s'): parameter block address: %06x\n", shortname(), tag(), m_r[PP].w);
logerror("%s('%s'): task pointer: %04x\n", shortname(), tag(), m_r[TP].w);
}
break;
// reserved
@ -567,8 +726,8 @@ void i8089_channel::attention()
examine_ccw(ccw);
lpd(PP, CP, 2);
lpd(TP, PP);
lpd(PP, CP, m_r[CP].w + 2);
lpd(TP, PP, m_r[PP].w);
movbi_mi(CP, 0xff, 1);
m_r[PSW].w |= 1 << 2;
@ -594,9 +753,9 @@ void i8089_channel::attention()
logerror("%s('%s'): command received: continue channel processing\n", shortname(), tag());
// restore task pointer and parameter block
movp_pm(TP, PP);
movb_rm(PSW, PP, 3);
movbi_mi(CP, 0xff, 1);
movp_pm(TP, PP, m_r[PP].w);
movb_rm(PSW, PP, m_r[PP].w + 3);
movbi_mi(CP, 0xff, m_r[CP].w + 1);
m_r[PSW].w |= 1 << 2;
@ -614,8 +773,8 @@ void i8089_channel::attention()
logerror("%s('%s'): command received: halt channel and save tp\n", shortname(), tag());
// save task pointer and psw to parameter block
movp_mp(PP, TP);
movb_mr(PP, PSW, 3);
movp_mp(PP, TP, m_r[TP].w);
movb_mr(PP, PSW, m_r[PP].w + 3);
hlt();
break;
@ -635,6 +794,8 @@ WRITE_LINE_MEMBER( i8089_channel::ext_w )
{
if (VERBOSE)
logerror("%s('%s'): ext_w: %d\n", shortname(), tag(), state);
if(transferring())
terminate_dma((CC_TX - 1) * 4);
}
WRITE_LINE_MEMBER( i8089_channel::drq_w )

147
src/emu/cpu/i8089/i8089_channel.h
View File

@ -45,7 +45,7 @@ public:
template<class _sintr> void set_sintr_callback(_sintr sintr) { m_write_sintr.set_callback(sintr); }
// set register
void set_reg(int reg, int value, int tag = -1);
void set_reg(int reg, UINT32 value, int tag = -1);
int execute_run();
void attention();
@ -82,8 +82,8 @@ public:
struct
{
int w; // 20-bit address
int t; // tag-bit
UINT32 w; // 20-bit address
bool t; // tag-bit
}
m_r[11];
@ -95,94 +95,81 @@ protected:
private:
// opcodes
void add_rm(int r, int m, int o = 0);
void add_mr(int m, int r, int o = 0);
void addb_rm(int r, int m, int o = 0);
void addb_mr(int m, int r, int o = 0);
void addbi_ri(int r, int i);
void addbi_mi(int m, int i, int o = 0);
void addi_ri(int r, int i);
void addi_mi(int m, int i, int o = 0);
void and_rm(int r, int m, int o = 0);
void and_mr(int m, int r, int o = 0);
void andb_rm(int r, int m, int o = 0);
void andb_mr(int m, int r, int o = 0);
void andbi_ri(int r, int i);
void andbi_mi(int m, int i, int o = 0);
void andi_ri(int r, int i);
void andi_mi(int m, int i, int o = 0);
void call(int m, int d, int o = 0);
void clr(int m, int b, int o = 0);
void add_rm(int r, int m, int o);
void add_mr(int m, int r, int o);
void addb_rm(int r, int m, int o);
void addb_mr(int m, int r, int o);
void addbi_ri(int r, INT8 i);
void addbi_mi(int m, INT8 i, int o);
void addi_ri(int r, INT16 i);
void addi_mi(int m, INT16 i, int o);
void and_rm(int r, int m, int o);
void and_mr(int m, int r, int o);
void andb_rm(int r, int m, int o);
void andb_mr(int m, int r, int o);
void andbi_ri(int r, INT8 i);
void andbi_mi(int m, INT8 i, int o);
void andi_ri(int r, INT16 i);
void andi_mi(int m, INT16 i, int o);
void call(int m, INT16 d, int o);
void clr(int m, int b, int o);
void dec_r(int r);
void dec_m(int m, int o = 0);
void decb(int m, int o = 0);
void dec_m(int m, int o);
void decb(int m, int o);
void hlt();
void inc_r(int r);
void inc_m(int m, int o = 0);
void incb(int m, int o = 0);
void jbt(int m, int b, int d, int o = 0);
void jmce(int m, int d, int o = 0);
void jmcne(int m, int d, int o = 0);
void jmp(int d);
void jnbt(int m, int b, int d, int o = 0);
void jnz_r(int r, int d);
void jnz_m(int m, int d, int o = 0);
void jnzb(int m, int d, int o = 0);
void jz_r(int r, int d);
void jz_m(int m, int d, int o = 0);
void jzb(int m, int d, int o = 0);
void lcall(int m, int d, int o = 0);
void ljbt(int m, int b, int d, int o = 0);
void ljmce(int m, int d, int o = 0);
void ljmcne(int m, int d, int o = 0);
void ljmp(int d);
void ljnbt(int m, int b, int d, int o = 0);
void ljnz_r(int r, int d);
void ljnz_m(int m, int d, int o = 0);
void ljnzb(int m, int d, int o = 0);
void ljz_r(int r, int d);
void ljz_m(int m, int d, int o = 0);
void ljzb(int m, int d, int o = 0);
void lpd(int p, int m, int o = 0);
void lpdi(int p, int i, int o = 0);
void mov_mr(int m, int r, int o = 0);
void mov_rm(int r, int m, int o = 0);
void mov_mm(int m1, int m2, int o1 = 0, int o2 = 0);
void movb_mr(int m, int r, int o = 0);
void movb_rm(int r, int m, int o = 0);
void movb_mm(int m1, int m2, int o1 = 0, int o2 = 0);
void movbi_ri(int r, int i);
void movbi_mi(int m, int i, int o = 0);
void movi_ri(int r, int i);
void movi_mi(int m, int i, int o = 0);
void movp_mp(int m, int p, int o = 0);
void movp_pm(int p, int m, int o = 0);
void inc_m(int m, int o);
void incb(int m, int o);
void jbt(int m, int b, INT16 d, int o);
void jmce(int m, INT16 d, int o);
void jmcne(int m, INT16 d, int o);
void jnbt(int m, int b, INT16 d, int o);
void jnz_r(int r, INT16 d);
void jnz_m(int m, INT16 d, int o);
void jnzb(int m, INT16 d, int o);
void jz_r(int r, INT16 d);
void jz_m(int m, INT16 d, int o);
void jzb(int m, INT16 d, int o);
void lpd(int p, int m, int o);
void lpdi(int p, int s, int o);
void mov_mr(int m, int r, int o);
void mov_rm(int r, int m, int o);
void mov_mm(int m1, int m2, int o1, int o2);
void movb_mr(int m, int r, int o);
void movb_rm(int r, int m, int o);
void movb_mm(int m1, int m2, int o1, int o2);
void movbi_ri(int r, INT8 i);
void movbi_mi(int m, INT8 i, int o);
void movi_ri(int r, INT16 i);
void movi_mi(int m, INT16 i, int o);
void movp_mp(int m, int p, int o);
void movp_pm(int p, int m, int o);
void nop();
void not_r(int r);
void not_m(int m, int o = 0);
void not_rm(int r, int m, int o = 0);
void notb_m(int m, int o = 0);
void notb_rm(int r, int m, int o = 0);
void or_rm(int r, int m, int o = 0);
void or_mr(int m, int r, int o = 0);
void orb_rm(int r, int m, int o = 0);
void orb_mr(int m, int r, int o = 0);
void orbi_ri(int r, int i);
void orbi_mi(int m, int i, int o = 0);
void ori_ri(int r, int i);
void ori_mi(int m, int i, int o = 0);
void setb(int m, int b, int o = 0);
void not_m(int m, int o);
void not_rm(int r, int m, int o);
void notb_m(int m, int o);
void notb_rm(int r, int m, int o);
void or_rm(int r, int m, int o);
void or_mr(int m, int r, int o);
void orb_rm(int r, int m, int o);
void orb_mr(int m, int r, int o);
void orbi_ri(int r, INT8 i);
void orbi_mi(int m, INT8 i, int o);
void ori_ri(int r, INT16 i);
void ori_mi(int m, INT16 i, int o);
void setb(int m, int b, int o);
void sintr();
void tsl(int m, int i, int d, int o = 0);
void tsl(int m, INT8 i, INT8 d, int o);
void wid(int s, int d);
void xfer();
void invalid(int opc);
// instruction fetch
UINT16 displacement(int wb);
UINT8 offset(int aa);
UINT8 imm8();
UINT16 imm16();
INT16 displacement(int wb);
UINT32 offset(int aa, int mm, int w);
INT8 imm8();
INT16 imm16();
void examine_ccw(UINT8 ccw);

19
src/emu/cpu/i8089/i8089_dasm.c
View File

@ -20,7 +20,7 @@ INT16 displacement(offs_t &pc, int wb, const UINT8 *oprom, bool aa1)
switch (wb)
{
case 1:
result = oprom[2 + aa1];
result = (INT16)(INT8)oprom[2 + aa1];
pc += 1;
break;
case 2:
@ -104,6 +104,12 @@ CPU_DISASSEMBLE( i8089 )
sprintf(buffer, "lpdi %s, %4x %4x", BRP, off, seg);
break;
case 0x08:
if(brp == 4)
{
INT16 offset = (w ? IMM16 : (INT8)IMM8);
sprintf(buffer, "jmp %06x", pc + offset);
break;
}
if (w) sprintf(buffer, "addi %s, %04x", BRP, IMM16);
else sprintf(buffer, "addbi %s, %02x", BRP, IMM8);
break;
@ -169,6 +175,13 @@ CPU_DISASSEMBLE( i8089 )
else sprintf(buffer, "movb %s, %s", buf, o);
break;
}
case 0x25:
{
OFFSET(o);
UINT16 i = IMM16;
sprintf(buffer, "tsl %s, %02x, %06x", o, i & 0xff, pc + (i >> 8));
break;
}
case 0x26:
OFFSET(o);
sprintf(buffer, "movp %s, %s", o, BRP);
@ -222,7 +235,7 @@ CPU_DISASSEMBLE( i8089 )
case 0x31:
OFFSET(o);
if (w) sprintf(buffer, "ori %s, %04x", o, IMM16);
else sprintf(buffer, "ori %s, %02x", o, IMM8);
else sprintf(buffer, "orib %s, %02x", o, IMM8);
break;
case 0x32:
OFFSET(o);
@ -275,7 +288,7 @@ CPU_DISASSEMBLE( i8089 )
break;
case 0x3d:
OFFSET(o);
sprintf(buffer, "set %s, %d", o, brp);
sprintf(buffer, "setb %s, %d", o, brp);
break;
case 0x3e:
OFFSET(o);

380
src/emu/cpu/i8089/i8089_ops.c
View File

@ -14,137 +14,286 @@
#define UNIMPLEMENTED logerror("%s('%s'): unimplemented opcode: %s\n", shortname(), tag(), __FUNCTION__);
void i8089_channel::add_rm(int r, int m, int o) { UNIMPLEMENTED }
void i8089_channel::add_mr(int m, int r, int o) { UNIMPLEMENTED }
void i8089_channel::addb_rm(int r, int m, int o) { UNIMPLEMENTED }
void i8089_channel::addb_mr(int m, int r, int o) { UNIMPLEMENTED }
void i8089_channel::addbi_ri(int r, int i) { UNIMPLEMENTED }
void i8089_channel::addbi_mi(int m, int i, int o) { UNIMPLEMENTED }
void i8089_channel::addi_ri(int r, int i) { UNIMPLEMENTED }
void i8089_channel::addi_mi(int m, int i, int o) { UNIMPLEMENTED }
void i8089_channel::and_rm(int r, int m, int o) { UNIMPLEMENTED }
void i8089_channel::and_mr(int m, int r, int o) { UNIMPLEMENTED }
void i8089_channel::andb_rm(int r, int m, int o) { UNIMPLEMENTED }
void i8089_channel::andb_mr(int m, int r, int o) { UNIMPLEMENTED }
void i8089_channel::andbi_ri(int r, int i) { UNIMPLEMENTED }
void i8089_channel::andbi_mi(int m, int i, int o) { UNIMPLEMENTED }
void i8089_channel::andi_ri(int r, int i) { UNIMPLEMENTED }
void i8089_channel::andi_mi(int m, int i, int o) { UNIMPLEMENTED }
void i8089_channel::call(int m, int d, int o) { UNIMPLEMENTED }
void i8089_channel::clr(int m, int b, int o) { UNIMPLEMENTED }
void i8089_channel::dec_r(int r) { UNIMPLEMENTED }
void i8089_channel::dec_m(int m, int o) { UNIMPLEMENTED }
void i8089_channel::decb(int m, int o) { UNIMPLEMENTED }
#define LWR(m, o) ((INT16)m_iop->read_word(m_r[m].t, o))
#define LBR(m, o) ((INT8)m_iop->read_byte(m_r[m].t, o))
#define SWR(m, o, d) (m_iop->write_word(m_r[m].t, o, d))
#define SBR(m, o, d) (m_iop->write_byte(m_r[m].t, o, d))
void i8089_channel::add_rm(int r, int m, int o)
{
set_reg(r, m_r[r].w + LWR(m, o));
}
void i8089_channel::add_mr(int m, int r, int o)
{
SWR(m, o, LWR(m, o) + m_r[r].w);
}
void i8089_channel::addb_rm(int r, int m, int o)
{
set_reg(r, m_r[r].w + LBR(m, o));
}
void i8089_channel::addb_mr(int m, int r, int o)
{
SBR(m, o, LBR(m, o) + m_r[r].w);
}
void i8089_channel::addbi_ri(int r, INT8 i)
{
set_reg(r, m_r[r].w + i);
}
void i8089_channel::addbi_mi(int m, INT8 i, int o)
{
SBR(m, o, LBR(m, o) + i);
}
void i8089_channel::addi_ri(int r, INT16 i)
{
set_reg(r, m_r[r].w + i);
}
void i8089_channel::addi_mi(int m, INT16 i, int o)
{
SWR(m, o, LWR(m, o) + i);
}
void i8089_channel::and_rm(int r, int m, int o)
{
set_reg(r, m_r[r].w & LWR(m, o));
}
void i8089_channel::and_mr(int m, int r, int o)
{
SWR(m, o, LWR(m, o) & m_r[r].w);
}
void i8089_channel::andb_rm(int r, int m, int o)
{
set_reg(r, m_r[r].w & (INT16)LBR(m, o));
}
void i8089_channel::andb_mr(int m, int r, int o)
{
SBR(m, o, LBR(m, o) & m_r[r].w);
}
void i8089_channel::andbi_ri(int r, INT8 i)
{
set_reg(r, m_r[r].w & (INT16)i);
}
void i8089_channel::andbi_mi(int m, INT8 i, int o)
{
SBR(m, o, LBR(m, o) & i);
}
void i8089_channel::andi_ri(int r, INT16 i)
{
set_reg(r, m_r[r].w & i);
}
void i8089_channel::andi_mi(int m, INT16 i, int o)
{
SWR(m, o, LWR(m, o) & i);
}
void i8089_channel::call(int m, INT16 d, int o)
{
movp_mp(m, TP, o);
set_reg(TP, m_r[TP].w + d);
}
void i8089_channel::clr(int m, int b, int o)
{
SBR(m, o, LBR(m, o) & ~(1<<b));
}
void i8089_channel::dec_r(int r)
{
set_reg(r, m_r[r].w - 1);
}
void i8089_channel::dec_m(int m, int o)
{
SWR(m, o, LWR(m, o) - 1);
}
void i8089_channel::decb(int m, int o)
{
SBR(m, o, LBR(m, o) - 1);
}
// halt
void i8089_channel::hlt()
{
movbi_mi(CP, 0x00, 1);
movbi_mi(CP, 0x00, m_r[CP].w + 1);
m_r[PSW].w &= ~(1 << 2);
}
void i8089_channel::inc_r(int r) { UNIMPLEMENTED }
void i8089_channel::inc_m(int m, int o) { UNIMPLEMENTED }
void i8089_channel::incb(int m, int o) { UNIMPLEMENTED }
void i8089_channel::jbt(int m, int b, int d, int o) { UNIMPLEMENTED }
void i8089_channel::jmce(int m, int d, int o) { UNIMPLEMENTED }
void i8089_channel::jmcne(int m, int d, int o) { UNIMPLEMENTED }
void i8089_channel::jmp(int d) { UNIMPLEMENTED }
void i8089_channel::jnbt(int m, int b, int d, int o) { UNIMPLEMENTED }
void i8089_channel::jnz_r(int r, int d) { UNIMPLEMENTED }
void i8089_channel::jnz_m(int m, int d, int o) { UNIMPLEMENTED }
void i8089_channel::jnzb(int m, int d, int o) { UNIMPLEMENTED }
void i8089_channel::jz_r(int r, int d) { UNIMPLEMENTED }
void i8089_channel::jz_m(int m, int d, int o) { UNIMPLEMENTED }
void i8089_channel::jzb(int m, int d, int o) { UNIMPLEMENTED }
void i8089_channel::lcall(int m, int d, int o) { UNIMPLEMENTED }
void i8089_channel::ljbt(int m, int b, int d, int o) { UNIMPLEMENTED }
void i8089_channel::ljmce(int m, int d, int o) { UNIMPLEMENTED }
void i8089_channel::ljmcne(int m, int d, int o) { UNIMPLEMENTED }
void i8089_channel::ljmp(int d) { UNIMPLEMENTED }
void i8089_channel::ljnbt(int m, int b, int d, int o) { UNIMPLEMENTED }
void i8089_channel::ljnz_r(int r, int d) { UNIMPLEMENTED }
void i8089_channel::ljnz_m(int m, int d, int o) { UNIMPLEMENTED }
void i8089_channel::ljnzb(int m, int d, int o) { UNIMPLEMENTED }
void i8089_channel::ljz_r(int r, int d) { UNIMPLEMENTED }
void i8089_channel::ljz_m(int m, int d, int o) { UNIMPLEMENTED }
void i8089_channel::ljzb(int m, int d, int o) { UNIMPLEMENTED }
void i8089_channel::inc_r(int r)
{
set_reg(r, m_r[r].w + 1);
}
void i8089_channel::inc_m(int m, int o)
{
SWR(m, o, LWR(m, o) + 1);
}
void i8089_channel::incb(int m, int o)
{
SBR(m, o, LBR(m, o) + 1);
}
void i8089_channel::jbt(int m, int b, INT16 d, int o)
{
if(LBR(m, o) & (1<<b))
set_reg(TP, m_r[TP].w + d);
}
void i8089_channel::jmce(int m, INT16 d, int o)
{
if(!((LBR(m, o) ^ (m_r[MC].w & 0xff)) & (m_r[MC].w >> 8)))
set_reg(TP, m_r[TP].w + d);
}
void i8089_channel::jmcne(int m, INT16 d, int o)
{
if((LBR(m, o) ^ (m_r[MC].w & 0xff)) & (m_r[MC].w >> 8))
set_reg(TP, m_r[TP].w + d);
}
void i8089_channel::jnbt(int m, int b, INT16 d, int o)
{
if(!(LBR(m, o) & (1<<b)))
set_reg(TP, m_r[TP].w + d);
}
void i8089_channel::jnz_r(int r, INT16 d)
{
if(m_r[r].w)
set_reg(TP, m_r[TP].w + d);
}
void i8089_channel::jnz_m(int m, INT16 d, int o)
{
if(LWR(m, o))
set_reg(TP, m_r[TP].w + d);
}
void i8089_channel::jnzb(int m, INT16 d, int o)
{
if(LBR(m, o))
set_reg(TP, m_r[TP].w + d);
}
void i8089_channel::jz_r(int r, INT16 d)
{
if(!m_r[r].w)
set_reg(TP, m_r[TP].w + d);
}
void i8089_channel::jz_m(int m, INT16 d, int o)
{
if(!LWR(m, o))
set_reg(TP, m_r[TP].w + d);
}
void i8089_channel::jzb(int m, INT16 d, int o)
{
if(!LBR(m, o))
set_reg(TP, m_r[TP].w + d);
}
// load pointer from memory
void i8089_channel::lpd(int p, int m, int o)
{
UINT16 offset = m_iop->read_word(m_r[m].w + o);
UINT16 segment = m_iop->read_word(m_r[m].w + o + 2);
UINT16 offset = m_iop->read_word(m_r[m].t, o);
UINT16 segment = m_iop->read_word(m_r[m].t, o + 2);
set_reg(p, ((segment << 4) + offset) & 0xfffff, 0);
}
// load pointer from immediate data
void i8089_channel::lpdi(int p, int i, int o)
void i8089_channel::lpdi(int p, int s, int o)
{
set_reg(p, (o << 4) + (i & 0xffff), 0);
set_reg(p, (s << 4) + (o & 0xffff), 0);
}
void i8089_channel::mov_mr(int m, int r, int o) { UNIMPLEMENTED }
void i8089_channel::mov_rm(int r, int m, int o) { UNIMPLEMENTED }
void i8089_channel::mov_mm(int m1, int m2, int o1, int o2) { UNIMPLEMENTED }
void i8089_channel::mov_mr(int m, int r, int o)
{
SWR(m, o, m_r[r].w);
}
void i8089_channel::mov_rm(int r, int m, int o)
{
set_reg(r, LWR(m, o));
}
void i8089_channel::mov_mm(int m1, int m2, int o1, int o2)
{
SWR(m2, o2, LWR(m1, o1));
}
// move register to memory byte
void i8089_channel::movb_mr(int m, int r, int o)
{
m_iop->write_byte(m_r[m].w + o, m_r[r].w & 0xff);
m_iop->write_byte(m_r[m].t, o, m_r[r].w & 0xff);
}
// move memory byte to register
void i8089_channel::movb_rm(int r, int m, int o)
{
UINT8 byte = m_iop->read_byte(m_r[m].w + o);
UINT8 byte = m_iop->read_byte(m_r[m].t, o);
set_reg(r, (BIT(byte, 7) ? 0xfff00 : 0x00000) | byte, 1);
}
// move memory byte to memory byte
void i8089_channel::movb_mm(int m1, int m2, int o1, int o2)
{
UINT8 byte = m_iop->read_byte(m_r[m2].w + o2);
m_iop->write_byte(m_r[m1].w + o1, byte);
UINT8 byte = m_iop->read_byte(m_r[m1].t, o1);
m_iop->write_byte(m_r[m2].t, o2, byte);
}
// move immediate byte to register
void i8089_channel::movbi_ri(int r, int i)
void i8089_channel::movbi_ri(int r, INT8 i)
{
set_reg(r, (BIT(i, 7) ? 0xfff00 : 0x00000) | (i & 0xff), 1);
}
// move immediate byte to memory byte
void i8089_channel::movbi_mi(int m, int i, int o)
void i8089_channel::movbi_mi(int m, INT8 i, int o)
{
m_iop->write_byte(m_r[m].w + o, i & 0xff);
m_iop->write_byte(m_r[m].t, o, i & 0xff);
}
// move immediate word to register
void i8089_channel::movi_ri(int r, int i)
void i8089_channel::movi_ri(int r, INT16 i)
{
set_reg(r, (BIT(i, 15) ? 0xf0000 : 0x00000) | (i & 0xffff), 1);
}
// move immediate word to memory word
void i8089_channel::movi_mi(int m, int i, int o)
void i8089_channel::movi_mi(int m, INT16 i, int o)
{
m_iop->write_word(m_r[m].w + o, (BIT(i, 15) ? 0xf0000 : 0x00000) | (i & 0xffff));
m_iop->write_word(m_r[m].t, o, (BIT(i, 15) ? 0xf0000 : 0x00000) | (i & 0xffff));
}
// move pointer to memory (store)
void i8089_channel::movp_mp(int m, int p, int o)
{
m_iop->write_word(m_r[m].w + o, m_r[p].w & 0xffff);
m_iop->write_word(m_r[m].w + o + 2, (m_r[p].w >> 12 & 0xf0) | (m_r[p].t << 3 & 0x01));
m_iop->write_word(m_r[m].t, o, m_r[p].w & 0xffff);
m_iop->write_byte(m_r[m].t, o + 2, (m_r[p].w >> 12 & 0xf0) | (m_r[p].t << 3));
}
// move memory to pointer (restore)
void i8089_channel::movp_pm(int p, int m, int o)
{
UINT16 offset = m_iop->read_word(m_r[m].w + o);
UINT16 segment = m_iop->read_word(m_r[m].w + o + 2);
UINT16 offset = m_iop->read_word(m_r[m].t, o);
UINT16 segment = m_iop->read_byte(m_r[m].t, o + 2);
set_reg(p, ((segment << 4) + offset) & 0xfffff, segment >> 3 & 0x01);
}
@ -154,20 +303,76 @@ void i8089_channel::nop()
{
}
void i8089_channel::not_r(int r) { UNIMPLEMENTED }
void i8089_channel::not_m(int m, int o) { UNIMPLEMENTED }
void i8089_channel::not_rm(int r, int m, int o) { UNIMPLEMENTED }
void i8089_channel::notb_m(int m, int o) { UNIMPLEMENTED }
void i8089_channel::notb_rm(int r, int m, int o) { UNIMPLEMENTED }
void i8089_channel::or_rm(int r, int m, int o) { UNIMPLEMENTED }
void i8089_channel::or_mr(int m, int r, int o) { UNIMPLEMENTED }
void i8089_channel::orb_rm(int r, int m, int o) { UNIMPLEMENTED }
void i8089_channel::orb_mr(int m, int r, int o) { UNIMPLEMENTED }
void i8089_channel::orbi_ri(int r, int i) { UNIMPLEMENTED }
void i8089_channel::orbi_mi(int m, int i, int o) { UNIMPLEMENTED }
void i8089_channel::ori_ri(int r, int i) { UNIMPLEMENTED }
void i8089_channel::ori_mi(int m, int i, int o) { UNIMPLEMENTED }
void i8089_channel::setb(int m, int b, int o) { UNIMPLEMENTED }
void i8089_channel::not_r(int r)
{
set_reg(r, ~m_r[r].w);
}
void i8089_channel::not_m(int m, int o)
{
SWR(m, o, ~LWR(m, o));
}
void i8089_channel::not_rm(int r, int m, int o)
{
set_reg(r, ~LWR(m, o));
}
void i8089_channel::notb_m(int m, int o)
{
SBR(m, o, ~LBR(m, o));
}
void i8089_channel::notb_rm(int r, int m, int o)
{
set_reg(r, ~(INT32)LBR(m, o));
}
void i8089_channel::or_rm(int r, int m, int o)
{
set_reg(r, m_r[r].w | LWR(m, o));
}
void i8089_channel::or_mr(int m, int r, int o)
{
SWR(m, o, LWR(m, o) | m_r[r].w);
}
void i8089_channel::orb_rm(int r, int m, int o)
{
set_reg(r, m_r[r].w | (INT16)LBR(m, o));
}
void i8089_channel::orb_mr(int m, int r, int o)
{
SBR(m, o, LBR(m, o) | m_r[r].w);
}
void i8089_channel::orbi_ri(int r, INT8 i)
{
set_reg(r, m_r[r].w | (INT16)i);
}
void i8089_channel::orbi_mi(int m, INT8 i, int o)
{
SBR(m, o, LBR(m, o) | i);
}
void i8089_channel::ori_ri(int r, INT16 i)
{
set_reg(r, m_r[r].w | i);
}
void i8089_channel::ori_mi(int m, INT16 i, int o)
{
SWR(m, o, LWR(m, o) | i);
}
void i8089_channel::setb(int m, int b, int o)
{
SBR(m, o, LBR(m, o) | (1<<b));
}
// set interrupt service flip-flop
void i8089_channel::sintr()
@ -179,7 +384,14 @@ void i8089_channel::sintr()
}
}
void i8089_channel::tsl(int m, int i, int d, int o) { UNIMPLEMENTED }
void i8089_channel::tsl(int m, INT8 i, INT8 d, int o)
{
if(LBR(m, o))
set_reg(TP, m_r[TP].w + d);
else
SBR(m, o, i);
}
// set source and destination logical widths
void i8089_channel::wid(int s, int d)

2
src/emu/video/pc_cga.c
View File

@ -144,7 +144,7 @@ INPUT_PORTS_START( pcvideo_mc1502 )
PORT_BIT ( 0x03, 0x01, IPT_UNUSED ) /* via poisk2 */
PORT_CONFNAME( 0x1C, 0x00, "CGA monitor type")
PORT_CONFSETTING(0x00, "Colour RGB")
PORT_CONFSETTING(0x04, "Mono RGB")
PORT_CONFSETTING(0x08, "Colour composite")
PORT_BIT ( 0xE0, 0x00, IPT_UNUSED ) /* Chipset is always IBM */
INPUT_PORTS_END

396
src/mess/drivers/ec184x.c Normal file
View File

@ -0,0 +1,396 @@
/***************************************************************************
drivers/ec184x.c
Driver file for EC-184x series
TODO (ec1840)
- memory bank size is smaller (128K)
TODO (ec1841)
- add chargen upload support for MDA
- hard disk is connected but requires changes to isa_hdc.c
***************************************************************************/
#include "emu.h"
#include "includes/genpc.h"
#include "bus/pc_kbd/keyboards.h"
#include "cpu/i86/i86.h"
#include "machine/ram.h"
#define VERBOSE_DBG 1 /* general debug messages */
#define DBG_LOG(N,M,A) \
do { \
if(VERBOSE_DBG>=N) \
{ \
if( M ) \
logerror("%11.6f at %s: %-24s",machine().time().as_double(),machine().describe_context(),(char*)M ); \
logerror A; \
} \
} while (0)
class ec184x_state : public driver_device
{
public:
ec184x_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag) ,
m_maincpu(*this, "maincpu") { }
required_device<cpu_device> m_maincpu;
DECLARE_MACHINE_RESET(ec184x);
DECLARE_DRIVER_INIT(ec184x);
struct {
UINT8 enable[4];
int boards;
int board_size;
} m_memory;
DECLARE_READ8_MEMBER(memboard_r);
DECLARE_WRITE8_MEMBER(memboard_w);
};
/*
* EC-1841 memory controller. The machine can hold four memory boards;
* each board has a control register, its address is set by a DIP switch
* on the board itself.
*
* Only one board should be enabled for read, and one for write.
* Normally, this is the same board.
*
* Each board is divided into 4 banks, internally numbererd 0..3.
* POST tests each board on startup, and an error (indicated by
* I/O CH CK bus signal) causes it to disable failing bank(s) by writing
* 'reconfiguration code' (inverted number of failing memory bank) to
* the register.
* bit 1-0 'reconfiguration code'
* bit 2 enable read access
* bit 3 enable write access
*/
READ8_MEMBER(ec184x_state::memboard_r)
{
UINT8 data;
data = offset % 4;
if (data > m_memory.boards)
data = 0xff;
else
data = m_memory.enable[data];
DBG_LOG(1,"ec1841_memboard",("R (%d of %d) == %02X\n", offset, m_memory.boards, data ));
return data;
}
WRITE8_MEMBER(ec184x_state::memboard_w)
{
address_space &program = m_maincpu->space(AS_PROGRAM);
ram_device *m_ram = machine().device<ram_device>(RAM_TAG);
UINT8 current;
current = m_memory.enable[offset];
DBG_LOG(1,"ec1841_memboard",("W (%d of %d) <- %02X (%02X)\n", offset, m_memory.boards, data, current));
if (offset > m_memory.boards) {
return;
}
if (BIT(current, 2) && !BIT(data, 2)) {
// disable read access
program.unmap_read(0, m_memory.board_size-1);
DBG_LOG(1,"ec1841_memboard_w",("unmap_read(%d)\n", offset));
}
if (BIT(current, 3) && !BIT(data, 3)) {
// disable write access
program.unmap_write(0, 0x7ffff);
DBG_LOG(1,"ec1841_memboard_w",("unmap_write(%d)\n", offset));
}
if (!BIT(current, 2) && BIT(data, 2)) {
for(int i=0; i<4; i++)
m_memory.enable[i] &= 0xfb;
// enable read access
membank("bank10")->set_base(m_ram->pointer() + offset*0x80000);
program.install_read_bank(0, m_memory.board_size-1, "bank10");
DBG_LOG(1,"ec1841_memboard_w",("map_read(%d)\n", offset));
}
if (!BIT(current, 3) && BIT(data, 3)) {
for(int i=0; i<4; i++)
m_memory.enable[i] &= 0xf7;
// enable write access
membank("bank20")->set_base(m_ram->pointer() + offset*0x80000);
program.install_write_bank(0, m_memory.board_size-1, "bank20");
DBG_LOG(1,"ec1841_memboard_w",("map_write(%d)\n", offset));
}
m_memory.enable[offset] = data;
}
const struct pit8253_interface ec1841_pit8253_config =
{
{
{
XTAL_4MHz/4, /* heartbeat IRQ */
DEVCB_NULL,
DEVCB_DEVICE_LINE_MEMBER("pic8259", pic8259_device, ir0_w)
}, {
XTAL_4MHz/4, /* dram refresh */
DEVCB_NULL,
DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, ibm5160_mb_device, pc_pit8253_out1_changed)
}, {
XTAL_4MHz/4, /* pio port c pin 4, and speaker polling enough */
DEVCB_NULL,
DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, ibm5160_mb_device, pc_pit8253_out2_changed)
}
}
};
DRIVER_INIT_MEMBER( ec184x_state, ec184x )
{
address_space &program = m_maincpu->space(AS_PROGRAM);
ram_device *m_ram = machine().device<ram_device>(RAM_TAG);
m_memory.board_size = 512 * 1024; // XXX
m_memory.boards = m_ram->size()/m_memory.board_size - 1;
if (m_memory.boards > 3)
m_memory.boards = 3;
program.install_read_bank(0, m_memory.board_size-1, "bank10");
program.install_write_bank(0, m_memory.board_size-1, "bank20");
membank( "bank10" )->set_base( m_ram->pointer() );
membank( "bank20" )->set_base( m_ram->pointer() );
}
MACHINE_RESET_MEMBER( ec184x_state, ec184x )
{
memset(m_memory.enable, 0, sizeof(m_memory.enable));
// mark 1st board enabled
m_memory.enable[0] = 0xc;
}
static ADDRESS_MAP_START( ec1840_map, AS_PROGRAM, 8, ec184x_state )
ADDRESS_MAP_UNMAP_HIGH
AM_RANGE(0x00000, 0x7ffff) AM_RAM
AM_RANGE(0xa0000, 0xbffff) AM_NOP
AM_RANGE(0xc0000, 0xc7fff) AM_ROM
AM_RANGE(0xc8000, 0xcffff) AM_ROM
AM_RANGE(0xdc000, 0xdffff) AM_RAM
AM_RANGE(0xf0000, 0xfffff) AM_ROM
ADDRESS_MAP_END
static ADDRESS_MAP_START( ec1841_map, AS_PROGRAM, 16, ec184x_state )
ADDRESS_MAP_UNMAP_HIGH
AM_RANGE(0x00000, 0x7ffff) AM_RAM
AM_RANGE(0xa0000, 0xbffff) AM_NOP
AM_RANGE(0xc0000, 0xc7fff) AM_ROM
AM_RANGE(0xc8000, 0xcffff) AM_ROM
AM_RANGE(0xdc000, 0xdffff) AM_RAM // monochrome chargen
AM_RANGE(0xf0000, 0xfffff) AM_ROM
ADDRESS_MAP_END
static ADDRESS_MAP_START( ec1847_map, AS_PROGRAM, 8, ec184x_state )
ADDRESS_MAP_UNMAP_HIGH
AM_RANGE(0x00000, 0x9ffff) AM_RAMBANK("bank10")
AM_RANGE(0xa0000, 0xbffff) AM_NOP
AM_RANGE(0xc0000, 0xc7fff) AM_ROM
AM_RANGE(0xc8000, 0xcffff) AM_ROM
AM_RANGE(0xdc000, 0xdffff) AM_RAM
AM_RANGE(0xf0000, 0xfffff) AM_ROM
ADDRESS_MAP_END
static ADDRESS_MAP_START( ec1840_io, AS_IO, 8, ec184x_state )
ADDRESS_MAP_UNMAP_HIGH
ADDRESS_MAP_END
static ADDRESS_MAP_START( ec1841_io, AS_IO, 16, ec184x_state )
ADDRESS_MAP_UNMAP_HIGH
AM_RANGE(0x02b0, 0x02b3) AM_READWRITE8(memboard_r, memboard_w, 0xffff);
ADDRESS_MAP_END
static ADDRESS_MAP_START( ec1847_io, AS_IO, 8, ec184x_state )
ADDRESS_MAP_UNMAP_HIGH
// AM_RANGE(0x0210, 0x021f) AM_RAM // internal (non-standard?) bus extender
ADDRESS_MAP_END
static INPUT_PORTS_START( ec1841 )
INPUT_PORTS_END
static DEVICE_INPUT_DEFAULTS_START( ec1840 )
DEVICE_INPUT_DEFAULTS("DSW0", 0x31, 0x21)
DEVICE_INPUT_DEFAULTS_END
static DEVICE_INPUT_DEFAULTS_START( ec1841 )
DEVICE_INPUT_DEFAULTS("DSW0", 0x31, 0x21)
DEVICE_INPUT_DEFAULTS_END
static DEVICE_INPUT_DEFAULTS_START( ec1847 )
DEVICE_INPUT_DEFAULTS("DSW0", 0x31, 0x31)
DEVICE_INPUT_DEFAULTS_END
// XXX verify everything
static MACHINE_CONFIG_START( ec1840, ec184x_state )
MCFG_CPU_ADD("maincpu", I8088, 4096000)
MCFG_CPU_PROGRAM_MAP(ec1840_map)
MCFG_CPU_IO_MAP(ec1840_io)
MCFG_IBM5150_MOTHERBOARD_ADD("mb","maincpu")
MCFG_DEVICE_INPUT_DEFAULTS(ec1840)
MCFG_ISA8_SLOT_ADD("mb:isa", "isa1", pc_isa8_cards, "mda", false) // cga is? an option
MCFG_ISA8_SLOT_ADD("mb:isa", "isa2", pc_isa8_cards, "fdc_xt", false)
MCFG_ISA8_SLOT_ADD("mb:isa", "isa3", pc_isa8_cards, NULL, false) // native variant(s?) not emulated
MCFG_ISA8_SLOT_ADD("mb:isa", "isa4", pc_isa8_cards, NULL, false) // native serial not emulated
MCFG_ISA8_SLOT_ADD("mb:isa", "isa5", pc_isa8_cards, NULL, false) // native mouse port not emulated
MCFG_ISA8_SLOT_ADD("mb:isa", "isa6", pc_isa8_cards, NULL, false) // game port is an option
MCFG_SOFTWARE_LIST_ADD("flop_list","ec1841")
MCFG_PC_KBDC_SLOT_ADD("mb:pc_kbdc", "kbd", pc_xt_keyboards, STR_KBD_EC_1841)
MCFG_RAM_ADD(RAM_TAG)
MCFG_RAM_DEFAULT_SIZE("512K")
MACHINE_CONFIG_END
static MACHINE_CONFIG_START( ec1841, ec184x_state )
MCFG_CPU_ADD("maincpu", I8086, 4096000)
MCFG_CPU_PROGRAM_MAP(ec1841_map)
MCFG_CPU_IO_MAP(ec1841_io)
// MCFG_MACHINE_START_OVERRIDE(ec184x_state, ec184x)
MCFG_MACHINE_RESET_OVERRIDE(ec184x_state, ec184x)
MCFG_EC1841_MOTHERBOARD_ADD("mb", "maincpu")
MCFG_DEVICE_INPUT_DEFAULTS(ec1841)
MCFG_ISA8_SLOT_ADD("mb:isa", "isa1", pc_isa8_cards, "cga_ec1841", false)// mda is an option
MCFG_ISA8_SLOT_ADD("mb:isa", "isa2", pc_isa8_cards, "fdc_xt", false)
MCFG_ISA8_SLOT_ADD("mb:isa", "isa3", pc_isa8_cards, NULL, false) // native variants not emulated
MCFG_ISA8_SLOT_ADD("mb:isa", "isa4", pc_isa8_cards, NULL, false) // native serial not emulated
MCFG_ISA8_SLOT_ADD("mb:isa", "isa5", pc_isa8_cards, NULL, false) // native mouse port not emulated
MCFG_ISA8_SLOT_ADD("mb:isa", "isa6", pc_isa8_cards, NULL, false) // game port is? an option
MCFG_SOFTWARE_LIST_ADD("flop_list","ec1841")
MCFG_PC_KBDC_SLOT_ADD("mb:pc_kbdc", "kbd", pc_xt_keyboards, STR_KBD_EC_1841)
MCFG_RAM_ADD(RAM_TAG)
MCFG_RAM_DEFAULT_SIZE("512K")
MCFG_RAM_EXTRA_OPTIONS("1024K,1576K,2048K") // 640K variant not emulated
MACHINE_CONFIG_END
// XXX verify everything
static MACHINE_CONFIG_START( ec1847, ec184x_state )
MCFG_CPU_ADD("maincpu", I8088, 4772720)
MCFG_CPU_PROGRAM_MAP(ec1847_map)
MCFG_CPU_IO_MAP(ec1847_io)
MCFG_IBM5160_MOTHERBOARD_ADD("mb","maincpu")
MCFG_DEVICE_INPUT_DEFAULTS(ec1847)
MCFG_ISA8_SLOT_ADD("mb:isa", "isa1", pc_isa8_cards, "hercules", false) // cga, ega and vga(?) are options too
MCFG_ISA8_SLOT_ADD("mb:isa", "isa2", pc_isa8_cards, "fdc_xt", false)
MCFG_ISA8_SLOT_ADD("mb:isa", "isa3", pc_isa8_cards, NULL, false) // native variant (wd1010 + z80) not emulated
MCFG_ISA8_SLOT_ADD("mb:isa", "isa4", pc_isa8_cards, NULL, false) // native serial (2x8251) not emulated
MCFG_ISA8_SLOT_ADD("mb:isa", "isa5", pc_isa8_cards, NULL, false)
MCFG_ISA8_SLOT_ADD("mb:isa", "isa6", pc_isa8_cards, NULL, false)
MCFG_PC_KBDC_SLOT_ADD("mb:pc_kbdc", "kbd", pc_xt_keyboards, STR_KBD_KEYTRONIC_PC3270)
MCFG_RAM_ADD(RAM_TAG)
MCFG_RAM_DEFAULT_SIZE("640K")
MACHINE_CONFIG_END
ROM_START( ec1840 )
ROM_REGION16_LE(0x100000,"maincpu", 0)
ROM_SYSTEM_BIOS(0, "v4", "EC-1840.04")
ROMX_LOAD( "000-04-971b.bin", 0xfe000, 0x0800, CRC(06aeaee8) SHA1(9f954e4c48156d573a8e0109e7ca652be9e6036a), ROM_SKIP(1) | ROM_BIOS(1))
ROMX_LOAD( "001-04-92b7.bin", 0xff000, 0x0800, CRC(3fae650a) SHA1(c98b777fdeceadd72d6eb9465b3501b9ead55a08), ROM_SKIP(1) | ROM_BIOS(1))
ROMX_LOAD( "002-04-9e17.bin", 0xfe001, 0x0800, CRC(d59712df) SHA1(02ea1b3ae9662f5c64c58920a32ca9db0f6fbd12), ROM_SKIP(1) | ROM_BIOS(1))
ROMX_LOAD( "003-04-3ccb.bin", 0xff001, 0x0800, CRC(7fc362c7) SHA1(538e13639ad2b4c30bd72582e323181e63513306), ROM_SKIP(1) | ROM_BIOS(1))
ROM_REGION(0x2000,"gfx1", ROMREGION_ERASE00)
ROM_END
ROM_START( ec1841 )
ROM_REGION16_LE(0x100000,"maincpu", 0)
ROM_DEFAULT_BIOS("v2")
ROM_SYSTEM_BIOS(0, "v1", "EC-1841.01")
ROMX_LOAD( "012-01-3107.bin", 0xfc000, 0x0800, CRC(77957396) SHA1(785f1dceb6e2b4618f5c5f0af15eb74a8c951448), ROM_SKIP(1) | ROM_BIOS(1))
ROMX_LOAD( "013-01-203f.bin", 0xfc001, 0x0800, CRC(768bd3d5) SHA1(2e948f2ad262de306d889b7964c3f1aad45ff5bc), ROM_SKIP(1) | ROM_BIOS(1))
ROMX_LOAD( "014-01-fa40.bin", 0xfd000, 0x0800, CRC(47722b58) SHA1(a6339ee8af516f834826b7828a5cf79cb650480c), ROM_SKIP(1) | ROM_BIOS(1))
ROMX_LOAD( "015-01-bf1d.bin", 0xfd001, 0x0800, CRC(b585b5ea) SHA1(d0ebed586eb13031477c2e071c50416682f80489), ROM_SKIP(1) | ROM_BIOS(1))
ROMX_LOAD( "016-01-65f7.bin", 0xfe000, 0x0800, CRC(28a07db4) SHA1(17fbcd60dacd1d3f8d8355db429f97e4d1d1ac88), ROM_SKIP(1) | ROM_BIOS(1))
ROMX_LOAD( "017-01-5be1.bin", 0xfe001, 0x0800, CRC(928bda26) SHA1(ee889184067e2680b29a8ef1c3a76cf5afd4c78d), ROM_SKIP(1) | ROM_BIOS(1))
ROMX_LOAD( "018-01-7090.bin", 0xff000, 0x0800, CRC(75ca7d7e) SHA1(6356426820c5326a7893a437d54b02f250ef8609), ROM_SKIP(1) | ROM_BIOS(1))
ROMX_LOAD( "019-01-0492.bin", 0xff001, 0x0800, CRC(8a9d593e) SHA1(f3936d2cb4e6d130dd732973f126c3aa20612463), ROM_SKIP(1) | ROM_BIOS(1))
ROM_SYSTEM_BIOS(1, "v2", "EC-1841.02")
ROMX_LOAD( "012-02-37f6.bin", 0xfc000, 0x0800, CRC(8f5c6a20) SHA1(874b62f9cee8d3b974f33732f94eff10fc002c44), ROM_SKIP(1) | ROM_BIOS(2))
ROMX_LOAD( "013-02-2552.bin", 0xfc001, 0x0800, CRC(e3c10128) SHA1(d6ed743ebe9c130925c9f17aad1a45db9194c967), ROM_SKIP(1) | ROM_BIOS(2))
ROMX_LOAD( "014-02-0fbe.bin", 0xfd000, 0x0800, CRC(f8517e5e) SHA1(8034cd6ff5778365dc9daa494524f1753a74f1ed), ROM_SKIP(1) | ROM_BIOS(2))
ROMX_LOAD( "015-02-d736.bin", 0xfd001, 0x0800, CRC(8538c52a) SHA1(ee981ce90870b6546a18f2a2e64d71b0038ce0dd), ROM_SKIP(1) | ROM_BIOS(2))
ROMX_LOAD( "016-02-5b2c.bin", 0xfe000, 0x0800, CRC(3d1d1e67) SHA1(c527e29796537787c0f6c329f3c203f6131ca77f), ROM_SKIP(1) | ROM_BIOS(2))
ROMX_LOAD( "017-02-4b9d.bin", 0xfe001, 0x0800, CRC(1b985264) SHA1(5ddcb9c13564be208c5068c105444a87159c67ee), ROM_SKIP(1) | ROM_BIOS(2))
ROMX_LOAD( "018-02-7090.bin", 0xff000, 0x0800, CRC(75ca7d7e) SHA1(6356426820c5326a7893a437d54b02f250ef8609), ROM_SKIP(1) | ROM_BIOS(2))
ROMX_LOAD( "019-02-0493.bin", 0xff001, 0x0800, CRC(61aae23d) SHA1(7b3aa24a63ee31b194297eb1e61c3827edfcb95a), ROM_SKIP(1) | ROM_BIOS(2))
ROM_SYSTEM_BIOS(2, "v3", "EC-1841.03")
ROMX_LOAD( "012-03-37e7.bin", 0xfc000, 0x0800, CRC(49992bd5) SHA1(119121e1b4af1c44b9b8c2edabe7dc1d3019c4a6), ROM_SKIP(1) | ROM_BIOS(3))
ROMX_LOAD( "013-03-2554.bin", 0xfc001, 0x0800, CRC(834bd7d7) SHA1(e37514fc4cb8a5cbe68e7564e0e07d5116c4021a), ROM_SKIP(1) | ROM_BIOS(3))
ROMX_LOAD( "014-03-0fbe.bin", 0xfd000, 0x0800, CRC(f8517e5e) SHA1(8034cd6ff5778365dc9daa494524f1753a74f1ed), ROM_SKIP(1) | ROM_BIOS(3))
ROMX_LOAD( "015-03-d736.bin", 0xfd001, 0x0800, CRC(8538c52a) SHA1(ee981ce90870b6546a18f2a2e64d71b0038ce0dd), ROM_SKIP(1) | ROM_BIOS(3))
ROMX_LOAD( "016-03-5b2c.bin", 0xfe000, 0x0800, CRC(3d1d1e67) SHA1(c527e29796537787c0f6c329f3c203f6131ca77f), ROM_SKIP(1) | ROM_BIOS(3))
ROMX_LOAD( "017-03-4b9d.bin", 0xfe001, 0x0800, CRC(1b985264) SHA1(5ddcb9c13564be208c5068c105444a87159c67ee), ROM_SKIP(1) | ROM_BIOS(3))
ROMX_LOAD( "018-03-7090.bin", 0xff000, 0x0800, CRC(75ca7d7e) SHA1(6356426820c5326a7893a437d54b02f250ef8609), ROM_SKIP(1) | ROM_BIOS(3))
ROMX_LOAD( "019-03-0493.bin", 0xff001, 0x0800, CRC(61aae23d) SHA1(7b3aa24a63ee31b194297eb1e61c3827edfcb95a), ROM_SKIP(1) | ROM_BIOS(3))
ROM_END
ROM_START( ec1845 )
ROM_REGION16_LE(0x100000,"maincpu", 0)
ROMX_LOAD( "184500.bin", 0xfc000, 0x0800, CRC(7c472ef7) SHA1(3af53f27b49bbc731bf51f9300fbada23a1bfcfc), ROM_SKIP(1))
ROMX_LOAD( "184501.bin", 0xfc001, 0x0800, CRC(db240dc6) SHA1(d7bb022213d09bbf2a8107fe4f1cd27b23939e18), ROM_SKIP(1))
ROMX_LOAD( "184502.bin", 0xfd000, 0x0800, CRC(149e7e29) SHA1(7f2a297588fef1bc750c57e6ae0d5acf3d27c486), ROM_SKIP(1))
ROMX_LOAD( "184503.bin", 0xfd001, 0x0800, CRC(e28cbd74) SHA1(cf1fba4e67c8e1dd8cdda547118e84b704029b03), ROM_SKIP(1))
ROMX_LOAD( "184504.bin", 0xfe000, 0x0800, CRC(55fa7a1d) SHA1(58f7abab08b9d2f0a1c1636e11bb72af2694c95f), ROM_SKIP(1))
ROMX_LOAD( "184505.bin", 0xfe001, 0x0800, CRC(c807e3f5) SHA1(08117e449f0d04f96041cff8d34893f500f3760d), ROM_SKIP(1))
ROMX_LOAD( "184506.bin", 0xff000, 0x0800, CRC(24f5c27c) SHA1(7822dd7f715ef00ccf6d8408be8bbfe01c2eba20), ROM_SKIP(1))
ROMX_LOAD( "184507.bin", 0xff001, 0x0800, CRC(75122203) SHA1(7b0fbdf1315230633e39574ac7360163bc7361e1), ROM_SKIP(1))
ROM_END
ROM_START( ec1847 )
ROM_REGION16_LE(0x100000,"maincpu", 0)
ROM_SYSTEM_BIOS(0, "vXXX", "EC-1847.0x")
ROMX_LOAD( "308_d47_2764.bin", 0xc8000, 0x2000, CRC(f06924f2) SHA1(83a5dedf1c06f875c598f087bbc087524bc9bfa3), ROM_BIOS(1))
ROMX_LOAD( "188m_d47_2764.bin", 0xf4000, 0x2000, CRC(bc8742c7) SHA1(3af09d14e891e976b7a9a2a6e1af63f0eabe5426), ROM_BIOS(1))
ROMX_LOAD( "188m_d48_2764.bin", 0xfe000, 0x2000, CRC(7d290e95) SHA1(e73e6c8e19477fce5de3f95b89693dc6ad6781ab), ROM_BIOS(1))
ROM_REGION(0x2000,"gfx1", ROMREGION_ERASE00)
ROM_LOAD( "317_d28_2732.bin", 0x00000, 0x1000, CRC(8939599b) SHA1(53d02460cf93596882a96758ef4bac5fa1ce55b2)) // monochrome font
ROM_END
/***************************************************************************
Game driver(s)
***************************************************************************/
/* YEAR ROM NAME PARENT COMPAT MACHINE INPUT INIT COMPANY FULLNAME */
COMP ( 1987, ec1840, ibm5150, 0, ec1840, ec1841, ec184x_state, ec184x, "<unknown>", "EC-1840", GAME_NOT_WORKING)
COMP ( 1987, ec1841, ibm5150, 0, ec1841, ec1841, ec184x_state, ec184x, "<unknown>", "EC-1841", 0)
COMP ( 1989, ec1845, ibm5150, 0, ec1841, ec1841, ec184x_state, ec184x, "<unknown>", "EC-1845", GAME_NOT_WORKING)
COMP ( 1990, ec1847, ibm5150, 0, ec1847, ec1841, driver_device, 0, "<unknown>", "EC-1847", GAME_NOT_WORKING)

11
src/mess/drivers/isbc.c
View File

@ -24,6 +24,7 @@ isbc86 commands: BYTE WORD REAL EREAL ROMTEST. ROMTEST works, the others hang.
#include "machine/serial.h"
#include "bus/centronics/ctronics.h"
#include "bus/isbx/isbx.h"
#include "machine/isbc_215g.h"
class isbc_state : public driver_device
{
@ -100,6 +101,7 @@ static ADDRESS_MAP_START(isbc286_io, AS_IO, 16, isbc_state)
AM_RANGE(0x00c8, 0x00cf) AM_DEVREADWRITE8("ppi", i8255_device, read, write, 0x00ff)
AM_RANGE(0x00d0, 0x00d7) AM_DEVREADWRITE8("pit", pit8254_device, read, write, 0x00ff)
AM_RANGE(0x00d8, 0x00df) AM_DEVREADWRITE8("uart8274", i8274_device, cd_ba_r, cd_ba_w, 0x00ff)
AM_RANGE(0x0100, 0x0101) AM_DEVWRITE8("isbc_215g", isbc_215g_device, write, 0x00ff)
ADDRESS_MAP_END
static ADDRESS_MAP_START(isbc286_mem, AS_PROGRAM, 16, isbc_state)
@ -324,6 +326,9 @@ static MACHINE_CONFIG_START( isbc286, isbc_state )
MCFG_ISBX_SLOT_MINTR0_CALLBACK(DEVWRITELINE("pic_1", pic8259_device, ir5_w))
MCFG_ISBX_SLOT_MINTR1_CALLBACK(DEVWRITELINE("pic_1", pic8259_device, ir6_w))
MCFG_ISBC_215_ADD("isbc_215g", 0x100, "maincpu")
MCFG_ISBC_215_IRQ(DEVWRITELINE("pic_0", pic8259_device, ir5_w))
/* video hardware */
MCFG_SERIAL_TERMINAL_ADD("terminal", terminal_intf, 9600)
MCFG_DEVICE_INPUT_DEFAULTS(isbc286_terminal)
@ -347,9 +352,9 @@ ROM_START( isbc286 )
ROM_REGION( 0x20000, "user1", ROMREGION_ERASEFF )
ROM_LOAD16_BYTE( "u79.bin", 0x00001, 0x10000, CRC(144182ea) SHA1(4620ca205a6ac98fe2636183eaead7c4bfaf7a72))
ROM_LOAD16_BYTE( "u36.bin", 0x00000, 0x10000, CRC(22db075f) SHA1(fd29ea77f5fc0697c8f8b66aca549aad5b9db3ea))
ROM_REGION( 0x4000, "isbc215", ROMREGION_ERASEFF )
ROM_LOAD16_BYTE( "174581.001.bin", 0x0000, 0x2000, CRC(ccdbc7ab) SHA1(5c2ebdde1b0252124177221ba9cacdb6d925a24d))
ROM_LOAD16_BYTE( "174581.002.bin", 0x0001, 0x2000, CRC(6190fa67) SHA1(295dd4e75f699aaf93227cc4876cee8accae383a))
// ROM_REGION( 0x4000, "isbc215", ROMREGION_ERASEFF )
// ROM_LOAD16_BYTE( "174581.001.bin", 0x0000, 0x2000, CRC(ccdbc7ab) SHA1(5c2ebdde1b0252124177221ba9cacdb6d925a24d))
// ROM_LOAD16_BYTE( "174581.002.bin", 0x0001, 0x2000, CRC(6190fa67) SHA1(295dd4e75f699aaf93227cc4876cee8accae383a))
ROM_END
ROM_START( isbc2861 )

147
src/mess/drivers/iskr103x.c Normal file
View File

@ -0,0 +1,147 @@
/***************************************************************************
drivers/iskr103x.c
Driver file for Iskra-1030, 1031
TODO
- fix cyrillic chargen upload for CGA and MDA
- replace DIP switch definition
- keyboard test is not passing (code 301)
- hard disk is connected but untested
***************************************************************************/
#include "emu.h"
#include "includes/genpc.h"
#include "cpu/nec/nec.h"
#include "cpu/i86/i86.h"
#include "machine/pc_lpt.h"
#include "bus/pc_kbd/keyboards.h"
#include "machine/ram.h"
#define DBG_LOG(a,b,c)
class iskr103x_state : public driver_device
{
public:
iskr103x_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag) ,
m_maincpu(*this, "maincpu") { }
required_device<cpu_device> m_maincpu;
};
static ADDRESS_MAP_START( iskr1031_map, AS_PROGRAM, 16, iskr103x_state )
ADDRESS_MAP_UNMAP_HIGH
AM_RANGE(0x00000, 0x7ffff) AM_RAMBANK("bank10")
AM_RANGE(0xa0000, 0xbffff) AM_NOP
AM_RANGE(0xc0000, 0xc7fff) AM_ROM
AM_RANGE(0xc8000, 0xcffff) AM_ROM
AM_RANGE(0xd0000, 0xeffff) AM_NOP
AM_RANGE(0xf0000, 0xfffff) AM_ROM
ADDRESS_MAP_END
static ADDRESS_MAP_START(iskr1031_io, AS_IO, 16, iskr103x_state)
ADDRESS_MAP_UNMAP_HIGH
ADDRESS_MAP_END
static INPUT_PORTS_START( iskr1030m )
INPUT_PORTS_END
static INPUT_PORTS_START( iskr1031 )
INPUT_PORTS_END
static DEVICE_INPUT_DEFAULTS_START(iskr1030m)
DEVICE_INPUT_DEFAULTS("DSW0", 0x31, 0x21)
DEVICE_INPUT_DEFAULTS_END
static DEVICE_INPUT_DEFAULTS_START(iskr1031)
DEVICE_INPUT_DEFAULTS("DSW0", 0x30, 0x20)
DEVICE_INPUT_DEFAULTS_END
// XXX
static MACHINE_CONFIG_START( iskr1030m, iskr103x_state )
/* basic machine hardware */
MCFG_CPU_ADD("maincpu", I8086, 4772720)
MCFG_CPU_PROGRAM_MAP(iskr1031_map)
MCFG_CPU_IO_MAP(iskr1031_io)
MCFG_IBM5160_MOTHERBOARD_ADD("mb","maincpu")
MCFG_DEVICE_INPUT_DEFAULTS(iskr1030m)
MCFG_ISA8_SLOT_ADD("mb:isa", "isa1", pc_isa8_cards, "mda", false)
MCFG_ISA8_SLOT_ADD("mb:isa", "isa2", pc_isa8_cards, "fdc_xt", false)
MCFG_ISA8_SLOT_ADD("mb:isa", "isa3", pc_isa8_cards, NULL, false) // hdc is WIP
MCFG_ISA8_SLOT_ADD("mb:isa", "isa4", pc_isa8_cards, NULL, false)
MCFG_ISA8_SLOT_ADD("mb:isa", "isa5", pc_isa8_cards, NULL, false)
MCFG_ISA8_SLOT_ADD("mb:isa", "isa6", pc_isa8_cards, NULL, false)
MCFG_PC_KBDC_SLOT_ADD("mb:pc_kbdc", "kbd", pc_xt_keyboards, STR_KBD_EC_1841)
// MCFG_PC_KBDC_SLOT_ADD("mb:pc_kbdc", "kbd", pc_xt_keyboards, STR_KBD_ISKR_1030)
MCFG_RAM_ADD(RAM_TAG)
MCFG_RAM_DEFAULT_SIZE("640K")
MACHINE_CONFIG_END
static MACHINE_CONFIG_START( iskr1031, iskr103x_state )
/* basic machine hardware */
MCFG_CPU_ADD("maincpu", I8086, 4772720)
MCFG_CPU_PROGRAM_MAP(iskr1031_map)
MCFG_CPU_IO_MAP(iskr1031_io)
MCFG_IBM5160_MOTHERBOARD_ADD("mb","maincpu")
MCFG_DEVICE_INPUT_DEFAULTS(iskr1031)
MCFG_ISA8_SLOT_ADD("mb:isa", "isa1", pc_isa8_cards, "cga", false)
MCFG_ISA8_SLOT_ADD("mb:isa", "isa2", pc_isa8_cards, "fdc_xt", false)
MCFG_ISA8_SLOT_ADD("mb:isa", "isa3", pc_isa8_cards, NULL, false) // hdc is WIP
MCFG_ISA8_SLOT_ADD("mb:isa", "isa4", pc_isa8_cards, NULL, false)
MCFG_ISA8_SLOT_ADD("mb:isa", "isa5", pc_isa8_cards, NULL, false)
MCFG_ISA8_SLOT_ADD("mb:isa", "isa6", pc_isa8_cards, NULL, false)
// MCFG_SOFTWARE_LIST_ADD("flop_list", "iskr1031")
MCFG_PC_KBDC_SLOT_ADD("mb:pc_kbdc", "kbd", pc_xt_keyboards, STR_KBD_EC_1841)
// MCFG_PC_KBDC_SLOT_ADD("mb:pc_kbdc", "kbd", pc_xt_keyboards, STR_KBD_ISKR_1030)
MCFG_RAM_ADD(RAM_TAG)
MCFG_RAM_DEFAULT_SIZE("640K")
MACHINE_CONFIG_END
ROM_START( iskr1030m )
ROM_REGION16_LE(0x100000,"maincpu", 0)
ROMX_LOAD( "iskra-1030m_0.rom", 0xfc000, 0x2000, CRC(0d698e19) SHA1(2fe117c9f4f8c4b59085d5a41f919d743c425fdd), ROM_SKIP(1))
ROMX_LOAD( "iskra-1030m_1.rom", 0xfc001, 0x2000, CRC(fe808337) SHA1(b0b7ebe14324ada8aa9a6926a82b18e80f78a257), ROM_SKIP(1))
ROM_REGION(0x2000,"gfx1", 0)
ROM_LOAD( "iskra-1030m.chr", 0x0000, 0x2000, CRC(50b162eb) SHA1(5bd7cb1705a69bd16115a4c9ed1c2748a5c8ad51))
ROM_END
ROM_START( iskr1031 )
ROM_REGION16_LE(0x100000,"maincpu", 0)
ROM_SYSTEM_BIOS(0, "v1", "v1")
ROMX_LOAD( "150-02.bin", 0xfc000, 0x2000, CRC(e33fb974) SHA1(f5f3ece67c025c0033716ff516e1a34fbeb32749), ROM_SKIP(1) | ROM_BIOS(1))
ROMX_LOAD( "150-03.bin", 0xfc001, 0x2000, CRC(8c482258) SHA1(90ef48955e0df556dc06a000a797ef42ccf430c5), ROM_SKIP(1) | ROM_BIOS(1))
ROM_SYSTEM_BIOS(1, "v2", "v2")
ROMX_LOAD( "150-06.bin", 0xfc000, 0x2000, CRC(1adbf969) SHA1(08c0a0fc50a75e6207b1987bae389cca60893eac), ROM_SKIP(1) | ROM_BIOS(2))
ROMX_LOAD( "150-07.bin", 0xfc001, 0x2000, CRC(0dc4b65a) SHA1(c96f066251a7343eac8113ea9dcb2cb12d0334d5), ROM_SKIP(1) | ROM_BIOS(2))
ROM_REGION(0x2000,"gfx1", 0)
ROM_LOAD( "iskra-1031_font.bin", 0x0000, 0x2000, CRC(f4d62e80) SHA1(ad7e81a0c9abc224671422bbcf6f6262da92b510))
ROM_END
/***************************************************************************
Game driver(s)
***************************************************************************/
/* YEAR NAME PARENT COMPAT MACHINE INPUT INIT COMPANY FULLNAME */
COMP ( 1989, iskr1030m, ibm5150, 0, iskr1030m, iskr1030m, driver_device, 0, "Schetmash", "Iskra 1030M", GAME_NOT_WORKING)
COMP ( 1989, iskr1031, ibm5150, 0, iskr1031, iskr1031, driver_device, 0, "<unknown>", "Iskra 1031", 0)

438
src/mess/drivers/mc1502.c Normal file
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/***************************************************************************
drivers/mc1502.c
Driver file for Electronika MC 1502
***************************************************************************/
#include "emu.h"
#include "includes/mc1502.h"
#include "cpu/i86/i86.h"
#include "imagedev/serial.h"
#include "machine/kb_7007_3.h"
#include "sound/speaker.h"
#include "sound/wave.h"
#include "video/pc_cga.h"
#define VERBOSE_DBG 0
#define DBG_LOG(N,M,A) \
do { \
if(VERBOSE_DBG>=N) \
{ \
if( M ) \
logerror("%11.6f: %-24s",machine().time().as_double(),(char*)M ); \
logerror A; \
} \
} while (0)
/*
* onboard devices:
*/
static const cassette_interface mc1502_cassette_interface =
{
cassette_default_formats,
NULL,
(cassette_state)(CASSETTE_STOPPED | CASSETTE_MOTOR_ENABLED | CASSETTE_SPEAKER_ENABLED),
NULL,
NULL
};
static const serial_image_interface mc1502_serial =
{
9600, 8, 1, device_serial_interface::PARITY_NONE, 1, "upd8251"
};
// Timer
static const isa8bus_interface mc1502_isabus_intf =
{
// interrupts
DEVCB_DEVICE_LINE_MEMBER("pic8259", pic8259_device, ir2_w),
DEVCB_DEVICE_LINE_MEMBER("pic8259", pic8259_device, ir3_w),
DEVCB_DEVICE_LINE_MEMBER("pic8259", pic8259_device, ir4_w),
DEVCB_DEVICE_LINE_MEMBER("pic8259", pic8259_device, ir5_w),
DEVCB_DEVICE_LINE_MEMBER("pic8259", pic8259_device, ir6_w),
DEVCB_DEVICE_LINE_MEMBER("pic8259", pic8259_device, ir7_w),
// dma request
DEVCB_NULL,
DEVCB_NULL,
DEVCB_NULL,
};
/* check if any keys are pressed, raise IRQ1 if so */
TIMER_CALLBACK_MEMBER(mc1502_state::keyb_signal_callback)
{
UINT8 key = 0;
key |= ioport("Y1")->read();
key |= ioport("Y2")->read();
key |= ioport("Y3")->read();
key |= ioport("Y4")->read();
key |= ioport("Y5")->read();
key |= ioport("Y6")->read();
key |= ioport("Y7")->read();
key |= ioport("Y8")->read();
key |= ioport("Y9")->read();
key |= ioport("Y10")->read();
key |= ioport("Y11")->read();
key |= ioport("Y12")->read();
// DBG_LOG(1,"mc1502_k_s_c",("= %02X (%d) %s\n", key, m_kbd.pulsing,
// (key || m_kbd.pulsing) ? " will IRQ" : ""));
/*
If a key is pressed and we're not pulsing yet, start pulsing the IRQ1;
keep pulsing while any key is pressed, and pulse one time after all keys
are released.
*/
if (key) {
if (m_kbd.pulsing < 2) {
m_kbd.pulsing += 2;
}
}
if (m_kbd.pulsing) {
m_pic8259->ir1_w(m_kbd.pulsing & 1);
m_kbd.pulsing--;
}
}
WRITE8_MEMBER(mc1502_state::mc1502_ppi_porta_w)
{
m_centronics->write(space, 0, data);
}
WRITE8_MEMBER(mc1502_state::mc1502_ppi_portb_w)
{
// DBG_LOG(2,"mc1502_ppi_portb_w",("( %02X )\n", data));
m_ppi_portb = data;
machine().device<pit8253_device>("pit8253")->gate2_w(BIT(data, 0));
// mc1502_speaker_set_spkrdata(BIT(data, 1));
m_centronics->strobe_w(BIT(data, 2));
m_centronics->autofeed_w(BIT(data, 3));
m_centronics->init_prime_w(BIT(data, 4));
}
// bit 0: parallel port data transfer direction (default = 0 = out)
// bits 1-2: CGA_FONT (default = 01)
// bit 3: i8251 SYNDET pin triggers NMI (default = 1 = no)
WRITE8_MEMBER(mc1502_state::mc1502_ppi_portc_w)
{
// DBG_LOG(2,"mc1502_ppi_portc_w",("( %02X )\n", data));
m_ppi_portc = data & 15;
}
READ8_MEMBER(mc1502_state::mc1502_kppi_portc_r)
{
UINT8 data = 0;
data |= m_centronics->fault_r() << 4;
data |= m_centronics->pe_r() << 5;
data |= m_centronics->ack_r() << 6;
data |= m_centronics->busy_r() << 7;
return data;
}
// 0x80 -- serial RxD
// 0x40 -- CASS IN, also loops back T2OUT (gated by CASWR)
// 0x20 -- T2OUT
// 0x10 -- SNDOUT
READ8_MEMBER(mc1502_state::mc1502_ppi_portc_r)
{
int timer2_output = machine().device<pit8253_device>("pit8253")->get_output(2);
int data = 0xff;
double tap_val = m_cassette->input();
data = ( data & ~0x40 ) | ( tap_val < 0 ? 0x40 : 0x00 ) | ( (BIT(m_ppi_portb, 7) && timer2_output) ? 0x40 : 0x00 );
data = ( data & ~0x20 ) | ( timer2_output ? 0x20 : 0x00 );
data = ( data & ~0x10 ) | ( (BIT(m_ppi_portb, 1) && timer2_output) ? 0x10 : 0x00 );
// DBG_LOG(2,"mc1502_ppi_portc_r",("= %02X (tap_val %f t2out %d) at %s\n",
// data, tap_val, timer2_output, machine().describe_context()));
return data;
}
READ8_MEMBER(mc1502_state::mc1502_kppi_porta_r)
{
UINT8 key = 0;
if (m_kbd.mask & 0x0001) { key |= ioport("Y1")->read(); }
if (m_kbd.mask & 0x0002) { key |= ioport("Y2")->read(); }
if (m_kbd.mask & 0x0004) { key |= ioport("Y3")->read(); }
if (m_kbd.mask & 0x0008) { key |= ioport("Y4")->read(); }
if (m_kbd.mask & 0x0010) { key |= ioport("Y5")->read(); }
if (m_kbd.mask & 0x0020) { key |= ioport("Y6")->read(); }
if (m_kbd.mask & 0x0040) { key |= ioport("Y7")->read(); }
if (m_kbd.mask & 0x0080) { key |= ioport("Y8")->read(); }
if (m_kbd.mask & 0x0100) { key |= ioport("Y9")->read(); }
if (m_kbd.mask & 0x0200) { key |= ioport("Y10")->read(); }
if (m_kbd.mask & 0x0400) { key |= ioport("Y11")->read(); }
if (m_kbd.mask & 0x0800) { key |= ioport("Y12")->read(); }
key ^= 0xff;
// DBG_LOG(2,"mc1502_kppi_porta_r",("= %02X\n", key));
return key;
}
WRITE8_MEMBER(mc1502_state::mc1502_kppi_portb_w)
{
m_kbd.mask &= ~255;
m_kbd.mask |= data ^ 255;
if (!BIT(data, 0))
m_kbd.mask |= 1 << 11;
else
m_kbd.mask &= ~(1 << 11);
// DBG_LOG(2,"mc1502_kppi_portb_w",("( %02X -> %04X )\n", data, m_kbd.mask));
}
WRITE8_MEMBER(mc1502_state::mc1502_kppi_portc_w)
{
m_kbd.mask &= ~(7 << 8);
m_kbd.mask |= ((data ^ 7) & 7) << 8;
// DBG_LOG(2,"mc1502_kppi_portc_w",("( %02X -> %04X )\n", data, m_kbd.mask));
}
I8255_INTERFACE( mc1502_ppi8255_interface_1 )
{
DEVCB_NULL,
DEVCB_DRIVER_MEMBER(mc1502_state,mc1502_ppi_porta_w),
DEVCB_NULL,
DEVCB_DRIVER_MEMBER(mc1502_state,mc1502_ppi_portb_w),
DEVCB_DRIVER_MEMBER(mc1502_state,mc1502_ppi_portc_r),
DEVCB_DRIVER_MEMBER(mc1502_state,mc1502_ppi_portc_w)
};
I8255_INTERFACE( mc1502_ppi8255_interface_2 )
{
DEVCB_DRIVER_MEMBER(mc1502_state,mc1502_kppi_porta_r),
DEVCB_NULL,
DEVCB_NULL,
DEVCB_DRIVER_MEMBER(mc1502_state,mc1502_kppi_portb_w),
DEVCB_DRIVER_MEMBER(mc1502_state,mc1502_kppi_portc_r),
DEVCB_DRIVER_MEMBER(mc1502_state,mc1502_kppi_portc_w)
};
const i8251_interface mc1502_i8251_interface =
{
/* XXX RxD data are accessible via PPI port C, bit 7 */
DEVCB_NULL,
DEVCB_NULL,
DEVCB_NULL,
DEVCB_DEVICE_LINE_MEMBER("pic8259", pic8259_device, ir7_w), /* default handler does nothing */
DEVCB_DEVICE_LINE_MEMBER("pic8259", pic8259_device, ir7_w),
DEVCB_NULL,
DEVCB_DRIVER_LINE_MEMBER(mc1502_state, mc1502_i8251_syndet)
};
WRITE_LINE_MEMBER(mc1502_state::mc1502_i8251_syndet)
{
if (!BIT(m_ppi_portc,3))
machine().firstcpu->set_input_line(INPUT_LINE_NMI, state ? ASSERT_LINE : CLEAR_LINE);
}
WRITE_LINE_MEMBER(mc1502_state::mc1502_pit8253_out1_changed)
{
machine().device<i8251_device>("upd8251")->txc_w(state);
machine().device<i8251_device>("upd8251")->rxc_w(state);
}
WRITE_LINE_MEMBER(mc1502_state::mc1502_pit8253_out2_changed)
{
// mc1502_speaker_set_input( state );
m_cassette->output(state ? 1 : -1);
}
const struct pit8253_interface mc1502_pit8253_config =
{
{
{
XTAL_15MHz/12, /* heartbeat IRQ */
DEVCB_NULL,
DEVCB_DEVICE_LINE_MEMBER("pic8259", pic8259_device, ir0_w)
}, {
XTAL_16MHz/12, /* serial port */
DEVCB_NULL,
DEVCB_DRIVER_LINE_MEMBER(mc1502_state,mc1502_pit8253_out1_changed)
}, {
XTAL_16MHz/12, /* pio port c pin 4, and speaker polling enough */
DEVCB_NULL,
DEVCB_DRIVER_LINE_MEMBER(mc1502_state,mc1502_pit8253_out2_changed)
}
}
};
IRQ_CALLBACK_MEMBER( mc1502_state::mc1502_irq_callback )
{
return m_pic8259->acknowledge();
}
DRIVER_INIT_MEMBER( mc1502_state, mc1502 )
{
address_space &program = m_maincpu->space(AS_PROGRAM);
DBG_LOG(0,"init",("driver_init()\n"));
program.unmap_readwrite(0, 0x7ffff);
program.install_readwrite_bank(0, m_ram->size()-1, "bank10");
membank( "bank10" )->set_base( m_ram->pointer() );
}
MACHINE_START_MEMBER( mc1502_state, mc1502 )
{
DBG_LOG(0,"init",("machine_start()\n"));
m_maincpu->set_irq_acknowledge_callback(device_irq_acknowledge_delegate(FUNC(mc1502_state::mc1502_irq_callback),this));
/*
Keyboard polling circuit holds IRQ1 high until a key is
pressed, then it starts a timer that pulses IRQ1 low each
40ms (check) for 20ms (check) until all keys are released.
Last pulse causes BIOS to write a 'break' scancode into port 60h.
*/
m_pic8259->ir1_w(1);
memset(&m_kbd, 0, sizeof(m_kbd));
m_kbd.keyb_signal_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(mc1502_state::keyb_signal_callback),this));
m_kbd.keyb_signal_timer->adjust( attotime::from_msec(20), 0, attotime::from_msec(20) );
}
MACHINE_RESET_MEMBER( mc1502_state, mc1502 )
{
DBG_LOG(0,"init",("machine_reset()\n"));
}
/*
* macros
*/
static ADDRESS_MAP_START( mc1502_map, AS_PROGRAM, 8, mc1502_state )
ADDRESS_MAP_UNMAP_HIGH
AM_RANGE(0x00000, 0x97fff) AM_RAM /* 96K on mainboard + 512K on extension card */
AM_RANGE(0xc0000, 0xfbfff) AM_NOP
// AM_RANGE(0xe8000, 0xeffff) AM_ROM /* BASIC */
AM_RANGE(0xfc000, 0xfffff) AM_ROM
ADDRESS_MAP_END
static ADDRESS_MAP_START( pk88_map, AS_PROGRAM, 8, mc1502_state )
ADDRESS_MAP_UNMAP_HIGH
AM_RANGE(0x00000, 0x1ffff) AM_RAMBANK("bank10") /* 96K on mainboard */
AM_RANGE(0xf0000, 0xf7fff) AM_ROM /* BASIC */
AM_RANGE(0xfc000, 0xfffff) AM_ROM
ADDRESS_MAP_END
static ADDRESS_MAP_START(mc1502_io, AS_IO, 8, mc1502_state )
AM_RANGE(0x0020, 0x0021) AM_DEVREADWRITE("pic8259", pic8259_device, read, write)
AM_RANGE(0x0028, 0x0028) AM_DEVREADWRITE("upd8251", i8251_device, data_r, data_w) // not working yet
AM_RANGE(0x0029, 0x0029) AM_DEVREADWRITE("upd8251", i8251_device, status_r, control_w)
AM_RANGE(0x0040, 0x0043) AM_DEVREADWRITE("pit8253", pit8253_device, read, write)
AM_RANGE(0x0060, 0x0063) AM_DEVREADWRITE("ppi8255n1", i8255_device, read, write)
AM_RANGE(0x0068, 0x006B) AM_DEVREADWRITE("ppi8255n2", i8255_device, read, write) // keyboard poll
ADDRESS_MAP_END
static INPUT_PORTS_START( mc1502 )
PORT_START("IN0") /* IN0 */
PORT_BIT ( 0xf0, 0xf0, IPT_UNUSED )
PORT_BIT ( 0x08, 0x08, IPT_CUSTOM ) PORT_VBLANK("screen")
PORT_BIT ( 0x07, 0x07, IPT_UNUSED )
PORT_INCLUDE( mc7007_3_keyboard )
PORT_INCLUDE( pcvideo_mc1502 )
INPUT_PORTS_END
static MACHINE_CONFIG_START( mc1502, mc1502_state )
/* basic machine hardware */
MCFG_CPU_ADD("maincpu", I8088, XTAL_16MHz/3)
MCFG_CPU_PROGRAM_MAP(mc1502_map)
MCFG_CPU_IO_MAP(mc1502_io)
MCFG_MACHINE_START_OVERRIDE( mc1502_state, mc1502 )
MCFG_MACHINE_RESET_OVERRIDE( mc1502_state, mc1502 )
MCFG_PIT8253_ADD( "pit8253", mc1502_pit8253_config )
MCFG_PIC8259_ADD( "pic8259", INPUTLINE("maincpu", 0), VCC, NULL )
MCFG_I8255_ADD( "ppi8255n1", mc1502_ppi8255_interface_1 )
MCFG_I8255_ADD( "ppi8255n2", mc1502_ppi8255_interface_2 )
MCFG_I8251_ADD( "upd8251", mc1502_i8251_interface )
MCFG_SERIAL_ADD( "irps", mc1502_serial )
MCFG_ISA8_BUS_ADD("isa", ":maincpu", mc1502_isabus_intf)
MCFG_ISA8_SLOT_ADD("isa", "isa1", mc1502_isa8_cards, "fdc", false)
MCFG_ISA8_SLOT_ADD("isa", "isa2", mc1502_isa8_cards, "rom", false)
/* video hardware (only 1 chargen in ROM; CGA_FONT dip always 1 */
MCFG_FRAGMENT_ADD( pcvideo_mc1502 )
/* sound hardware */
MCFG_SPEAKER_STANDARD_MONO("mono")
MCFG_SOUND_WAVE_ADD(WAVE_TAG, "cassette")
MCFG_SOUND_ADD("speaker", SPEAKER_SOUND, 0)
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.80)
MCFG_CENTRONICS_PRINTER_ADD( "centronics", standard_centronics )
MCFG_CASSETTE_ADD( "cassette", mc1502_cassette_interface )
MCFG_SOFTWARE_LIST_ADD("flop_list","mc1502_flop")
// MCFG_SOFTWARE_LIST_ADD("cass_list","mc1502_cass")
/* internal ram */
MCFG_RAM_ADD(RAM_TAG)
MCFG_RAM_DEFAULT_SIZE("608K") /* 96 base + 512 on expansion card */
MCFG_RAM_EXTRA_OPTIONS("96K")
MACHINE_CONFIG_END
static MACHINE_CONFIG_DERIVED( pk88, mc1502 )
MCFG_CPU_REPLACE("maincpu", I8088, XTAL_16MHz/3)
MCFG_CPU_PROGRAM_MAP(pk88_map)
MCFG_CPU_IO_MAP(mc1502_io)
MACHINE_CONFIG_END
ROM_START( mc1502 )
ROM_REGION16_LE(0x100000,"maincpu", 0)
ROM_DEFAULT_BIOS("v52")
ROM_SYSTEM_BIOS(0, "v50", "v5.0")
ROMX_LOAD( "monitor_5_0.rom", 0xfc000, 0x4000, CRC(9e97c6a0) SHA1(16a304e8de69ec4d8b92acda6bf28454c361a24f),ROM_BIOS(1))
ROM_SYSTEM_BIOS(1, "v52", "v5.2")
ROMX_LOAD( "monitor_5_2.rom", 0xfc000, 0x4000, CRC(0e65491e) SHA1(8a4d556473b5e0e59b05fab77c79c29f4d562412),ROM_BIOS(2))
ROM_SYSTEM_BIOS(2, "v531", "v5.31")
ROMX_LOAD( "monitor_5_31.rom", 0xfc000, 0x4000, CRC(a48295d5) SHA1(6f38977c22f9cc6c2bc6f6e53edc4048ca6b6721),ROM_BIOS(3))
ROM_SYSTEM_BIOS(3, "v533", "v5.33")
ROMX_LOAD( "0_(cbc0).bin", 0xfc000, 0x2000, CRC(9a55bc4f) SHA1(81da44eec2e52cf04b1fc7053502270f51270590),ROM_BIOS(4))
ROMX_LOAD( "1_(dfe2).bin", 0xfe000, 0x2000, CRC(8dec077a) SHA1(d6f6d7cc2183abc77fbd9cd59132de5766f7c458),ROM_BIOS(4))
ROM_REGION(0x2000,"gfx1", ROMREGION_ERASE00)
ROM_LOAD( "symgen.rom", 0x0000, 0x2000, CRC(b2747a52) SHA1(6766d275467672436e91ac2997ac6b77700eba1e))
ROM_END
ROM_START( pk88 )
ROM_REGION16_LE(0x100000,"maincpu", 0)
ROM_LOAD( "b0.064", 0xf0000, 0x2000, CRC(80d3cf5d) SHA1(64769b7a8b60ffeefa04e4afbec778069a2840c9))
ROM_LOAD( "b1.064", 0xf2000, 0x2000, CRC(673a4acc) SHA1(082ae803994048e225150f771794ca305f73d731))
ROM_LOAD( "b2.064", 0xf4000, 0x2000, CRC(1ee66152) SHA1(7ed8c4c6c582487e802beabeca5b86702e5083e8))
ROM_LOAD( "b3.064", 0xf6000, 0x2000, CRC(3062b3fc) SHA1(5134dd64721cbf093d059ee5d3fd09c7f86604c7))
ROM_LOAD( "pk88-0.064", 0xfc000, 0x2000, CRC(1e4666cf) SHA1(6364c5241f2792909ff318194161eb2c29737546))
ROM_LOAD( "pk88-1.064", 0xfe000, 0x2000, CRC(6fa7e7ef) SHA1(d68bc273baa46ba733ac6ad4df7569dd70cf60dd))
ROM_REGION(0x2000,"gfx1", ROMREGION_ERASE00)
// taken from mc1502
ROM_LOAD( "symgen.rom", 0x0000, 0x2000, CRC(b2747a52) SHA1(6766d275467672436e91ac2997ac6b77700eba1e))
ROM_END
/***************************************************************************
Game driver(s)
***************************************************************************/
/* YEAR NAME PARENT COMPAT MACHINE INPUT INIT COMPANY FULLNAME */
COMP ( 1989, mc1502, ibm5150, 0, mc1502, mc1502, mc1502_state, mc1502, "NPO Microprocessor", "Elektronika MC-1502", 0)
COMP ( 1990, pk88, ibm5150, 0, pk88, mc1502, mc1502_state, mc1502, "NPO Microprocessor", "Elektronika PK-88", GAME_NOT_WORKING | GAME_NO_SOUND)

500
src/mess/drivers/pc.c
View File

@ -66,7 +66,6 @@ video HW too.
#include "machine/i8255.h"
#include "machine/ins8250.h"
#include "machine/i8251.h"
#include "machine/mc146818.h"
#include "machine/pic8259.h"
@ -100,7 +99,6 @@ video HW too.
#include "sound/sn76496.h"
#include "machine/wd_fdc.h"
#include "machine/kb_7007_3.h"
#include "machine/ram.h"
#include "bus/pc_kbd/keyboards.h"
@ -128,7 +126,7 @@ static ADDRESS_MAP_START( oliv_map, AS_PROGRAM, 8, pc_state )
AM_RANGE(0xf0000, 0xfffff) AM_ROM
ADDRESS_MAP_END
static ADDRESS_MAP_START( iskr1031_map, AS_PROGRAM, 16, pc_state )
static ADDRESS_MAP_START( asst128_map, AS_PROGRAM, 16, pc_state )
ADDRESS_MAP_UNMAP_HIGH
AM_RANGE(0x00000, 0x7ffff) AM_RAMBANK("bank10")
AM_RANGE(0xa0000, 0xbffff) AM_NOP
@ -138,42 +136,6 @@ static ADDRESS_MAP_START( iskr1031_map, AS_PROGRAM, 16, pc_state )
AM_RANGE(0xf0000, 0xfffff) AM_ROM
ADDRESS_MAP_END
static ADDRESS_MAP_START( ec1841_map, AS_PROGRAM, 16, pc_state )
ADDRESS_MAP_UNMAP_HIGH
AM_RANGE(0x00000, 0x7ffff) AM_RAM
AM_RANGE(0xa0000, 0xbffff) AM_NOP
AM_RANGE(0xc0000, 0xc7fff) AM_ROM
AM_RANGE(0xc8000, 0xcffff) AM_ROM
AM_RANGE(0xdc000, 0xdffff) AM_RAM // monochrome chargen
AM_RANGE(0xf0000, 0xfffff) AM_ROM
ADDRESS_MAP_END
static ADDRESS_MAP_START( mc1502_map, AS_PROGRAM, 8, pc_state )
ADDRESS_MAP_UNMAP_HIGH
AM_RANGE(0x00000, 0x97fff) AM_RAMBANK("bank10") /* 96K on mainboard + 512K on extension card */
AM_RANGE(0xe8000, 0xeffff) AM_ROM /* BASIC */
AM_RANGE(0xfc000, 0xfffff) AM_ROM
ADDRESS_MAP_END
static ADDRESS_MAP_START(mc1502_io, AS_IO, 8, pc_state )
AM_RANGE(0x0020, 0x0021) AM_DEVREADWRITE("pic8259", pic8259_device, read, write)
AM_RANGE(0x0028, 0x0028) AM_DEVREADWRITE("upd8251", i8251_device, data_r, data_w) // not working yet
AM_RANGE(0x0029, 0x0029) AM_DEVREADWRITE("upd8251", i8251_device, status_r, control_w)
AM_RANGE(0x0040, 0x0043) AM_DEVREADWRITE("pit8253", pit8253_device, read, write)
// BIOS 5.31, 5.33
AM_RANGE(0x004c, 0x004c) AM_READWRITE(mc1502_wd17xx_aux_r, mc1502_wd17xx_aux_w)
AM_RANGE(0x004d, 0x004d) AM_READ(mc1502_wd17xx_motor_r)
AM_RANGE(0x004e, 0x004e) AM_READ(mc1502_wd17xx_drq_r) // blocking read!
AM_RANGE(0x0048, 0x004b) AM_DEVREADWRITE("vg93", fd1793_t, read, write)
AM_RANGE(0x0060, 0x0063) AM_DEVREADWRITE("ppi8255", i8255_device, read, write)
AM_RANGE(0x0068, 0x006B) AM_DEVREADWRITE("ppi8255n2", i8255_device, read, write) // keyboard poll
// BIOS 5.0, 5.2
AM_RANGE(0x0100, 0x0100) AM_READWRITE(mc1502_wd17xx_aux_r, mc1502_wd17xx_aux_w)
AM_RANGE(0x0108, 0x0108) AM_READ(mc1502_wd17xx_drq_r) // blocking read!
AM_RANGE(0x010a, 0x010a) AM_READ(mc1502_wd17xx_motor_r)
AM_RANGE(0x010c, 0x010f) AM_DEVREADWRITE("vg93", fd1793_t, read, write)
ADDRESS_MAP_END
static ADDRESS_MAP_START( zenith_map, AS_PROGRAM, 8, pc_state )
ADDRESS_MAP_UNMAP_HIGH
AM_RANGE(0x00000, 0x9ffff) AM_RAMBANK("bank10")
@ -245,46 +207,6 @@ static ADDRESS_MAP_START(pc16_io, AS_IO, 16, pc_state )
ADDRESS_MAP_END
static ADDRESS_MAP_START(ec1841_io, AS_IO, 16, pc_state)
ADDRESS_MAP_UNMAP_HIGH
AM_RANGE(0x0000, 0x000f) AM_DEVREADWRITE8("dma8237", am9517a_device, read, write, 0xffff)
AM_RANGE(0x0020, 0x0021) AM_DEVREADWRITE8("pic8259", pic8259_device, read, write, 0xffff)
AM_RANGE(0x0040, 0x0043) AM_DEVREADWRITE8("pit8253", pit8253_device, read, write, 0xffff)
AM_RANGE(0x0060, 0x0063) AM_DEVREADWRITE8("ppi8255", i8255_device, read, write, 0xffff)
AM_RANGE(0x0080, 0x0087) AM_READWRITE8(pc_page_r, pc_page_w, 0xffff)
AM_RANGE(0x00a0, 0x00a1) AM_WRITE8( pc_nmi_enable_w, 0x00ff )
AM_RANGE(0x0210, 0x0217) AM_NOP // expansion chassis interface
// AM_RANGE(0x0230, 0x021f) // mouse
AM_RANGE(0x0240, 0x0257) AM_READWRITE8(pc_rtc_r, pc_rtc_w, 0xffff)
AM_RANGE(0x02b0, 0x02b3) AM_READWRITE8(ec1841_memboard_r, ec1841_memboard_w, 0xffff);
// AM_RANGE(0x02f8, 0x02f8) AM_DEVREADWRITE8("upd8251_1", i8251_device, data_r, data_w, 0x00ff)
// AM_RANGE(0x02f9, 0x02f9) AM_DEVREADWRITE8("upd8251_1", i8251_device, status_r, control_w, 0xff00)
AM_RANGE(0x0378, 0x037f) AM_DEVREADWRITE8("lpt_0", pc_lpt_device, read, write, 0xffff)
AM_RANGE(0x03f0, 0x03f7) AM_DEVICE8("fdc", pc_fdc_interface, map, 0xffff)
// AM_RANGE(0x03f8, 0x03f9) AM_DEVREADWRITE8("upd8251_0", i8251_device, data_r, data_w, 0x00ff)
// AM_RANGE(0x03f8, 0x03f9) AM_DEVREADWRITE8("upd8251_0", i8251_device, status_r, control_w, 0xff00)
ADDRESS_MAP_END
static ADDRESS_MAP_START(iskr1031_io, AS_IO, 16, pc_state)
ADDRESS_MAP_UNMAP_HIGH
AM_RANGE(0x0000, 0x000f) AM_DEVREADWRITE8("dma8237", am9517a_device, read, write, 0xffff)
AM_RANGE(0x0020, 0x0021) AM_DEVREADWRITE8("pic8259", pic8259_device, read, write, 0xffff)
AM_RANGE(0x0040, 0x0043) AM_DEVREADWRITE8("pit8253", pit8253_device, read, write, 0xffff)
AM_RANGE(0x0060, 0x0063) AM_DEVREADWRITE8("ppi8255", i8255_device, read, write, 0xffff)
AM_RANGE(0x0080, 0x0087) AM_READWRITE8(pc_page_r, pc_page_w, 0xffff)
AM_RANGE(0x00a0, 0x00a1) AM_WRITE8( pc_nmi_enable_w, 0x00ff )
// AM_RANGE(0x0200, 0x0207) AM_DEVREADWRITE8("pc_joy", pc_joy_device, joy_port_r, joy_port_w, 0xffff)
AM_RANGE(0x0240, 0x0257) AM_READWRITE8(pc_rtc_r, pc_rtc_w, 0xffff)
// AM_RANGE(0x02e8, 0x02ef) AM_DEVREADWRITE8("ins8250_3", ins8250_device, ins8250_r, ins8250_w, 0xffff)
AM_RANGE(0x02f8, 0x02ff) AM_DEVREADWRITE8("ins8250_1", ins8250_device, ins8250_r, ins8250_w, 0xffff)
AM_RANGE(0x0340, 0x0357) AM_NOP /* anonymous bios should not recogniced realtimeclock */
AM_RANGE(0x0378, 0x037f) AM_DEVREADWRITE8("lpt_0", pc_lpt_device, read, write, 0xffff)
// AM_RANGE(0x03e8, 0x03ef) AM_DEVREADWRITE8("ins8250_2", ins8250_device, ins8250_r, ins8250_w, 0xffff)
AM_RANGE(0x03f0, 0x03f7) AM_DEVICE8("fdc", pc_fdc_interface, map, 0xffff)
AM_RANGE(0x03f8, 0x03ff) AM_DEVREADWRITE8("ins8250_0", ins8250_device, ins8250_r, ins8250_w, 0xffff)
ADDRESS_MAP_END
static ADDRESS_MAP_START(asst128_io, AS_IO, 16, pc_state)
ADDRESS_MAP_UNMAP_HIGH
AM_RANGE(0x0020, 0x0021) AM_DEVREADWRITE8("pic8259", pic8259_device, read, write, 0xffff)
@ -813,109 +735,6 @@ static INPUT_PORTS_START( ibmpcjr )
PORT_BIT ( 0x08, 0x08, IPT_CUSTOM ) PORT_VBLANK("pcvideo_pcjr:screen")
INPUT_PORTS_END
static INPUT_PORTS_START( mc1502 ) /* fix */
PORT_START("IN0") /* IN0 */
PORT_BIT ( 0xf0, 0xf0, IPT_UNUSED )
PORT_BIT ( 0x08, 0x08, IPT_CUSTOM ) PORT_VBLANK("screen")
PORT_BIT ( 0x07, 0x07, IPT_UNUSED )
PORT_START("DSW0") /* IN1 */
PORT_DIPNAME( 0xc0, 0x40, "Number of floppy drives")
PORT_DIPSETTING( 0x00, "1" )
PORT_DIPSETTING( 0x40, "2" )
PORT_DIPSETTING( 0x80, "3" )
PORT_DIPSETTING( 0xc0, "4" )
PORT_DIPNAME( 0x30, 0x20, "Graphics adapter")
PORT_DIPSETTING( 0x00, "EGA/VGA" )
PORT_DIPSETTING( 0x10, "Color 40x25" )
PORT_DIPSETTING( 0x20, "Color 80x25" )
PORT_DIPSETTING( 0x30, "Monochrome" )
PORT_DIPNAME( 0x0c, 0x0c, "RAM banks")
PORT_DIPSETTING( 0x00, "1 - 16 64 256K" )
PORT_DIPSETTING( 0x04, "2 - 32 128 512K" )
PORT_DIPSETTING( 0x08, "3 - 48 192 576K" )
PORT_DIPSETTING( 0x0c, "4 - 64 256 640K" )
PORT_DIPNAME( 0x02, 0x00, "80387 installed")
PORT_DIPSETTING( 0x00, DEF_STR( No ) )
PORT_DIPSETTING( 0x02, DEF_STR( Yes ) )
PORT_DIPNAME( 0x01, 0x01, "Floppy installed")
PORT_DIPSETTING( 0x00, DEF_STR( No ) )
PORT_DIPSETTING( 0x01, DEF_STR( Yes ) )
PORT_START("DSW1") /* IN2 */
PORT_DIPNAME( 0x80, 0x80, "COM1: enable")
PORT_DIPSETTING( 0x00, DEF_STR( No ) )
PORT_DIPSETTING( 0x80, DEF_STR( Yes ) )
PORT_DIPNAME( 0x40, 0x40, "COM2: enable")
PORT_DIPSETTING( 0x00, DEF_STR( No ) )
PORT_DIPSETTING( 0x40, DEF_STR( Yes ) )
PORT_DIPNAME( 0x20, 0x00, "COM3: enable")
PORT_DIPSETTING( 0x00, DEF_STR( No ) )
PORT_DIPSETTING( 0x20, DEF_STR( Yes ) )
PORT_DIPNAME( 0x10, 0x00, "COM4: enable")
PORT_DIPSETTING( 0x00, DEF_STR( No ) )
PORT_DIPSETTING( 0x10, DEF_STR( Yes ) )
PORT_DIPNAME( 0x08, 0x08, "LPT1: enable")
PORT_DIPSETTING( 0x00, DEF_STR( No ) )
PORT_DIPSETTING( 0x08, DEF_STR( Yes ) )
PORT_DIPNAME( 0x04, 0x00, "LPT2: enable")
PORT_DIPSETTING( 0x00, DEF_STR( No ) )
PORT_DIPSETTING( 0x04, DEF_STR( Yes ) )
PORT_DIPNAME( 0x02, 0x00, "LPT3: enable")
PORT_DIPSETTING( 0x00, DEF_STR( No ) )
PORT_DIPSETTING( 0x02, DEF_STR( Yes ) )
PORT_DIPNAME( 0x01, 0x00, "Game port enable")
PORT_DIPSETTING( 0x00, DEF_STR( No ) )
PORT_DIPSETTING( 0x01, DEF_STR( Yes ) )
PORT_START("DSW2") /* IN3 */
PORT_DIPNAME( 0xf0, 0x80, "Serial mouse")
PORT_DIPSETTING( 0x80, "COM1" )
PORT_DIPSETTING( 0x40, "COM2" )
PORT_DIPSETTING( 0x20, "COM3" )
PORT_DIPSETTING( 0x10, "COM4" )
PORT_DIPSETTING( 0x00, DEF_STR( None ) )
PORT_DIPNAME( 0x08, 0x08, "HDC1 (C800:0 port 320-323)")
PORT_DIPSETTING( 0x00, DEF_STR( No ) )
PORT_DIPSETTING( 0x08, DEF_STR( Yes ) )
PORT_DIPNAME( 0x04, 0x04, "HDC2 (CA00:0 port 324-327)")
PORT_DIPSETTING( 0x00, DEF_STR( No ) )
PORT_DIPSETTING( 0x04, DEF_STR( Yes ) )
PORT_BIT( 0x02, 0x02, IPT_UNUSED ) /* no turbo switch */
PORT_BIT( 0x01, 0x01, IPT_UNUSED )
PORT_INCLUDE( mc7007_3_keyboard )
PORT_INCLUDE( pcvideo_mc1502 )
INPUT_PORTS_END
static INPUT_PORTS_START( ec1841 )
PORT_START("DSW0") /* SA1 */
PORT_DIPNAME( 0xc0, 0x40, "Number of floppy drives")
PORT_DIPSETTING( 0x00, "1" )
PORT_DIPSETTING( 0x40, "2" )
PORT_DIPSETTING( 0x80, "3" )
PORT_DIPSETTING( 0xc0, "4" )
PORT_DIPNAME( 0x30, 0x20, "Graphics adapter")
PORT_DIPSETTING( 0x00, "Reserved" )
PORT_DIPSETTING( 0x10, "Color 40x25" )
PORT_DIPSETTING( 0x20, "Color 80x25" )
PORT_DIPSETTING( 0x30, "Monochrome" )
PORT_BIT( 0x08, 0x08, IPT_UNUSED )
PORT_DIPNAME( 0x04, 0x04, "Floppy type")
PORT_DIPSETTING( 0x00, "80 tracks" )
PORT_DIPSETTING( 0x04, "40 tracks" )
PORT_DIPNAME( 0x02, 0x00, "8087 installed")
PORT_DIPSETTING( 0x00, DEF_STR( No ) )
PORT_DIPSETTING( 0x02, DEF_STR( Yes ) )
PORT_DIPNAME( 0x01, 0x01, "Boot from floppy")
PORT_DIPSETTING( 0x00, DEF_STR( No ) )
PORT_DIPSETTING( 0x01, DEF_STR( Yes ) )
// PORT_START("DSW1") /* SA2 */
PORT_INCLUDE( pcvideo_cga )
INPUT_PORTS_END
static const pc_lpt_interface pc_lpt_config =
@ -940,10 +759,6 @@ static SLOT_INTERFACE_START( asst128_floppies )
SLOT_INTERFACE( "525ssqd", FLOPPY_525_SSQD )
SLOT_INTERFACE_END
static SLOT_INTERFACE_START( mc1502_floppies )
SLOT_INTERFACE( "525qd", FLOPPY_525_QD )
SLOT_INTERFACE_END
static SLOT_INTERFACE_START(ibm5150_com)
SLOT_INTERFACE("microsoft_mouse", MSFT_SERIAL_MOUSE)
SLOT_INTERFACE("mouse_systems_mouse", MSYSTEM_SERIAL_MOUSE)
@ -1481,11 +1296,6 @@ static const cassette_interface mc1502_cassette_interface =
NULL
};
static const serial_image_interface mc1502_serial =
{
9600, 8, 1, device_serial_interface::PARITY_NONE, 1, "upd8251"
};
static MACHINE_CONFIG_START( ibmpcjr, tandy_pc_state )
/* basic machine hardware */
MCFG_CPU_ADD("maincpu", I8088, 4900000) \
@ -1586,155 +1396,24 @@ static MACHINE_CONFIG_DERIVED( ibmpcjx, ibmpcjr )
MACHINE_CONFIG_END
static MACHINE_CONFIG_START( mc1502, pc_state )
static MACHINE_CONFIG_START( asst128, pc_state )
/* basic machine hardware */
MCFG_CPU_ADD("maincpu", I8088, XTAL_16MHz/3)
MCFG_CPU_PROGRAM_MAP(mc1502_map)
MCFG_CPU_IO_MAP(mc1502_io)
MCFG_MACHINE_START_OVERRIDE(pc_state,mc1502)
MCFG_MACHINE_RESET_OVERRIDE(pc_state,pc)
MCFG_PIT8253_ADD( "pit8253", mc1502_pit8253_config )
MCFG_PIC8259_ADD( "pic8259", INPUTLINE("maincpu", 0), VCC, NULL )
MCFG_I8255_ADD( "ppi8255", mc1502_ppi8255_interface ) /* not complete */
MCFG_I8255_ADD( "ppi8255n2", mc1502_ppi8255_interface_2 ) /* not complete */
MCFG_I8251_ADD( "upd8251", mc1502_i8251_interface )
MCFG_SERIAL_ADD("irps", mc1502_serial)
/* video hardware (only 1 chargen in ROM; CGA_FONT dip always 1 */
MCFG_FRAGMENT_ADD( pcvideo_mc1502 )
MCFG_GFXDECODE(ibmpcjr)
/* sound hardware */
MCFG_SPEAKER_STANDARD_MONO("mono")
MCFG_SOUND_WAVE_ADD(WAVE_TAG, "cassette")
MCFG_SOUND_ADD("speaker", SPEAKER_SOUND, 0)
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.80)
MCFG_CENTRONICS_PRINTER_ADD("centronics", standard_centronics)
MCFG_CASSETTE_ADD( "cassette", mc1502_cassette_interface )
MCFG_FD1793x_ADD("vg93", XTAL_16MHz / 16)
MCFG_FLOPPY_DRIVE_ADD("fd0", mc1502_floppies, "525qd", pc_state::floppy_formats)
MCFG_FLOPPY_DRIVE_ADD("fd1", mc1502_floppies, "525qd", pc_state::floppy_formats)
MCFG_SOFTWARE_LIST_ADD("flop_list","mc1502_flop")
// MCFG_SOFTWARE_LIST_ADD("cass_list","mc1502_cass")
/* internal ram */
MCFG_RAM_ADD(RAM_TAG)
MCFG_RAM_DEFAULT_SIZE("608K") /* 96 base + 512 on expansion card */
MACHINE_CONFIG_END
static MACHINE_CONFIG_START( ec1841, pc_state )
/* basic machine hardware */
MCFG_CPU_PC(ec1841, ec1841, I8086, 4096000, pc_frame_interrupt) // correct but slow
// MCFG_CPU_PC(ec1841, ec1841, I8086, 4772720, pc_frame_interrupt)
MCFG_CPU_PC(asst128, asst128, I8086, 4772720, pc_frame_interrupt)
MCFG_QUANTUM_TIME(attotime::from_hz(60))
MCFG_MACHINE_START_OVERRIDE(pc_state,pc)
MCFG_MACHINE_RESET_OVERRIDE(pc_state,pc)
MCFG_PIT8253_ADD( "pit8253", ibm5150_pit8253_config )
// maybe XTAL_12_288MHz
MCFG_I8237_ADD( "dma8237", XTAL_14_31818MHz/3, ibm5150_dma8237_config )
MCFG_PIT8253_ADD( "pit8253", pcjr_pit8253_config )
MCFG_PIC8259_ADD( "pic8259", INPUTLINE("maincpu", 0), VCC, NULL )
MCFG_I8255_ADD( "ppi8255", ibm5160_ppi8255_interface )
// MCFG_I8251_ADD( "upd8251_0", default_i8251_interface ) // modeled after BSC adapter?
// MCFG_I8251_ADD( "upd8251_1", default_i8251_interface )
/* video hardware -- supports font uploads */
MCFG_FRAGMENT_ADD( pcvideo_cga )
MCFG_GFXDECODE(ibm5150)
/* sound hardware */
MCFG_SPEAKER_STANDARD_MONO("mono")
MCFG_SOUND_ADD("speaker", SPEAKER_SOUND, 0)
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.80)
/* printer */
MCFG_PC_LPT_ADD("lpt_0", pc_lpt_config)
MCFG_PC_FDC_XT_ADD("fdc")
MCFG_FLOPPY_DRIVE_ADD("fdc:0", ibmpc_floppies, "525dd", pc_state::floppy_formats)
MCFG_FLOPPY_DRIVE_ADD("fdc:1", ibmpc_floppies, "525dd", pc_state::floppy_formats)
MCFG_SOFTWARE_LIST_ADD("flop_list","ec1841")
MCFG_PC_KBDC_ADD("pc_kbdc", pc_kbdc_intf)
MCFG_PC_KBDC_SLOT_ADD("pc_kbdc", "kbd", pc_xt_keyboards, STR_KBD_EC_1841)
/* internal ram -- up to 4 banks of 512K */
MCFG_RAM_ADD(RAM_TAG)
MCFG_RAM_DEFAULT_SIZE("512K")
MCFG_RAM_EXTRA_OPTIONS("1024K,1576K,2048K")
MACHINE_CONFIG_END
static MACHINE_CONFIG_START( iskr1031, pc_state )
/* basic machine hardware */
MCFG_CPU_PC(iskr1031, iskr1031, I8086, 4772720, pc_frame_interrupt)
MCFG_QUANTUM_TIME(attotime::from_hz(60))
MCFG_MACHINE_START_OVERRIDE(pc_state,pc)
MCFG_MACHINE_RESET_OVERRIDE(pc_state,pc)
MCFG_PIT8253_ADD( "pit8253", ibm5150_pit8253_config )
MCFG_I8237_ADD( "dma8237", XTAL_14_31818MHz/3, ibm5150_dma8237_config )
MCFG_PIC8259_ADD( "pic8259", INPUTLINE("maincpu", 0), VCC, NULL )
MCFG_I8255_ADD( "ppi8255", ibm5160_ppi8255_interface )
MCFG_INS8250_ADD( "ins8250_0", ibm5150_com_interface[0], XTAL_1_8432MHz ) /* TODO: Verify model */
MCFG_INS8250_ADD( "ins8250_1", ibm5150_com_interface[1], XTAL_1_8432MHz ) /* TODO: Verify model */
MCFG_INS8250_ADD( "ins8250_2", ibm5150_com_interface[2], XTAL_1_8432MHz ) /* TODO: Verify model */
MCFG_INS8250_ADD( "ins8250_3", ibm5150_com_interface[3], XTAL_1_8432MHz ) /* TODO: Verify model */
MCFG_RS232_PORT_ADD( "serport0", ibm5150_com, NULL )
MCFG_SERIAL_OUT_RX_HANDLER(DEVWRITELINE("ins8250_0", ins8250_uart_device, rx_w))
MCFG_RS232_OUT_DCD_HANDLER(DEVWRITELINE("ins8250_0", ins8250_uart_device, dcd_w))
MCFG_RS232_OUT_DSR_HANDLER(DEVWRITELINE("ins8250_0", ins8250_uart_device, dsr_w))
MCFG_RS232_OUT_RI_HANDLER(DEVWRITELINE("ins8250_0", ins8250_uart_device, ri_w))
MCFG_RS232_OUT_CTS_HANDLER(DEVWRITELINE("ins8250_0", ins8250_uart_device, cts_w))
MCFG_RS232_PORT_ADD( "serport1", ibm5150_com, NULL )
MCFG_SERIAL_OUT_RX_HANDLER(DEVWRITELINE("ins8250_1", ins8250_uart_device, rx_w))
MCFG_RS232_OUT_DCD_HANDLER(DEVWRITELINE("ins8250_1", ins8250_uart_device, dcd_w))
MCFG_RS232_OUT_DSR_HANDLER(DEVWRITELINE("ins8250_1", ins8250_uart_device, dsr_w))
MCFG_RS232_OUT_RI_HANDLER(DEVWRITELINE("ins8250_1", ins8250_uart_device, ri_w))
MCFG_RS232_OUT_CTS_HANDLER(DEVWRITELINE("ins8250_1", ins8250_uart_device, cts_w))
MCFG_RS232_PORT_ADD( "serport2", ibm5150_com, NULL )
MCFG_SERIAL_OUT_RX_HANDLER(DEVWRITELINE("ins8250_2", ins8250_uart_device, rx_w))
MCFG_RS232_OUT_DCD_HANDLER(DEVWRITELINE("ins8250_2", ins8250_uart_device, dcd_w))
MCFG_RS232_OUT_DSR_HANDLER(DEVWRITELINE("ins8250_2", ins8250_uart_device, dsr_w))
MCFG_RS232_OUT_RI_HANDLER(DEVWRITELINE("ins8250_2", ins8250_uart_device, ri_w))
MCFG_RS232_OUT_CTS_HANDLER(DEVWRITELINE("ins8250_2", ins8250_uart_device, cts_w))
MCFG_RS232_PORT_ADD( "serport3", ibm5150_com, NULL )
MCFG_SERIAL_OUT_RX_HANDLER(DEVWRITELINE("ins8250_3", ins8250_uart_device, rx_w))
MCFG_RS232_OUT_DCD_HANDLER(DEVWRITELINE("ins8250_3", ins8250_uart_device, dcd_w))
MCFG_RS232_OUT_DSR_HANDLER(DEVWRITELINE("ins8250_3", ins8250_uart_device, dsr_w))
MCFG_RS232_OUT_RI_HANDLER(DEVWRITELINE("ins8250_3", ins8250_uart_device, ri_w))
MCFG_RS232_OUT_CTS_HANDLER(DEVWRITELINE("ins8250_3", ins8250_uart_device, cts_w))
/* video hardware */
MCFG_FRAGMENT_ADD( pcvideo_cga )
MCFG_GFXDECODE(ibm5150)
MCFG_FRAGMENT_ADD( pcvideo_mc1502 )
MCFG_GFXDECODE(ibmpcjr)
/* sound hardware */
MCFG_SPEAKER_STANDARD_MONO("mono")
@ -1750,36 +1429,16 @@ static MACHINE_CONFIG_START( iskr1031, pc_state )
MCFG_PC_LPT_ADD("lpt_1", pc_lpt_config)
MCFG_PC_LPT_ADD("lpt_2", pc_lpt_config)
MCFG_CASSETTE_ADD( "cassette", mc1502_cassette_interface )
MCFG_PC_FDC_XT_ADD("fdc")
MCFG_FLOPPY_DRIVE_ADD("fdc:0", ibmpc_floppies, "525dd", pc_state::floppy_formats)
MCFG_FLOPPY_DRIVE_ADD("fdc:1", ibmpc_floppies, "525dd", pc_state::floppy_formats)
/* internal ram */
MCFG_RAM_ADD(RAM_TAG)
MCFG_RAM_DEFAULT_SIZE("640K")
MACHINE_CONFIG_END
static MACHINE_CONFIG_DERIVED( asst128, iskr1031 )
MCFG_CPU_REPLACE("maincpu", I8086, 4772720)
MCFG_CPU_PROGRAM_MAP(iskr1031_map)
MCFG_CPU_IO_MAP(asst128_io)
MCFG_DEVICE_REMOVE("dma8237")
MCFG_DEVICE_REMOVE("fdc:0")
MCFG_DEVICE_REMOVE("fdc:1")
MCFG_DEVICE_REMOVE("pit8253")
MCFG_PIT8253_ADD( "pit8253", pcjr_pit8253_config )
MCFG_FLOPPY_DRIVE_ADD("fdc:0", asst128_floppies, "525ssqd", pc_state::asst128_formats)
MCFG_FLOPPY_DRIVE_ADD("fdc:1", asst128_floppies, "525ssqd", pc_state::asst128_formats)
MCFG_DEVICE_REMOVE(CGA_SCREEN_NAME)
MCFG_DEVICE_REMOVE(CGA_MC6845_NAME)
MCFG_FRAGMENT_ADD( pcvideo_mc1502 )
MCFG_GFXDECODE(ibmpcjr)
/* internal ram */
MCFG_RAM_ADD(RAM_TAG)
MCFG_RAM_DEFAULT_SIZE("640K")
MACHINE_CONFIG_END
static MACHINE_CONFIG_START( iskr3104, pc_state )
@ -2486,93 +2145,17 @@ ROM_START( ssam88s )
ROM_LOAD("5788005.u33", 0x00000, 0x2000, CRC(0bf56d70) SHA1(c2a8b10808bf51a3c123ba3eb1e9dd608231916f)) /* "AMI 8412PI // 5788005 // (C) IBM CORP. 1981 // KOREA" */
ROM_END
ROM_START( iskr1031 )
ROM_REGION16_LE(0x100000,"maincpu", 0)
ROM_SYSTEM_BIOS(0, "v1", "v1")
ROMX_LOAD( "150-02.bin", 0xfc000, 0x2000, CRC(e33fb974) SHA1(f5f3ece67c025c0033716ff516e1a34fbeb32749), ROM_SKIP(1) | ROM_BIOS(1))
ROMX_LOAD( "150-03.bin", 0xfc001, 0x2000, CRC(8c482258) SHA1(90ef48955e0df556dc06a000a797ef42ccf430c5), ROM_SKIP(1) | ROM_BIOS(1))
ROM_SYSTEM_BIOS(1, "v2", "v2")
ROMX_LOAD( "150-06.bin", 0xfc000, 0x2000, CRC(1adbf969) SHA1(08c0a0fc50a75e6207b1987bae389cca60893eac), ROM_SKIP(1) | ROM_BIOS(2))
ROMX_LOAD( "150-07.bin", 0xfc001, 0x2000, CRC(0dc4b65a) SHA1(c96f066251a7343eac8113ea9dcb2cb12d0334d5), ROM_SKIP(1) | ROM_BIOS(2))
ROM_REGION(0x2000,"gfx1", 0)
ROM_LOAD( "iskra-1031_font.bin", 0x0000, 0x2000, CRC(f4d62e80) SHA1(ad7e81a0c9abc224671422bbcf6f6262da92b510))
ROM_END
ROM_START( iskr1030m )
ROM_REGION16_LE(0x100000,"maincpu", 0)
ROMX_LOAD( "iskra-1030m_0.rom", 0xfc000, 0x2000, CRC(0d698e19) SHA1(2fe117c9f4f8c4b59085d5a41f919d743c425fdd), ROM_SKIP(1))
ROMX_LOAD( "iskra-1030m_1.rom", 0xfc001, 0x2000, CRC(fe808337) SHA1(b0b7ebe14324ada8aa9a6926a82b18e80f78a257), ROM_SKIP(1))
ROM_REGION(0x2000,"gfx1", 0)
ROM_LOAD( "iskra-1030m.chr", 0x0000, 0x2000, CRC(50b162eb) SHA1(5bd7cb1705a69bd16115a4c9ed1c2748a5c8ad51))
ROM_END
ROM_START( ec1840 )
ROM_REGION16_LE(0x100000,"maincpu", 0)
ROM_SYSTEM_BIOS(0, "v4", "EC-1840.04")
ROMX_LOAD( "000-04-971b.bin", 0xfe000, 0x0800, CRC(06aeaee8) SHA1(9f954e4c48156d573a8e0109e7ca652be9e6036a), ROM_SKIP(1) | ROM_BIOS(1))
ROMX_LOAD( "001-04-92b7.bin", 0xff000, 0x0800, CRC(3fae650a) SHA1(c98b777fdeceadd72d6eb9465b3501b9ead55a08), ROM_SKIP(1) | ROM_BIOS(1))
ROMX_LOAD( "002-04-9e17.bin", 0xfe001, 0x0800, CRC(d59712df) SHA1(02ea1b3ae9662f5c64c58920a32ca9db0f6fbd12), ROM_SKIP(1) | ROM_BIOS(1))
ROMX_LOAD( "003-04-3ccb.bin", 0xff001, 0x0800, CRC(7fc362c7) SHA1(538e13639ad2b4c30bd72582e323181e63513306), ROM_SKIP(1) | ROM_BIOS(1))
ROM_REGION(0x2000,"gfx1", ROMREGION_ERASE00)
ROM_END
ROM_START( ec1841 )
ROM_REGION16_LE(0x100000,"maincpu", 0)
ROM_DEFAULT_BIOS("v2")
ROM_SYSTEM_BIOS(0, "v1", "EC-1841.01")
ROMX_LOAD( "012-01-3107.bin", 0xfc000, 0x0800, CRC(77957396) SHA1(785f1dceb6e2b4618f5c5f0af15eb74a8c951448), ROM_SKIP(1) | ROM_BIOS(1))
ROMX_LOAD( "013-01-203f.bin", 0xfc001, 0x0800, CRC(768bd3d5) SHA1(2e948f2ad262de306d889b7964c3f1aad45ff5bc), ROM_SKIP(1) | ROM_BIOS(1))
ROMX_LOAD( "014-01-fa40.bin", 0xfd000, 0x0800, CRC(47722b58) SHA1(a6339ee8af516f834826b7828a5cf79cb650480c), ROM_SKIP(1) | ROM_BIOS(1))
ROMX_LOAD( "015-01-bf1d.bin", 0xfd001, 0x0800, CRC(b585b5ea) SHA1(d0ebed586eb13031477c2e071c50416682f80489), ROM_SKIP(1) | ROM_BIOS(1))
ROMX_LOAD( "016-01-65f7.bin", 0xfe000, 0x0800, CRC(28a07db4) SHA1(17fbcd60dacd1d3f8d8355db429f97e4d1d1ac88), ROM_SKIP(1) | ROM_BIOS(1))
ROMX_LOAD( "017-01-5be1.bin", 0xfe001, 0x0800, CRC(928bda26) SHA1(ee889184067e2680b29a8ef1c3a76cf5afd4c78d), ROM_SKIP(1) | ROM_BIOS(1))
ROMX_LOAD( "018-01-7090.bin", 0xff000, 0x0800, CRC(75ca7d7e) SHA1(6356426820c5326a7893a437d54b02f250ef8609), ROM_SKIP(1) | ROM_BIOS(1))
ROMX_LOAD( "019-01-0492.bin", 0xff001, 0x0800, CRC(8a9d593e) SHA1(f3936d2cb4e6d130dd732973f126c3aa20612463), ROM_SKIP(1) | ROM_BIOS(1))
ROM_SYSTEM_BIOS(1, "v2", "EC-1841.02")
ROMX_LOAD( "012-02-37f6.bin", 0xfc000, 0x0800, CRC(8f5c6a20) SHA1(874b62f9cee8d3b974f33732f94eff10fc002c44), ROM_SKIP(1) | ROM_BIOS(2))
ROMX_LOAD( "013-02-2552.bin", 0xfc001, 0x0800, CRC(e3c10128) SHA1(d6ed743ebe9c130925c9f17aad1a45db9194c967), ROM_SKIP(1) | ROM_BIOS(2))
ROMX_LOAD( "014-02-0fbe.bin", 0xfd000, 0x0800, CRC(f8517e5e) SHA1(8034cd6ff5778365dc9daa494524f1753a74f1ed), ROM_SKIP(1) | ROM_BIOS(2))
ROMX_LOAD( "015-02-d736.bin", 0xfd001, 0x0800, CRC(8538c52a) SHA1(ee981ce90870b6546a18f2a2e64d71b0038ce0dd), ROM_SKIP(1) | ROM_BIOS(2))
ROMX_LOAD( "016-02-5b2c.bin", 0xfe000, 0x0800, CRC(3d1d1e67) SHA1(c527e29796537787c0f6c329f3c203f6131ca77f), ROM_SKIP(1) | ROM_BIOS(2))
ROMX_LOAD( "017-02-4b9d.bin", 0xfe001, 0x0800, CRC(1b985264) SHA1(5ddcb9c13564be208c5068c105444a87159c67ee), ROM_SKIP(1) | ROM_BIOS(2))
ROMX_LOAD( "018-02-7090.bin", 0xff000, 0x0800, CRC(75ca7d7e) SHA1(6356426820c5326a7893a437d54b02f250ef8609), ROM_SKIP(1) | ROM_BIOS(2))
ROMX_LOAD( "019-02-0493.bin", 0xff001, 0x0800, CRC(61aae23d) SHA1(7b3aa24a63ee31b194297eb1e61c3827edfcb95a), ROM_SKIP(1) | ROM_BIOS(2))
ROM_SYSTEM_BIOS(2, "v3", "EC-1841.03")
ROMX_LOAD( "012-03-37e7.bin", 0xfc000, 0x0800, CRC(49992bd5) SHA1(119121e1b4af1c44b9b8c2edabe7dc1d3019c4a6), ROM_SKIP(1) | ROM_BIOS(3))
ROMX_LOAD( "013-03-2554.bin", 0xfc001, 0x0800, CRC(834bd7d7) SHA1(e37514fc4cb8a5cbe68e7564e0e07d5116c4021a), ROM_SKIP(1) | ROM_BIOS(3))
ROMX_LOAD( "014-03-0fbe.bin", 0xfd000, 0x0800, CRC(f8517e5e) SHA1(8034cd6ff5778365dc9daa494524f1753a74f1ed), ROM_SKIP(1) | ROM_BIOS(3))
ROMX_LOAD( "015-03-d736.bin", 0xfd001, 0x0800, CRC(8538c52a) SHA1(ee981ce90870b6546a18f2a2e64d71b0038ce0dd), ROM_SKIP(1) | ROM_BIOS(3))
ROMX_LOAD( "016-03-5b2c.bin", 0xfe000, 0x0800, CRC(3d1d1e67) SHA1(c527e29796537787c0f6c329f3c203f6131ca77f), ROM_SKIP(1) | ROM_BIOS(3))
ROMX_LOAD( "017-03-4b9d.bin", 0xfe001, 0x0800, CRC(1b985264) SHA1(5ddcb9c13564be208c5068c105444a87159c67ee), ROM_SKIP(1) | ROM_BIOS(3))
ROMX_LOAD( "018-03-7090.bin", 0xff000, 0x0800, CRC(75ca7d7e) SHA1(6356426820c5326a7893a437d54b02f250ef8609), ROM_SKIP(1) | ROM_BIOS(3))
ROMX_LOAD( "019-03-0493.bin", 0xff001, 0x0800, CRC(61aae23d) SHA1(7b3aa24a63ee31b194297eb1e61c3827edfcb95a), ROM_SKIP(1) | ROM_BIOS(3))
ROM_REGION(0x2000,"gfx1", ROMREGION_ERASE00)
ROM_END
ROM_START( ec1845 )
ROM_REGION16_LE(0x100000,"maincpu", 0)
ROMX_LOAD( "184500.bin", 0xfc000, 0x0800, CRC(7c472ef7) SHA1(3af53f27b49bbc731bf51f9300fbada23a1bfcfc), ROM_SKIP(1))
ROMX_LOAD( "184501.bin", 0xfc001, 0x0800, CRC(db240dc6) SHA1(d7bb022213d09bbf2a8107fe4f1cd27b23939e18), ROM_SKIP(1))
ROMX_LOAD( "184502.bin", 0xfd000, 0x0800, CRC(149e7e29) SHA1(7f2a297588fef1bc750c57e6ae0d5acf3d27c486), ROM_SKIP(1))
ROMX_LOAD( "184503.bin", 0xfd001, 0x0800, CRC(e28cbd74) SHA1(cf1fba4e67c8e1dd8cdda547118e84b704029b03), ROM_SKIP(1))
ROMX_LOAD( "184504.bin", 0xfe000, 0x0800, CRC(55fa7a1d) SHA1(58f7abab08b9d2f0a1c1636e11bb72af2694c95f), ROM_SKIP(1))
ROMX_LOAD( "184505.bin", 0xfe001, 0x0800, CRC(c807e3f5) SHA1(08117e449f0d04f96041cff8d34893f500f3760d), ROM_SKIP(1))
ROMX_LOAD( "184506.bin", 0xff000, 0x0800, CRC(24f5c27c) SHA1(7822dd7f715ef00ccf6d8408be8bbfe01c2eba20), ROM_SKIP(1))
ROMX_LOAD( "184507.bin", 0xff001, 0x0800, CRC(75122203) SHA1(7b0fbdf1315230633e39574ac7360163bc7361e1), ROM_SKIP(1))
ROM_REGION(0x2000,"gfx1", ROMREGION_ERASE00)
ROM_END
ROM_START( asst128 )
ROM_REGION16_LE(0x100000,"maincpu", 0)
ROM_DEFAULT_BIOS("floppy")
/* BASIC ROM taken from IBM 5150 and needs dumping */
ROM_LOAD( "basic-1.10.rom", 0xf6000, 0x8000, CRC(ebacb791) SHA1(07449ebca18f979b9ab748582b736e402f2bf940))
ROM_LOAD( "asf400-f600.bin", 0xf4000, 0x2000, CRC(e3bf22de) SHA1(d4319edc82c0015ca0adc6c8771e887659717e62))
ROM_LOAD( "asfc00-ff00.bin", 0xfc000, 0x4000, CRC(0cb6401c) SHA1(70c4da47700f9925fd04049f16d54610c743ed8b))
ROM_SYSTEM_BIOS(0, "floppy", "3rd party floppy support")
ROMX_LOAD( "rombios7.bin", 0xfc001, 0x2000, CRC(7d7c8d6a) SHA1(a731a65ee547f1d78cfc91461f38166da014f3dc), ROM_SKIP(1) | ROM_BIOS(1))
ROMX_LOAD( "rombios8.bin", 0xfc000, 0x2000, CRC(ba304663) SHA1(b2533b8f8240f72b7315f27c7b64f95ac52687ca), ROM_SKIP(1) | ROM_BIOS(1))
ROM_SYSTEM_BIOS(1, "stock", "cassette-only BIOS?")
ROMX_LOAD( "mainbios.bin", 0xfe000, 0x2000, CRC(8426cbf5) SHA1(41d14137ffa651977041da22aa8071c0f7854158), ROM_BIOS(2))
ROM_REGION(0x2000,"gfx1", ROMREGION_ERASE00)
ROM_COPY( "maincpu", 0xffa6e, 0x0800, 0x0400 )
ROM_COPY( "maincpu", 0xfc000, 0x0c00, 0x0400 )
@ -2605,29 +2188,6 @@ ROM_START( iskr3104 )
ROM_REGION(0x2000,"gfx1", ROMREGION_ERASE00)
ROM_END
ROM_START( poisk1 )
ROM_REGION16_LE(0x100000,"maincpu", 0)
ROM_LOAD( "b_hd_v11.rf2", 0xc8000, 0x0800, CRC(a19c39b2) SHA1(57faa56b320abf801fedbed578cf97d253e5b777)) // HDD controller ver 1.1
ROM_LOAD( "b942_5mb.bin", 0x00000, 0x0800, CRC(a3cfa240) SHA1(0b0aa1ce839a957153bfbbe70310480ca9fe21b6)) // HDD controller ver 1.4
ROM_LOAD( "b_ngmd_n.rf2", 0x0000, 0x0800, CRC(967e172a) SHA1(95117c40fd9f624fee08ccf37f615b16ff249688)) // Floppy
ROM_LOAD( "b_ngmd_t.rf2", 0x0000, 0x0800, CRC(630010b1) SHA1(50876fe4f5f4f32a242faa70f9154574cd315ec4)) // Floppy
ROM_SYSTEM_BIOS(0, "v89", "1989")
ROMX_LOAD( "biosp1s.rf4", 0xfe000, 0x2000, CRC(1a85f671) SHA1(f0e59b2c4d92164abca55a96a58071ce869ff988), ROM_BIOS(1)) // Main BIOS
ROM_SYSTEM_BIOS(1, "v91", "1991")
ROMX_LOAD( "poisk_1991.bin", 0xfe000, 0x2000, CRC(d61c56fd) SHA1(de202e1f7422d585a1385a002a4fcf9d756236e5), ROM_BIOS(2))
ROM_SYSTEM_BIOS(2, "t1", "Test I/O")
ROMX_LOAD( "p1_t_i_o.rf4", 0xfe000, 0x2000, CRC(18a781de) SHA1(7267970ee27e3ea1d972bee8e74b17bac1051619), ROM_BIOS(3))
ROM_SYSTEM_BIOS(3, "t2", "Test MB")
ROMX_LOAD( "p1_t_pls.rf4", 0xfe000, 0x2000, CRC(c8210ffb) SHA1(f2d1a6c90e4708bcc56186b2fb906fa852667084), ROM_BIOS(4))
ROM_SYSTEM_BIOS(4, "t3", "Test RAM")
ROMX_LOAD( "p1_t_ram.rf4", 0xfe000, 0x2000, CRC(e42f5a61) SHA1(ce2554eae8f0d2b6d482890dd198cf7e2d29c655), ROM_BIOS(5))
ROM_LOAD( "boot_net.rf4", 0x0000, 0x2000, CRC(316c2030) SHA1(d043325596455772252e465b85321f1b5c529d0b)) // NET BUIS
ROM_REGION(0x2000,"gfx1", ROMREGION_ERASE00)
ROM_LOAD( "poisk.cga", 0x0000, 0x0800, CRC(f6eb39f0) SHA1(0b788d8d7a8e92cc612d044abcb2523ad964c200))
ROM_END
ROM_START( poisk2 )
ROM_REGION16_LE(0x100000,"maincpu", 0)
ROM_SYSTEM_BIOS(0, "v20", "v2.0")
@ -2664,23 +2224,6 @@ ROM_START( mc1702 )
ROM_END
ROM_START( mc1502 )
ROM_REGION16_LE(0x100000,"maincpu", 0)
ROM_DEFAULT_BIOS("v52")
ROM_LOAD( "basic.rom", 0xe8000, 0x8000, CRC(173d69fa) SHA1(003f872e12f00800e22ab6bbc009d36bfde67b9d))
ROM_SYSTEM_BIOS(0, "v50", "v5.0")
ROMX_LOAD( "monitor_5_0.rom", 0xfc000, 0x4000, CRC(9e97c6a0) SHA1(16a304e8de69ec4d8b92acda6bf28454c361a24f),ROM_BIOS(1))
ROM_SYSTEM_BIOS(1, "v52", "v5.2")
ROMX_LOAD( "monitor_5_2.rom", 0xfc000, 0x4000, CRC(0e65491e) SHA1(8a4d556473b5e0e59b05fab77c79c29f4d562412),ROM_BIOS(2))
ROM_SYSTEM_BIOS(2, "v531", "v5.31")
ROMX_LOAD( "monitor_5_31.rom", 0xfc000, 0x4000, CRC(a48295d5) SHA1(6f38977c22f9cc6c2bc6f6e53edc4048ca6b6721),ROM_BIOS(3))
ROM_SYSTEM_BIOS(3, "v533", "v5.33")
ROMX_LOAD( "0_(cbc0).bin", 0xfc000, 0x2000, CRC(9a55bc4f) SHA1(81da44eec2e52cf04b1fc7053502270f51270590),ROM_BIOS(4))
ROMX_LOAD( "1_(dfe2).bin", 0xfe000, 0x2000, CRC(8dec077a) SHA1(d6f6d7cc2183abc77fbd9cd59132de5766f7c458),ROM_BIOS(4))
ROM_REGION(0x2000,"gfx1", ROMREGION_ERASE00)
ROM_LOAD( "symgen.rom", 0x0000, 0x2000, CRC(b2747a52) SHA1(6766d275467672436e91ac2997ac6b77700eba1e))
ROM_END
ROM_START( m24 )
ROM_REGION16_LE(0x100000,"maincpu", 0)
ROMX_LOAD("olivetti_m24_version_1.43_high.bin",0xfc001, 0x2000, CRC(04e697ba) SHA1(1066dcc849e6289b5ac6372c84a590e456d497a6), ROM_SKIP(1))
@ -2827,18 +2370,11 @@ COMP( 1989, t1000rl, ibm5150, 0, t1000_16, tandy1t, tandy_pc_st
COMP( 1989, t1000tl2, ibm5150, 0, t1000_286, tandy1t, tandy_pc_state, t1000hx, "Tandy Radio Shack", "Tandy 1000 TL/2", 0)
COMP( 1988, t1000sl2, ibm5150, 0, t1000_16_8, tandy1t, tandy_pc_state, t1000sl, "Tandy Radio Shack", "Tandy 1000 SL/2", GAME_NOT_WORKING)
COMP( 1989, iskr1031, ibm5150, 0, iskr1031, pccga, pc_state, pccga, "Schetmash", "Iskra 1031", GAME_NOT_WORKING)
COMP( 1989, iskr1030m, ibm5150, 0, iskr1031, pccga, pc_state, pccga, "Schetmash", "Iskra 1030M", GAME_NOT_WORKING)
COMP( 1992, iskr3104, ibm5150, 0, iskr3104, pcega, pc_state, pccga, "Schetmash", "Iskra 3104", GAME_NOT_WORKING)
COMP( 198?, asst128, ibm5150, 0, asst128, pccga, pc_state, pccga, "Schetmash", "Assistent 128", GAME_NOT_WORKING)
COMP( 1987, ec1840, ibm5150, 0, iskr1031, pccga, pc_state, pccga, "<unknown>", "EC-1840", GAME_NOT_WORKING)
COMP( 1987, ec1841, ibm5150, 0, ec1841, ec1841, pc_state, ec1841, "<unknown>", "EC-1841", GAME_NOT_WORKING)
COMP( 1989, ec1845, ibm5150, 0, iskr1031, pccga, pc_state, pccga, "<unknown>", "EC-1845", GAME_NOT_WORKING)
COMP( 1989, mk88, ibm5150, 0, iskr1031, pccga, pc_state, pccga, "<unknown>", "MK-88", GAME_NOT_WORKING)
COMP( 1990, poisk1, ibm5150, 0, iskr1031, pccga, pc_state, pccga, "<unknown>", "Poisk-1", GAME_NOT_WORKING)
COMP( 1989, mk88, ibm5150, 0, iskr3104, pccga, pc_state, pccga, "<unknown>", "MK-88", GAME_NOT_WORKING)
COMP( 1991, poisk2, ibm5150, 0, poisk2, pccga, pc_state, pccga, "<unknown>", "Poisk-2", GAME_NOT_WORKING)
COMP( 1990, mc1702, ibm5150, 0, pccga, pccga, pc_state, pccga, "<unknown>", "Elektronika MC-1702", GAME_NOT_WORKING)
COMP( 1989, mc1502, ibm5150, 0, mc1502, mc1502, pc_state, mc1502, "NPO Microprocessor", "Elektronika MC-1502", GAME_NOT_WORKING | GAME_NO_SOUND)
COMP( 1987, zdsupers, ibm5150, 0, zenith, pccga, pc_state, pccga, "Zenith Data Systems", "SuperSport", 0)

362
src/mess/drivers/poisk1.c Normal file
View File

@ -0,0 +1,362 @@
/***************************************************************************
drivers/poisk1.c
Driver file for Poisk-1
***************************************************************************/
#include "emu.h"
#include "includes/poisk1.h"
#include "machine/kb_poisk1.h"
#include "cpu/i86/i86.h"
#define CGA_PALETTE_SETS 83
/* one for colour, one for mono, 81 for colour composite */
#include "drivlgcy.h"
#include "scrlegcy.h"
#define VERBOSE_DBG 0
#define DBG_LOG(N,M,A) \
do { \
if(VERBOSE_DBG>=N) \
{ \
if( M ) \
logerror("%11.6f: %-24s",machine().time().as_double(),(char*)M ); \
logerror A; \
} \
} while (0)
/*
* onboard devices:
*/
// Timer. Poisk-1 uses single XTAL for everything? -- check
WRITE_LINE_MEMBER( p1_state::p1_speaker_set_spkrdata )
{
m_p1_spkrdata = state ? 1 : 0;
m_speaker->level_w(m_p1_spkrdata & m_p1_input);
}
WRITE_LINE_MEMBER( p1_state::p1_pit8253_out2_changed )
{
m_p1_input = state ? 1 : 0;
m_speaker->level_w(m_p1_spkrdata & m_p1_input);
}
const struct pit8253_interface p1_pit8253_config =
{
{
{
XTAL_15MHz/12, /* heartbeat IRQ */
DEVCB_NULL,
DEVCB_DEVICE_LINE_MEMBER("pic8259", pic8259_device, ir0_w)
}, {
XTAL_15MHz/12, /* keyboard poll -- XXX edge or level triggered? */
DEVCB_NULL,
DEVCB_DEVICE_LINE_MEMBER("pic8259", pic8259_device, ir6_w)
}, {
XTAL_15MHz/12, /* pio port c pin 4, and speaker polling enough */
DEVCB_NULL,
DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, p1_state, p1_pit8253_out2_changed)
}
}
};
// Keyboard (via PPI)
WRITE8_MEMBER(p1_state::p1_ppi_porta_w)
{
m_kbpoll_mask = data;
DBG_LOG(2,"p1_ppi_porta_w",("( %02X -> %02X )\n", data, m_kbpoll_mask));
}
READ8_MEMBER(p1_state::p1_ppi_porta_r)
{
UINT8 ret;
ret = m_kbpoll_mask;
DBG_LOG(1,"p1_ppi_porta_r",("= %02X\n", ret));
return ret;
}
READ8_MEMBER(p1_state::p1_ppi_portb_r)
{
UINT16 key = 0xffff;
UINT8 ret = 0;
if (m_kbpoll_mask & 0x01) { key &= ioport("Y1")->read(); }
if (m_kbpoll_mask & 0x02) { key &= ioport("Y2")->read(); }
if (m_kbpoll_mask & 0x04) { key &= ioport("Y3")->read(); }
if (m_kbpoll_mask & 0x08) { key &= ioport("Y4")->read(); }
if (m_kbpoll_mask & 0x10) { key &= ioport("Y5")->read(); }
if (m_kbpoll_mask & 0x20) { key &= ioport("Y6")->read(); }
if (m_kbpoll_mask & 0x40) { key &= ioport("Y7")->read(); }
if (m_kbpoll_mask & 0x80) { key &= ioport("Y8")->read(); }
ret = key & 0xff;
// DBG_LOG(1,"p1_ppi_portb_r",("= %02X\n", ret));
return ret;
}
READ8_MEMBER(p1_state::p1_ppi_portc_r)
{
UINT16 key = 0xffff;
UINT8 ret = 0;
if (m_kbpoll_mask & 0x01) { key &= ioport("Y1")->read(); }
if (m_kbpoll_mask & 0x02) { key &= ioport("Y2")->read(); }
if (m_kbpoll_mask & 0x04) { key &= ioport("Y3")->read(); }
if (m_kbpoll_mask & 0x08) { key &= ioport("Y4")->read(); }
if (m_kbpoll_mask & 0x10) { key &= ioport("Y5")->read(); }
if (m_kbpoll_mask & 0x20) { key &= ioport("Y6")->read(); }
if (m_kbpoll_mask & 0x40) { key &= ioport("Y7")->read(); }
if (m_kbpoll_mask & 0x80) { key &= ioport("Y8")->read(); }
ret = (key >> 8) & 0xff;
DBG_LOG(2,"p1_ppi_portc_r",("= %02X\n", ret));
return ret;
}
// XXX
READ8_MEMBER(p1_state::p1_ppi2_portc_r)
{
int data = 0xff;
double tap_val = m_cassette->input();
data = ( data & ~0x10 ) | ( tap_val < 0 ? 0x10 : 0x00 );
DBG_LOG(2,"p1_ppi_portc_r",("= %02X (tap_val %f) at %s\n",
data, tap_val, machine().describe_context()));
return data;
}
WRITE8_MEMBER(p1_state::p1_ppi2_portb_w)
{
m_pit8253->gate2_w(BIT(data, 0));
p1_speaker_set_spkrdata( data & 0x02 );
}
I8255_INTERFACE( p1_ppi8255_interface_1 )
{
/*60H*/ DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, p1_state, p1_ppi_porta_r),
DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, p1_state, p1_ppi_porta_w),
/*69H*/ DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, p1_state, p1_ppi_portb_r),
DEVCB_NULL,
/*6AH*/ DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, p1_state, p1_ppi_portc_r),
DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, p1_state, p1_ppi_portc_w)
};
I8255_INTERFACE( p1_ppi8255_interface_2 )
{
/*68H*/ DEVCB_NULL,
DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, p1_state, p1_ppi2_porta_w),
/*61H*/ DEVCB_NULL,
DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, p1_state, p1_ppi2_portb_w),
/*62H*/ DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, p1_state, p1_ppi2_portc_r),
DEVCB_NULL
};
READ8_MEMBER(p1_state::p1_ppi_r)
{
// DBG_LOG(1,"p1ppi",("R %.2x\n", 0x60+offset));
switch (offset) {
case 0:
return m_ppi8255n1->read(space, 0);
case 9:
case 10:
case 11:
return m_ppi8255n1->read(space, offset - 8);
case 8:
return m_ppi8255n2->read(space, 0);
case 1:
case 2:
case 3:
return m_ppi8255n2->read(space, offset);
default:
DBG_LOG(1,"p1ppi",("R %.2x (unimp)\n", 0x60+offset));
return 0xff;
}
}
WRITE8_MEMBER(p1_state::p1_ppi_w)
{
// DBG_LOG(1,"p1ppi",("W %.2x $%02x\n", 0x60+offset, data));
switch (offset) {
case 0:
return m_ppi8255n1->write(space, 0, data);
case 9:
case 10:
case 11:
return m_ppi8255n1->write(space, offset - 8, data);
case 8:
return m_ppi8255n2->write(space, 0, data);
case 1:
case 2:
case 3:
return m_ppi8255n2->write(space, offset, data);
default:
DBG_LOG(1,"p1ppi",("W %.2x $%02x (unimp)\n", 0x60+offset, data));
return;
}
}
/**********************************************************
*
* NMI handling
*
**********************************************************/
static const isa8bus_interface p1_isabus_intf =
{
// interrupts
DEVCB_DEVICE_LINE_MEMBER("pic8259", pic8259_device, ir2_w),
DEVCB_DEVICE_LINE_MEMBER("pic8259", pic8259_device, ir3_w),
DEVCB_DEVICE_LINE_MEMBER("pic8259", pic8259_device, ir4_w),
DEVCB_DEVICE_LINE_MEMBER("pic8259", pic8259_device, ir5_w),
DEVCB_NULL,
DEVCB_DEVICE_LINE_MEMBER("pic8259", pic8259_device, ir7_w),
// dma request
DEVCB_NULL,
DEVCB_NULL,
DEVCB_NULL,
};
static const cassette_interface p1_cassette_interface =
{
cassette_default_formats,
NULL,
(cassette_state)(CASSETTE_PLAY | CASSETTE_MOTOR_DISABLED | CASSETTE_SPEAKER_ENABLED),
NULL,
NULL
};
IRQ_CALLBACK_MEMBER( p1_state::p1_irq_callback )
{
return m_pic8259->acknowledge();
}
DRIVER_INIT_MEMBER( p1_state, poisk1 )
{
address_space &program = m_maincpu->space(AS_PROGRAM);
DBG_LOG(0,"init",("driver_init()\n"));
program.unmap_readwrite(0, 0x7ffff);
program.install_readwrite_bank(0, m_ram->size()-1, "bank10");
membank( "bank10" )->set_base( m_ram->pointer() );
}
MACHINE_START_MEMBER( p1_state, poisk1 )
{
DBG_LOG(0,"init",("machine_start()\n"));
m_maincpu->set_irq_acknowledge_callback(device_irq_acknowledge_delegate(FUNC(p1_state::p1_irq_callback),this));
}
MACHINE_RESET_MEMBER( p1_state, poisk1 )
{
DBG_LOG(0,"init",("machine_reset()\n"));
m_kbpoll_mask = 0;
}
/*
* macros
*/
static ADDRESS_MAP_START( poisk1_map, AS_PROGRAM, 8, p1_state )
ADDRESS_MAP_UNMAP_HIGH
AM_RANGE(0x00000, 0x7ffff) AM_RAM
AM_RANGE(0xc0000, 0xc1fff) AM_ROM
AM_RANGE(0xc0000, 0xfbfff) AM_NOP
AM_RANGE(0xfc000, 0xfffff) AM_ROM
ADDRESS_MAP_END
static ADDRESS_MAP_START( poisk1_io, AS_IO, 8, p1_state )
AM_RANGE(0x0020, 0x0021) AM_DEVREADWRITE("pic8259", pic8259_device, read, write)
AM_RANGE(0x0028, 0x002B) AM_READWRITE(p1_trap_r, p1_trap_w)
AM_RANGE(0x0040, 0x0043) AM_DEVREADWRITE("pit8253", pit8253_device, read, write)
// can't use regular AM_DEVREADWRITE, because THIS IS SPARTA!
// 1st PPI occupies ports 60, 69, 6A and 6B; 2nd PPI -- 68, 61, 62 and 63.
AM_RANGE(0x0060, 0x006F) AM_READWRITE(p1_ppi_r, p1_ppi_w)
AM_RANGE(0x03D0, 0x03DF) AM_READWRITE(p1_cga_r, p1_cga_w)
ADDRESS_MAP_END
static INPUT_PORTS_START( poisk1 )
PORT_INCLUDE( poisk1_keyboard_v91 )
INPUT_PORTS_END
static MACHINE_CONFIG_START( poisk1, p1_state )
/* basic machine hardware */
MCFG_CPU_ADD("maincpu", I8088, 5000000)
MCFG_CPU_PROGRAM_MAP(poisk1_map)
MCFG_CPU_IO_MAP(poisk1_io)
MCFG_MACHINE_START_OVERRIDE( p1_state, poisk1 )
MCFG_MACHINE_RESET_OVERRIDE( p1_state, poisk1 )
MCFG_PIT8253_ADD( "pit8253", p1_pit8253_config )
MCFG_PIC8259_ADD( "pic8259", INPUTLINE(":maincpu", 0), VCC, NULL )
MCFG_I8255A_ADD( "ppi8255n1", p1_ppi8255_interface_1 )
MCFG_I8255A_ADD( "ppi8255n2", p1_ppi8255_interface_2 )
MCFG_ISA8_BUS_ADD("isa", ":maincpu", p1_isabus_intf)
MCFG_ISA8_SLOT_ADD("isa", "isa1", p1_isa8_cards, "fdc", false)
MCFG_ISA8_SLOT_ADD("isa", "isa2", p1_isa8_cards, NULL, false)
MCFG_ISA8_SLOT_ADD("isa", "isa3", p1_isa8_cards, NULL, false)
MCFG_ISA8_SLOT_ADD("isa", "isa4", p1_isa8_cards, NULL, false)
MCFG_CASSETTE_ADD( "cassette", p1_cassette_interface )
MCFG_SPEAKER_STANDARD_MONO( "mono" )
MCFG_SOUND_ADD( "speaker", SPEAKER_SOUND, 0 )
MCFG_SOUND_ROUTE( ALL_OUTPUTS, "mono", 1.00 )
MCFG_SCREEN_ADD( "screen", RASTER )
MCFG_SCREEN_RAW_PARAMS( XTAL_15MHz, 912,0,640, 262,0,200 )
MCFG_SCREEN_UPDATE_DRIVER( p1_state, screen_update )
/* XXX verify palette */
MCFG_PALETTE_LENGTH( CGA_PALETTE_SETS * 16 )
/* internal ram */
MCFG_RAM_ADD(RAM_TAG)
MCFG_RAM_DEFAULT_SIZE("512K")
MACHINE_CONFIG_END
ROM_START( poisk1 )
ROM_REGION16_LE(0x100000,"maincpu", 0)
ROM_DEFAULT_BIOS("v91")
ROM_SYSTEM_BIOS(0, "v89", "1989")
ROMX_LOAD( "biosp1s.rf4", 0xfe000, 0x2000, CRC(1a85f671) SHA1(f0e59b2c4d92164abca55a96a58071ce869ff988), ROM_BIOS(1))
ROM_SYSTEM_BIOS(1, "v91", "1991")
ROMX_LOAD( "poisk_1991.bin", 0xfe000, 0x2000, CRC(d61c56fd) SHA1(de202e1f7422d585a1385a002a4fcf9d756236e5), ROM_BIOS(2))
ROM_SYSTEM_BIOS(2, "v91r2", "1991r2")
ROMX_LOAD( "p_bios_nm.bin", 0xfe000, 0x2000, CRC(84430b4f) SHA1(3e477962be3cea09662cb2e3ad9966ad01c7455d), ROM_BIOS(3))
// 0xc0000, sets 80x25 text and loops asking for 'Boot from hard disk (Y or N)?'
ROM_LOAD( "boot_net.rf4", 0x00000, 0x2000, CRC(316c2030) SHA1(d043325596455772252e465b85321f1b5c529d0b)) // NET BIOS
// 0xc0000, accesses ports 0x90..0x97
ROM_LOAD( "pois_net.bin", 0x00000, 0x2000, CRC(cf9dd80a) SHA1(566bcb40c0cb2c8bfd5b485f0db689fdeaca3e86)) // ??? BIOS
ROM_REGION(0x2000,"gfx1", ROMREGION_ERASE00)
ROM_LOAD( "poisk.cga", 0x0000, 0x0800, CRC(f6eb39f0) SHA1(0b788d8d7a8e92cc612d044abcb2523ad964c200))
ROM_END
/***************************************************************************
Game driver(s)
***************************************************************************/
/* YEAR NAME PARENT COMPAT MACHINE INPUT INIT COMPANY FULLNAME */
COMP ( 1989, poisk1, ibm5150, 0, poisk1, poisk1, p1_state, poisk1, "Electronmash", "Poisk-1", 0)

41
src/mess/includes/ec184x.h Normal file
View File

@ -0,0 +1,41 @@
/*****************************************************************************
*
* includes/ec184x.h
*
****************************************************************************/
#ifndef EC184X_H_
#define EC184X_H_
#include "includes/genpc.h"
#define MCFG_EC1841_MOTHERBOARD_ADD(_tag, _cputag) \
MCFG_DEVICE_ADD(_tag, EC1841_MOTHERBOARD, 0) \
ec1841_mb_device::static_set_cputag(*device, _cputag);
// ======================> ibm5150_mb_device
class ec1841_mb_device : public ibm5160_mb_device
{
public:
// construction/destruction
ec1841_mb_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
// optional information overrides
virtual machine_config_constructor device_mconfig_additions() const;
virtual ioport_constructor device_input_ports() const;
protected:
// device-level overrides
virtual void device_start();
virtual void device_reset();
public:
virtual DECLARE_READ8_MEMBER ( pc_ppi_portc_r );
virtual DECLARE_WRITE8_MEMBER( pc_ppi_portb_w );
};
// device type definition
extern const device_type EC1841_MOTHERBOARD;
#endif /* EC184X_H_ */

30
src/mess/includes/genpc.h
View File

@ -149,4 +149,34 @@ public:
// device type definition
extern const device_type IBM5150_MOTHERBOARD;
#define MCFG_EC1841_MOTHERBOARD_ADD(_tag, _cputag) \
MCFG_DEVICE_ADD(_tag, EC1841_MOTHERBOARD, 0) \
ec1841_mb_device::static_set_cputag(*device, _cputag);
// ======================> ibm5150_mb_device
class ec1841_mb_device : public ibm5160_mb_device
{
public:
// construction/destruction
ec1841_mb_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
// optional information overrides
virtual machine_config_constructor device_mconfig_additions() const;
virtual ioport_constructor device_input_ports() const;
protected:
// device-level overrides
virtual void device_start();
virtual void device_reset();
public:
virtual DECLARE_READ8_MEMBER ( pc_ppi_portc_r );
virtual DECLARE_WRITE8_MEMBER( pc_ppi_portb_w );
};
// device type definition
extern const device_type EC1841_MOTHERBOARD;
#endif /* GENPC_H_ */

89
src/mess/includes/mc1502.h Normal file
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@ -0,0 +1,89 @@
/*****************************************************************************
*
* includes/mc1502.h
*
****************************************************************************/
#ifndef MC1502_H_
#define MC1502_H_
#include "imagedev/cassette.h"
#include "machine/i8251.h"
#include "machine/i8255.h"
#include "machine/isa.h"
#include "machine/pic8259.h"
#include "machine/pit8253.h"
#include "machine/ram.h"
#include "machine/serial.h"
#include "machine/xsu_cards.h"
#include "sound/speaker.h"
class mc1502_state : public driver_device
{
public:
mc1502_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag),
m_maincpu(*this, "maincpu"),
m_pic8259(*this, "pic8259"),
m_pit8253(*this, "pit8253"),
m_ppi8255n1(*this, "ppi8255n1"),
m_ppi8255n2(*this, "ppi8255n2"),
m_isabus(*this, "isa"),
m_speaker(*this, "speaker"),
m_cassette(*this, "cassette"),
m_centronics(*this, "centronics"),
m_ram(*this, RAM_TAG) { }
required_device<cpu_device> m_maincpu;
required_device<pic8259_device> m_pic8259;
required_device<pit8253_device> m_pit8253;
required_device<i8255_device> m_ppi8255n1;
required_device<i8255_device> m_ppi8255n2;
required_device<isa8_device> m_isabus;
required_device<speaker_sound_device> m_speaker;
required_device<cassette_image_device> m_cassette;
required_device<centronics_device> m_centronics;
required_device<ram_device> m_ram;
DECLARE_DRIVER_INIT(mc1502);
DECLARE_MACHINE_START(mc1502);
DECLARE_MACHINE_RESET(mc1502);
IRQ_CALLBACK_MEMBER(mc1502_irq_callback);
TIMER_CALLBACK_MEMBER(keyb_signal_callback);
struct {
UINT8 pulsing;
UINT16 mask; /* input lines */
emu_timer *keyb_signal_timer;
} m_kbd;
UINT8 m_ppi_portb;
UINT8 m_ppi_portc;
UINT8 m_mc1502_spkrdata;
UINT8 m_mc1502_input;
DECLARE_WRITE_LINE_MEMBER(mc1502_pit8253_out1_changed);
DECLARE_WRITE_LINE_MEMBER(mc1502_pit8253_out2_changed);
DECLARE_WRITE_LINE_MEMBER(mc1502_speaker_set_spkrdata);
DECLARE_WRITE_LINE_MEMBER(mc1502_i8251_syndet);
DECLARE_WRITE8_MEMBER(mc1502_ppi_porta_w);
DECLARE_WRITE8_MEMBER(mc1502_ppi_portb_w);
DECLARE_WRITE8_MEMBER(mc1502_ppi_portc_w);
DECLARE_READ8_MEMBER(mc1502_ppi_portc_r);
DECLARE_READ8_MEMBER(mc1502_kppi_porta_r);
DECLARE_READ8_MEMBER(mc1502_kppi_portc_r);
DECLARE_WRITE8_MEMBER(mc1502_kppi_portb_w);
DECLARE_WRITE8_MEMBER(mc1502_kppi_portc_w);
/*
TIMER_CALLBACK_MEMBER(fdc_motor_callback);
static struct {
int fdc_motor_on;
emu_timer *fdc_motor_timer;
} m_motor;
*/
const char *m_cputag;
};
#endif /* MC1502_H_ */

27
src/mess/includes/pc.h
View File

@ -8,7 +8,6 @@
#define PC_H_
#include "machine/ins8250.h"
#include "machine/i8251.h"
#include "machine/i8255.h"
#include "machine/am9517a.h"
#include "machine/serial.h"
@ -51,8 +50,6 @@ public:
/* Q2 is set by OUT1 from the 8253 and goes to DRQ1 on the 8237 */
UINT8 m_u73_q2;
UINT8 m_out1;
UINT8 m_memboard[4]; /* used only by ec1840 and ec1841 */
int m_memboards;
int m_dma_channel;
UINT8 m_dma_offset[2][4];
int m_cur_eop;
@ -90,10 +87,6 @@ public:
DECLARE_WRITE8_MEMBER(pc_EXP_w);
DECLARE_READ8_MEMBER(pc_EXP_r);
DECLARE_READ8_MEMBER(unk_r);
DECLARE_READ8_MEMBER(ec1841_memboard_r);
DECLARE_WRITE8_MEMBER(ec1841_memboard_w);
DECLARE_DRIVER_INIT(ec1841);
DECLARE_DRIVER_INIT(mc1502);
DECLARE_DRIVER_INIT(bondwell);
DECLARE_DRIVER_INIT(pcjr);
DECLARE_DRIVER_INIT(pccga);
@ -103,11 +96,9 @@ public:
DECLARE_MACHINE_RESET(pc);
DECLARE_MACHINE_START(pcjr);
DECLARE_MACHINE_RESET(pcjr);
DECLARE_MACHINE_START(mc1502);
TIMER_CALLBACK_MEMBER(pcjr_delayed_pic8259_irq);
TIMER_CALLBACK_MEMBER(pcjr_keyb_signal_callback);
TIMER_CALLBACK_MEMBER(pcjr_fdc_watchdog);
TIMER_CALLBACK_MEMBER(mc1502_keyb_signal_callback);
TIMER_CALLBACK_MEMBER(pc_rtc_timer);
TIMER_DEVICE_CALLBACK_MEMBER(pc_frame_interrupt);
TIMER_DEVICE_CALLBACK_MEMBER(pc_vga_frame_interrupt);
@ -126,8 +117,6 @@ public:
DECLARE_WRITE_LINE_MEMBER(pcjr_pic8259_set_int_line);
DECLARE_WRITE_LINE_MEMBER(ibm5150_pit8253_out1_changed);
DECLARE_WRITE_LINE_MEMBER(ibm5150_pit8253_out2_changed);
DECLARE_WRITE_LINE_MEMBER(mc1502_pit8253_out1_changed);
DECLARE_WRITE_LINE_MEMBER(mc1502_pit8253_out2_changed);
DECLARE_WRITE_LINE_MEMBER(pc_com_interrupt_1);
DECLARE_WRITE_LINE_MEMBER(pc_com_interrupt_2);
DECLARE_READ8_MEMBER(ibm5160_ppi_porta_r);
@ -135,20 +124,9 @@ public:
DECLARE_WRITE8_MEMBER(ibm5160_ppi_portb_w);
DECLARE_READ8_MEMBER(pc_ppi_porta_r);
DECLARE_WRITE8_MEMBER(pc_ppi_portb_w);
DECLARE_WRITE8_MEMBER(mc1502_ppi_porta_w);
DECLARE_WRITE8_MEMBER(mc1502_ppi_portb_w);
DECLARE_READ8_MEMBER(mc1502_ppi_portc_r);
DECLARE_READ8_MEMBER(mc1502_kppi_porta_r);
DECLARE_READ8_MEMBER(mc1502_kppi_portc_r);
DECLARE_WRITE8_MEMBER(mc1502_kppi_portb_w);
DECLARE_WRITE8_MEMBER(mc1502_kppi_portc_w);
DECLARE_WRITE8_MEMBER(pcjr_ppi_portb_w);
DECLARE_READ8_MEMBER(pcjr_ppi_porta_r);
DECLARE_READ8_MEMBER(pcjr_ppi_portc_r);
DECLARE_READ8_MEMBER(mc1502_wd17xx_aux_r);
DECLARE_WRITE8_MEMBER(mc1502_wd17xx_aux_w);
DECLARE_READ8_MEMBER(mc1502_wd17xx_drq_r);
DECLARE_READ8_MEMBER(mc1502_wd17xx_motor_r);
DECLARE_WRITE8_MEMBER(pcjr_fdc_dor_w);
DECLARE_READ8_MEMBER(pcjx_port_1ff_r);
DECLARE_WRITE8_MEMBER(pcjx_port_1ff_w);
@ -159,7 +137,6 @@ public:
void fdc_dma_drq(bool state);
void pc_select_dma_channel(int channel, bool state);
void pc_eop_w(int channel, bool state);
void mc1502_fdc_irq_drq(bool state);
DECLARE_FLOPPY_FORMATS( floppy_formats );
DECLARE_FLOPPY_FORMATS( asst128_formats );
IRQ_CALLBACK_MEMBER(pc_irq_callback);
@ -201,13 +178,9 @@ void pc_set_keyb_int(running_machine &machine, int state);
extern const struct am9517a_interface ibm5150_dma8237_config;
extern const struct pit8253_interface ibm5150_pit8253_config;
extern const struct pit8253_interface pcjr_pit8253_config;
extern const struct pit8253_interface mc1502_pit8253_config;
extern const ins8250_interface ibm5150_com_interface[4];
extern const i8255_interface ibm5160_ppi8255_interface;
extern const i8255_interface pc_ppi8255_interface;
extern const i8255_interface pcjr_ppi8255_interface;
extern const i8251_interface mc1502_i8251_interface;
extern const i8255_interface mc1502_ppi8255_interface;
extern const i8255_interface mc1502_ppi8255_interface_2;
#endif /* PC_H_ */

100
src/mess/includes/poisk1.h Normal file
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@ -0,0 +1,100 @@
/*****************************************************************************
*
* includes/poisk1.h
*
****************************************************************************/
#ifndef POISK1_H_
#define POISK1_H_
#include "imagedev/cassette.h"
#include "machine/i8255.h"
#include "machine/isa.h"
#include "machine/pic8259.h"
#include "machine/pit8253.h"
#include "machine/ram.h"
#include "machine/xsu_cards.h"
#include "sound/speaker.h"
#define POISK1_UPDATE_ROW(name) \
void name(bitmap_rgb32 &bitmap, const rectangle &cliprect, UINT8 *videoram, UINT16 ma, UINT8 ra, UINT8 stride)
class p1_state : public driver_device
{
public:
p1_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag),
m_maincpu(*this, "maincpu"),
m_pic8259(*this, "pic8259"),
m_pit8253(*this, "pit8253"),
m_ppi8255n1(*this, "ppi8255n1"),
m_ppi8255n2(*this, "ppi8255n2"),
m_isabus(*this, "isa"),
m_speaker(*this, "speaker"),
m_cassette(*this, "cassette"),
m_ram(*this, RAM_TAG) { }
required_device<cpu_device> m_maincpu;
required_device<pic8259_device> m_pic8259;
required_device<pit8253_device> m_pit8253;
required_device<i8255_device> m_ppi8255n1;
required_device<i8255_device> m_ppi8255n2;
required_device<isa8_device> m_isabus;
required_device<speaker_sound_device> m_speaker;
required_device<cassette_image_device> m_cassette;
required_device<ram_device> m_ram;
DECLARE_DRIVER_INIT(poisk1);
DECLARE_MACHINE_START(poisk1);
DECLARE_MACHINE_RESET(poisk1);
IRQ_CALLBACK_MEMBER(p1_irq_callback);
virtual void palette_init();
virtual void video_start();
UINT32 screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
void set_palette_luts();
POISK1_UPDATE_ROW(cga_gfx_2bpp_update_row);
POISK1_UPDATE_ROW(cga_gfx_1bpp_update_row);
POISK1_UPDATE_ROW(poisk1_gfx_1bpp_update_row);
DECLARE_WRITE_LINE_MEMBER(p1_pit8253_out2_changed);
DECLARE_WRITE_LINE_MEMBER(p1_speaker_set_spkrdata);
UINT8 m_p1_spkrdata;
UINT8 m_p1_input;
UINT8 m_kbpoll_mask;
struct
{
UINT8 trap[4];
UINT8 *videoram_base;
UINT8 *videoram;
UINT8 mode_control_6a;
UINT8 color_select_68;
UINT8 palette_lut_2bpp[4];
int stride;
void *update_row(bitmap_rgb32 &bitmap, const rectangle &cliprect, UINT8 *videoram, UINT16 ma, UINT8 ra, UINT8 stride);
} m_video;
DECLARE_READ8_MEMBER(p1_trap_r);
DECLARE_WRITE8_MEMBER(p1_trap_w);
DECLARE_READ8_MEMBER(p1_cga_r);
DECLARE_WRITE8_MEMBER(p1_cga_w);
DECLARE_WRITE8_MEMBER(p1_vram_w);
DECLARE_READ8_MEMBER(p1_ppi_r);
DECLARE_WRITE8_MEMBER(p1_ppi_w);
DECLARE_WRITE8_MEMBER(p1_ppi_porta_w);
DECLARE_READ8_MEMBER(p1_ppi_porta_r);
DECLARE_READ8_MEMBER(p1_ppi_portb_r);
DECLARE_READ8_MEMBER(p1_ppi_portc_r);
DECLARE_WRITE8_MEMBER(p1_ppi_portc_w);
DECLARE_WRITE8_MEMBER(p1_ppi2_porta_w);
DECLARE_WRITE8_MEMBER(p1_ppi2_portb_w);
DECLARE_READ8_MEMBER(p1_ppi2_portc_r);
const char *m_cputag;
};
#endif /* POISK1_H_ */

127
src/mess/machine/genpc.c
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@ -879,3 +879,130 @@ WRITE8_MEMBER( ibm5150_mb_device::pc_ppi_portb_w )
m_ppi_clock_signal = ( m_ppi_keyb_clock ) ? 1 : 0;
m_pc_kbdc->clock_write_from_mb(m_ppi_clock_signal);
}
//**************************************************************************
// GLOBAL VARIABLES
//**************************************************************************
const device_type EC1841_MOTHERBOARD = &device_creator<ec1841_mb_device>;
static MACHINE_CONFIG_FRAGMENT( ec1841_mb_config )
MCFG_FRAGMENT_ADD(ibm5160_mb_config)
MCFG_DEVICE_REMOVE("pc_kbdc")
MCFG_PC_KBDC_ADD("pc_kbdc", pc_kbdc_intf_5150)
MACHINE_CONFIG_END
//-------------------------------------------------
// machine_config_additions - device-specific
// machine configurations
//-------------------------------------------------
machine_config_constructor ec1841_mb_device::device_mconfig_additions() const
{
return MACHINE_CONFIG_NAME( ec1841_mb_config );
}
static INPUT_PORTS_START( ec1841_mb )
PORT_START("DSW0") /* SA1 */
PORT_DIPNAME( 0xc0, 0x40, "Number of floppy drives")
PORT_DIPSETTING( 0x00, "1" )
PORT_DIPSETTING( 0x40, "2" )
PORT_DIPSETTING( 0x80, "3" )
PORT_DIPSETTING( 0xc0, "4" )
PORT_DIPNAME( 0x30, 0x20, "Graphics adapter")
PORT_DIPSETTING( 0x00, "Reserved" )
PORT_DIPSETTING( 0x10, "Color 40x25" )
PORT_DIPSETTING( 0x20, "Color 80x25" )
PORT_DIPSETTING( 0x30, "Monochrome" )
PORT_BIT( 0x08, 0x08, IPT_UNUSED )
/* BIOS does not support booting from QD floppies */
PORT_DIPNAME( 0x04, 0x04, "Floppy type")
PORT_DIPSETTING( 0x00, "80 tracks" )
PORT_DIPSETTING( 0x04, "40 tracks" )
PORT_DIPNAME( 0x02, 0x00, "8087 installed")
PORT_DIPSETTING( 0x00, DEF_STR(No) )
PORT_DIPSETTING( 0x02, DEF_STR(Yes) )
PORT_DIPNAME( 0x01, 0x01, "Boot from floppy")
PORT_DIPSETTING( 0x01, DEF_STR(Yes) )
PORT_DIPSETTING( 0x00, DEF_STR(No) )
PORT_START("SA2")
PORT_DIPNAME( 0x04, 0x04, "Speech synthesizer")
PORT_DIPSETTING( 0x00, "Installed" )
PORT_DIPSETTING( 0x04, "Not installed" )
INPUT_PORTS_END
//-------------------------------------------------
// input_ports - device-specific input ports
//-------------------------------------------------
ioport_constructor ec1841_mb_device::device_input_ports() const
{
return INPUT_PORTS_NAME( ec1841_mb );
}
//**************************************************************************
// LIVE DEVICE
//**************************************************************************
//-------------------------------------------------
// ec1841_mb_device - constructor
//-------------------------------------------------
ec1841_mb_device::ec1841_mb_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: ibm5160_mb_device(mconfig, tag, owner, clock)
{
}
void ec1841_mb_device::device_start()
{
ibm5160_mb_device::device_start();
}
void ec1841_mb_device::device_reset()
{
ibm5160_mb_device::device_reset();
}
// kbd interface is 5150-like but PB2 controls access to second bank of DIP switches (SA2).
WRITE8_MEMBER( ec1841_mb_device::pc_ppi_portb_w )
{
/* KB controller port B */
m_ppi_portb = data;
m_ppi_portc_switch_high = data & 0x04;
m_ppi_keyboard_clear = data & 0x80;
m_ppi_keyb_clock = data & 0x40;
m_pit8253->gate2_w(BIT(data, 0));
pc_speaker_set_spkrdata( data & 0x02 );
/* If PB7 is set clear the shift register and reset the IRQ line */
if ( m_ppi_keyboard_clear )
{
m_ppi_shift_register = 0;
m_ppi_shift_enable = 0;
m_pic8259->ir1_w(m_ppi_shift_enable);
}
m_pc_kbdc->data_write_from_mb(!m_ppi_shift_enable);
m_ppi_clock_signal = ( m_ppi_keyb_clock ) ? 1 : 0;
m_pc_kbdc->clock_write_from_mb(m_ppi_clock_signal);
}
READ8_MEMBER ( ec1841_mb_device::pc_ppi_portc_r )
{
int timer2_output = m_pit8253->get_output(2);
int data=0xff;
data&=~0x80; // no parity error
data&=~0x40; // no error on expansion board
if (m_ppi_portc_switch_high)
{
data = (data & 0xf0) | (ioport("SA2")->read() & 0x0f);
}
data = ( data & ~0x20 ) | ( timer2_output ? 0x20 : 0x00 );
return data;
}

1
src/mess/machine/isa_cards.c
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@ -12,6 +12,7 @@
SLOT_INTERFACE_START( pc_isa8_cards )
SLOT_INTERFACE("mda", ISA8_MDA)
SLOT_INTERFACE("cga", ISA8_CGA)
SLOT_INTERFACE("cga_ec1841", ISA8_EC1841_0002)
SLOT_INTERFACE("ega", ISA8_EGA)
SLOT_INTERFACE("svga_et4k", ISA8_SVGA_ET4K)
SLOT_INTERFACE("com", ISA8_COM)

323
src/mess/machine/isbc_215g.c Normal file
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@ -0,0 +1,323 @@
// license:BSD-3-Clause
// TODO: multibus
#include "isbc_215g.h"
const device_type ISBC_215G = &device_creator<isbc_215g_device>;
isbc_215g_device::isbc_215g_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
device_t(mconfig, ISBC_215G, "ISBC 215G Winchester Disk Controller", tag, owner, clock, "isbc_215g", __FILE__),
m_dmac(*this, "u84"),
m_hdd0(*this, "drive0"),
m_hdd1(*this, "drive1"),
m_out_irq_func(*this)
{
}
void isbc_215g_device::find_sector()
{
//sector id
// 0/6-7: sector type - 0-data, 1-alternate, 2-bad, 3-invalid
// 0/4-5: size - 128<<n
// 0/0-3: cyl high
// 1: cyl low
// 2: head
// 3: sector
UINT16 cyl = ((m_idcompare[0] & 0xf) << 8) | m_idcompare[1];
harddisk_image_device *drive = (m_drive ? m_hdd1 : m_hdd0);
UINT16 bps = 128 << ((m_idcompare[0] >> 4) & 3);
if(!m_geom[m_drive])
return;
if(m_cyl[m_drive] != cyl)
return;
if((m_idcompare[3] != m_head) || (m_head > m_geom[m_drive]->heads))
return;
if(m_idcompare[2] > m_geom[m_drive]->sectors)
return;
if(bps != m_geom[m_drive]->sectorbytes)
return;
if(m_idcompare[0] >> 6)
return;
m_idfound = true;
hard_disk_read(drive->get_hard_disk_file(), (cyl * m_geom[m_drive]->heads + m_head) * m_geom[m_drive]->sectors + m_idcompare[2], m_sector);
m_secoffset = 0;
return;
}
UINT16 isbc_215g_device::read_sector()
{
UINT16 bps = 64 << ((m_idcompare[0] >> 4) & 3);
if(m_secoffset >= bps)
return 0;
return m_sector[m_secoffset++];
}
READ16_MEMBER(isbc_215g_device::io_r)
{
UINT16 data = 0;
switch(offset)
{
case 0x00:
//read status
// 0: gnd
// 1: drive ready
// 2: seek done
// 3: sector sync found
// 4: fault
// 5: bus ack
// 6: sector id not found or bad ecc
// 7: timeout
// 8: sbx 1 present
// 9: sbx 1 int 0
// a: sbx 1 int 1
// b: sbx 1 opt 0
// c: sbx 1 opt 1
// d: illegal req/vendor 2
// e: drive req
// f: index latch
data |= (!m_idfound) << 6;
data |= m_index << 15;
break;
case 0x04:
//read status 2
// 0: sbx 2 present
// 1: sbx 2 int 0
// 2: sbx 2 int 1
// 3: sbx 2 opt 0
// 4: sbx 2 opt 1
// 5: vendor bit 0
// 6: track 0/busy
// 7: wp
data |= (!m_cyl[m_drive]) ? 0 : 0x40;
break;
case 0x08:
//cmd data bus
break;
case 0x0c:
// reset channel 2
if(space.debugger_access()) // reading this is bad
break;
m_dmac->sel_w(1);
m_dmac->ca_w(1);
m_dmac->ca_w(0);
m_dmac->sel_w(0);
break;
case 0x10:
//pit ch 0
break;
case 0x11:
//pit ch 1
break;
case 0x12:
//pit ch 2
break;
case 0x14:
//read buffer
if(m_rdgate && !m_amsrch && m_geom[m_drive])
data = read_sector();
break;
case 0x18:
//vendor bit 1,3-4
data |= 3<<4 | 2;
break;
default:
logerror("isbc_215g: invalid port read 0x80%02x\n", offset*2);
break;
}
return data;
}
WRITE16_MEMBER(isbc_215g_device::io_w)
{
switch(offset)
{
case 0x00:
//control, 0x8002 doesn't set gates or search
// 0: wr gate
// 1: rd gate
// 2: address mark search
// 3: cmd bus enable
// 4: drive sel/head sel 2
// 5: safe/head sel 1
// 6: b ack
// 7: drive reg addr 0/step dir
// 8: drive reg addr 1
// 9: cmd/rd
// a: para/head sel 0
m_wrgate = data & 1;
m_rdgate = (data >> 1) & 1;
m_amsrch = (data >> 2) & 1;
if(m_wrgate && (m_rdgate || m_amsrch))
logerror("isbc_215g: both write gate and read gate and/or address search enabled\n");
else if(m_rdgate && m_amsrch)
find_sector();
else if(m_amsrch)
logerror("isbc_215g: address search without read gate\n");
case 0x01:
m_stepdir = (data & 0x80) ? 0 : 1;
break;
case 0x04:
//clear index and id latch
m_index = false;
m_idfound = false;
break;
case 0x08:
//cmd data bus/head sel
m_head = data & 3;
m_out_irq_func((data & 0x100) ? 1 : 0);
break;
case 0x0c:
//unit select
// 0: step/wr
// 1: sbx 1 opt 0/1
// 2: sbx 2 opt 0/1
// 3: unit select 0
// 4: unit select 1
// 5: extr 2
// 6: format
// 7: format wr gate
m_drive = (data >> 3) & 1; // st406 two drives only
break;
case 0x10:
//pit ch 0
break;
case 0x11:
//pit ch 1
break;
case 0x12:
//pit ch 2
break;
case 0x13:
//pit control
break;
case 0x14:
//write buffer
break;
case 0x18:
//sector id/format
m_idcompare[1] = data & 0xff;
m_idcompare[0] = data >> 8;
break;
case 0x1c:
//sector id low
m_idcompare[3] = data & 0xff;
m_idcompare[2] = data >> 8;
break;
default:
logerror("isbc_215g: invalid port write 0x80%02x\n", offset*2);
break;
}
}
READ16_MEMBER(isbc_215g_device::mem_r)
{
// XXX: hack to permit debugger to disassemble rom
if(space.debugger_access() && (offset < 0x1fff))
return m_dmac->space(AS_IO).read_word_unaligned(offset*2);
switch(offset)
{
case 0x7fffb:
return 1;
case 0x7fffc:
return 0;
case 0x7fffd:
return m_wakeup;
default:
return m_maincpu_mem->read_word_unaligned(offset*2, mem_mask);
}
}
WRITE16_MEMBER(isbc_215g_device::mem_w)
{
m_maincpu_mem->write_word_unaligned(offset*2, data, mem_mask);
}
static ADDRESS_MAP_START(isbc_215g_mem, AS_PROGRAM, 16, isbc_215g_device)
AM_RANGE(0x00000, 0xfffff) AM_READWRITE(mem_r, mem_w)
ADDRESS_MAP_END
static ADDRESS_MAP_START(isbc_215g_io, AS_IO, 16, isbc_215g_device)
AM_RANGE(0x0000, 0x3fff) AM_ROM AM_REGION("i8089", 0)
AM_RANGE(0x4000, 0x47ff) AM_MIRROR(0x3800) AM_RAM
AM_RANGE(0x8000, 0x8039) AM_MIRROR(0x3fc0) AM_READWRITE(io_r, io_w)
AM_RANGE(0xc070, 0xc08f) AM_DEVREADWRITE8("sbx1", isbx_slot_device, mcs0_r, mcs0_w, 0x00ff)
AM_RANGE(0xc0b0, 0xc0bf) AM_DEVREADWRITE8("sbx1", isbx_slot_device, mcs1_r, mcs1_w, 0x00ff)
AM_RANGE(0xc0d0, 0xc0df) AM_DEVREADWRITE8("sbx2", isbx_slot_device, mcs0_r, mcs0_w, 0x00ff)
AM_RANGE(0xc0e0, 0xc0ef) AM_DEVREADWRITE8("sbx2", isbx_slot_device, mcs1_r, mcs1_w, 0x00ff)
ADDRESS_MAP_END
static MACHINE_CONFIG_FRAGMENT( isbc_215g )
MCFG_CPU_ADD("u84", I8089, XTAL_15MHz / 3)
MCFG_CPU_PROGRAM_MAP(isbc_215g_mem)
MCFG_CPU_IO_MAP(isbc_215g_io)
MCFG_I8089_DATABUS_WIDTH(16)
MCFG_HARDDISK_ADD("drive0")
MCFG_HARDDISK_ADD("drive1")
MCFG_ISBX_SLOT_ADD("sbx1", 0, isbx_cards, NULL)
MCFG_ISBX_SLOT_ADD("sbx2", 0, isbx_cards, NULL)
MACHINE_CONFIG_END
machine_config_constructor isbc_215g_device::device_mconfig_additions() const
{
return MACHINE_CONFIG_NAME( isbc_215g );
}
ROM_START( isbc_215g )
ROM_REGION( 0x4000, "i8089", ROMREGION_ERASEFF )
ROM_LOAD16_BYTE( "174581.001.bin", 0x0000, 0x2000, CRC(ccdbc7ab) SHA1(5c2ebdde1b0252124177221ba9cacdb6d925a24d))
ROM_LOAD16_BYTE( "174581.002.bin", 0x0001, 0x2000, CRC(6190fa67) SHA1(295dd4e75f699aaf93227cc4876cee8accae383a))
ROM_END
const rom_entry *isbc_215g_device::device_rom_region() const
{
return ROM_NAME( isbc_215g );
}
void isbc_215g_device::device_reset()
{
if(m_hdd0->get_hard_disk_file())
m_geom[0] = hard_disk_get_info(m_hdd0->get_hard_disk_file());
else
m_geom[0] = 0;
if(m_hdd1->get_hard_disk_file())
m_geom[1] = hard_disk_get_info(m_hdd1->get_hard_disk_file());
else
m_geom[1] = 0;
}
void isbc_215g_device::device_start()
{
m_maincpu_mem = &machine().device<cpu_device>(m_maincpu_tag)->space(AS_PROGRAM);
m_cyl[0] = m_cyl[1] = 0;
m_idcompare[0] = m_idcompare[1] = m_idcompare[2] = m_idcompare[3] = 0;
m_index = false;
m_idfound = false;
m_drive = 0;
m_head = 0;
m_stepdir = false;
m_out_irq_func.resolve_safe();
}
WRITE8_MEMBER(isbc_215g_device::write)
{
if(!offset)
{
if(!data && (m_reset == 2))
m_dmac->reset();
m_out_irq_func(0);
m_dmac->ca_w(data != 2);
m_dmac->ca_w(0);
m_reset = data;
}
}

63
src/mess/machine/isbc_215g.h Normal file
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@ -0,0 +1,63 @@
// license:BSD-3-Clause
#ifndef ISBC_215G_H_
#define ISBC_215G_H_
#include "emu.h"
#include "cpu/i8089/i8089.h"
#include "bus/isbx/isbx.h"
#include "imagedev/harddriv.h"
class isbc_215g_device : public device_t
{
public:
isbc_215g_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
virtual machine_config_constructor device_mconfig_additions() const;
const rom_entry *device_rom_region() const;
DECLARE_WRITE8_MEMBER(write);
DECLARE_READ16_MEMBER(io_r);
DECLARE_WRITE16_MEMBER(io_w);
DECLARE_READ16_MEMBER(mem_r);
DECLARE_WRITE16_MEMBER(mem_w);
static void static_set_wakeup_addr(device_t &device, UINT32 wakeup) { downcast<isbc_215g_device &>(device).m_wakeup = wakeup; }
static void static_set_maincpu_tag(device_t &device, const char *maincpu_tag) { downcast<isbc_215g_device &>(device).m_maincpu_tag = maincpu_tag; }
template<class _Object> static devcb2_base &static_set_irq_callback(device_t &device, _Object object) { return downcast<isbc_215g_device &>(device).m_out_irq_func.set_callback(object); }
protected:
virtual void device_start();
virtual void device_reset();
private:
void find_sector();
UINT16 read_sector();
required_device<i8089_device> m_dmac;
required_device<harddisk_image_device> m_hdd0;
required_device<harddisk_image_device> m_hdd1;
devcb2_write_line m_out_irq_func;
int m_reset;
UINT16 m_wakeup, m_secoffset, m_sector[512];
const char *m_maincpu_tag;
address_space *m_maincpu_mem;
UINT16 m_cyl[2];
UINT8 m_idcompare[4], m_drive, m_head;
bool m_idfound, m_index, m_stepdir, m_wrgate, m_rdgate, m_amsrch;
const struct hard_disk_info* m_geom[2];
};
#define MCFG_ISBC_215_ADD(_tag, _wakeup, _maincpu_tag) \
MCFG_DEVICE_ADD(_tag, ISBC_215G, 0) \
isbc_215g_device::static_set_wakeup_addr(*device, _wakeup); \
isbc_215g_device::static_set_maincpu_tag(*device, _maincpu_tag);
#define MCFG_ISBC_215_IRQ(_irq_line) \
devcb = &isbc_215g_device::static_set_irq_callback(*device, DEVCB2_##_irq_line);
extern const device_type ISBC_215G;
#endif /* ISBC_215G_H_ */

250
src/mess/machine/kb_poisk1.h Normal file
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@ -0,0 +1,250 @@
/*
* Poisk-1 keyboard
*
* F4 - toggles key click
* RCtrl - toggles Latin/Cyrillic layout
* Keypad / - Pause key
* F11 - XXX
* F12 - XXX
*/
INPUT_PORTS_START( poisk1_keyboard_v89 )
PORT_START("Y1")
PORT_BIT( 0x001, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_CLOSEBRACE) PORT_CHAR(']') PORT_CHAR('}') // 0x55
PORT_BIT( 0x002, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Keypad 5") PORT_CODE(KEYCODE_5_PAD)
PORT_BIT( 0x004, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x008, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("?56?") // 0x56
PORT_BIT( 0x010, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_SLASH) PORT_CHAR('/') PORT_CHAR('?')
PORT_BIT( 0x020, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Enter") PORT_CODE(KEYCODE_ENTER) PORT_CHAR('\r')
PORT_BIT( 0x040, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Keypad 8") PORT_CODE(KEYCODE_8_PAD) PORT_CODE(KEYCODE_UP)
PORT_BIT( 0x080, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Keypad 2") PORT_CODE(KEYCODE_2_PAD) PORT_CODE(KEYCODE_DOWN)
/*-12*/ PORT_BIT( 0x100, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("?-12 - ?") /* PORT_CODE(KEYCODE_SLASH) PORT_CHAR('?') PORT_CHAR('/') */
PORT_BIT( 0x200, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_O) PORT_CHAR('o') PORT_CHAR('O')
/*-11*/ PORT_BIT( 0x400, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("?-11 - %") /* PORT_CODE(KEYCODE_5) PORT_CHAR('5') PORT_CHAR('%') */
PORT_BIT( 0x800, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("F11") PORT_CODE(KEYCODE_F11) PORT_CHAR(UCHAR_MAMEKEY(F11))
PORT_START("Y2")
/*-15*/ PORT_BIT( 0x001, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("?-15 - !") /* PORT_CODE(KEYCODE_1) PORT_CHAR('!') PORT_CHAR('1') */
PORT_BIT( 0x002, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Keypad 4") PORT_CODE(KEYCODE_4_PAD) PORT_CODE(KEYCODE_LEFT)
PORT_BIT( 0x004, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Keypad 0") PORT_CODE(KEYCODE_0_PAD) PORT_CODE(KEYCODE_INSERT) /* ??? */
PORT_BIT( 0x008, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("F7") PORT_CODE(KEYCODE_F7) PORT_CHAR(UCHAR_MAMEKEY(F7))
/*-13*/ PORT_BIT( 0x010, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("?-13 - ;") /* PORT_CODE(KEYCODE_COLON) PORT_CHAR(';') PORT_CHAR(':') */
PORT_BIT( 0x020, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME(UTF8_LEFT) PORT_CODE(KEYCODE_BACKSPACE)
PORT_BIT( 0x040, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Keypad 7") PORT_CODE(KEYCODE_7_PAD) PORT_CODE(KEYCODE_HOME)
PORT_BIT( 0x080, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Keypad 1") PORT_CODE(KEYCODE_1_PAD) PORT_CODE(KEYCODE_END)
/*-2*/ PORT_BIT( 0x100, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("?-2 - .") /* PORT_CODE(KEYCODE_STOP) PORT_CHAR('.') PORT_CHAR('>') */
/*-3*/ PORT_BIT( 0x200, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("?-3 - _") /* PORT_CODE(KEYCODE_MINUS) PORT_CHAR('-') PORT_CHAR('_') */
PORT_BIT( 0x400, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_P) PORT_CHAR('p') PORT_CHAR('P')
PORT_BIT( 0x800, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_OPENBRACE) PORT_CHAR('[') PORT_CHAR('{') // 0x54
PORT_START("Y3")
PORT_BIT( 0x001, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_F) PORT_CHAR('f') PORT_CHAR('F')
PORT_BIT( 0x002, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Keypad 9") PORT_CODE(KEYCODE_9_PAD) PORT_CODE(KEYCODE_PGUP)
PORT_BIT( 0x004, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Keypad 3") PORT_CODE(KEYCODE_3_PAD) PORT_CODE(KEYCODE_PGDN)
PORT_BIT( 0x008, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_N) PORT_CHAR('n') PORT_CHAR('N')
PORT_BIT( 0x010, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_D) PORT_CHAR('d') PORT_CHAR('D')
PORT_BIT( 0x020, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_S) PORT_CHAR('s') PORT_CHAR('S')
PORT_BIT( 0x040, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_Z) PORT_CHAR('z') PORT_CHAR('Z')
PORT_BIT( 0x080, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x100, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_M) PORT_CHAR('m') PORT_CHAR('M')
PORT_BIT( 0x200, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_K) PORT_CHAR('k') PORT_CHAR('K')
PORT_BIT( 0x400, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_B) PORT_CHAR('b') PORT_CHAR('B')
PORT_BIT( 0x800, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_G) PORT_CHAR('g') PORT_CHAR('G')
PORT_START("Y4")
PORT_BIT( 0x001, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("F3") PORT_CODE(KEYCODE_F3) PORT_CHAR(UCHAR_MAMEKEY(F3))
PORT_BIT( 0x002, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x004, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x008, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("F6") PORT_CODE(KEYCODE_F6) PORT_CHAR(UCHAR_MAMEKEY(F6))
PORT_BIT( 0x010, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("F2") PORT_CODE(KEYCODE_F2) PORT_CHAR(UCHAR_MAMEKEY(F2))
PORT_BIT( 0x020, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("F1") PORT_CODE(KEYCODE_F1) PORT_CHAR(UCHAR_MAMEKEY(F1))
/*-1*/ PORT_BIT( 0x040, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("?-1 - *") /* PORT_CODE(KEYCODE_8) PORT_CHAR('*') PORT_CHAR('8') */
PORT_BIT( 0x080, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Esc") PORT_CODE(KEYCODE_ESC) PORT_CHAR(UCHAR_MAMEKEY(ESC)) /* ??2 */
/*-9*/ PORT_BIT( 0x100, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("?-9 - :") /* PORT_CODE(KEYCODE_COLON) PORT_CHAR(';') PORT_CHAR(':') */
/*-10*/ PORT_BIT( 0x200, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("?-10 - ,") /* PORT_CODE(KEYCODE_COMMA) PORT_CHAR(',') PORT_CHAR('<') */
PORT_BIT( 0x400, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("F5") PORT_CODE(KEYCODE_F5) PORT_CHAR(UCHAR_MAMEKEY(F5))
PORT_BIT( 0x800, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("F4") PORT_CODE(KEYCODE_F4) PORT_CHAR(UCHAR_MAMEKEY(F4))
PORT_START("Y5")
PORT_BIT( 0x001, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_E) PORT_CHAR('e') PORT_CHAR('E')
PORT_BIT( 0x002, IP_ACTIVE_LOW, IPT_UNUSED )
/*?*/ PORT_BIT( 0x004, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Ctrl") PORT_CODE(KEYCODE_RCONTROL) PORT_CHAR(UCHAR_MAMEKEY(RCONTROL))
PORT_BIT( 0x008, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_H) PORT_CHAR('h') PORT_CHAR('H')
PORT_BIT( 0x010, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_W) PORT_CHAR('w') PORT_CHAR('W')
PORT_BIT( 0x020, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_Q) PORT_CHAR('q') PORT_CHAR('Q')
PORT_BIT( 0x040, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_A) PORT_CHAR('a') PORT_CHAR('A')
PORT_BIT( 0x080, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Caps Lock") PORT_CODE(KEYCODE_CAPSLOCK) PORT_CHAR(UCHAR_MAMEKEY(CAPSLOCK)) /* ???? */
PORT_BIT( 0x100, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_J) PORT_CHAR('j') PORT_CHAR('J')
PORT_BIT( 0x200, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_I) PORT_CHAR('i') PORT_CHAR('I')
PORT_BIT( 0x400, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_T) PORT_CHAR('t') PORT_CHAR('T')
PORT_BIT( 0x800, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_R) PORT_CHAR('r') PORT_CHAR('R')
PORT_START("Y6")
PORT_BIT( 0x001, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Left Shift") PORT_CODE(KEYCODE_LSHIFT) PORT_CHAR(UCHAR_SHIFT_1)
PORT_BIT( 0x002, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Keypad *") PORT_CODE(KEYCODE_ASTERISK) PORT_CHAR(UCHAR_MAMEKEY(ASTERISK))
/*?*/ PORT_BIT( 0x004, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Alt") PORT_CODE(KEYCODE_RALT)
PORT_BIT( 0x008, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_C) PORT_CHAR('c') PORT_CHAR('C')
PORT_BIT( 0x010, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_X) PORT_CHAR('x') PORT_CHAR('X')
PORT_BIT( 0x020, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("?dc?") // 0xdc = SHIFT2
PORT_BIT( 0x040, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Rus/Lat") PORT_CODE(KEYCODE_RALT) // 0xdb = Rus/Lat
PORT_BIT( 0x080, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Right Shift") PORT_CODE(KEYCODE_RSHIFT) PORT_CHAR(UCHAR_SHIFT_1)
PORT_BIT( 0x100, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("F12") PORT_CODE(KEYCODE_F12) PORT_CHAR(UCHAR_MAMEKEY(F12))
PORT_BIT( 0x200, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("?59?") // 0x59
PORT_BIT( 0x400, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_V) PORT_CHAR('v') PORT_CHAR('V')
PORT_BIT( 0x800, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Space") PORT_CODE(KEYCODE_SPACE) PORT_CHAR(' ')
PORT_START("Y7")
PORT_BIT( 0x001, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x002, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("NumLock") PORT_CODE(KEYCODE_NUMLOCK)
PORT_BIT( 0x004, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Keypad . Del") PORT_CODE(KEYCODE_DEL_PAD) PORT_CHAR(UCHAR_MAMEKEY(DEL_PAD))
PORT_BIT( 0x008, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x010, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_COLON) PORT_CHAR(';') PORT_CHAR(':')
PORT_BIT( 0x020, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("F10") PORT_CODE(KEYCODE_F10) PORT_CHAR(UCHAR_MAMEKEY(F10))
PORT_BIT( 0x040, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Keypad +") PORT_CODE(KEYCODE_PLUS_PAD)
PORT_BIT( 0x080, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Keypad 6") PORT_CODE(KEYCODE_6_PAD) PORT_CODE(KEYCODE_RIGHT)
PORT_BIT( 0x100, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_L) PORT_CHAR('l') PORT_CHAR('L')
PORT_BIT( 0x200, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("F8") PORT_CODE(KEYCODE_F8) PORT_CHAR(UCHAR_MAMEKEY(F8))
PORT_BIT( 0x400, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("?5a?") // 0x5a
PORT_BIT( 0x800, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("F9") PORT_CODE(KEYCODE_F9) PORT_CHAR(UCHAR_MAMEKEY(F9))
PORT_START("Y8")
/*-6*/ PORT_BIT( 0x001, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("?-6 - -") /* PORT_CODE(KEYCODE_MINUS) PORT_CHAR('-') PORT_CHAR('_') */
PORT_BIT( 0x002, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Keypad -") PORT_CODE(KEYCODE_MINUS_PAD)
PORT_BIT( 0x004, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Tab") PORT_CODE(KEYCODE_TAB) PORT_CHAR('\t') /* ??? */
PORT_BIT( 0x008, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_Y) PORT_CHAR('y') PORT_CHAR('Y')
/*-7*/ PORT_BIT( 0x010, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("?-7 - )") /* PORT_CODE(KEYCODE_0) PORT_CHAR(')') PORT_CHAR('0') */
PORT_BIT( 0x020, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Scroll Lock")
/*-4*/ PORT_BIT( 0x040, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("?-4 - (") /* PORT_CODE(KEYCODE_9) PORT_CHAR('(') PORT_CHAR('9') */
PORT_BIT( 0x080, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_BACKSLASH) PORT_CHAR('\\') PORT_CHAR('|')
PORT_BIT( 0x100, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x200, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_U) PORT_CHAR('u') PORT_CHAR('U')
/*-5*/ PORT_BIT( 0x400, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("?-5 - \"") /* PORT_CODE(KEYCODE_QUOTE) PORT_CHAR('"') PORT_CHAR('\'') */
/*-8*/ PORT_BIT( 0x800, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("?-8 - /") /* PORT_CODE(KEYCODE_SLASH) PORT_CHAR('/') PORT_CHAR('?') */
#if 0
PORT_BIT( 0x004, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Delete") PORT_CODE(KEYCODE_DEL_PAD)
PORT_BIT( 0x800, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("* PrtSc") PORT_CODE(KEYCODE_PRTSCR)
PORT_BIT( 0x002, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_2) PORT_CHAR('2') PORT_CHAR('@')
PORT_BIT( 0x000, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_3) PORT_CHAR('3') PORT_CHAR('#')
PORT_BIT( 0x200, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_4) PORT_CHAR('4') PORT_CHAR('$')
PORT_BIT( 0x000, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_6) PORT_CHAR('6') PORT_CHAR('^')
PORT_BIT( 0x200, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_7) PORT_CHAR('7') PORT_CHAR('&')
PORT_BIT( 0x000, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_TILDE) PORT_CHAR('`') PORT_CHAR('~')
PORT_BIT( 0x000, IP_ACTIVE_LOW, IPT_KEYBOARD )
#endif
INPUT_PORTS_END
INPUT_PORTS_START( poisk1_keyboard_v91 )
PORT_START("Y1")
PORT_BIT( 0x001, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_CLOSEBRACE) PORT_CHAR(']') PORT_CHAR('}')
PORT_BIT( 0x002, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Keypad 5") PORT_CODE(KEYCODE_5_PAD)
PORT_BIT( 0x004, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x008, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME(";") PORT_CODE(KEYCODE_COLON) PORT_CHAR(';') PORT_CHAR(':')
PORT_BIT( 0x010, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("+ / CYRILLIC YO") PORT_CODE(KEYCODE_PLUS_PAD)
PORT_BIT( 0x020, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Enter") PORT_CODE(KEYCODE_ENTER) PORT_CHAR('\r')
PORT_BIT( 0x040, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Keypad 8") PORT_CODE(KEYCODE_8_PAD) PORT_CODE(KEYCODE_UP)
PORT_BIT( 0x080, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Keypad 2") PORT_CODE(KEYCODE_2_PAD) PORT_CODE(KEYCODE_DOWN)
PORT_BIT( 0x100, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME(")") PORT_CODE(KEYCODE_0) PORT_CHAR('0') PORT_CHAR(')')
PORT_BIT( 0x200, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_O) PORT_CHAR('o') PORT_CHAR('O')
PORT_BIT( 0x400, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("-") PORT_CODE(KEYCODE_MINUS) PORT_CHAR('-') PORT_CHAR('_')
PORT_BIT( 0x800, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("'") PORT_CODE(KEYCODE_QUOTE) PORT_CHAR('\'') PORT_CHAR('"')
PORT_START("Y2")
PORT_BIT( 0x001, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_EQUALS) PORT_CHAR('=') PORT_CHAR('+')
PORT_BIT( 0x002, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Keypad 4") PORT_CODE(KEYCODE_4_PAD) PORT_CODE(KEYCODE_LEFT)
PORT_BIT( 0x004, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Keypad 0") PORT_CODE(KEYCODE_0_PAD) PORT_CODE(KEYCODE_INSERT)
PORT_BIT( 0x008, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("F6") PORT_CODE(KEYCODE_F6) PORT_CHAR(UCHAR_MAMEKEY(F6))
PORT_BIT( 0x010, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_BACKSLASH) PORT_CHAR('\\') PORT_CHAR('|')
PORT_BIT( 0x020, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME(UTF8_LEFT) PORT_CODE(KEYCODE_BACKSPACE)
PORT_BIT( 0x040, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Keypad 7") PORT_CODE(KEYCODE_7_PAD) PORT_CODE(KEYCODE_HOME)
PORT_BIT( 0x080, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Keypad 1") PORT_CODE(KEYCODE_1_PAD) PORT_CODE(KEYCODE_END)
PORT_BIT( 0x100, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("*") PORT_CODE(KEYCODE_8) PORT_CHAR('8') PORT_CHAR('*')
PORT_BIT( 0x200, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("(") PORT_CODE(KEYCODE_9) PORT_CHAR('9') PORT_CHAR('(')
PORT_BIT( 0x400, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_P) PORT_CHAR('p') PORT_CHAR('P')
PORT_BIT( 0x800, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_OPENBRACE) PORT_CHAR('[') PORT_CHAR('{')
PORT_START("Y3")
PORT_BIT( 0x001, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_F) PORT_CHAR('f') PORT_CHAR('F')
PORT_BIT( 0x002, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Keypad 9") PORT_CODE(KEYCODE_9_PAD) PORT_CODE(KEYCODE_PGUP)
PORT_BIT( 0x004, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Keypad 3") PORT_CODE(KEYCODE_3_PAD) PORT_CODE(KEYCODE_PGDN)
PORT_BIT( 0x008, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_N) PORT_CHAR('n') PORT_CHAR('N')
PORT_BIT( 0x010, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_D) PORT_CHAR('d') PORT_CHAR('D')
PORT_BIT( 0x020, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_S) PORT_CHAR('s') PORT_CHAR('S')
PORT_BIT( 0x040, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_Z) PORT_CHAR('z') PORT_CHAR('Z')
PORT_BIT( 0x080, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x100, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_M) PORT_CHAR('m') PORT_CHAR('M')
PORT_BIT( 0x200, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_K) PORT_CHAR('k') PORT_CHAR('K')
PORT_BIT( 0x400, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_B) PORT_CHAR('b') PORT_CHAR('B')
PORT_BIT( 0x800, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_G) PORT_CHAR('g') PORT_CHAR('G')
PORT_START("Y4")
PORT_BIT( 0x001, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("F2") PORT_CODE(KEYCODE_F2) PORT_CHAR(UCHAR_MAMEKEY(F2))
PORT_BIT( 0x002, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x004, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x008, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("F5") PORT_CODE(KEYCODE_F5) PORT_CHAR(UCHAR_MAMEKEY(F5))
PORT_BIT( 0x010, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("F1") PORT_CODE(KEYCODE_F1) PORT_CHAR(UCHAR_MAMEKEY(F1))
PORT_BIT( 0x020, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Esc") PORT_CODE(KEYCODE_ESC) PORT_CHAR(UCHAR_MAMEKEY(ESC))
PORT_BIT( 0x040, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_TILDE) PORT_CHAR('`') PORT_CHAR('~')
PORT_BIT( 0x080, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Pause") PORT_CODE(KEYCODE_SLASH_PAD) PORT_CHAR(UCHAR_MAMEKEY(SLASH_PAD))
PORT_BIT( 0x100, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_6) PORT_CHAR('6') PORT_CHAR('^')
PORT_BIT( 0x200, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_7) PORT_CHAR('7') PORT_CHAR('&')
PORT_BIT( 0x400, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("F4") PORT_CODE(KEYCODE_F4) PORT_CHAR(UCHAR_MAMEKEY(F4))
PORT_BIT( 0x800, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("F3") PORT_CODE(KEYCODE_F3) PORT_CHAR(UCHAR_MAMEKEY(F3))
PORT_START("Y5")
PORT_BIT( 0x001, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_E) PORT_CHAR('e') PORT_CHAR('E')
PORT_BIT( 0x002, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x004, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Caps Lock") PORT_CODE(KEYCODE_CAPSLOCK) PORT_CHAR(UCHAR_MAMEKEY(CAPSLOCK))
PORT_BIT( 0x008, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_H) PORT_CHAR('h') PORT_CHAR('H')
PORT_BIT( 0x010, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_W) PORT_CHAR('w') PORT_CHAR('W')
PORT_BIT( 0x020, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_Q) PORT_CHAR('q') PORT_CHAR('Q')
PORT_BIT( 0x040, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_A) PORT_CHAR('a') PORT_CHAR('A')
PORT_BIT( 0x080, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("UKRAINIAN XXX") PORT_CODE(KEYCODE_F12) PORT_CHAR(UCHAR_MAMEKEY(F12))
PORT_BIT( 0x100, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_J) PORT_CHAR('j') PORT_CHAR('J')
PORT_BIT( 0x200, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_I) PORT_CHAR('i') PORT_CHAR('I')
PORT_BIT( 0x400, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_T) PORT_CHAR('t') PORT_CHAR('T')
PORT_BIT( 0x800, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_R) PORT_CHAR('r') PORT_CHAR('R')
PORT_START("Y6")
PORT_BIT( 0x001, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Left Shift") PORT_CODE(KEYCODE_LSHIFT) PORT_CHAR(UCHAR_SHIFT_1)
PORT_BIT( 0x002, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Right Ctrl/Cyril") PORT_CODE(KEYCODE_RCONTROL) PORT_CHAR(UCHAR_MAMEKEY(RCONTROL))
PORT_BIT( 0x004, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Left Ctrl") PORT_CODE(KEYCODE_LCONTROL) PORT_CHAR(UCHAR_MAMEKEY(LCONTROL))
PORT_BIT( 0x008, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_C) PORT_CHAR('c') PORT_CHAR('C')
PORT_BIT( 0x010, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_X) PORT_CHAR('x') PORT_CHAR('X')
PORT_BIT( 0x020, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Left Alt") PORT_CODE(KEYCODE_LALT)
PORT_BIT( 0x040, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Right Alt") PORT_CODE(KEYCODE_RALT)
PORT_BIT( 0x080, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Right Shift") PORT_CODE(KEYCODE_RSHIFT) PORT_CHAR(UCHAR_SHIFT_1)
PORT_BIT( 0x100, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME(".") PORT_CODE(KEYCODE_STOP) PORT_CHAR('.') PORT_CHAR('>')
PORT_BIT( 0x200, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME(",") PORT_CODE(KEYCODE_COMMA) PORT_CHAR(',') PORT_CHAR('<')
PORT_BIT( 0x400, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_V) PORT_CHAR('v') PORT_CHAR('V')
PORT_BIT( 0x800, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Space") PORT_CODE(KEYCODE_SPACE) PORT_CHAR(' ')
PORT_START("Y7")
PORT_BIT( 0x001, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x002, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("NumLock") PORT_CODE(KEYCODE_NUMLOCK)
PORT_BIT( 0x004, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Keypad . Del") PORT_CODE(KEYCODE_DEL_PAD) PORT_CHAR(UCHAR_MAMEKEY(DEL_PAD))
PORT_BIT( 0x008, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x010, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("- / UKRAINIAN XXX") PORT_CODE(KEYCODE_MINUS_PAD)
PORT_BIT( 0x020, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("F9") PORT_CODE(KEYCODE_F9) PORT_CHAR(UCHAR_MAMEKEY(F9))
PORT_BIT( 0x040, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Scroll Lock")
PORT_BIT( 0x080, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Keypad 6") PORT_CODE(KEYCODE_6_PAD) PORT_CODE(KEYCODE_RIGHT)
PORT_BIT( 0x100, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_L) PORT_CHAR('l') PORT_CHAR('L')
PORT_BIT( 0x200, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("F7") PORT_CODE(KEYCODE_F7) PORT_CHAR(UCHAR_MAMEKEY(F7))
PORT_BIT( 0x400, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("/") PORT_CODE(KEYCODE_SLASH) PORT_CHAR('/') PORT_CHAR('?')
PORT_BIT( 0x800, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("F8") PORT_CODE(KEYCODE_F8) PORT_CHAR(UCHAR_MAMEKEY(F8))
PORT_START("Y8")
PORT_BIT( 0x001, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_3) PORT_CHAR('3') PORT_CHAR('#')
PORT_BIT( 0x002, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("* PrtSc") PORT_CODE(KEYCODE_ASTERISK) PORT_CHAR(UCHAR_MAMEKEY(ASTERISK))
PORT_BIT( 0x004, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Tab") PORT_CODE(KEYCODE_TAB) PORT_CHAR('\t') /* ??? */
PORT_BIT( 0x008, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_Y) PORT_CHAR('y') PORT_CHAR('Y')
PORT_BIT( 0x010, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_2) PORT_CHAR('2') PORT_CHAR('@')
PORT_BIT( 0x020, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("F10") PORT_CODE(KEYCODE_F10) PORT_CHAR(UCHAR_MAMEKEY(F10))
PORT_BIT( 0x040, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("!") PORT_CODE(KEYCODE_1) PORT_CHAR('!') PORT_CHAR('1')
PORT_BIT( 0x080, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("UKRAINIAN XXX") PORT_CODE(KEYCODE_F11) PORT_CHAR(UCHAR_MAMEKEY(F11))
PORT_BIT( 0x100, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x200, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_U) PORT_CHAR('u') PORT_CHAR('U')
PORT_BIT( 0x400, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("%") PORT_CODE(KEYCODE_5) PORT_CHAR('5') PORT_CHAR('%')
PORT_BIT( 0x800, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_4) PORT_CHAR('4') PORT_CHAR('$')
INPUT_PORTS_END

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// license:BSD-3-Clause
// copyright-holders:XXX
/**********************************************************************
Electronika MC 1502 FDC device
Copyright MESS Team.
Visit http://mamedev.org for licensing and usage restrictions.
**********************************************************************/
#include "mc1502_fdc.h"
#include "cpu/i86/i86.h"
#include "formats/dsk_dsk.h"
#include "formats/pc_dsk.h"
#define VERBOSE_DBG 0
#define DBG_LOG(N,M,A) \
do { \
if(VERBOSE_DBG>=N) \
{ \
if( M ) \
logerror("%11.6f: %-24s",machine().time().as_double(),(char*)M ); \
logerror A; \
} \
} while (0)
//**************************************************************************
// DEVICE DEFINITIONS
//**************************************************************************
const device_type MC1502_FDC = &device_creator<mc1502_fdc_device>;
static DECLARE_READ8_DEVICE_HANDLER(mc1502_FDC_r);
static DECLARE_WRITE8_DEVICE_HANDLER(mc1502_FDC_w);
FLOPPY_FORMATS_MEMBER( mc1502_fdc_device::floppy_formats )
FLOPPY_PC_FORMAT,
FLOPPY_DSK_FORMAT
FLOPPY_FORMATS_END
static SLOT_INTERFACE_START( mc1502_floppies )
SLOT_INTERFACE( "525qd", FLOPPY_525_QD )
SLOT_INTERFACE_END
static MACHINE_CONFIG_FRAGMENT( mc1502_fdc )
MCFG_FD1793x_ADD("fdc", XTAL_16MHz / 16)
MCFG_FLOPPY_DRIVE_ADD("fdc:0", mc1502_floppies, "525qd", mc1502_fdc_device::floppy_formats)
MCFG_FLOPPY_DRIVE_ADD("fdc:1", mc1502_floppies, "525qd", mc1502_fdc_device::floppy_formats)
MACHINE_CONFIG_END
//-------------------------------------------------
// ROM( mc1502_fdc )
//-------------------------------------------------
ROM_START( mc1502_fdc )
ROM_END
//-------------------------------------------------
// machine_config_additions - device-specific
// machine configurations
//-------------------------------------------------
machine_config_constructor mc1502_fdc_device::device_mconfig_additions() const
{
return MACHINE_CONFIG_NAME( mc1502_fdc );
}
//-------------------------------------------------
// rom_region - device-specific ROM region
//-------------------------------------------------
const rom_entry *mc1502_fdc_device::device_rom_region() const
{
return ROM_NAME( mc1502_fdc );
}
//**************************************************************************
// LIVE DEVICE
//**************************************************************************
TIMER_CALLBACK_MEMBER(mc1502_fdc_device::motor_callback)
{
m_fdc->subdevice<floppy_connector>("0")->get_device()->mon_w(ASSERT_LINE);
m_fdc->subdevice<floppy_connector>("1")->get_device()->mon_w(ASSERT_LINE);
motor_on = 0;
}
UINT8 mc1502_fdc_device::mc1502_wd17xx_aux_r()
{
UINT8 data;
data = 0;
return data;
}
void mc1502_fdc_device::mc1502_wd17xx_aux_w(UINT8 data)
{
floppy_image_device *floppy0 = m_fdc->subdevice<floppy_connector>("0")->get_device();
floppy_image_device *floppy1 = m_fdc->subdevice<floppy_connector>("1")->get_device();
floppy_image_device *floppy = ((data & 0x10)?floppy1:floppy0);
// master reset
if((data & 1) == 0)
m_fdc->reset();
m_fdc->set_floppy(floppy);
// SIDE ONE
floppy->ss_w((data & 2)?1:0);
// bits 2, 3 -- motor on (drive 0, 1)
floppy0->mon_w(!(data & 4));
floppy1->mon_w(!(data & 8));
if (data & 12) {
motor_timer->adjust(attotime::from_msec( 3000 ));
motor_on = 1;
}
}
/*
* Accesses to this port block (halt the CPU until DRQ, INTRQ or MOTOR ON)
*/
UINT8 mc1502_fdc_device::mc1502_wd17xx_drq_r()
{
cpu_device *maincpu = machine().device<cpu_device>("maincpu");
if (!m_fdc->drq_r() && !m_fdc->intrq_r()) {
// fake cpu wait by resetting PC one insn back
maincpu->set_state_int(I8086_IP, maincpu->state_int(I8086_IP) - 1);
maincpu->set_input_line(INPUT_LINE_HALT, ASSERT_LINE);
}
return m_fdc->drq_r();
}
UINT8 mc1502_fdc_device::mc1502_wd17xx_motor_r()
{
return motor_on;
}
void mc1502_fdc_device::mc1502_fdc_irq_drq(bool state)
{
cpu_device *maincpu = machine().device<cpu_device>("maincpu");
if(state)
maincpu->set_input_line(INPUT_LINE_HALT, CLEAR_LINE);
}
static READ8_DEVICE_HANDLER( mc1502_FDC_r )
{
UINT8 data = 0xff;
mc1502_fdc_device *fdc = downcast<mc1502_fdc_device *>(device);
switch( offset )
{
case 0: data = fdc->mc1502_wd17xx_aux_r(); break;
case 8: data = fdc->mc1502_wd17xx_drq_r(); break;
case 10: data = fdc->mc1502_wd17xx_motor_r(); break;
}
return data;
}
static WRITE8_DEVICE_HANDLER( mc1502_FDC_w )
{
mc1502_fdc_device *fdc = downcast<mc1502_fdc_device *>(device);
switch( offset )
{
case 0: fdc->mc1502_wd17xx_aux_w(data); break;
}
}
//-------------------------------------------------
// mc1502_fdc_device - constructor
//-------------------------------------------------
mc1502_fdc_device::mc1502_fdc_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
device_t(mconfig, MC1502_FDC, "MC-1502 floppy", tag, owner, clock, "mc1502_fdc", __FILE__),
device_isa8_card_interface( mconfig, *this ),
m_fdc(*this, "fdc")
{
}
#if 0
AM_RANGE(0x004c, 0x004c) AM_READWRITE(mc1502_wd17xx_aux_r, mc1502_wd17xx_aux_w)
AM_RANGE(0x004d, 0x004d) AM_READ(mc1502_wd17xx_motor_r)
AM_RANGE(0x004e, 0x004e) AM_READ(mc1502_wd17xx_drq_r) // blocking read!
AM_RANGE(0x0048, 0x004b) AM_DEVREADWRITE("vg93", fd1793_t, read, write)
AM_RANGE(0x0100, 0x0100) AM_READWRITE(mc1502_wd17xx_aux_r, mc1502_wd17xx_aux_w)
AM_RANGE(0x0108, 0x0108) AM_READ(mc1502_wd17xx_drq_r) // blocking read!
AM_RANGE(0x010a, 0x010a) AM_READ(mc1502_wd17xx_motor_r)
AM_RANGE(0x010c, 0x010f) AM_DEVREADWRITE("vg93", fd1793_t, read, write)
#endif
//-------------------------------------------------
// device_start - device-specific startup
//-------------------------------------------------
void mc1502_fdc_device::device_start()
{
set_isa_device();
// BIOS 5.0, 5.2
m_isa->install_device(0x010c, 0x010f, 0, 0,
READ8_DEVICE_DELEGATE(m_fdc, fd1793_t, read),
WRITE8_DEVICE_DELEGATE(m_fdc, fd1793_t, write) );
m_isa->install_device(this, 0x0100, 0x010b, 0, 0, FUNC(mc1502_FDC_r), FUNC(mc1502_FDC_w) );
// BIOS 5.31, 5.33
/*
m_isa->install_device(0x010c, 0x010f, 0, 0,
READ8_DEVICE_DELEGATE(m_fdc, fd1793_t, read),
WRITE8_DEVICE_DELEGATE(m_fdc, fd1793_t, write) );
m_isa->install_device(this, 0x0100, 0x010b, 0, 0, FUNC(mc1502_FDC_r), FUNC(mc1502_FDC_w) );
*/
m_fdc->setup_drq_cb(fd1793_t::line_cb(FUNC(mc1502_fdc_device::mc1502_fdc_irq_drq), this));
m_fdc->setup_intrq_cb(fd1793_t::line_cb(FUNC(mc1502_fdc_device::mc1502_fdc_irq_drq), this));
motor_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(mc1502_fdc_device::motor_callback),this));
motor_on = 0;
}
//-------------------------------------------------
// device_reset - device-specific reset
//-------------------------------------------------
void mc1502_fdc_device::device_reset()
{
}

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// license:BSD-3-Clause
// copyright-holders:XXX
/**********************************************************************
Electronika MC 1502 FDC device
Copyright MESS Team.
Visit http://mamedev.org for licensing and usage restrictions.
**********************************************************************/
#pragma once
#ifndef __MC1502_FDC__
#define __MC1502_FDC__
#include "emu.h"
#include "imagedev/flopdrv.h"
#include "machine/isa.h"
#include "machine/wd_fdc.h"
//**************************************************************************
// TYPE DEFINITIONS
//**************************************************************************
class mc1502_fdc_device : public device_t,
public device_isa8_card_interface
{
public:
// construction/destruction
mc1502_fdc_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
// optional information overrides
virtual machine_config_constructor device_mconfig_additions() const;
virtual const rom_entry *device_rom_region() const;
DECLARE_FLOPPY_FORMATS( floppy_formats );
TIMER_CALLBACK_MEMBER( motor_callback );
protected:
// device-level overrides
virtual void device_start();
virtual void device_reset();
private:
required_device<fd1793_t> m_fdc;
int motor_on;
emu_timer *motor_timer;
public:
void mc1502_wd17xx_aux_w(UINT8 data);
UINT8 mc1502_wd17xx_aux_r();
UINT8 mc1502_wd17xx_drq_r();
UINT8 mc1502_wd17xx_motor_r();
void mc1502_fdc_irq_drq(bool state);
};
// device type definition
extern const device_type MC1502_FDC;
#endif

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// license:BSD-3-Clause
// copyright-holders:XXX
/**********************************************************************
MC-1502 ROM cartridge device
Copyright MESS Team.
Visit http://mamedev.org for licensing and usage restrictions.
**********************************************************************/
#include "mc1502_rom.h"
//**************************************************************************
// DEVICE DEFINITIONS
//**************************************************************************
const device_type MC1502_ROM = &device_creator<mc1502_rom_device>;
//-------------------------------------------------
// ROM( mc1502_rom )
//-------------------------------------------------
ROM_START( mc1502_rom )
ROM_REGION( 0x8000, "mc1502_rom", 0 )
ROM_LOAD( "basic.rom", 0x00000, 0x8000, CRC(173d69fa) SHA1(003f872e12f00800e22ab6bbc009d36bfde67b9d))
ROM_END
//-------------------------------------------------
// rom_region - device-specific ROM region
//-------------------------------------------------
const rom_entry *mc1502_rom_device::device_rom_region() const
{
return ROM_NAME( mc1502_rom );
}
//**************************************************************************
// LIVE DEVICE
//**************************************************************************
//-------------------------------------------------
// mc1502_rom_device - constructor
//-------------------------------------------------
mc1502_rom_device::mc1502_rom_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
device_t(mconfig, MC1502_ROM, "MC-1502 ROM cart", tag, owner, clock, "mc1502_rom", __FILE__),
device_isa8_card_interface( mconfig, *this )
{
}
//-------------------------------------------------
// device_start - device-specific startup
//-------------------------------------------------
void mc1502_rom_device::device_start()
{
set_isa_device();
m_isa->install_rom(this, 0xe8000, 0xeffff, 0, 0, "XXX", "mc1502_rom");
}
//-------------------------------------------------
// device_reset - device-specific reset
//-------------------------------------------------
void mc1502_rom_device::device_reset()
{
}

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// license:BSD-3-Clause
// copyright-holders:XXX
/**********************************************************************
MC-1502 ROM cartridge device
Copyright MESS Team.
Visit http://mamedev.org for licensing and usage restrictions.
**********************************************************************/
#pragma once
#ifndef __MC1502_ROM__
#define __MC1502_ROM__
#include "emu.h"
#include "machine/isa.h"
//**************************************************************************
// TYPE DEFINITIONS
//**************************************************************************
class mc1502_rom_device : public device_t,
public device_isa8_card_interface
{
public:
// construction/destruction
mc1502_rom_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
// optional information overrides
virtual const rom_entry *device_rom_region() const;
protected:
// device-level overrides
virtual void device_start();
virtual void device_reset();
};
// device type definition
extern const device_type MC1502_ROM;
#endif

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// license:BSD-3-Clause
// copyright-holders:XXX
/**********************************************************************
Poisk-1 FDC device (model B504)
Copyright MESS Team.
Visit http://mamedev.org for licensing and usage restrictions.
**********************************************************************/
#include "p1_fdc.h"
#include "cpu/i86/i86.h"
#include "formats/dsk_dsk.h"
#include "formats/pc_dsk.h"
#define VERBOSE_DBG 0
#define DBG_LOG(N,M,A) \
do { \
if(VERBOSE_DBG>=N) \
{ \
if( M ) \
logerror("%11.6f: %-24s",machine().time().as_double(),(char*)M ); \
logerror A; \
} \
} while (0)
//**************************************************************************
// DEVICE DEFINITIONS
//**************************************************************************
const device_type P1_FDC = &device_creator<p1_fdc_device>;
static DECLARE_READ8_DEVICE_HANDLER(p1_FDC_r);
static DECLARE_WRITE8_DEVICE_HANDLER(p1_FDC_w);
FLOPPY_FORMATS_MEMBER( p1_fdc_device::floppy_formats )
FLOPPY_PC_FORMAT,
FLOPPY_DSK_FORMAT
FLOPPY_FORMATS_END
static SLOT_INTERFACE_START( poisk1_floppies )
SLOT_INTERFACE( "525qd", FLOPPY_525_QD )
SLOT_INTERFACE_END
static MACHINE_CONFIG_FRAGMENT( fdc_b504 )
MCFG_FD1793x_ADD("fdc", XTAL_16MHz / 16)
MCFG_FLOPPY_DRIVE_ADD("fdc:0", poisk1_floppies, "525qd", p1_fdc_device::floppy_formats)
MCFG_FLOPPY_DRIVE_ADD("fdc:1", poisk1_floppies, "525qd", p1_fdc_device::floppy_formats)
MACHINE_CONFIG_END
//-------------------------------------------------
// ROM( p1_fdc )
//-------------------------------------------------
ROM_START( p1_fdc )
ROM_REGION( 0x0800, "p1_fdc", 0 )
ROM_DEFAULT_BIOS("a302")
ROM_SYSTEM_BIOS(0, "normal", "B504 standard ROM")
ROMX_LOAD( "b_ngmd_n.rf2", 0x00000, 0x0800, CRC(967e172a) SHA1(95117c40fd9f624fee08ccf37f615b16ff249688), ROM_BIOS(1))
ROM_SYSTEM_BIOS(1, "a302", "v3.02") // Additional ROM BIOS v3.02 for DISKETTE service (c) Moscow 1991
ROMX_LOAD( "b_ngmd_t.rf2", 0x00000, 0x0800, CRC(630010b1) SHA1(50876fe4f5f4f32a242faa70f9154574cd315ec4), ROM_BIOS(2))
ROM_SYSTEM_BIOS(2, "ae304", "v3.04") // Additional enhanced ROM BIOS v3.04 for DISKETTE service (c) V.Rusakow Moscow 1992
ROMX_LOAD( "p_fdd_nm.bin", 0x00000, 0x0800, CRC(0b7f867d) SHA1(9fe7e0ab2242e50394d1162cf1a619b6f2994bfb), ROM_BIOS(3))
ROM_SYSTEM_BIOS(3, "ae308", "v3.08") // Additional enhanced ROM BIOS v3.08 for DISKETTE service (c) V.Rusakov Tarasovka 1992
ROMX_LOAD( "p_fdd_my.bin", 0x00000, 0x0800, CRC(da5d0eaf) SHA1(b188ba856bd28e4964a88feb0b0b2ba7eb320efc), ROM_BIOS(4))
ROM_END
//-------------------------------------------------
// machine_config_additions - device-specific
// machine configurations
//-------------------------------------------------
machine_config_constructor p1_fdc_device::device_mconfig_additions() const
{
return MACHINE_CONFIG_NAME( fdc_b504 );
}
//-------------------------------------------------
// rom_region - device-specific ROM region
//-------------------------------------------------
const rom_entry *p1_fdc_device::device_rom_region() const
{
return ROM_NAME( p1_fdc );
}
//**************************************************************************
// LIVE DEVICE
//**************************************************************************
UINT8 p1_fdc_device::p1_wd17xx_motor_r()
{
DBG_LOG(1,"p1_fdc_motor_r",("R = $%02x\n", 0));
// XXX always on for now
return 0;
}
UINT8 p1_fdc_device::p1_wd17xx_aux_r()
{
cpu_device *maincpu = machine().device<cpu_device>("maincpu");
if (!m_fdc->drq_r() && !m_fdc->intrq_r()) {
// fake cpu wait by resetting PC one insn back
maincpu->set_state_int(I8086_IP, maincpu->state_int(I8086_IP) - 2);
maincpu->set_input_line(INPUT_LINE_HALT, ASSERT_LINE);
}
return m_fdc->drq_r();
}
/*
; D0 - DRIVE SELECT 0
; D1 - DRIVE SELECT 1
; D2 - MOTOR ON 0
; D3 - MOTOR ON 1
; D4 - SIDE (HEAD) SELECT
; D5 - DOUBLE DENSITY
; D6 - FDC RESET
; D7 - NO USE
*/
void p1_fdc_device::p1_wd17xx_aux_w(int data)
{
DBG_LOG(1,"p1_fdc_aux_w",("W $%02x\n", data));
floppy_image_device *floppy0 = m_fdc->subdevice<floppy_connector>("0")->get_device();
floppy_image_device *floppy1 = m_fdc->subdevice<floppy_connector>("1")->get_device();
floppy_image_device *floppy = ((data & 2)?floppy1:floppy0);
if(!BIT(data, 6))
m_fdc->reset();
m_fdc->set_floppy(floppy);
floppy->ss_w(BIT(data, 4));
m_fdc->dden_w(BIT(data, 5));
floppy0->mon_w(!(data & 4));
floppy1->mon_w(!(data & 8));
}
void p1_fdc_device::p1_fdc_irq_drq(bool state)
{
cpu_device *maincpu = machine().device<cpu_device>("maincpu");
if(state)
maincpu->set_input_line(INPUT_LINE_HALT, CLEAR_LINE);
}
static READ8_DEVICE_HANDLER( p1_FDC_r )
{
UINT8 data = 0xff;
p1_fdc_device *fdc = downcast<p1_fdc_device *>(device);
switch( offset )
{
case 0: data = fdc->p1_wd17xx_aux_r(); break;
case 2: data = fdc->p1_wd17xx_motor_r(); break;
}
return data;
}
static WRITE8_DEVICE_HANDLER( p1_FDC_w )
{
p1_fdc_device *fdc = downcast<p1_fdc_device *>(device);
switch( offset )
{
case 0: fdc->p1_wd17xx_aux_w(data); break;
}
}
//-------------------------------------------------
// p1_fdc_device - constructor
//-------------------------------------------------
p1_fdc_device::p1_fdc_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
device_t(mconfig, P1_FDC, "Poisk-1 floppy B504", tag, owner, clock, "p1_fdc", __FILE__),
device_isa8_card_interface( mconfig, *this ),
m_fdc(*this, "fdc")
{
}
//-------------------------------------------------
// device_start - device-specific startup
//-------------------------------------------------
void p1_fdc_device::device_start()
{
set_isa_device();
m_isa->install_rom(this, 0xe0000, 0xe07ff, 0, 0, "XXX", "p1_fdc");
m_isa->install_device(0x00c0, 0x00c3, 0, 0,
READ8_DEVICE_DELEGATE(m_fdc, fd1793_t, read),
WRITE8_DEVICE_DELEGATE(m_fdc, fd1793_t, write) );
m_isa->install_device(this, 0x00c4, 0x00c7, 0, 0, FUNC(p1_FDC_r), FUNC(p1_FDC_w) );
m_fdc->setup_drq_cb(fd1793_t::line_cb(FUNC(p1_fdc_device::p1_fdc_irq_drq), this));
m_fdc->setup_intrq_cb(fd1793_t::line_cb(FUNC(p1_fdc_device::p1_fdc_irq_drq), this));
}
//-------------------------------------------------
// device_reset - device-specific reset
//-------------------------------------------------
void p1_fdc_device::device_reset()
{
}

61
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@ -0,0 +1,61 @@
// license:BSD-3-Clause
// copyright-holders:XXX
/**********************************************************************
Poisk-1 FDC device (model B504)
Copyright MESS Team.
Visit http://mamedev.org for licensing and usage restrictions.
**********************************************************************/
#pragma once
#ifndef __P1_FDC__
#define __P1_FDC__
#include "emu.h"
#include "imagedev/flopdrv.h"
#include "machine/isa.h"
#include "machine/wd_fdc.h"
//**************************************************************************
// TYPE DEFINITIONS
//**************************************************************************
class p1_fdc_device : public device_t,
public device_isa8_card_interface
{
public:
// construction/destruction
p1_fdc_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
// optional information overrides
virtual machine_config_constructor device_mconfig_additions() const;
virtual const rom_entry *device_rom_region() const;
DECLARE_FLOPPY_FORMATS( floppy_formats );
protected:
// device-level overrides
virtual void device_start();
virtual void device_reset();
private:
required_device<fd1793_t> m_fdc;
public:
void p1_wd17xx_aux_w(int data);
UINT8 p1_wd17xx_aux_r();
UINT8 p1_wd17xx_motor_r();
void p1_fdc_irq_drq(bool state);
};
// device type definition
extern const device_type P1_FDC;
#endif

159
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@ -0,0 +1,159 @@
// license:BSD-3-Clause
// copyright-holders:XXX
/**********************************************************************
Poisk-1 HDC device (model B942)
Copyright MESS Team.
Visit http://mamedev.org for licensing and usage restrictions.
**********************************************************************/
#include "p1_hdc.h"
//**************************************************************************
// MACROS / CONSTANTS
//**************************************************************************
#define VERBOSE_DBG 1
#define DBG_LOG(N,M,A) \
do { \
if(VERBOSE_DBG>=N) \
{ \
if( M ) \
logerror("%11.6f: %-24s",machine().time().as_double(),(char*)M ); \
logerror A; \
} \
} while (0)
#define KM1809VG7_TAG "d17"
//**************************************************************************
// DEVICE DEFINITIONS
//**************************************************************************
const device_type P1_HDC = &device_creator<p1_hdc_device>;
static WD2010_INTERFACE( hdc_intf )
{
DEVCB_NULL,
DEVCB_NULL,
DEVCB_NULL,
DEVCB_NULL,
DEVCB_NULL,
DEVCB_NULL,
DEVCB_NULL,
DEVCB_NULL,
DEVCB_LINE_VCC,
DEVCB_LINE_VCC,
DEVCB_LINE_VCC,
DEVCB_LINE_VCC,
DEVCB_LINE_VCC
};
static MACHINE_CONFIG_FRAGMENT( hdc_b942 )
MCFG_WD2010_ADD(KM1809VG7_TAG, 5000000, hdc_intf) // XXX clock?
MCFG_HARDDISK_ADD("hard0")
MCFG_HARDDISK_ADD("hard1")
MACHINE_CONFIG_END
//-------------------------------------------------
// ROM( p1_hdc )
//-------------------------------------------------
ROM_START( p1_hdc )
ROM_REGION( 0x0800, "p1_hdc", 0 )
ROM_DEFAULT_BIOS("v14")
ROM_SYSTEM_BIOS(0, "v11", "ver 1.1")
ROMX_LOAD( "b_hd_v11.rf2", 0x00000, 0x0800, CRC(a19c39b2) SHA1(57faa56b320abf801fedbed578cf97d253e5b777), ROM_BIOS(1))
ROM_SYSTEM_BIOS(1, "v12", "ver 1.2")
ROMX_LOAD( "p_hdd_nm.bin", 0x00000, 0x0800, CRC(d5f8e4cc) SHA1(5b533642df30958539715f87a7f25b0d66dd0861), ROM_BIOS(2))
ROM_SYSTEM_BIOS(2, "v14", "ver 1.4") // (c) `.lesnyh. , 1992
ROMX_LOAD( "b942_5mb.bin", 0x00000, 0x0800, CRC(a3cfa240) SHA1(0b0aa1ce839a957153bfbbe70310480ca9fe21b6), ROM_BIOS(3))
ROM_END
//-------------------------------------------------
// machine_config_additions - device-specific
// machine configurations
//-------------------------------------------------
machine_config_constructor p1_hdc_device::device_mconfig_additions() const
{
return MACHINE_CONFIG_NAME( hdc_b942 );
}
//-------------------------------------------------
// rom_region - device-specific ROM region
//-------------------------------------------------
const rom_entry *p1_hdc_device::device_rom_region() const
{
return ROM_NAME( p1_hdc );
}
//**************************************************************************
// LIVE DEVICE
//**************************************************************************
READ8_MEMBER(p1_hdc_device::p1_HDC_r)
{
UINT8 data = 0x00;
switch (offset >> 8) {
case 8: data = m_hdc->read(space, offset & 255);
}
DBG_LOG(1,"hdc",("R $%04x == $%02x\n", offset, data));
return data;
}
WRITE8_MEMBER(p1_hdc_device::p1_HDC_w)
{
DBG_LOG(1,"hdc",("W $%04x <- $%02x\n", offset, data));
switch (offset >> 8) {
case 8: m_hdc->write(space, offset & 255, data, 0);
}
}
//-------------------------------------------------
// p1_hdc_device - constructor
//-------------------------------------------------
p1_hdc_device::p1_hdc_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
device_t(mconfig, P1_HDC, "Poisk-1 MFM disk B942", tag, owner, clock, "p1_hdc", __FILE__),
device_isa8_card_interface( mconfig, *this ),
m_hdc(*this, KM1809VG7_TAG)
{
}
//-------------------------------------------------
// device_start - device-specific startup
//-------------------------------------------------
void p1_hdc_device::device_start()
{
set_isa_device();
m_isa->install_rom(this, 0xe2000, 0xe27ff, 0, 0, "XXX", "p1_hdc");
m_isa->install_memory(0xd0000, 0xd0fff, 0, 0,
READ8_DELEGATE(p1_hdc_device, p1_HDC_r),
WRITE8_DELEGATE(p1_hdc_device, p1_HDC_w) );
}
//-------------------------------------------------
// device_reset - device-specific reset
//-------------------------------------------------
void p1_hdc_device::device_reset()
{
}

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@ -0,0 +1,58 @@
// license:BSD-3-Clause
// copyright-holders:XXX
/**********************************************************************
Poisk-1 HDC device (model B942)
Copyright MESS Team.
Visit http://mamedev.org for licensing and usage restrictions.
**********************************************************************/
#pragma once
#ifndef __P1_HDC__
#define __P1_HDC__
#include "emu.h"
#include "imagedev/harddriv.h"
#include "machine/isa.h"
#include "machine/wd2010.h"
//**************************************************************************
// TYPE DEFINITIONS
//**************************************************************************
class p1_hdc_device : public device_t,
public device_isa8_card_interface
{
public:
// construction/destruction
p1_hdc_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
// optional information overrides
virtual machine_config_constructor device_mconfig_additions() const;
virtual const rom_entry *device_rom_region() const;
protected:
// device-level overrides
virtual void device_start();
virtual void device_reset();
private:
required_device<wd2010_device> m_hdc;
UINT8 m_ram[0x800];
public:
DECLARE_READ8_MEMBER(p1_HDC_r);
DECLARE_WRITE8_MEMBER(p1_HDC_w);
};
// device type definition
extern const device_type P1_HDC;
#endif

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@ -0,0 +1,79 @@
// license:BSD-3-Clause
// copyright-holders:XXX
/**********************************************************************
Poisk-1 ROM cartridge device
Copyright MESS Team.
Visit http://mamedev.org for licensing and usage restrictions.
**********************************************************************/
#include "p1_rom.h"
//**************************************************************************
// DEVICE DEFINITIONS
//**************************************************************************
const device_type P1_ROM = &device_creator<p1_rom_device>;
//-------------------------------------------------
// ROM( p1_rom )
//-------------------------------------------------
ROM_START( p1_rom )
ROM_REGION( 0x2000, "p1_rom", 0 )
ROM_SYSTEM_BIOS(0, "ram", "Test 3 -- RAM test")
ROMX_LOAD( "p1_t_ram.rf4", 0x00000, 0x2000, CRC(e42f5a61) SHA1(ce2554eae8f0d2b6d482890dd198cf7e2d29c655), ROM_BIOS(1))
ROM_SYSTEM_BIOS(1, "io", "Test 4 -- I/O test")
ROMX_LOAD( "p1_t_i_o.rf4", 0x00000, 0x2000, CRC(18a781de) SHA1(7267970ee27e3ea1d972bee8e74b17bac1051619), ROM_BIOS(2))
ROM_SYSTEM_BIOS(2, "pls", "\"MB test\"")
ROMX_LOAD( "p1_t_pls.rf4", 0x00000, 0x2000, CRC(c8210ffb) SHA1(f2d1a6c90e4708bcc56186b2fb906fa852667084), ROM_BIOS(3))
ROM_END
//-------------------------------------------------
// rom_region - device-specific ROM region
//-------------------------------------------------
const rom_entry *p1_rom_device::device_rom_region() const
{
return ROM_NAME( p1_rom );
}
//**************************************************************************
// LIVE DEVICE
//**************************************************************************
//-------------------------------------------------
// p1_rom_device - constructor
//-------------------------------------------------
p1_rom_device::p1_rom_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
device_t(mconfig, P1_ROM, "Poisk-1 ROM cart", tag, owner, clock, "p1_rom", __FILE__),
device_isa8_card_interface( mconfig, *this )
{
}
//-------------------------------------------------
// device_start - device-specific startup
//-------------------------------------------------
void p1_rom_device::device_start()
{
set_isa_device();
m_isa->install_rom(this, 0xc0000, 0xc1fff, 0, 0, "XXX", "p1_rom");
}
//-------------------------------------------------
// device_reset - device-specific reset
//-------------------------------------------------
void p1_rom_device::device_reset()
{
}

45
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@ -0,0 +1,45 @@
// license:BSD-3-Clause
// copyright-holders:XXX
/**********************************************************************
Poisk-1 ROM cartridge device
Copyright MESS Team.
Visit http://mamedev.org for licensing and usage restrictions.
**********************************************************************/
#pragma once
#ifndef __P1_ROM__
#define __P1_ROM__
#include "emu.h"
#include "machine/isa.h"
//**************************************************************************
// TYPE DEFINITIONS
//**************************************************************************
class p1_rom_device : public device_t,
public device_isa8_card_interface
{
public:
// construction/destruction
p1_rom_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
// optional information overrides
virtual const rom_entry *device_rom_region() const;
protected:
// device-level overrides
virtual void device_start();
virtual void device_reset();
};
// device type definition
extern const device_type P1_ROM;
#endif

390
src/mess/machine/pc.c
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@ -17,7 +17,6 @@
#include "machine/i8255.h"
#include "machine/ins8250.h"
#include "machine/i8251.h"
#include "machine/mc146818.h"
#include "machine/pic8259.h"
@ -66,87 +65,6 @@
} \
} while (0)
/*
* EC-1841 memory controller. The machine can hold four memory boards;
* each board has a control register, its address is set by a DIP switch
* on the board itself.
*
* Only one board should be enabled for read, and one for write.
* Normally, this is the same board.
*
* Each board is divided into 4 banks, internally numbererd 0..3.
* POST tests each board on startup, and an error (indicated by
* I/O CH CK bus signal) causes it to disable failing bank(s) by writing
* 'reconfiguration code' (inverted number of failing memory bank) to
* the register.
* bit 1-0 'reconfiguration code'
* bit 2 enable read access
* bit 3 enable write access
*/
READ8_MEMBER(pc_state::ec1841_memboard_r)
{
pc_state *st = space.machine().driver_data<pc_state>();
UINT8 data;
data = offset % 4;
if (data > m_memboards)
data = 0xff;
else
data = st->m_memboard[data];
DBG_LOG(1,"ec1841_memboard",("R (%d of %d) == %02X\n", offset, m_memboards, data ));
return data;
}
WRITE8_MEMBER(pc_state::ec1841_memboard_w)
{
pc_state *st = space.machine().driver_data<pc_state>();
address_space &program = st->m_maincpu->space(AS_PROGRAM);
UINT8 current;
current = st->m_memboard[offset];
DBG_LOG(1,"ec1841_memboard",("W (%d of %d) <- %02X (%02X)\n", offset, m_memboards, data, current));
if (offset > m_memboards) {
return;
}
if (BIT(current, 2) && !BIT(data, 2)) {
// disable read access
program.unmap_read(0, 0x7ffff);
DBG_LOG(1,"ec1841_memboard_w",("unmap_read(%d)\n", offset));
}
if (BIT(current, 3) && !BIT(data, 3)) {
// disable write access
program.unmap_write(0, 0x7ffff);
DBG_LOG(1,"ec1841_memboard_w",("unmap_write(%d)\n", offset));
}
if (!BIT(current, 2) && BIT(data, 2)) {
for(int i=0; i<4; i++)
st->m_memboard[i] &= 0xfb;
// enable read access
membank("bank10")->set_base(m_ram->pointer() + offset*0x80000);
program.install_read_bank(0, 0x7ffff, "bank10");
DBG_LOG(1,"ec1841_memboard_w",("map_read(%d)\n", offset));
}
if (!BIT(current, 3) && BIT(data, 3)) {
for(int i=0; i<4; i++)
st->m_memboard[i] &= 0xf7;
// enable write access
membank("bank20")->set_base(m_ram->pointer() + offset*0x80000);
program.install_write_bank(0, 0x7ffff, "bank20");
DBG_LOG(1,"ec1841_memboard_w",("map_write(%d)\n", offset));
}
st->m_memboard[offset] = data;
}
/*************************************************************************
*
* PC DMA stuff
@ -421,51 +339,6 @@ const struct pit8253_interface pcjr_pit8253_config =
}
};
/* MC1502 uses single XTAL for everything -- incl. CGA? check */
const i8251_interface mc1502_i8251_interface =
{
/* XXX RxD data are accessible via PPI port C, bit 7 */
DEVCB_NULL,
DEVCB_NULL,
DEVCB_NULL,
DEVCB_DEVICE_LINE_MEMBER("pic8259", pic8259_device, ir7_w), /* default handler does nothing */
DEVCB_DEVICE_LINE_MEMBER("pic8259", pic8259_device, ir7_w),
DEVCB_NULL,
DEVCB_NULL /* XXX SYNDET triggers NMI */
};
WRITE_LINE_MEMBER(pc_state::mc1502_pit8253_out1_changed)
{
machine().device<i8251_device>("upd8251")->txc_w(state);
machine().device<i8251_device>("upd8251")->rxc_w(state);
}
WRITE_LINE_MEMBER(pc_state::mc1502_pit8253_out2_changed)
{
pc_speaker_set_input( state );
m_cassette->output(state ? 1 : -1);
}
const struct pit8253_interface mc1502_pit8253_config =
{
{
{
XTAL_16MHz/12, /* heartbeat IRQ */
DEVCB_NULL,
DEVCB_DEVICE_LINE_MEMBER("pic8259", pic8259_device, ir0_w)
}, {
XTAL_16MHz/12, /* serial port */
DEVCB_NULL,
DEVCB_DRIVER_LINE_MEMBER(pc_state,mc1502_pit8253_out1_changed)
}, {
XTAL_16MHz/12, /* pio port c pin 4, and speaker polling enough */
DEVCB_NULL,
DEVCB_DRIVER_LINE_MEMBER(pc_state,mc1502_pit8253_out2_changed)
}
}
};
/**********************************************************
*
* COM hardware
@ -890,138 +763,6 @@ I8255_INTERFACE( pc_ppi8255_interface )
};
static struct {
UINT8 pulsing;
UINT16 mask; /* input lines */
emu_timer *keyb_signal_timer;
} mc1502_keyb;
/* check if any keys are pressed, raise IRQ1 if so */
TIMER_CALLBACK_MEMBER(pc_state::mc1502_keyb_signal_callback)
{
UINT8 key = 0;
key |= ioport("Y1")->read();
key |= ioport("Y2")->read();
key |= ioport("Y3")->read();
key |= ioport("Y4")->read();
key |= ioport("Y5")->read();
key |= ioport("Y6")->read();
key |= ioport("Y7")->read();
key |= ioport("Y8")->read();
key |= ioport("Y9")->read();
key |= ioport("Y10")->read();
key |= ioport("Y11")->read();
key |= ioport("Y12")->read();
// DBG_LOG(1,"mc1502_k_s_c",("= %02X (%d) %s\n", key, mc1502_keyb.pulsing,
// (key || mc1502_keyb.pulsing) ? " will IRQ" : ""));
/*
If a key is pressed and we're not pulsing yet, start pulsing the IRQ1;
keep pulsing while any key is pressed, and pulse one time after all keys
are released.
*/
if (key) {
if (mc1502_keyb.pulsing < 2) {
mc1502_keyb.pulsing += 2;
}
}
if (mc1502_keyb.pulsing) {
m_pic8259->ir1_w(mc1502_keyb.pulsing & 1);
mc1502_keyb.pulsing--;
}
}
WRITE8_MEMBER(pc_state::mc1502_ppi_porta_w)
{
m_centronics->write(space, 0, data);
}
WRITE8_MEMBER(pc_state::mc1502_ppi_portb_w)
{
// DBG_LOG(2,"mc1502_ppi_portb_w",("( %02X )\n", data));
m_ppi_portb = data;
machine().device<pit8253_device>("pit8253")->gate2_w(BIT(data, 0));
pc_speaker_set_spkrdata(BIT(data, 1));
m_centronics->strobe_w(BIT(data, 2));
m_centronics->autofeed_w(BIT(data, 3));
m_centronics->init_prime_w(BIT(data, 4));
}
READ8_MEMBER(pc_state::mc1502_kppi_portc_r)
{
UINT8 data = 0;
data |= m_centronics->fault_r() << 4;
data |= m_centronics->pe_r() << 5;
data |= m_centronics->ack_r() << 6;
data |= m_centronics->busy_r() << 7;
return data;
}
READ8_MEMBER(pc_state::mc1502_ppi_portc_r)
{
int timer2_output = machine().device<pit8253_device>("pit8253")->get_output(2);
int data = 0xff;
double tap_val = m_cassette->input();
// 0x80 -- serial RxD
// 0x40 -- CASS IN, also loops back T2OUT (gated by CASWR)
data = ( data & ~0x40 ) | ( tap_val < 0 ? 0x40 : 0x00 ) | ( (BIT(m_ppi_portb, 7) && timer2_output) ? 0x40 : 0x00 );
// 0x20 -- T2OUT
data = ( data & ~0x20 ) | ( timer2_output ? 0x20 : 0x00 );
// 0x10 -- SNDOUT
data = ( data & ~0x10 ) | ( (BIT(m_ppi_portb, 1) && timer2_output) ? 0x10 : 0x00 );
// DBG_LOG(2,"mc1502_ppi_portc_r",("= %02X (tap_val %f t2out %d) at %s\n",
// data, tap_val, timer2_output, machine().describe_context()));
return data;
}
READ8_MEMBER(pc_state::mc1502_kppi_porta_r)
{
UINT8 key = 0;
if (mc1502_keyb.mask & 0x0001) { key |= ioport("Y1")->read(); }
if (mc1502_keyb.mask & 0x0002) { key |= ioport("Y2")->read(); }
if (mc1502_keyb.mask & 0x0004) { key |= ioport("Y3")->read(); }
if (mc1502_keyb.mask & 0x0008) { key |= ioport("Y4")->read(); }
if (mc1502_keyb.mask & 0x0010) { key |= ioport("Y5")->read(); }
if (mc1502_keyb.mask & 0x0020) { key |= ioport("Y6")->read(); }
if (mc1502_keyb.mask & 0x0040) { key |= ioport("Y7")->read(); }
if (mc1502_keyb.mask & 0x0080) { key |= ioport("Y8")->read(); }
if (mc1502_keyb.mask & 0x0100) { key |= ioport("Y9")->read(); }
if (mc1502_keyb.mask & 0x0200) { key |= ioport("Y10")->read(); }
if (mc1502_keyb.mask & 0x0400) { key |= ioport("Y11")->read(); }
if (mc1502_keyb.mask & 0x0800) { key |= ioport("Y12")->read(); }
key ^= 0xff;
// DBG_LOG(2,"mc1502_kppi_porta_r",("= %02X\n", key));
return key;
}
WRITE8_MEMBER(pc_state::mc1502_kppi_portb_w)
{
mc1502_keyb.mask &= ~255;
mc1502_keyb.mask |= data ^ 255;
if (!BIT(data, 0))
mc1502_keyb.mask |= 1 << 11;
else
mc1502_keyb.mask &= ~(1 << 11);
// DBG_LOG(2,"mc1502_kppi_portb_w",("( %02X -> %04X )\n", data, mc1502_keyb.mask));
}
WRITE8_MEMBER(pc_state::mc1502_kppi_portc_w)
{
mc1502_keyb.mask &= ~(7 << 8);
mc1502_keyb.mask |= ((data ^ 7) & 7) << 8;
// DBG_LOG(2,"mc1502_kppi_portc_w",("( %02X -> %04X )\n", data, mc1502_keyb.mask));
}
WRITE8_MEMBER(pc_state::pcjr_ppi_portb_w)
{
/* KB controller port B */
@ -1105,26 +846,6 @@ I8255_INTERFACE( pcjr_ppi8255_interface )
DEVCB_NULL
};
I8255_INTERFACE( mc1502_ppi8255_interface )
{
DEVCB_NULL,
DEVCB_DRIVER_MEMBER(pc_state,mc1502_ppi_porta_w),
DEVCB_NULL,
DEVCB_DRIVER_MEMBER(pc_state,mc1502_ppi_portb_w),
DEVCB_DRIVER_MEMBER(pc_state,mc1502_ppi_portc_r),
DEVCB_NULL
};
I8255_INTERFACE( mc1502_ppi8255_interface_2 )
{
DEVCB_DRIVER_MEMBER(pc_state,mc1502_kppi_porta_r),
DEVCB_NULL,
DEVCB_NULL,
DEVCB_DRIVER_MEMBER(pc_state,mc1502_kppi_portb_w),
DEVCB_DRIVER_MEMBER(pc_state,mc1502_kppi_portc_r),
DEVCB_DRIVER_MEMBER(pc_state,mc1502_kppi_portc_w)
};
/**********************************************************
*
@ -1247,71 +968,6 @@ READ8_MEMBER(pc_state::pcjx_port_1ff_r)
return 0x60; // expansion?
}
/*
* MC1502 uses a FD1793 clone instead of uPD765
*/
READ8_MEMBER(pc_state::mc1502_wd17xx_aux_r)
{
UINT8 data;
data = 0;
return data;
}
WRITE8_MEMBER(pc_state::mc1502_wd17xx_aux_w)
{
fd1793_t *fdc = machine().device<fd1793_t>("vg93");
floppy_image_device *floppy0 = machine().device<floppy_connector>("fd0")->get_device();
floppy_image_device *floppy1 = machine().device<floppy_connector>("fd1")->get_device();
floppy_image_device *floppy = ((data & 0x10)?floppy1:floppy0);
fdc->set_floppy(floppy);
// master reset
if((data & 1) == 0)
fdc->reset();
// SIDE ONE
floppy->ss_w((data & 2)?1:0);
// bits 2, 3 -- motor on (drive 0, 1)
floppy0->mon_w(!(data & 4));
floppy1->mon_w(!(data & 8));
}
/*
* Accesses to this port block (halt the CPU until DRQ, INTRQ or MOTOR ON)
*/
READ8_MEMBER(pc_state::mc1502_wd17xx_drq_r)
{
fd1793_t *fdc = machine().device<fd1793_t>("vg93");
if (!fdc->drq_r() && !fdc->intrq_r()) {
/* fake cpu wait by resetting PC one insn back */
m_maincpu->set_state_int(I8086_IP, m_maincpu->state_int(I8086_IP) - 1);
m_maincpu->set_input_line(INPUT_LINE_HALT, ASSERT_LINE);
}
return fdc->drq_r();
}
void pc_state::mc1502_fdc_irq_drq(bool state)
{
if(state)
m_maincpu->set_input_line(INPUT_LINE_HALT, CLEAR_LINE);
}
READ8_MEMBER(pc_state::mc1502_wd17xx_motor_r)
{
UINT8 data;
/* fake motor being always on */
data = 1;
return data;
}
WRITE8_MEMBER(pc_state::asst128_fdc_dor_w)
{
pc_fdc_xt_device *fdc = machine().device<pc_fdc_xt_device>("fdc");
@ -1445,23 +1101,6 @@ DRIVER_INIT_MEMBER(pc_state,pcjr)
mess_init_pc_common(pcjr_set_keyb_int);
}
DRIVER_INIT_MEMBER(pc_state,mc1502)
{
mess_init_pc_common(NULL);
}
DRIVER_INIT_MEMBER(pc_state,ec1841)
{
address_space &program = m_maincpu->space(AS_PROGRAM);
program.install_read_bank(0, 0x7ffff, "bank10");
program.install_write_bank(0, 0x7ffff, "bank20");
membank( "bank10" )->set_base( m_ram->pointer() );
membank( "bank20" )->set_base( m_ram->pointer() );
pc_rtc_init();
}
IRQ_CALLBACK_MEMBER(pc_state::pc_irq_callback)
{
@ -1499,35 +1138,6 @@ MACHINE_RESET_MEMBER(pc_state,pc)
m_ppi_shift_enable = 0;
m_speaker->level_w(0);
// ec1841-specific code
m_memboards = m_ram->size()/(512*1024) - 1;
if (m_memboards > 3)
m_memboards = 3;
memset(m_memboard,0,sizeof(m_memboard));
// mark 1st board enabled
m_memboard[0]=0xc;
}
MACHINE_START_MEMBER(pc_state,mc1502)
{
m_maincpu->set_irq_acknowledge_callback(device_irq_acknowledge_delegate(FUNC(pc_state::pc_irq_callback),this));
/*
Keyboard polling circuit holds IRQ1 high until a key is
pressed, then it starts a timer that pulses IRQ1 low each
40ms (check) for 20ms (check) until all keys are released.
Last pulse causes BIOS to write a 'break' scancode into port 60h.
*/
m_pic8259->ir1_w(1);
memset(&mc1502_keyb, 0, sizeof(mc1502_keyb));
mc1502_keyb.keyb_signal_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(pc_state::mc1502_keyb_signal_callback),this));
mc1502_keyb.keyb_signal_timer->adjust( attotime::from_msec(20), 0, attotime::from_msec(20) );
fd1793_t *fdc = machine().device<fd1793_t>("vg93");
fdc->setup_drq_cb(fd1793_t::line_cb(FUNC(pc_state::mc1502_fdc_irq_drq), this));
fdc->setup_intrq_cb(fd1793_t::line_cb(FUNC(pc_state::mc1502_fdc_irq_drq), this));
}

36
src/mess/machine/xsu_cards.c Normal file
View File

@ -0,0 +1,36 @@
/**********************************************************************
ISA bus cards for ex-USSR PC clones
license: MAME, GPL-2.0+
copyright-holders: XXX
**********************************************************************/
#include "xsu_cards.h"
SLOT_INTERFACE_START( p1_isa8_cards )
SLOT_INTERFACE("rom", P1_ROM)
SLOT_INTERFACE("fdc", P1_FDC) // B504
SLOT_INTERFACE("hdc", P1_HDC) // B942
/*
SLOT_INTERFACE("comlpt", P1_COMLPT) // B620
SLOT_INTERFACE("joy", P1_JOY) // B621
SLOT_INTERFACE("mouse", P1_MOUSE) // B943
SLOT_INTERFACE("lan", P1_LAN) // B944
*/
SLOT_INTERFACE("pccom", ISA8_COM)
SLOT_INTERFACE("pclpt", ISA8_LPT)
SLOT_INTERFACE("xtide", ISA8_XTIDE)
SLOT_INTERFACE_END
SLOT_INTERFACE_START( mc1502_isa8_cards )
SLOT_INTERFACE("rom", MC1502_ROM)
SLOT_INTERFACE("fdc", MC1502_FDC)
/*
SLOT_INTERFACE("hdc", MC1502_HDC)
*/
SLOT_INTERFACE("pccom", ISA8_COM)
SLOT_INTERFACE("pclpt", ISA8_LPT)
SLOT_INTERFACE("xtide", ISA8_XTIDE)
SLOT_INTERFACE_END

35
src/mess/machine/xsu_cards.h Normal file
View File

@ -0,0 +1,35 @@
/**********************************************************************
ISA bus cards for ex-USSR PC clones
license: MAME, GPL-2.0+
copyright-holders: XXX
**********************************************************************/
#pragma once
#ifndef __XSU_CARDS_H__
#define __XSU_CARDS_H__
#include "emu.h"
// storage
#include "machine/mc1502_fdc.h"
#include "machine/p1_fdc.h"
#include "machine/p1_hdc.h"
// misc
#include "machine/mc1502_rom.h"
#include "machine/p1_rom.h"
// non-native
#include "machine/isa_com.h"
#include "machine/isa_xtide.h"
#include "machine/pc_lpt.h"
// supported devices
SLOT_INTERFACE_EXTERN( p1_isa8_cards );
SLOT_INTERFACE_EXTERN( mc1502_isa8_cards );
#endif // __XSU_CARDS_H__

28
src/mess/mess.lst
View File

@ -764,23 +764,27 @@ pc3086
pc2386
xtvga // 198? PC-XT (VGA, MF2 Keyboard)
iskr1031
iskr1030m
iskr3104
asst128
ec1840
ec1841
ec1845
mk88
poisk1
poisk2
mc1702
mc1502
zdsupers
m24
m240
olivm15
// Various PC and XT clones produced in ex-USSR and Soviet bloc
asst128
ec1840
ec1841
ec1845
ec1847
iskr1030m
iskr1031
iskr3104
mc1502
mc1702
mk88
pk88
poisk1
poisk2
// AT
ibm5170 // 1984 IBM PC/AT 5170, original 6 MHz model
ibm5170a // 1985 IBM PC/AT 5170, enhanced 8 MHz model

15
src/mess/mess.mak
View File

@ -689,6 +689,7 @@ DRVLIBS += \
$(MESSOBJ)/wang.a \
$(MESSOBJ)/wavemate.a \
$(MESSOBJ)/xerox.a \
$(MESSOBJ)/xussrpc.a \
$(MESSOBJ)/yamaha.a \
$(MESSOBJ)/zpa.a \
$(MESSOBJ)/zvt.a \
@ -1341,6 +1342,7 @@ $(MESSOBJ)/hec2hrp.a: \
$(MESSOBJ)/intel.a: \
$(MESS_DRIVERS)/basic52.o \
$(MESS_DRIVERS)/isbc.o \
$(MESS_MACHINE)/isbc_215g.o \
$(MESS_DRIVERS)/ipc.o \
$(MESS_DRIVERS)/ipds.o \
$(MESS_DRIVERS)/imds.o \
@ -2104,6 +2106,19 @@ $(MESSOBJ)/xerox.a: \
$(MESS_DRIVERS)/xerox820.o \
$(MESS_DRIVERS)/bigbord2.o \
$(MESSOBJ)/xussrpc.a: \
$(MESS_DRIVERS)/ec184x.o \
$(MESS_DRIVERS)/iskr103x.o \
$(MESS_DRIVERS)/poisk1.o \
$(MESS_MACHINE)/p1_fdc.o \
$(MESS_MACHINE)/p1_hdc.o \
$(MESS_MACHINE)/p1_rom.o \
$(MESS_VIDEO)/poisk1.o \
$(MESS_DRIVERS)/mc1502.o \
$(MESS_MACHINE)/mc1502_fdc.o\
$(MESS_MACHINE)/mc1502_rom.o\
$(MESS_MACHINE)/xsu_cards.o \
$(MESSOBJ)/yamaha.a: \
$(MESS_DRIVERS)/ymmu100.o \

178
src/mess/video/isa_cga.c
View File

@ -762,33 +762,6 @@ void isa8_cga_device::device_reset()
***************************************************************************/
const device_type ISA8_CGA_MC1502 = &device_creator<isa8_cga_mc1502_device>;
//-------------------------------------------------
// isa8_cga_mc1502_device - constructor
//-------------------------------------------------
isa8_cga_mc1502_device::isa8_cga_mc1502_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
isa8_cga_device( mconfig, ISA8_CGA_MC1502, "ISA8_CGA_MC1502", tag, owner, clock, "cga_mc1502", __FILE__)
{
m_vram_size = 0x8000;
}
ROM_START( mc1502 )
ROM_REGION(0x2000,"gfx1", 0)
ROM_LOAD( "symgen.rom", 0x0000, 0x2000, CRC(b2747a52) SHA1(6766d275467672436e91ac2997ac6b77700eba1e))
ROM_END
//-------------------------------------------------
// rom_region - device-specific ROM region
//-------------------------------------------------
const rom_entry *isa8_cga_mc1502_device::device_rom_region() const
{
return ROM_NAME( mc1502 );
}
UINT32 isa8_cga_device::screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect)
{
mc6845_device *mc6845 = subdevice<mc6845_device>(CGA_MC6845_NAME);
@ -815,34 +788,6 @@ UINT32 isa8_cga_device::screen_update(screen_device &screen, bitmap_rgb32 &bitma
}
const device_type ISA8_CGA_POISK1 = &device_creator<isa8_cga_poisk1_device>;
//-------------------------------------------------
// isa8_cga_poisk1_device - constructor
//-------------------------------------------------
isa8_cga_poisk1_device::isa8_cga_poisk1_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
isa8_cga_device( mconfig, ISA8_CGA_POISK1, "ISA8_CGA_POISK1", tag, owner, clock, "cga_poisk1", __FILE__)
{
m_chr_gen_offset[0] = 0x0000;
m_font_selection_mask = 0;
}
ROM_START( cga_poisk1 )
ROM_REGION(0x2000,"gfx1", 0)
ROM_LOAD( "poisk.cga", 0x0000, 0x0800, CRC(f6eb39f0) SHA1(0b788d8d7a8e92cc612d044abcb2523ad964c200))
ROM_END
//-------------------------------------------------
// rom_region - device-specific ROM region
//-------------------------------------------------
const rom_entry *isa8_cga_poisk1_device::device_rom_region() const
{
return ROM_NAME( cga_poisk1 );
}
const device_type ISA8_CGA_POISK2 = &device_creator<isa8_cga_poisk2_device>;
//-------------------------------------------------
@ -1533,21 +1478,6 @@ void isa8_cga_device::plantronics_w(UINT8 data)
*
*************************************************************************/
WRITE8_MEMBER( isa8_cga_device::char_ram_write )
{
logerror("write char ram %04x %02x\n",offset,data);
m_chr_gen_base[offset + 0x0000] = data;
m_chr_gen_base[offset + 0x0800] = data;
m_chr_gen_base[offset + 0x1000] = data;
m_chr_gen_base[offset + 0x1800] = data;
}
READ8_MEMBER( isa8_cga_device::char_ram_read )
{
return m_chr_gen_base[offset];
}
READ8_MEMBER( isa8_cga_device::io_read )
{
@ -1565,9 +1495,6 @@ READ8_MEMBER( isa8_cga_device::io_read )
case 10:
data = m_vsync | ( ( data & 0x40 ) >> 4 ) | m_hsync;
break;
case 0x0f:
data = m_p3df;
break;
}
return data;
}
@ -1595,20 +1522,6 @@ WRITE8_MEMBER( isa8_cga_device::io_write )
case 0x0d:
plantronics_w(data);
break;
case 0x0f:
// Not sure if some all CGA cards have ability to upload char definition
// The original CGA card had a char rom
// TODO: This should be moved to card implementations that actually had this feature
m_p3df = data;
if (data & 1) {
address_space &space_prg = machine().firstcpu->space(AS_PROGRAM);
space_prg.install_readwrite_handler(0xb8000, 0xb87ff, read8_delegate( FUNC(isa8_cga_device::char_ram_read), this), write8_delegate(FUNC(isa8_cga_device::char_ram_write), this) );
} else {
m_isa->install_bank(0xb8000, 0xb8000 + MIN(0x8000,m_vram_size) - 1, 0, m_vram_size & 0x4000, "bank_cga", m_vram);
}
break;
}
}
@ -2195,3 +2108,94 @@ UINT32 isa8_wyse700_device::screen_update(screen_device &screen, bitmap_rgb32 &b
}
return 0;
}
const device_type ISA8_EC1841_0002 = &device_creator<isa8_ec1841_0002_device>;
//-------------------------------------------------
// isa8_ec1841_0002_device - constructor
//-------------------------------------------------
isa8_ec1841_0002_device::isa8_ec1841_0002_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
isa8_cga_device( mconfig, ISA8_EC1841_0002, "EC 1841.0002 (CGA)", tag, owner, clock, "ec1841_0002", __FILE__)
{
}
//-------------------------------------------------
// device_start - device-specific startup
//-------------------------------------------------
void isa8_ec1841_0002_device::device_start()
{
isa8_cga_device::device_start();
m_isa->install_device(0x3d0, 0x3df, 0, 0, read8_delegate( FUNC(isa8_ec1841_0002_device::io_read), this ), write8_delegate( FUNC(isa8_ec1841_0002_device::io_write), this ) );
}
void isa8_ec1841_0002_device::device_reset()
{
isa8_cga_device::device_reset();
m_p3df = 0;
}
ROM_START( iskr1031 )
ROM_REGION(0x2000,"gfx1", 0)
ROM_LOAD( "iskra-1031_font.bin", 0x0000, 0x2000, CRC(f4d62e80) SHA1(ad7e81a0c9abc224671422bbcf6f6262da92b510))
ROM_END
const rom_entry *isa8_ec1841_0002_device::device_rom_region() const
{
return ROM_NAME( iskr1031 );
}
WRITE8_MEMBER( isa8_ec1841_0002_device::char_ram_write )
{
offset ^= BIT(offset, 12);
// logerror("write char ram %04x %02x\n",offset,data);
m_chr_gen_base[offset + 0x0000] = data;
m_chr_gen_base[offset + 0x0800] = data;
m_chr_gen_base[offset + 0x1000] = data;
m_chr_gen_base[offset + 0x1800] = data;
}
READ8_MEMBER( isa8_ec1841_0002_device::char_ram_read )
{
offset ^= BIT(offset, 12);
return m_chr_gen_base[offset];
}
WRITE8_MEMBER( isa8_ec1841_0002_device::io_write )
{
switch (offset)
{
case 0x0f:
m_p3df = data;
if (data & 1) {
m_isa->install_memory(0xb8000, 0xb9fff, 0, m_vram_size & 0x4000,
read8_delegate( FUNC(isa8_ec1841_0002_device::char_ram_read), this),
write8_delegate(FUNC(isa8_ec1841_0002_device::char_ram_write), this) );
} else {
m_isa->install_bank(0xb8000, 0xb8000 + MIN(0x8000,m_vram_size) - 1, 0, m_vram_size & 0x4000, "bank_cga", m_vram);
}
break;
default:
isa8_cga_device::io_write(space, offset, data);
break;
}
}
READ8_MEMBER( isa8_ec1841_0002_device::io_read )
{
UINT8 data;
switch (offset)
{
case 0x0f:
data = m_p3df;
break;
default:
data = isa8_cga_device::io_read(space, offset);
break;
}
return data;
}

67
src/mess/video/isa_cga.h
View File

@ -18,8 +18,7 @@ class isa8_cga_device :
public device_isa8_card_interface
{
friend class isa8_cga_superimpose_device;
friend class isa8_cga_mc1502_device;
friend class isa8_cga_poisk1_device;
// friend class isa8_ec1841_0002_device;
friend class isa8_cga_poisk2_device;
friend class isa8_cga_pc1512_device;
@ -45,8 +44,6 @@ public:
void plantronics_w(UINT8 data);
virtual DECLARE_READ8_MEMBER( io_read );
virtual DECLARE_WRITE8_MEMBER( io_write );
DECLARE_READ8_MEMBER( char_ram_read );
DECLARE_WRITE8_MEMBER( char_ram_write );
DECLARE_WRITE_LINE_MEMBER( hsync_changed );
DECLARE_WRITE_LINE_MEMBER( vsync_changed );
virtual UINT32 screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
@ -69,7 +66,6 @@ public:
size_t m_vram_size;
UINT8 *m_vram;
bool m_superimpose;
UINT8 m_p3df; /* This should be moved into the appropriate subclass */
UINT8 m_plantronics; /* This should be moved into the appropriate subclass */
offs_t m_start_offset;
};
@ -92,38 +88,6 @@ public:
extern const device_type ISA8_CGA_SUPERIMPOSE;
// ======================> isa8_cga_mc1502_device
class isa8_cga_mc1502_device :
public isa8_cga_device
{
public:
// construction/destruction
isa8_cga_mc1502_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
// optional information overrides
virtual const rom_entry *device_rom_region() const;
};
// device type definition
extern const device_type ISA8_CGA_MC1502;
// ======================> isa8_poisk1_device
class isa8_cga_poisk1_device :
public isa8_cga_device
{
public:
// construction/destruction
isa8_cga_poisk1_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
// optional information overrides
virtual const rom_entry *device_rom_region() const;
};
// device type definition
extern const device_type ISA8_CGA_POISK1;
// ======================> isa8_poisk2_device
class isa8_cga_poisk2_device :
@ -209,4 +173,33 @@ public:
// device type definition
extern const device_type ISA8_WYSE700;
// ======================> isa8_ec1841_0002_device
class isa8_ec1841_0002_device :
public isa8_cga_device
{
public:
// construction/destruction
isa8_ec1841_0002_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
// optional information overrides
virtual const rom_entry *device_rom_region() const;
protected:
// device-level overrides
virtual void device_start();
virtual void device_reset();
public:
virtual DECLARE_READ8_MEMBER( io_read );
virtual DECLARE_WRITE8_MEMBER( io_write );
UINT8 m_p3df;
DECLARE_READ8_MEMBER( char_ram_read );
DECLARE_WRITE8_MEMBER( char_ram_write );
};
// device type definition
extern const device_type ISA8_EC1841_0002;
#endif /* __ISA_CGA_H__ */

320
src/mess/video/poisk1.c Normal file
View File

@ -0,0 +1,320 @@
/*
* Poisk-1 does not have a real mc6845 and always runs in graphics mode.
* Text mode is emulated by BIOS.
* Video RAM in native graphics mode starts at 0xB8000, in emulated text mode -- at 0xBC000.
*/
#include "emu.h"
#include "includes/poisk1.h"
#define CGA_PALETTE_SETS 83
/* one for colour, one for mono, 81 for colour composite */
#include "video/cgapal.h"
#define BG_COLOR(x) (((x) & 7)|(((x) & 0x10) >> 1))
#define VERBOSE_DBG 0
#define DBG_LOG(N,M,A) \
do { \
if(VERBOSE_DBG>=N) \
{ \
if( M ) \
logerror("%11.6f: %-24s",machine().time().as_double(),(char*)M ); \
logerror A; \
} \
} while (0)
//
/*
* Poisk-1 doesn't have a mc6845 and always runs in graphics mode. Text mode is emulated by BIOS;
* NMI is triggered on access to video memory and to mc6845 ports. Address and data are latched into:
*
* Port 28H (offset 0) -- lower 8 bits of address
* Port 29H (offset 1) -- high -//- and mode bits
* Port 2AH (offset 2) -- data
*/
READ8_MEMBER(p1_state::p1_trap_r)
{
UINT8 data = m_video.trap[offset];
DBG_LOG(1,"trap",("R %.2x $%02x\n", 0x28+offset, data));
if (offset == 0)
space.machine().firstcpu->set_input_line(INPUT_LINE_NMI, CLEAR_LINE);
return data;
}
WRITE8_MEMBER(p1_state::p1_trap_w)
{
DBG_LOG(1,"trap",("W %.2x $%02x\n", 0x28+offset, data));
}
READ8_MEMBER(p1_state::p1_cga_r)
{
space.machine().firstcpu->set_input_line(INPUT_LINE_NMI, ASSERT_LINE);
return 0;
}
WRITE8_MEMBER(p1_state::p1_cga_w)
{
UINT16 port = offset + 0x3d0;
DBG_LOG(1,"cga",("W %.4x $%02x\n", port, data));
m_video.trap[2] = data;
m_video.trap[1] = 0xC0 | ((port >> 8) & 0x3f);
m_video.trap[0] = port & 255;
space.machine().firstcpu->set_input_line(INPUT_LINE_NMI, ASSERT_LINE);
}
WRITE8_MEMBER(p1_state::p1_vram_w)
{
DBG_LOG(1,"vram",("W %.4x $%02x\n", offset, data));
if (m_video.videoram_base)
m_video.videoram_base[offset] = data;
m_video.trap[2] = data;
m_video.trap[1] = 0x80 | ((offset >> 8) & 0x3f);
m_video.trap[0] = offset & 255;
space.machine().firstcpu->set_input_line(INPUT_LINE_NMI, ASSERT_LINE);
}
// CGA emulator
/*
068h D42 0..2 R, G, B XXX Foreground/Background color
3 NMI DISABLE NMI trap 1: Disabled 0: Enabled
4 PALETTE XXX Colour palette 0: XXX 1: XXX
5 I (INTENS) XXX Foreground/Background color intensity
6 DISPLAY BANK XXX Video RAM page
7 HIRES 1: 640x200 0: 320x200
*/
WRITE8_MEMBER(p1_state::p1_ppi2_porta_w)
{
address_space &space_prg = machine().firstcpu->space(AS_PROGRAM);
rectangle visarea;
DBG_LOG(1,"color_select_68",("W $%02x\n", data));
// NMI DISABLE
if (BIT(data, 3) != BIT(m_video.color_select_68, 3)) {
if (BIT(data, 3)) {
space_prg.install_readwrite_bank( 0xb8000, 0xbbfff, "bank11" );
} else {
space_prg.install_read_bank( 0xb8000, 0xbbfff, "bank11" );
space_prg.install_write_handler( 0xb8000, 0xbbfff, WRITE8_DELEGATE(p1_state, p1_vram_w) );
}
}
// DISPLAY BANK
if (BIT(data, 6) != BIT(m_video.color_select_68, 6)) {
if (BIT(data, 6))
m_video.videoram = m_video.videoram_base + 0x4000;
else
m_video.videoram = m_video.videoram_base;
}
// HIRES -- XXX
if (BIT(data, 7) != BIT(m_video.color_select_68, 7)) {
if (BIT(data, 7))
machine().primary_screen->set_visible_area(0, 640-1, 0, 200-1);
else
machine().primary_screen->set_visible_area(0, 320-1, 0, 200-1);
}
m_video.color_select_68 = data;
set_palette_luts();
}
/*
06Ah Dxx 6 Enable/Disable color burst (?)
7 Enable/Disable D7H/D7L
*/
WRITE8_MEMBER(p1_state::p1_ppi_portc_w)
{
DBG_LOG(1,"mode_control_6a",("W $%02x\n", data));
m_video.mode_control_6a = data;
set_palette_luts();
}
void p1_state::set_palette_luts(void)
{
/* Setup 2bpp palette lookup table */
// HIRES
if ( m_video.color_select_68 & 0x80 )
{
m_video.palette_lut_2bpp[0] = 0;
}
else
{
m_video.palette_lut_2bpp[0] = BG_COLOR(m_video.color_select_68);
}
// B&W -- XXX
/*
if ( m_video.mode_control_6a & 0x40 )
{
m_video.palette_lut_2bpp[1] = ( ( m_video.color_select_68 & 0x20 ) >> 2 ) | 3;
m_video.palette_lut_2bpp[2] = ( ( m_video.color_select_68 & 0x20 ) >> 2 ) | 4;
m_video.palette_lut_2bpp[3] = ( ( m_video.color_select_68 & 0x20 ) >> 2 ) | 7;
}
else
*/
{
// PALETTE
if ( m_video.color_select_68 & 0x20 )
{
m_video.palette_lut_2bpp[1] = ( ( m_video.color_select_68 & 0x20 ) >> 2 ) | 3;
m_video.palette_lut_2bpp[2] = ( ( m_video.color_select_68 & 0x20 ) >> 2 ) | 5;
m_video.palette_lut_2bpp[3] = ( ( m_video.color_select_68 & 0x20 ) >> 2 ) | 7;
}
else
{
m_video.palette_lut_2bpp[1] = ( ( m_video.color_select_68 & 0x20 ) >> 2 ) | 2;
m_video.palette_lut_2bpp[2] = ( ( m_video.color_select_68 & 0x20 ) >> 2 ) | 4;
m_video.palette_lut_2bpp[3] = ( ( m_video.color_select_68 & 0x20 ) >> 2 ) | 6;
}
}
}
/***************************************************************************
Draw graphics mode with 320x200 pixels (default) with 2 bits/pixel.
Even scanlines are from CGA_base + 0x0000, odd from CGA_base + 0x2000
cga fetches 2 byte per mc6845 access.
***************************************************************************/
POISK1_UPDATE_ROW( p1_state::cga_gfx_2bpp_update_row )
{
const rgb_t *palette = palette_entry_list_raw(bitmap.palette());
UINT32 *p = &bitmap.pix32(ra);
UINT16 odd, offset;
int i;
if ( ra == 0 ) DBG_LOG(1,"cga_gfx_2bpp_update_row",("\n"));
odd = ( ra & 1 ) << 13;
offset = ( ma & 0x1fff ) | odd;
for ( i = 0; i < stride; i++ )
{
UINT8 data = videoram[ offset++ ];
*p = palette[m_video.palette_lut_2bpp[ ( data >> 6 ) & 0x03 ]]; p++;
*p = palette[m_video.palette_lut_2bpp[ ( data >> 4 ) & 0x03 ]]; p++;
*p = palette[m_video.palette_lut_2bpp[ ( data >> 2 ) & 0x03 ]]; p++;
*p = palette[m_video.palette_lut_2bpp[ data & 0x03 ]]; p++;
}
}
/***************************************************************************
Draw graphics mode with 640x200 pixels (default).
The cell size is 1x1 (1 scanline is the real default)
Even scanlines are from CGA_base + 0x0000, odd from CGA_base + 0x2000
***************************************************************************/
POISK1_UPDATE_ROW( p1_state::cga_gfx_1bpp_update_row )
{
const rgb_t *palette = palette_entry_list_raw(bitmap.palette());
UINT32 *p = &bitmap.pix32(ra);
UINT8 fg = 15, bg = BG_COLOR(m_video.color_select_68);
UINT16 odd, offset;
int i;
if ( ra == 0 ) DBG_LOG(1,"cga_gfx_1bpp_update_row",("bg %d\n", bg));
odd = ( ra & 1 ) << 13;
offset = ( ma & 0x1fff ) | odd;
for ( i = 0; i < stride; i++ )
{
UINT8 data = videoram[ offset++ ];
*p = palette[( data & 0x80 ) ? fg : bg ]; p++;
*p = palette[( data & 0x40 ) ? fg : bg ]; p++;
*p = palette[( data & 0x20 ) ? fg : bg ]; p++;
*p = palette[( data & 0x10 ) ? fg : bg ]; p++;
*p = palette[( data & 0x08 ) ? fg : bg ]; p++;
*p = palette[( data & 0x04 ) ? fg : bg ]; p++;
*p = palette[( data & 0x02 ) ? fg : bg ]; p++;
*p = palette[( data & 0x01 ) ? fg : bg ]; p++;
}
}
/***************************************************************************
Draw graphics mode with 640x200 pixels + extra highlight color for text
mode emulation
Even scanlines are from CGA_base + 0x0000, odd from CGA_base + 0x2000
***************************************************************************/
POISK1_UPDATE_ROW( p1_state::poisk1_gfx_1bpp_update_row )
{
const rgb_t *palette = palette_entry_list_raw(bitmap.palette());
UINT32 *p = &bitmap.pix32(ra);
UINT8 fg, bg = BG_COLOR(m_video.color_select_68);
UINT16 odd, offset;
int i;
if ( ra == 0 ) DBG_LOG(1,"poisk1_gfx_1bpp_update_row",("bg %d\n", bg));
odd = ( ra & 1 ) << 13;
offset = ( ma & 0x1fff ) | odd;
for ( i = 0; i < stride; i++ )
{
UINT8 data = videoram[ offset++ ];
fg = (data & 0x80) ? ( (m_video.color_select_68 & 0x20) ? 10 : 11 ) : 15; // XXX
*p = palette[bg]; p++;
*p = palette[( data & 0x40 ) ? fg : bg ]; p++;
*p = palette[( data & 0x20 ) ? fg : bg ]; p++;
*p = palette[( data & 0x10 ) ? fg : bg ]; p++;
*p = palette[( data & 0x08 ) ? fg : bg ]; p++;
*p = palette[( data & 0x04 ) ? fg : bg ]; p++;
*p = palette[( data & 0x02 ) ? fg : bg ]; p++;
*p = palette[( data & 0x01 ) ? fg : bg ]; p++;
}
}
/* Initialise the cga palette */
void p1_state::palette_init()
{
int i;
DBG_LOG(0,"init",("palette_init()\n"));
for ( i = 0; i < CGA_PALETTE_SETS * 16; i++ )
{
palette_set_color_rgb( machine(), i, cga_palette[i][0], cga_palette[i][1], cga_palette[i][2] );
}
}
void p1_state::video_start()
{
address_space &space = machine().firstcpu->space( AS_PROGRAM );
DBG_LOG(0,"init",("video_start()\n"));
memset(&m_video, 0, sizeof(m_video));
m_video.videoram = m_video.videoram_base = auto_alloc_array(machine(), UINT8, 0x8000);
m_video.stride = 80;
space.install_readwrite_bank(0xb8000, 0xbffff, "bank11" );
machine().root_device().membank("bank11")->set_base(m_video.videoram);
}
UINT32 p1_state::screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect)
{
UINT16 ra, ma = 0;
if (!m_video.stride || !m_video.videoram) return 0;
// bit 6 of 6Ah disables color burst -- not implemented
for (ra = cliprect.min_y; ra <= cliprect.max_y; ra++)
{
if (BIT(m_video.color_select_68, 7)) {
if (BIT(m_video.mode_control_6a, 7)) {
cga_gfx_1bpp_update_row(bitmap, cliprect, m_video.videoram, ma, ra, m_video.stride);
} else {
poisk1_gfx_1bpp_update_row(bitmap, cliprect, m_video.videoram, ma, ra, m_video.stride);
}
} else {
cga_gfx_2bpp_update_row(bitmap, cliprect, m_video.videoram, ma, ra, m_video.stride);
}
if (ra & 1) ma += m_video.stride;
}
return 0;
}

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src/mess/video/poisk1.h Normal file
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#include "emu.h"
#define CGA_PALETTE_SETS 83
/* one for colour, one for mono, 81 for colour composite */
INPUT_PORTS_EXTERN( pcvideo_poisk1 );
MACHINE_CONFIG_EXTERN( pcvideo_poisk1 );