mirror of
https://github.com/holub/mame
synced 2025-05-13 17:38:21 +03:00
Cleanups and version bump.
This commit is contained in:
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e73fdd89b9
commit
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@ -17,7 +17,7 @@
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PA6 8 | | 33 PB6
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PA5 9 | | 32 PB5
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PA4 10 | Z8420 | 31 PB4
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GND 11 | | 30 PB3
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GND 11 | | 30 PB3
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PA3 12 | | 29 PB2
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PA2 13 | | 28 PB1
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PA1 14 | | 27 PB0
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@ -246,8 +246,8 @@ static INPUT_PORTS_START( exerion )
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PORT_DIPSETTING( 0x02, "3" )
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PORT_DIPSETTING( 0x03, "4" )
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PORT_DIPSETTING( 0x04, "5" )
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// PORT_DIPSETTING( 0x05, "5" ) /* duplicated setting */
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// PORT_DIPSETTING( 0x06, "5" ) /* duplicated setting */
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// PORT_DIPSETTING( 0x05, "5" ) /* duplicated setting */
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// PORT_DIPSETTING( 0x06, "5" ) /* duplicated setting */
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PORT_DIPSETTING( 0x07, "254 (Cheat)")
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PORT_DIPNAME( 0x18, 0x00, DEF_STR( Bonus_Life ) )
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PORT_DIPSETTING( 0x00, "10000" )
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@ -2601,7 +2601,7 @@ ROM_END
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- 2x HY18CV85 (electrically-erasable PLD)
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Some versions have Mexican Rockwell R65c02.
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The game doesn't work with a regular 65c02 CPU.
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The game doesn't work with a regular 65c02 CPU.
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*/
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ROM_START( magicrd2 ) /* Impera */
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@ -2821,7 +2821,7 @@ Surely selectable through a PLD.
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ROM_START( jolyjokrb )
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ROM_REGION( 0x18000, "maincpu", 0 ) /* Two slightly different programs. Using the 1st one...*/
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ROM_LOAD( "unbekannt.bin", 0x8000, 0x10000, CRC(327fa3d7) SHA1(2435aada2377b2f8f01d059a7aba9bc7a8993537) ) /* 1st prg */
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// ROM_LOAD( "unbekannt.bin", 0x0000, 0x10000, CRC(327fa3d7) SHA1(2435aada2377b2f8f01d059a7aba9bc7a8993537) ) /* 2nd prg */
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// ROM_LOAD( "unbekannt.bin", 0x0000, 0x10000, CRC(327fa3d7) SHA1(2435aada2377b2f8f01d059a7aba9bc7a8993537) ) /* 2nd prg */
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ROM_REGION( 0x20000, "gfx1", 0 )
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ROM_LOAD( "ic25.bin", 0x00000, 0x10000, CRC(1bd067af) SHA1(9436fe085ba63c00a12ea80903470a84535e3dc1) )
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@ -378,7 +378,7 @@ static ADDRESS_MAP_START( slave_1986_map, ADDRESS_SPACE_PROGRAM, 8 )
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AM_RANGE(0x7400, 0x74ff) AM_RAM AM_BASE_GENERIC(spriteram)
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AM_RANGE(0x7600, 0x7600) AM_DEVWRITE("crtc", mc6845_address_w)
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AM_RANGE(0x7601, 0x7601) AM_DEVREADWRITE("crtc", mc6845_register_r, mc6845_register_w)
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// AM_RANGE(0x7800, 0x7803) AM_READ(test_r)
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// AM_RANGE(0x7800, 0x7803) AM_READ(test_r)
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AM_RANGE(0x7a00, 0x7a00) AM_RAM //buffer for the key matrix
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AM_RANGE(0x7c00, 0x7c00) AM_READ_PORT("DSW")
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ADDRESS_MAP_END
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@ -1091,7 +1091,7 @@ ROM_START( kingdrbb ) // has 'Made in Taiwan' on the PCB.
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ROM_REGION( 0x200, "proms", 0 )
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ROM_COPY( "raw_prom", 0x1000, 0x000, 0x200 )
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// ROM_COPY( "raw_prom", 0x3000, 0x200, 0x200 ) //identical to 0x1000 bank
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// ROM_COPY( "raw_prom", 0x3000, 0x200, 0x200 ) //identical to 0x1000 bank
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ROM_REGION( 0x4000, "pals", 0 ) // all read protected
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ROM_LOAD( "palce16v.u101.bin", 0x0000, 0x117, CRC(c89d2f52) SHA1(f9d52d9c42ef95b7b85bbf6d09888ebdeac11fd3) )
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@ -145,7 +145,7 @@ static WRITE8_HANDLER( output_w )
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/* correct? */
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nmi_enable = data & 1;
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// other values unknown
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// printf("%02x\n",data);
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// printf("%02x\n",data);
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}
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static READ8_HANDLER( test_r )
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@ -257,7 +257,7 @@ static DRIVER_INIT( luckgrln )
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#endif
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// ??
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// memory_set_bankptr(machine, "bank1",&rom[0x010000]);
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// memory_set_bankptr(machine, "bank1",&rom[0x010000]);
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}
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ROM_START( luckgrln )
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@ -136,15 +136,15 @@ static WRITE8_HANDLER( macs_output_w )
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{
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case 0:
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/*
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--x- ---- sets RAM bank?
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---- -x-- Cassette B slot
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---- --x- Cassette A slot
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*/
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--x- ---- sets RAM bank?
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---- -x-- Cassette B slot
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---- --x- Cassette A slot
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*/
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if(macs_rev == 1)
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{
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/* FIXME: dunno if this RAM bank is right, DASM tracking made on the POST screens indicates that there's just one RAM bank,
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but then MACS2 games locks up. */
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but then MACS2 games locks up. */
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memory_set_bankptr(space->machine, "bank3", &macs_ram1[((data&0x20)>>5)*0x1000+0x000] );
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macs_cart_slot = (data & 0xc) >> 2;
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@ -22,7 +22,7 @@ public:
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/* memory pointers */
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UINT8 * videoram;
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// UINT8 * nvram; // this currently uses generic nvram handlers
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// UINT8 * nvram; // this currently uses generic nvram handlers
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/* video-related */
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tilemap_t *tilemap;
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@ -69,7 +69,7 @@ public:
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UINT8 bknd_col;
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UINT8 port02_status;
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UINT8 vbank; /* video page select signal, likely for double buffering ?*/
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UINT8 vbank; /* video page select signal, likely for double buffering ?*/
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UINT32 xpos, ypos, pix_xsize, pix_ysize;
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UINT8 color1, color2, mode, plane;
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UINT8 lookup_ram[0x100*4];
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@ -318,13 +318,13 @@ static INTERRUPT_GEN( meritm_interrupt )
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static void meritm_vdp0_interrupt(running_machine *machine, int i)
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{
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/* this is not used as the v9938 interrupt callbacks are broken
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interrupts seem to be fired quite randomly */
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interrupts seem to be fired quite randomly */
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}
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static void meritm_vdp1_interrupt(running_machine *machine, int i)
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{
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/* this is not used as the v9938 interrupt callbacks are broken
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interrupts seem to be fired quite randomly */
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interrupts seem to be fired quite randomly */
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}
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static int layer0_enabled, layer1_enabled;
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@ -819,18 +819,18 @@ static READ8_DEVICE_HANDLER(meritm_audio_pio_port_a_r)
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{
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/*
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bit signal description
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bit signal description
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0 BANK0
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1 BANK1
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2 BANK2
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3 /VINT1 V9938 #1 INT
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4 /VINT2 V9938 #2 INT
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5 BANK3
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6
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7
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0 BANK0
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1 BANK1
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2 BANK2
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3 /VINT1 V9938 #1 INT
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4 /VINT2 V9938 #2 INT
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5 BANK3
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6
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7
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*/
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*/
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return meritm_vint;
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};
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@ -839,18 +839,18 @@ static READ8_DEVICE_HANDLER(meritm_audio_pio_port_b_r)
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{
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/*
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bit description
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bit description
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0 J4 D0
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1 J4 D1
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2 J4 D2
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3 J4 D3
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4 J4 D4
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5 J4 D5
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6 J4 D6
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7 J4 D7
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0 J4 D0
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1 J4 D1
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2 J4 D2
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3 J4 D3
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4 J4 D4
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5 J4 D5
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6 J4 D6
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7 J4 D7
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*/
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*/
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return ds1204_r();
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};
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@ -859,18 +859,18 @@ static WRITE8_DEVICE_HANDLER(meritm_audio_pio_port_a_w)
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{
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/*
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bit signal description
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bit signal description
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0 BANK0
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1 BANK1
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2 BANK2
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3 /VINT1 V9938 #1 INT
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4 /VINT2 V9938 #2 INT
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5 BANK3
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6
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7
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0 BANK0
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1 BANK1
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2 BANK2
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3 /VINT1 V9938 #1 INT
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4 /VINT2 V9938 #2 INT
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5 BANK3
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6
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7
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*/
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*/
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meritm_bank = (data & 7) | ((data >> 2) & 0x18);
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//logerror("Writing BANK with %x (raw = %x)\n", meritm_bank, data);
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@ -880,18 +880,18 @@ static WRITE8_DEVICE_HANDLER(meritm_audio_pio_port_b_w)
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{
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/*
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bit description
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bit description
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0 J4 D0
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1 J4 D1
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2 J4 D2
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3 J4 D3
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4 J4 D4
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5 J4 D5
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6 J4 D6
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7 J4 D7
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0 J4 D0
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1 J4 D1
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2 J4 D2
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3 J4 D3
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4 J4 D4
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5 J4 D5
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6 J4 D6
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7 J4 D7
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*/
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*/
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ds1204_w((data & 0x4) >> 2, (data & 0x2) >> 1, data & 0x01);
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};
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@ -900,36 +900,36 @@ static WRITE8_DEVICE_HANDLER(meritm_io_pio_port_a_w)
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{
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/*
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bit description
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bit description
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0 J3 PE0
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1 J3 PE1
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2 J3 PE2
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3 J3 PE3
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4 J3 PE4
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5 J3 PE5
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6 J3 PE6
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7 J3 PE7
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0 J3 PE0
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1 J3 PE1
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2 J3 PE2
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3 J3 PE3
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4 J3 PE4
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5 J3 PE5
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6 J3 PE6
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7 J3 PE7
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*/
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*/
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};
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static WRITE8_DEVICE_HANDLER(meritm_io_pio_port_b_w)
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{
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/*
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bit description
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bit description
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0 J3 PF0
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1 J3 PF1
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2 J3 PF2
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3 J3 PF3
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4 J3 PF4
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5 J3 PF5
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6 J3 PF6
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7 J3 PF7
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0 J3 PF0
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1 J3 PF1
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2 J3 PF2
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3 J3 PF3
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4 J3 PF4
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5 J3 PF5
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6 J3 PF6
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7 J3 PF7
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*/
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*/
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};
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static Z80PIO_INTERFACE( meritm_audio_pio_intf )
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@ -37,7 +37,7 @@ Soul Calibur (SOC11/VER.A2) (C) Namco, 1998 COH-700 SYS
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Soul Calibur (SOC11/VER.B) (C) Namco, 1998 COH-700 SYSTEM12 MOTHER(B) SYSTEM12 M5F2 KC020
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Soul Calibur (SOC11/VER.C) (C) Namco, 1998 COH-700 SYSTEM12 MOTHER(B) SYSTEM12 M5F4 KC020
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Soul Calibur (SOC13/VER.B) (C) Namco, 1998 COH-700 SYSTEM12 MOTHER(B) SYSTEM12 M5F4 KC020
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Soul Calibur (SOC14/VER.B) (C) Namco, 1998 COH-700 SYSTEM12 MOTHER(B) SYSTEM12 M5F4 KC020
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Soul Calibur (SOC14/VER.B) (C) Namco, 1998 COH-700 SYSTEM12 MOTHER(B) SYSTEM12 M5F4 KC020
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Soul Calibur (SOC14/VER.C) (C) Namco, 1998 COH-700 SYSTEM12 MOTHER JO 11-04-98 none
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Super World Stadium '98 (SS81/VER.A) (C) Namco, 1998 COH-700 SYSTEM12 MOTHER(B) SYSTEM12 M4F6 KC025
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Super World Stadium '99 (SS91/VER.A3) (C) Namco, 1999 COH-700 SYSTEM12 MOTHER(B) SYSTEM12 M5F4 KC043
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@ -1168,7 +1168,7 @@ static READ16_HANDLER(s23_c417_16_r)
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case 0: return 0x8e | (video_screen_get_vblank(space->machine->primary_screen) ? 0x8000 : 0);
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case 1: return c417_adr;
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case 4:
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// logerror("c417_r %04x = %04x (%08x, %08x)\n", c417_adr, c417_ram[c417_adr], cpu_get_pc(space->cpu), (unsigned int)cpu_get_reg(space->cpu, MIPS3_R31));
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// logerror("c417_r %04x = %04x (%08x, %08x)\n", c417_adr, c417_ram[c417_adr], cpu_get_pc(space->cpu), (unsigned int)cpu_get_reg(space->cpu, MIPS3_R31));
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return c417_ram[c417_adr];
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}
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@ -1213,7 +1213,7 @@ static WRITE32_HANDLER(s23_c417_32_w)
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static READ16_HANDLER(s23_c412_ram_r)
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{
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// logerror("c412_ram_r %06x (%08x, %08x)\n", offset, cpu_get_pc(space->cpu), (unsigned int)cpu_get_reg(space->cpu, MIPS3_R31));
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// logerror("c412_ram_r %06x (%08x, %08x)\n", offset, cpu_get_pc(space->cpu), (unsigned int)cpu_get_reg(space->cpu, MIPS3_R31));
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if(offset < 0x100000)
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return c412_sdram_a[offset & 0xfffff];
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else if(offset < 0x200000)
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@ -1228,7 +1228,7 @@ static READ16_HANDLER(s23_c412_ram_r)
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static WRITE16_HANDLER(s23_c412_ram_w)
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{
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// logerror("c412_ram_w %06x = %04x (%08x, %08x)\n", offset, data, cpu_get_pc(space->cpu), (unsigned int)cpu_get_reg(space->cpu, MIPS3_R31));
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// logerror("c412_ram_w %06x = %04x (%08x, %08x)\n", offset, data, cpu_get_pc(space->cpu), (unsigned int)cpu_get_reg(space->cpu, MIPS3_R31));
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if(offset < 0x100000)
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COMBINE_DATA(c412_sdram_a + (offset & 0xfffff));
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else if(offset < 0x200000)
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@ -1284,7 +1284,7 @@ static WRITE32_HANDLER(s23_c412_32_w)
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static READ16_HANDLER(s23_c421_ram_r)
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{
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// logerror("c421_ram_r %06x (%08x, %08x)\n", offset, cpu_get_pc(space->cpu), (unsigned int)cpu_get_reg(space->cpu, MIPS3_R31));
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// logerror("c421_ram_r %06x (%08x, %08x)\n", offset, cpu_get_pc(space->cpu), (unsigned int)cpu_get_reg(space->cpu, MIPS3_R31));
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if(offset < 0x40000)
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return c421_dram_a[offset & 0x3ffff];
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else if(offset < 0x80000)
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@ -1297,7 +1297,7 @@ static READ16_HANDLER(s23_c421_ram_r)
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static WRITE16_HANDLER(s23_c421_ram_w)
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{
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// logerror("c421_ram_w %06x = %04x (%08x, %08x)\n", offset, data, cpu_get_pc(space->cpu), (unsigned int)cpu_get_reg(space->cpu, MIPS3_R31));
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// logerror("c421_ram_w %06x = %04x (%08x, %08x)\n", offset, data, cpu_get_pc(space->cpu), (unsigned int)cpu_get_reg(space->cpu, MIPS3_R31));
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if(offset < 0x40000)
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COMBINE_DATA(c421_dram_a + (offset & 0x3ffff));
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else if(offset < 0x80000)
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@ -1491,9 +1491,9 @@ static READ32_HANDLER( gorgon_magic_r )
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}
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/*
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Final Furlong has a bug: it forgets to halt the H8/3002 before it zeros out the shared RAM
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which contains the H8's stack and other working set. This crashes MAME due to the PC going
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off into the weeds, so we intercept
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Final Furlong has a bug: it forgets to halt the H8/3002 before it zeros out the shared RAM
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which contains the H8's stack and other working set. This crashes MAME due to the PC going
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off into the weeds, so we intercept
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*/
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static READ32_HANDLER( gorgon_sharedram_r )
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@ -4599,9 +4599,9 @@ ROM_START( ggxx )
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DISK_IMAGE_READONLY( "gdl-0011", 0, SHA1(b7328eb2c588d55284bdcea0fe89bb8e629a8669) )
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ROM_REGION( 0x50, "picreturn", ROMREGION_ERASE)
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// ROM_LOAD("317-5082-com.data", 0x00, 0x50, CRC(fa31209d) SHA1(bb18e6412a02510832f7200a06a3179ef1695ef2) )
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// ROM_REGION( 0x9a49, "pichex", ROMREGION_ERASE)
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// ROM_LOAD("gdl-0011.hex", 0x00, 0x0009a49, CRC(36361df8) SHA1(86aa50c9b3debd49c7b67f1c9bfd052c0fefc593) ) // actual decap results for ggxx in ascii/hex form
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// ROM_LOAD("317-5082-com.data", 0x00, 0x50, CRC(fa31209d) SHA1(bb18e6412a02510832f7200a06a3179ef1695ef2) )
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// ROM_REGION( 0x9a49, "pichex", ROMREGION_ERASE)
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// ROM_LOAD("gdl-0011.hex", 0x00, 0x0009a49, CRC(36361df8) SHA1(86aa50c9b3debd49c7b67f1c9bfd052c0fefc593) ) // actual decap results for ggxx in ascii/hex form
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ROM_REGION( 0x4000, "pic", ROMREGION_ERASEFF)
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//PIC16C622A (317-5082-COM)
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@ -5715,7 +5715,7 @@ ROM_START( vf4cart )
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ROM_END
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/*
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Tests IC1 like gram2000 if actel_id is 0xffff, see ROM_COPY
|
||||
Tests IC1 like gram2000 if actel_id is 0xffff, see ROM_COPY
|
||||
*/
|
||||
ROM_START( vf4evoct )
|
||||
NAOMI2_BIOS
|
||||
|
@ -64,7 +64,7 @@ public:
|
||||
int ay_select;
|
||||
int ack_data;
|
||||
UINT8 n7751_command;
|
||||
// UINT32 n7751_rom_address;
|
||||
// UINT32 n7751_rom_address;
|
||||
int sound_addr;
|
||||
int n7751_busy;
|
||||
|
||||
|
@ -360,7 +360,7 @@ static MACHINE_DRIVER_START( unclepoo )
|
||||
MDRV_CPU_ADD("subcpu", Z80,18000000/12) /* ? MHz */
|
||||
MDRV_CPU_PROGRAM_MAP(unclepoo_sub_map)
|
||||
MDRV_CPU_IO_MAP(unclepoo_sub_portmap)
|
||||
// MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
|
||||
// MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
|
||||
|
||||
/* video hardware */
|
||||
MDRV_SCREEN_ADD("screen", RASTER)
|
||||
|
@ -50,7 +50,7 @@ static MACHINE_DRIVER_START( rgum )
|
||||
/* basic machine hardware */
|
||||
MDRV_CPU_ADD("maincpu", Z80,8000000) /* ? MHz */
|
||||
MDRV_CPU_PROGRAM_MAP(rgum_map)
|
||||
// MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
|
||||
// MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
|
||||
|
||||
/* video hardware */
|
||||
MDRV_SCREEN_ADD("screen", RASTER)
|
||||
|
@ -663,11 +663,11 @@ static INPUT_PORTS_START( truxton )
|
||||
PORT_START("TJUMP") /* Territory Jumper Block - see notes */
|
||||
PORT_DIPNAME( 0x07, 0x02, "Territory/Copyright" )
|
||||
PORT_DIPSETTING( 0x02, "Europe/Taito Corp" ) /* TOAPLAN_COINAGE_WORLD */
|
||||
// PORT_DIPSETTING( 0x03, "Europe/Taito Corp" ) /* TOAPLAN_COINAGE_JAPAN_OLD */
|
||||
// PORT_DIPSETTING( 0x06, "Europe/Taito America" ) /* TOAPLAN_COINAGE_WORLD */
|
||||
// PORT_DIPSETTING( 0x07, "Europe/Taito America" ) /* TOAPLAN_COINAGE_JAPAN_OLD */
|
||||
// PORT_DIPSETTING( 0x03, "Europe/Taito Corp" ) /* TOAPLAN_COINAGE_JAPAN_OLD */
|
||||
// PORT_DIPSETTING( 0x06, "Europe/Taito America" ) /* TOAPLAN_COINAGE_WORLD */
|
||||
// PORT_DIPSETTING( 0x07, "Europe/Taito America" ) /* TOAPLAN_COINAGE_JAPAN_OLD */
|
||||
PORT_DIPSETTING( 0x04, "USA/Taito America" ) /* TOAPLAN_COINAGE_JAPAN_OLD */
|
||||
// PORT_DIPSETTING( 0x05, "USA/Taito America" ) /* TOAPLAN_COINAGE_JAPAN_OLD */
|
||||
// PORT_DIPSETTING( 0x05, "USA/Taito America" ) /* TOAPLAN_COINAGE_JAPAN_OLD */
|
||||
PORT_DIPSETTING( 0x01, "USA/Taito America (Romstar)" )/*TOAPLAN_COINAGE_JAPAN_OLD */
|
||||
PORT_DIPSETTING( 0x00, "Japan/Taito Corp" ) /* TOAPLAN_COINAGE_JAPAN_OLD */
|
||||
PORT_DIPUNUSED( 0x08, IP_ACTIVE_HIGH )
|
||||
|
@ -473,12 +473,12 @@ static INPUT_PORTS_START( skyshark )
|
||||
PORT_DIPSETTING( 0x10, DEF_STR( 2C_1C ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( 1C_1C ) )
|
||||
PORT_DIPSETTING( 0x20, DEF_STR( 1C_2C ) )
|
||||
// PORT_DIPSETTING( 0x30, DEF_STR( 1C_2C ) ) /* duplicated setting */
|
||||
// PORT_DIPSETTING( 0x30, DEF_STR( 1C_2C ) ) /* duplicated setting */
|
||||
PORT_DIPNAME( 0xc0, 0x00, DEF_STR( Coin_B ) ) /* table at 0x000316 */
|
||||
PORT_DIPSETTING( 0x40, DEF_STR( 2C_1C ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( 1C_1C ) )
|
||||
PORT_DIPSETTING( 0x80, DEF_STR( 1C_2C ) )
|
||||
// PORT_DIPSETTING( 0xc0, DEF_STR( 1C_2C ) ) /* duplicated setting */
|
||||
// PORT_DIPSETTING( 0xc0, DEF_STR( 1C_2C ) ) /* duplicated setting */
|
||||
INPUT_PORTS_END
|
||||
|
||||
/* verified from M68000 code */
|
||||
|
@ -20,7 +20,7 @@ public:
|
||||
UINT16 * pf2_control;
|
||||
UINT16 * pf3_control;
|
||||
UINT16 * spriteram;
|
||||
// UINT16 * paletteram; // this currently uses generic palette handlers
|
||||
// UINT16 * paletteram; // this currently uses generic palette handlers
|
||||
size_t spriteram_size;
|
||||
|
||||
/* video-related */
|
||||
|
@ -15,7 +15,7 @@ public:
|
||||
UINT16 * spriteram_old;
|
||||
UINT16 * vidregs;
|
||||
UINT16 * vidregs_old;
|
||||
// UINT16 * paletteram; // this currently uses generic palette handlers
|
||||
// UINT16 * paletteram; // this currently uses generic palette handlers
|
||||
size_t spriteram_size;
|
||||
|
||||
/* video-related */
|
||||
|
@ -16,8 +16,8 @@ public:
|
||||
UINT8 * fgram;
|
||||
UINT8 * scrollx;
|
||||
UINT8 * otherram;
|
||||
// UINT8 * paletteram; // currently this uses generic palette handling
|
||||
// UINT8 * paletteram2; // currently this uses generic palette handling
|
||||
// UINT8 * paletteram; // currently this uses generic palette handling
|
||||
// UINT8 * paletteram2; // currently this uses generic palette handling
|
||||
UINT8 * spriteram;
|
||||
size_t spriteram_size;
|
||||
|
||||
|
@ -16,7 +16,7 @@ public:
|
||||
UINT8 * bg_scrolly;
|
||||
UINT8 * videoram;
|
||||
UINT8 * spriteram;
|
||||
// UINT8 * paletteram; // currently this uses generic palette handling
|
||||
// UINT8 * paletteram; // currently this uses generic palette handling
|
||||
size_t spriteram_size;
|
||||
size_t videoram_size;
|
||||
|
||||
|
@ -14,7 +14,7 @@ public:
|
||||
/* memory pointers */
|
||||
UINT8 * fgvideoram;
|
||||
UINT8 * bgvideoram;
|
||||
// UINT8 * paletteram; // currently this uses generic palette handling
|
||||
// UINT8 * paletteram; // currently this uses generic palette handling
|
||||
|
||||
/* video-related */
|
||||
tilemap_t *bg_tilemap,*fg_tilemap;
|
||||
|
@ -14,7 +14,7 @@ public:
|
||||
/* memory pointers */
|
||||
UINT8 * videoram;
|
||||
UINT8 * spriteram;
|
||||
// UINT8 * paletteram; // currently this uses generic palette handling
|
||||
// UINT8 * paletteram; // currently this uses generic palette handling
|
||||
|
||||
/* video-related */
|
||||
int gfx_bank;
|
||||
|
@ -34,12 +34,12 @@ static UINT8 asciihex_to_dec(UINT8 in)
|
||||
return in - 0x37;
|
||||
}
|
||||
/*
|
||||
else
|
||||
if (in>=0x61 && in<=0x66)
|
||||
{
|
||||
return in - 0x57;
|
||||
}
|
||||
*/
|
||||
else
|
||||
if (in>=0x61 && in<=0x66)
|
||||
{
|
||||
return in - 0x57;
|
||||
}
|
||||
*/
|
||||
else
|
||||
{
|
||||
fatalerror("unexpected value in asciihex_to_dec");
|
||||
|
@ -284,8 +284,8 @@ static const naomibd_config_table naomibd_translate_tbl[] =
|
||||
0xdd19, 0, 0x0c0000, 0x2428, 0, 0x0d0000, 0x3329, 0, 0x0e0000, 0x2142, 0, 0x0f0000,
|
||||
0xffffffff, 0xffffffff, 0xffffffff } },
|
||||
{ "sgtetris", 0, -1, { 0x1234, 0, 0, 0xffffffff, 0xffffffff, 0xffffffff } }, // 0x8ae51, uses compression
|
||||
// { "virnbao", 0, 0x68b58, { 0, 0, 0, 0xffffffff, 0xffffffff, 0xffffffff } }, // note: "virnba" set doesn't have protection
|
||||
// { "vs2_2k", 0, 0x88b08, { 0, 0, 0, 0xffffffff, 0xffffffff, 0xffffffff } },
|
||||
// { "virnbao", 0, 0x68b58, { 0, 0, 0, 0xffffffff, 0xffffffff, 0xffffffff } }, // note: "virnba" set doesn't have protection
|
||||
// { "vs2_2k", 0, 0x88b08, { 0, 0, 0, 0xffffffff, 0xffffffff, 0xffffffff } },
|
||||
};
|
||||
|
||||
// forward declaration for decrypt function
|
||||
|
@ -1329,7 +1329,7 @@ WRITE8_HANDLER( snes_w_io )
|
||||
break;
|
||||
case WRMPYB: /* Multiplier B */
|
||||
snes_ram[WRMPYB] = data;
|
||||
// timer_adjust_oneshot(snes_mult_timer, cputag_clocks_to_attotime(space->machine, "maincpu", 8), 0);
|
||||
// timer_adjust_oneshot(snes_mult_timer, cputag_clocks_to_attotime(space->machine, "maincpu", 8), 0);
|
||||
{
|
||||
UINT32 c = snes_ram[WRMPYA] * snes_ram[WRMPYB];
|
||||
snes_ram[RDMPYL] = c & 0xff;
|
||||
@ -1341,7 +1341,7 @@ WRITE8_HANDLER( snes_w_io )
|
||||
break;
|
||||
case WRDVDD: /* Divisor */
|
||||
snes_ram[WRDVDD] = data;
|
||||
// timer_adjust_oneshot(snes_div_timer, cputag_clocks_to_attotime(space->machine, "maincpu", 16), 0);
|
||||
// timer_adjust_oneshot(snes_div_timer, cputag_clocks_to_attotime(space->machine, "maincpu", 16), 0);
|
||||
{
|
||||
UINT16 value, dividend, remainder;
|
||||
dividend = remainder = 0;
|
||||
|
@ -1140,11 +1140,11 @@ static void tempest_vggo(vgdata *vg)
|
||||
vg->pc = 0;
|
||||
vg->sp = 0;
|
||||
/*
|
||||
* Tempest and Quantum trigger VGGO from time to time even though
|
||||
* the VG runs in an endless loop for these games (see
|
||||
* avg_common_strobe2). If we don't discard all vectors in the
|
||||
* current buffer at this point, the screen starts flickering.
|
||||
*/
|
||||
* Tempest and Quantum trigger VGGO from time to time even though
|
||||
* the VG runs in an endless loop for these games (see
|
||||
* avg_common_strobe2). If we don't discard all vectors in the
|
||||
* current buffer at this point, the screen starts flickering.
|
||||
*/
|
||||
nvect = 0;
|
||||
}
|
||||
|
||||
|
@ -860,13 +860,13 @@ static int deco16_pf_update(
|
||||
case 0: rows = 512; break;/* Every line of 512 height bitmap */
|
||||
case 1: rows = 256; break;
|
||||
case 2: rows = 128; break;
|
||||
case 3: rows = 64; break;
|
||||
case 4: rows = 32; break;
|
||||
case 5: rows = 16; break;
|
||||
case 6: rows = 8; break;
|
||||
case 7: rows = 4; break;
|
||||
case 8: rows = 2; break;
|
||||
default: rows = 1; break;
|
||||
case 3: rows = 64; break;
|
||||
case 4: rows = 32; break;
|
||||
case 5: rows = 16; break;
|
||||
case 6: rows = 8; break;
|
||||
case 7: rows = 4; break;
|
||||
case 8: rows = 2; break;
|
||||
default: rows = 1; break;
|
||||
}
|
||||
|
||||
if (tilemap_16x16)
|
||||
|
@ -520,14 +520,14 @@ INLINE void snes_update_line( UINT8 screen, UINT8 color_depth, UINT8 hires, UINT
|
||||
// tmap %= 0x10000;
|
||||
|
||||
/*
|
||||
Tilemap format
|
||||
vhopppcc cccccccc
|
||||
Tilemap format
|
||||
vhopppcc cccccccc
|
||||
|
||||
v/h = Vertical/Horizontal flip this tile.
|
||||
o = Tile priority.
|
||||
ppp = Tile palette. The number of entries in the palette depends on the Mode and the BG.
|
||||
cccccccccc = Tile number.
|
||||
*/
|
||||
v/h = Vertical/Horizontal flip this tile.
|
||||
o = Tile priority.
|
||||
ppp = Tile palette. The number of entries in the palette depends on the Mode and the BG.
|
||||
cccccccccc = Tile number.
|
||||
*/
|
||||
UINT16 tilemap = snes_vram[tmap + ii] | (snes_vram[tmap + ii + 1] << 8);
|
||||
vflip = BIT(tilemap, 15);
|
||||
hflip = BIT(tilemap, 14);
|
||||
|
@ -10,4 +10,4 @@
|
||||
***************************************************************************/
|
||||
|
||||
extern const char build_version[];
|
||||
const char build_version[] = "0.136u3 ("__DATE__")";
|
||||
const char build_version[] = "0.136u4 ("__DATE__")";
|
||||
|
Loading…
Reference in New Issue
Block a user