ymmu100: split (nw)

This commit is contained in:
Olivier Galibert 2019-04-14 23:06:59 +02:00
parent 4297e32d5a
commit 45ee57822f
7 changed files with 916 additions and 473 deletions

View File

@ -3749,7 +3749,10 @@ files {
createMESSProjects(_target, _subtarget, "yamaha")
files {
MAME_DIR .. "src/mame/machine/mulcd.cpp",
MAME_DIR .. "src/mame/drivers/ymmu50.cpp",
MAME_DIR .. "src/mame/drivers/ymmu80.cpp",
MAME_DIR .. "src/mame/drivers/ymmu100.cpp",
MAME_DIR .. "src/mame/drivers/ymvl70.cpp",
MAME_DIR .. "src/mame/drivers/fb01.cpp",
MAME_DIR .. "src/mame/drivers/tg100.cpp",
}

View File

@ -9,12 +9,9 @@
Sound ASIC: Yamaha XS725A0/SWP30
RAM: 1 MSM51008 (1 meg * 1 bit = 128KBytes)
MU80 CPU: Hitachi H8/3002 (HD6413D02F16), strapped for mode 4, with a 12 MHz oscillator
Sound ASICs: 2x Yamaha YMM275-F/SWP20 + 2x YMM279-F/SWD wave decoders + HD62908 "MEG" effects processor
I/O ports from service manual:
Port 1 (MU100) / Port B (MU80)
Port 1
0 - LCD data, SW data, LED 1
1 - LCD data, SW data, LED 2
2 - LCD data, SW data, LED 3
@ -50,20 +47,11 @@
6 - NC
7 - (in) Plug detection for A/D input
Port A (MU100):
Port A:
5 - (in) Off Line Detection
6 - (out) Signal for rotary encoder (REB)
7 - (out) Signal for rotary encoder (REA)
Port A (MU80):
0 -
1 - LCD control RS
2 -
3 - (same as sws on MU100) LED,SW Strobe data latch
4 - (same as swd on MU100) SW data read control
5 - LCD control E
6 - LCD control RW
7 -
Port F:
0 - (out) (sws) LED,SW Strobe data latch
@ -131,14 +119,9 @@
#include "bus/midi/midiinport.h"
#include "bus/midi/midioutport.h"
#include "cpu/h8/h83002.h"
#include "cpu/h8/h83003.h"
#include "cpu/h8/h8s2655.h"
#include "machine/mulcd.h"
#include "sound/swp20.h"
#include "sound/swp30.h"
#include "sound/meg.h"
#include "sound/dspv.h"
#include "debugger.h"
#include "speaker.h"
@ -166,56 +149,19 @@ static INPUT_PORTS_START( mu100 )
PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_UNUSED)
INPUT_PORTS_END
static INPUT_PORTS_START( vl70 )
PORT_START("B0")
PORT_BIT(0x83, IP_ACTIVE_LOW, IPT_UNUSED)
PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Play") PORT_CODE(KEYCODE_A)
PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Effect") PORT_CODE(KEYCODE_F)
PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Midi/WX") PORT_CODE(KEYCODE_X)
PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Enter") PORT_CODE(KEYCODE_ENTER)
PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Exit") PORT_CODE(KEYCODE_BACKSPACE)
PORT_START("B1")
PORT_BIT(0x83, IP_ACTIVE_LOW, IPT_UNUSED)
PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Edit") PORT_CODE(KEYCODE_E)
PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Mode") PORT_CODE(KEYCODE_M)
PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Part -") PORT_CODE(KEYCODE_OPENBRACE)
PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Select <") PORT_CODE(KEYCODE_COMMA)
PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Part +") PORT_CODE(KEYCODE_CLOSEBRACE)
PORT_START("B2")
PORT_BIT(0x83, IP_ACTIVE_LOW, IPT_UNUSED)
PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Util") PORT_CODE(KEYCODE_U)
PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Breath") PORT_CODE(KEYCODE_B)
PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Value -") PORT_CODE(KEYCODE_MINUS)
PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Select >") PORT_CODE(KEYCODE_STOP)
PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Value +") PORT_CODE(KEYCODE_EQUALS)
INPUT_PORTS_END
class mu100_state : public driver_device
{
public:
mu100_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag)
, m_maincpu(*this, "maincpu")
, m_mu80cpu(*this, "mu80cpu")
, m_vl70cpu(*this, "vl70cpu")
, m_swp30(*this, "swp30")
, m_swp20_0(*this, "swp20_0")
, m_swp20_1(*this, "swp20_1")
, m_dspv(*this, "dspv")
, m_meg(*this, "meg")
, m_lcd(*this, "lcd")
, m_ioport_p7(*this, "P7")
, m_ioport_p8(*this, "P8")
, m_ioport_b0(*this, "B0")
, m_ioport_b1(*this, "B1")
, m_ioport_b2(*this, "B2")
{ }
void vl70(machine_config &config);
void mu50(machine_config &config);
void mu80(machine_config &config);
void mu100(machine_config &config);
void regs_s1_write_tap(offs_t address, u16 data, u16 mem_mask);
@ -319,20 +265,11 @@ private:
PA_LCD_RW = 0x40
};
optional_device<h8s2655_device> m_maincpu;
optional_device<h83002_device> m_mu80cpu;
optional_device<h83003_device> m_vl70cpu;
optional_device<swp30_device> m_swp30;
optional_device<swp20_device> m_swp20_0;
optional_device<swp20_device> m_swp20_1;
optional_device<dspv_device> m_dspv;
optional_device<meg_device> m_meg;
required_device<h8s2655_device> m_maincpu;
required_device<swp30_device> m_swp30;
required_device<mulcd_device> m_lcd;
optional_ioport m_ioport_p7;
optional_ioport m_ioport_p8;
optional_ioport m_ioport_b0;
optional_ioport m_ioport_b1;
optional_ioport m_ioport_b2;
required_ioport m_ioport_p7;
required_ioport m_ioport_p8;
u8 cur_p1, cur_p2, cur_p3, cur_p5, cur_p6, cur_pa, cur_pb, cur_pc, cur_pf, cur_pg;
u8 cur_ic32;
@ -342,7 +279,6 @@ private:
u16 adc_al_r();
u16 adc_midisw_r();
u16 adc_battery_r();
u16 adc_breath_r();
void p1_w(u16 data);
u16 p1_r();
@ -355,37 +291,12 @@ private:
u16 pa_r();
void pb_w(u16 data);
u16 pb_r();
void p6_w_mu80(u16 data);
u16 p6_r_mu80();
void pa_w_mu80(u16 data);
u16 pa_r_mu80();
void pb_w_mu80(u16 data);
u16 pb_r_mu80();
void p6_w_vl70(u16 data);
u16 p6_r_vl70();
void pa_w_vl70(u16 data);
u16 pa_r_vl70();
void pb_w_vl70(u16 data);
void pc_w_vl70(u16 data);
u16 pc_r_vl70();
void pf_w(u16 data);
void pg_w(u16 data);
void p6_w_mu50(u16 data);
u16 p6_r_mu50();
void pa_w_mu50(u16 data);
u16 pa_r_mu50();
u16 pb_r_mu50();
void pb_w_mu50(u16 data);
virtual void machine_start() override;
void mu100_iomap(address_map &map);
void mu100_map(address_map &map);
void mu80_iomap(address_map &map);
void mu80_map(address_map &map);
void mu50_iomap(address_map &map);
void mu50_map(address_map &map);
void vl70_iomap(address_map &map);
void vl70_map(address_map &map);
void swp30_map(address_map &map);
};
@ -560,29 +471,6 @@ void mu100_state::machine_start()
cur_p1 = cur_p2 = cur_p3 = cur_p5 = cur_p6 = cur_pa = cur_pc = cur_pf = cur_pg = cur_ic32 = 0xff;
}
void mu100_state::mu50_map(address_map &map)
{
map(0x000000, 0x07ffff).rom().region("mu80cpu", 0);
map(0x200000, 0x20ffff).ram(); // 64K work RAM
}
void mu100_state::mu80_map(address_map &map)
{
map(0x000000, 0x07ffff).rom().region("mu80cpu", 0);
map(0x200000, 0x20ffff).ram(); // 64K work RAM
map(0x400000, 0x40003f).m(m_swp20_0, FUNC(swp20_device::map));
map(0x440000, 0x44001f).m(m_meg, FUNC(meg_device::map));
map(0x460000, 0x46003f).m(m_swp20_1, FUNC(swp20_device::map));
}
void mu100_state::vl70_map(address_map &map)
{
map(0x000000, 0x1fffff).rom().region("vl70cpu", 0);
map(0x200000, 0x20ffff).ram(); // 64K work RAM
map(0x400000, 0x40007f).m(m_dspv, FUNC(dspv_device::map));
map(0x600000, 0x60001f).m(m_meg, FUNC(meg_device::map));
}
void mu100_state::mu100_map(address_map &map)
{
map(0x000000, 0x1fffff).rom().region("maincpu", 0);
@ -620,12 +508,6 @@ u16 mu100_state::adc_battery_r()
return 0x200;
}
// Breath controller
u16 mu100_state::adc_breath_r()
{
return 0x000;
}
// model detect. pulled to GND (0) on MU100, to 0.5Vcc on the card version, to Vcc on MU100R
u16 mu100_state::adc_type_r()
{
@ -732,230 +614,6 @@ void mu100_state::pg_w(u16 data)
logerror("pbsel3 %d\n", data & 1);
}
void mu100_state::pb_w_mu80(u16 data)
{
cur_pb = data;
}
u16 mu100_state::pb_r_mu80()
{
if((cur_pa & PA_LCD_ENABLE)) {
if(cur_pa & PA_LCD_RW) {
if(cur_pa & PA_LCD_RS)
return m_lcd->data_read();
else
return m_lcd->control_read();
} else {
if(!(cur_pa & 0x10)) {
u8 val = 0xff;
if(!(cur_ic32 & 0x20))
val &= m_ioport_p7->read();
if(!(cur_ic32 & 0x40))
val &= m_ioport_p8->read();
return val;
}
return 0x00;
}
}
return cur_pb;
}
void mu100_state::p6_w_mu80(u16 data)
{
cur_p6 = data;
}
u16 mu100_state::p6_r_mu80()
{
return cur_p6;
}
void mu100_state::pa_w_mu80(u16 data)
{
data ^= PA_LCD_ENABLE;
if(!(cur_pa & PA_LCD_ENABLE) && (data & PA_LCD_ENABLE)) {
if(!(cur_pa & PA_LCD_RW)) {
if(cur_pa & PA_LCD_RS)
m_lcd->data_write(cur_pb);
else
m_lcd->control_write(cur_pb);
}
}
if(!(cur_pa & 0x08) && (data & 0x08))
cur_ic32 = cur_pb;
cur_pa = data;
}
u16 mu100_state::pa_r_mu80()
{
return cur_pa;
}
void mu100_state::p6_w_vl70(u16 data)
{
if(!(cur_p6 & P6_LCD_ENABLE) && (data & P6_LCD_ENABLE)) {
if(!(cur_p6 & P6_LCD_RW)) {
if(cur_p6 & P6_LCD_RS)
m_lcd->data_write(cur_pa);
else
m_lcd->control_write(cur_pa);
}
}
cur_p6 = data;
}
void mu100_state::pb_w_vl70(u16 data)
{
m_lcd->set_leds(bitswap<6>((data >> 2) ^ 0x3f, 5, 3, 1, 4, 2, 0));
}
void mu100_state::pc_w_vl70(u16 data)
{
cur_pc = data;
}
u16 mu100_state::pc_r_vl70()
{
u8 r = 0xff;
if(!(cur_pc & 0x01))
r &= m_ioport_b0->read();
if(!(cur_pc & 0x02))
r &= m_ioport_b1->read();
if(!(cur_pc & 0x80))
r &= m_ioport_b2->read();
return r;
}
u16 mu100_state::p6_r_vl70()
{
return cur_p6;
}
void mu100_state::pa_w_vl70(u16 data)
{
cur_pa = data;
}
u16 mu100_state::pa_r_vl70()
{
if((cur_p6 & P6_LCD_ENABLE)) {
if(cur_p6 & P6_LCD_RW)
{
if(cur_p6 & P6_LCD_RS)
return m_lcd->data_read();
else
return m_lcd->control_read();
} else
return 0x00;
}
return cur_pa;
}
void mu100_state::p6_w_mu50(u16 data)
{
data ^= P6_LCD_ENABLE;
if(!(cur_p6 & P6_LCD_ENABLE) && (data & P6_LCD_ENABLE)) {
if(!(cur_p6 & P6_LCD_RW)) {
if(cur_p6 & P6_LCD_RS)
m_lcd->data_write(cur_pa);
else
m_lcd->control_write(cur_pa);
}
}
// if(!(cur_pa9 & 0x08) && (data & 0x08))
// cur_ic32 = cur_pa;
cur_p6 = data;
}
u16 mu100_state::p6_r_mu50()
{
return cur_p6;
}
u16 mu100_state::pb_r_mu50()
{
return cur_pb;
}
void mu100_state::pb_w_mu50(u16 data)
{
cur_pb = data;
}
void mu100_state::pa_w_mu50(u16 data)
{
cur_pa = data;
}
u16 mu100_state::pa_r_mu50()
{
if((cur_p6 & P6_LCD_ENABLE)) {
if(cur_p6 & P6_LCD_RW)
{
if(cur_p6 & P6_LCD_RS)
return m_lcd->data_read();
else
return m_lcd->control_read();
} else
return 0x00;
}
return cur_pa;
}
void mu100_state::mu80_iomap(address_map &map)
{
map(h8_device::PORT_6, h8_device::PORT_6).rw(FUNC(mu100_state::p6_r_mu80), FUNC(mu100_state::p6_w_mu80));
map(h8_device::PORT_A, h8_device::PORT_A).rw(FUNC(mu100_state::pa_r_mu80), FUNC(mu100_state::pa_w_mu80));
map(h8_device::PORT_B, h8_device::PORT_B).rw(FUNC(mu100_state::pb_r_mu80), FUNC(mu100_state::pb_w_mu80));
map(h8_device::ADC_0, h8_device::ADC_0).r(FUNC(mu100_state::adc_ar_r));
map(h8_device::ADC_1, h8_device::ADC_1).r(FUNC(mu100_state::adc_zero_r));
map(h8_device::ADC_2, h8_device::ADC_2).r(FUNC(mu100_state::adc_al_r));
map(h8_device::ADC_3, h8_device::ADC_3).r(FUNC(mu100_state::adc_zero_r));
map(h8_device::ADC_4, h8_device::ADC_4).r(FUNC(mu100_state::adc_midisw_r));
map(h8_device::ADC_5, h8_device::ADC_6).r(FUNC(mu100_state::adc_zero_r));
map(h8_device::ADC_6, h8_device::ADC_6).r(FUNC(mu100_state::adc_battery_r));
map(h8_device::ADC_7, h8_device::ADC_7).r(FUNC(mu100_state::adc_zero_r)); // inputmod from the gate array
}
void mu100_state::mu50_iomap(address_map &map)
{
map(h8_device::PORT_6, h8_device::PORT_6).rw(FUNC(mu100_state::p6_r_mu50), FUNC(mu100_state::p6_w_mu50));
map(h8_device::PORT_A, h8_device::PORT_A).rw(FUNC(mu100_state::pa_r_mu50), FUNC(mu100_state::pa_w_mu50));
map(h8_device::PORT_B, h8_device::PORT_B).rw(FUNC(mu100_state::pb_r_mu50), FUNC(mu100_state::pb_w_mu50));
map(h8_device::ADC_0, h8_device::ADC_0).r(FUNC(mu100_state::adc_ar_r));
map(h8_device::ADC_1, h8_device::ADC_1).r(FUNC(mu100_state::adc_zero_r));
map(h8_device::ADC_2, h8_device::ADC_2).r(FUNC(mu100_state::adc_al_r));
map(h8_device::ADC_3, h8_device::ADC_3).r(FUNC(mu100_state::adc_zero_r));
map(h8_device::ADC_4, h8_device::ADC_4).r(FUNC(mu100_state::adc_midisw_r));
map(h8_device::ADC_5, h8_device::ADC_6).r(FUNC(mu100_state::adc_zero_r));
map(h8_device::ADC_6, h8_device::ADC_6).r(FUNC(mu100_state::adc_battery_r));
map(h8_device::ADC_7, h8_device::ADC_7).r(FUNC(mu100_state::adc_zero_r)); // inputmod from the gate array
}
void mu100_state::vl70_iomap(address_map &map)
{
map(h8_device::PORT_6, h8_device::PORT_6).rw(FUNC(mu100_state::p6_r_vl70), FUNC(mu100_state::p6_w_vl70));
map(h8_device::PORT_A, h8_device::PORT_A).rw(FUNC(mu100_state::pa_r_vl70), FUNC(mu100_state::pa_w_vl70));
map(h8_device::PORT_B, h8_device::PORT_B).w(FUNC(mu100_state::pb_w_vl70));
map(h8_device::PORT_C, h8_device::PORT_C).rw(FUNC(mu100_state::pc_r_vl70), FUNC(mu100_state::pc_w_vl70));
map(h8_device::ADC_0, h8_device::ADC_0).r(FUNC(mu100_state::adc_breath_r));
map(h8_device::ADC_1, h8_device::ADC_6).r(FUNC(mu100_state::adc_zero_r));
map(h8_device::ADC_2, h8_device::ADC_2).r(FUNC(mu100_state::adc_midisw_r));
map(h8_device::ADC_3, h8_device::ADC_6).r(FUNC(mu100_state::adc_zero_r));
map(h8_device::ADC_4, h8_device::ADC_4).r(FUNC(mu100_state::adc_battery_r));
map(h8_device::ADC_5, h8_device::ADC_6).r(FUNC(mu100_state::adc_zero_r));
map(h8_device::ADC_6, h8_device::ADC_6).r(FUNC(mu100_state::adc_zero_r));
map(h8_device::ADC_7, h8_device::ADC_7).r(FUNC(mu100_state::adc_zero_r));
}
void mu100_state::mu100_iomap(address_map &map)
{
map(h8_device::PORT_1, h8_device::PORT_1).rw(FUNC(mu100_state::p1_r), FUNC(mu100_state::p1_w));
@ -1012,97 +670,6 @@ void mu100_state::mu100(machine_config &config)
m_maincpu->subdevice<h8_sci_device>("sci0")->tx_handler().set(mdout, FUNC(midi_port_device::write_txd));
}
void mu100_state::mu80(machine_config &config)
{
H83002(config, m_mu80cpu, 12_MHz_XTAL);
m_mu80cpu->set_addrmap(AS_PROGRAM, &mu100_state::mu80_map);
m_mu80cpu->set_addrmap(AS_IO, &mu100_state::mu80_iomap);
MULCD(config, m_lcd);
SPEAKER(config, "lspeaker").front_left();
SPEAKER(config, "rspeaker").front_right();
SWP20(config, m_swp20_0);
m_swp20_0->set_device_rom_tag("swp20");
SWP20(config, m_swp20_1);
m_swp20_1->set_device_rom_tag("swp20");
MEG(config, m_meg);
auto &mdin_a(MIDI_PORT(config, "mdin_a"));
midiin_slot(mdin_a);
mdin_a.rxd_handler().set("mu80cpu:sci1", FUNC(h8_sci_device::rx_w));
auto &mdin_b(MIDI_PORT(config, "mdin_b"));
midiin_slot(mdin_b);
mdin_b.rxd_handler().set("mu80cpu:sci0", FUNC(h8_sci_device::rx_w));
auto &mdout(MIDI_PORT(config, "mdout"));
midiout_slot(mdout);
m_mu80cpu->subdevice<h8_sci_device>("sci0")->tx_handler().set(mdout, FUNC(midi_port_device::write_txd));
}
void mu100_state::mu50(machine_config &config)
{
H83002(config, m_mu80cpu, 16_MHz_XTAL);
m_mu80cpu->set_addrmap(AS_PROGRAM, &mu100_state::mu50_map);
m_mu80cpu->set_addrmap(AS_IO, &mu100_state::mu50_iomap);
MULCD(config, m_lcd);
SPEAKER(config, "lspeaker").front_left();
SPEAKER(config, "rspeaker").front_right();
// In truth, swp00
SWP30(config, m_swp30);
m_swp30->set_addrmap(0, &mu100_state::swp30_map);
m_swp30->add_route(0, "lspeaker", 1.0);
m_swp30->add_route(1, "rspeaker", 1.0);
MEG(config, m_meg);
auto &mdin_a(MIDI_PORT(config, "mdin_a"));
midiin_slot(mdin_a);
mdin_a.rxd_handler().set("mu80cpu:sci1", FUNC(h8_sci_device::rx_w));
auto &mdin_b(MIDI_PORT(config, "mdin_b"));
midiin_slot(mdin_b);
mdin_b.rxd_handler().set("mu80cpu:sci0", FUNC(h8_sci_device::rx_w));
auto &mdout(MIDI_PORT(config, "mdout"));
midiout_slot(mdout);
m_mu80cpu->subdevice<h8_sci_device>("sci0")->tx_handler().set(mdout, FUNC(midi_port_device::write_txd));
}
void mu100_state::vl70(machine_config &config)
{
H83003(config, m_vl70cpu, 10_MHz_XTAL);
m_vl70cpu->set_addrmap(AS_PROGRAM, &mu100_state::vl70_map);
m_vl70cpu->set_addrmap(AS_IO, &mu100_state::vl70_iomap);
MULCD(config, m_lcd);
SPEAKER(config, "lspeaker").front_left();
SPEAKER(config, "rspeaker").front_right();
DSPV(config, m_dspv);
MEG(config, m_meg);
auto &mdin_a(MIDI_PORT(config, "mdin_a"));
midiin_slot(mdin_a);
mdin_a.rxd_handler().set("vl70cpu:sci1", FUNC(h8_sci_device::rx_w));
auto &mdin_b(MIDI_PORT(config, "mdin_b"));
midiin_slot(mdin_b);
mdin_b.rxd_handler().set("vl70cpu:sci0", FUNC(h8_sci_device::rx_w));
auto &mdout(MIDI_PORT(config, "mdout"));
midiout_slot(mdout);
m_vl70cpu->subdevice<h8_sci_device>("sci0")->tx_handler().set(mdout, FUNC(midi_port_device::write_txd));
}
#define ROM_LOAD16_WORD_SWAP_BIOS(bios,name,offset,length,hash) \
ROMX_LOAD(name, offset, length, hash, ROM_GROUPWORD | ROM_REVERSE | ROM_BIOS(bios))
@ -1137,45 +704,12 @@ ROM_START( mu100r )
ROM_LOAD32_WORD( "xt461a0-829.ic37", 0x800002, 0x200000, CRC(a1d138a3) SHA1(46a7a7225cd7e1818ba551325d2af5ac1bf5b2bf) )
ROM_LOAD32_WORD( "xt462a0.ic39", 0x1000000, 0x400000, CRC(cbf037da) SHA1(37449e741243305de38cb913b17041942ad334cd) )
ROM_LOAD32_WORD( "xt463a0.ic38", 0x1000002, 0x400000, CRC(cce5f8d3) SHA1(bdca8c5158f452f2b5535c7d658c9b22c6d66048) )
ROM_REGION( 0x1000, "lcd", 0)
// Hand made, 3 characters unused
ROM_LOAD( "mu100-font.bin", 0x0000, 0x1000, BAD_DUMP CRC(a7d6c1d6) SHA1(9f0398d678bdf607cb34d83ee535f3b7fcc97c41) )
ROM_END
ROM_START( mu80 )
ROM_REGION( 0x80000, "mu80cpu", 0 )
ROM_LOAD16_WORD_SWAP( "yamaha_mu80.bin", 0x000000, 0x080000, CRC(c31074c0) SHA1(a11bd4523cd8ff1e1744078c3b4c18112b73c61e) )
ROM_REGION( 0x800000, "swp20", ROMREGION_ERASE00 )
ROM_REGION( 0x1000, "lcd", 0)
// Hand made, 3 characters unused
ROM_LOAD( "mu100-font.bin", 0x0000, 0x1000, BAD_DUMP CRC(a7d6c1d6) SHA1(9f0398d678bdf607cb34d83ee535f3b7fcc97c41) )
ROM_END
ROM_START( mu50 )
ROM_REGION( 0x80000, "mu80cpu", 0 )
ROM_LOAD16_WORD_SWAP( "yamaha_mu50.bin", 0x000000, 0x080000, CRC(507168ad) SHA1(58c41f10d292cac35ef0e8f93029fbc4685df586) )
ROM_REGION( 0x1800000, "swp30", ROMREGION_ERASE00 )
ROM_REGION( 0x1000, "lcd", 0)
// Hand made, 3 characters unused
ROM_LOAD( "mu100-font.bin", 0x0000, 0x1000, BAD_DUMP CRC(a7d6c1d6) SHA1(9f0398d678bdf607cb34d83ee535f3b7fcc97c41) )
ROM_END
ROM_START( vl70 )
ROM_REGION( 0x200000, "vl70cpu", 0 )
ROM_LOAD16_WORD_SWAP( "vl70m_v111_27c160.bin", 0x000000, 0x200000, CRC(efdba9f0) SHA1(cfa9fb7d2a991e4752393c9677e4ddcbe10866c7) )
ROM_REGION( 0x1000, "lcd", 0)
// Hand made, 3 characters unused
ROM_LOAD( "mu100-font.bin", 0x0000, 0x1000, BAD_DUMP CRC(a7d6c1d6) SHA1(9f0398d678bdf607cb34d83ee535f3b7fcc97c41) )
ROM_END
CONS( 1997, mu100, 0, 0, mu100, mu100, mu100_state, empty_init, "Yamaha", "MU100", MACHINE_NOT_WORKING )
CONS( 1997, mu100r, mu100, 0, mu100, mu100, mu100r_state, empty_init, "Yamaha", "MU100 Rackable version", MACHINE_NOT_WORKING )
CONS( 1994, mu80, mu100, 0, mu80, mu100, mu100_state, empty_init, "Yamaha", "MU80", MACHINE_NOT_WORKING )
CONS( 1996, vl70, mu100, 0, vl70, vl70, mu100_state, empty_init, "Yamaha", "VL70-m", MACHINE_NOT_WORKING )
CONS( 1995, mu50, mu100, 0, mu50, mu100, mu100_state, empty_init, "Yamaha", "MU50", MACHINE_NOT_WORKING )

249
src/mame/drivers/ymmu50.cpp Normal file
View File

@ -0,0 +1,249 @@
// license:BSD-3-Clause
// copyright-holders:R. Belmont, Olivier Galibert
/*************************************************************************************
Yamaha MU-50 : 16-voice polyphonic/multitimbral General MIDI/GS/XG tone modules
Preliminary driver by R. Belmont and O. Galibert
**************************************************************************************/
#include "emu.h"
#include "bus/midi/midiinport.h"
#include "bus/midi/midioutport.h"
#include "cpu/h8/h83002.h"
#include "machine/mulcd.h"
#include "sound/swp30.h"
#include "sound/meg.h"
#include "debugger.h"
#include "speaker.h"
static INPUT_PORTS_START( mu50 )
PORT_START("P7")
PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Enter") PORT_CODE(KEYCODE_ENTER)
PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Effect") PORT_CODE(KEYCODE_F)
PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Util") PORT_CODE(KEYCODE_U)
PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Part +") PORT_CODE(KEYCODE_CLOSEBRACE)
PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Part -") PORT_CODE(KEYCODE_OPENBRACE)
PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Mute/Solo") PORT_CODE(KEYCODE_S)
PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Edit") PORT_CODE(KEYCODE_E)
PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Play") PORT_CODE(KEYCODE_A)
PORT_START("P8")
PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Mode") PORT_CODE(KEYCODE_M)
PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Eq") PORT_CODE(KEYCODE_Q)
PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Exit") PORT_CODE(KEYCODE_BACKSPACE)
PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Select >") PORT_CODE(KEYCODE_STOP)
PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Select <") PORT_CODE(KEYCODE_COMMA)
PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Value +") PORT_CODE(KEYCODE_EQUALS)
PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Value -") PORT_CODE(KEYCODE_MINUS)
PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_UNUSED)
INPUT_PORTS_END
class mu50_state : public driver_device
{
public:
mu50_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag)
, m_mu50cpu(*this, "mu50cpu")
, m_swp30(*this, "swp30")
, m_lcd(*this, "lcd")
, m_ioport_p7(*this, "P7")
, m_ioport_p8(*this, "P8")
{ }
void mu50(machine_config &config);
private:
enum {
P2_LCD_RS = 0x01,
P2_LCD_RW = 0x02,
P2_LCD_ENABLE = 0x04
};
enum {
P6_LCD_RS = 0x04,
P6_LCD_RW = 0x02,
P6_LCD_ENABLE = 0x01
};
enum {
PA_LCD_RS = 0x02,
PA_LCD_ENABLE = 0x20,
PA_LCD_RW = 0x40
};
required_device<h83002_device> m_mu50cpu;
required_device<swp30_device> m_swp30;
required_device<mulcd_device> m_lcd;
required_ioport m_ioport_p7;
required_ioport m_ioport_p8;
u8 cur_p6, cur_pa, cur_pb;
u16 adc_zero_r();
u16 adc_ar_r();
u16 adc_al_r();
u16 adc_midisw_r();
u16 adc_battery_r();
void p6_w(u16 data);
u16 p6_r();
void pa_w(u16 data);
u16 pa_r();
void pb_w(u16 data);
u16 pb_r();
void mu50_iomap(address_map &map);
void mu50_map(address_map &map);
virtual void machine_start() override;
};
void mu50_state::machine_start()
{
cur_p6 = cur_pa = cur_pb = 0xff;
}
void mu50_state::mu50_map(address_map &map)
{
map(0x000000, 0x07ffff).rom().region("mu50cpu", 0);
map(0x200000, 0x20ffff).ram(); // 64K work RAM
}
// Grounded adc input
u16 mu50_state::adc_zero_r()
{
return 0;
}
// Analog input right (also sent to the swp)
u16 mu50_state::adc_ar_r()
{
return 0;
}
// Analog input left (also sent to the swp)
u16 mu50_state::adc_al_r()
{
return 0;
}
// Put the host switch to pure midi
u16 mu50_state::adc_midisw_r()
{
return 0;
}
// Battery level
u16 mu50_state::adc_battery_r()
{
return 0x200;
}
void mu50_state::p6_w(u16 data)
{
data ^= P6_LCD_ENABLE;
if(!(cur_p6 & P6_LCD_ENABLE) && (data & P6_LCD_ENABLE)) {
if(!(cur_p6 & P6_LCD_RW)) {
if(cur_p6 & P6_LCD_RS)
m_lcd->data_write(cur_pa);
else
m_lcd->control_write(cur_pa);
}
}
cur_p6 = data;
}
u16 mu50_state::p6_r()
{
return cur_p6;
}
u16 mu50_state::pb_r()
{
return cur_pb;
}
void mu50_state::pb_w(u16 data)
{
cur_pb = data;
}
void mu50_state::pa_w(u16 data)
{
cur_pa = data;
}
u16 mu50_state::pa_r()
{
if((cur_p6 & P6_LCD_ENABLE)) {
if(cur_p6 & P6_LCD_RW)
{
if(cur_p6 & P6_LCD_RS)
return m_lcd->data_read();
else
return m_lcd->control_read();
} else
return 0x00;
}
return cur_pa;
}
void mu50_state::mu50_iomap(address_map &map)
{
map(h8_device::PORT_6, h8_device::PORT_6).rw(FUNC(mu50_state::p6_r), FUNC(mu50_state::p6_w));
map(h8_device::PORT_A, h8_device::PORT_A).rw(FUNC(mu50_state::pa_r), FUNC(mu50_state::pa_w));
map(h8_device::PORT_B, h8_device::PORT_B).rw(FUNC(mu50_state::pb_r), FUNC(mu50_state::pb_w));
map(h8_device::ADC_0, h8_device::ADC_0).r(FUNC(mu50_state::adc_ar_r));
map(h8_device::ADC_1, h8_device::ADC_1).r(FUNC(mu50_state::adc_zero_r));
map(h8_device::ADC_2, h8_device::ADC_2).r(FUNC(mu50_state::adc_al_r));
map(h8_device::ADC_3, h8_device::ADC_3).r(FUNC(mu50_state::adc_zero_r));
map(h8_device::ADC_4, h8_device::ADC_4).r(FUNC(mu50_state::adc_midisw_r));
map(h8_device::ADC_5, h8_device::ADC_6).r(FUNC(mu50_state::adc_zero_r));
map(h8_device::ADC_6, h8_device::ADC_6).r(FUNC(mu50_state::adc_battery_r));
map(h8_device::ADC_7, h8_device::ADC_7).r(FUNC(mu50_state::adc_zero_r)); // inputmod from the gate array
}
void mu50_state::mu50(machine_config &config)
{
H83002(config, m_mu50cpu, 16_MHz_XTAL);
m_mu50cpu->set_addrmap(AS_PROGRAM, &mu50_state::mu50_map);
m_mu50cpu->set_addrmap(AS_IO, &mu50_state::mu50_iomap);
MULCD(config, m_lcd);
SPEAKER(config, "lspeaker").front_left();
SPEAKER(config, "rspeaker").front_right();
// In truth, swp00
SWP30(config, m_swp30);
m_swp30->add_route(0, "lspeaker", 1.0);
m_swp30->add_route(1, "rspeaker", 1.0);
auto &mdin_a(MIDI_PORT(config, "mdin_a"));
midiin_slot(mdin_a);
mdin_a.rxd_handler().set("mu50cpu:sci1", FUNC(h8_sci_device::rx_w));
auto &mdin_b(MIDI_PORT(config, "mdin_b"));
midiin_slot(mdin_b);
mdin_b.rxd_handler().set("mu50cpu:sci0", FUNC(h8_sci_device::rx_w));
auto &mdout(MIDI_PORT(config, "mdout"));
midiout_slot(mdout);
m_mu50cpu->subdevice<h8_sci_device>("sci0")->tx_handler().set(mdout, FUNC(midi_port_device::write_txd));
}
ROM_START( mu50 )
ROM_REGION( 0x80000, "mu50cpu", 0 )
ROM_LOAD16_WORD_SWAP( "yamaha_mu50.bin", 0x000000, 0x080000, CRC(507168ad) SHA1(58c41f10d292cac35ef0e8f93029fbc4685df586) )
ROM_REGION( 0x1800000, "swp00", ROMREGION_ERASE00 )
ROM_END
CONS( 1995, mu50, 0, 0, mu50, mu50, mu50_state, empty_init, "Yamaha", "MU50", MACHINE_NOT_WORKING )

380
src/mame/drivers/ymmu80.cpp Normal file
View File

@ -0,0 +1,380 @@
// license:BSD-3-Clause
// copyright-holders:R. Belmont, Olivier Galibert
/*************************************************************************************
Yamaha MU-80 and MU-100 : 32-voice polyphonic/multitimbral General MIDI/GS/XG tone modules
Preliminary driver by R. Belmont and O. Galibert
MU80 CPU: Hitachi H8/3002 (HD6413D02F16), strapped for mode 4, with a 12 MHz oscillator
Sound ASICs: 2x Yamaha YMM275-F/SWP20 + 2x YMM279-F/SWD wave decoders + HD62908 "MEG" effects processor
I/O ports from service manual:
Port B (MU80)
0 - LCD data, SW data, LED 1
1 - LCD data, SW data, LED 2
2 - LCD data, SW data, LED 3
3 - LCD data, SW data, LED 4
4 - LCD data, SW data, LED 5
5 - LCD data, SW strobe data
6 - LCD data, SW strobe data
7 - LCD data, SW data, LED 6
Port 2:
0 - (out) LCD control RS
1 - (out) LCD control R/W
2 - (out) LCD control E
3 - (out) LCD contrast A
4 - (out) LCD contrast B
5 - (out) LCD contrast C
6 - (out) 1 MHz clock for serial
7 - NC
Port 3:
4 - (out) A/D gain control 1
5 - (out) A/D gain control 2
Port 5:
3 - (out) Reset signal for rotary encoder
Port 6:
1 - NC
2 - (out) PB select (SW1)
3 - (out) PB select (SW2)
4 - (out) reset PB
5 - (out) reset SWP30 (sound chip)
6 - NC
7 - (in) Plug detection for A/D input
Port A (MU80):
0 -
1 - LCD control RS
2 -
3 - (same as sws on MU100) LED,SW Strobe data latch
4 - (same as swd on MU100) SW data read control
5 - LCD control E
6 - LCD control RW
7 -
Port F:
0 - (out) (sws) LED,SW Strobe data latch
1 - (out) (swd) SW data read control
2 - (out) PB select (SW4)
Port G:
0 - (out) PB select (SW3)
Analog input channels:
0 - level input R
2 - level output L
4 - host SW type switch position
6 - battery voltage
7 - model check (0 for MU100, 0.5 for OEM, 1 for MU100R)
Switch map at the connector (17=ground)
09 8 play
10 8 edit
11 8 mute/solo
12 8 part -
13 8 part +
14 8 util
15 8 effect
16 8 enter
12 7 select <
13 7 select >
16 7 mode
15 7 eq
14 7 exit
10 7 value -
11 7 value +
2 led play
3 led edit
4 led util
5 led effect
6 led mode
1 led eq
IC32:
1 p10 c.2
2 p11 c.3
3 p12 c.4
4 p13 c.5
5 p14 c.6
6 p15 c.7
7 p16 c.8
8 p17 c.1
g sws
IC33
1 p17 c.09
2 p16 c.10
3 p15 c.11
4 p14 c.12
5 p13 c.13
6 p12 c.14
7 p11 c.15
8 p10 c.16
g swd
**************************************************************************************/
#include "emu.h"
#include "bus/midi/midiinport.h"
#include "bus/midi/midioutport.h"
#include "cpu/h8/h83002.h"
#include "machine/mulcd.h"
#include "sound/swp20.h"
#include "sound/meg.h"
#include "debugger.h"
#include "speaker.h"
static INPUT_PORTS_START( mu80 )
PORT_START("P7")
PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Enter") PORT_CODE(KEYCODE_ENTER)
PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Effect") PORT_CODE(KEYCODE_F)
PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Util") PORT_CODE(KEYCODE_U)
PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Part +") PORT_CODE(KEYCODE_CLOSEBRACE)
PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Part -") PORT_CODE(KEYCODE_OPENBRACE)
PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Mute/Solo") PORT_CODE(KEYCODE_S)
PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Edit") PORT_CODE(KEYCODE_E)
PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Play") PORT_CODE(KEYCODE_A)
PORT_START("P8")
PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Mode") PORT_CODE(KEYCODE_M)
PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Eq") PORT_CODE(KEYCODE_Q)
PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Exit") PORT_CODE(KEYCODE_BACKSPACE)
PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Select >") PORT_CODE(KEYCODE_STOP)
PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Select <") PORT_CODE(KEYCODE_COMMA)
PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Value +") PORT_CODE(KEYCODE_EQUALS)
PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Value -") PORT_CODE(KEYCODE_MINUS)
PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_UNUSED)
INPUT_PORTS_END
class mu80_state : public driver_device
{
public:
mu80_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag)
, m_mu80cpu(*this, "mu80cpu")
, m_swp20_0(*this, "swp20_0")
, m_swp20_1(*this, "swp20_1")
, m_meg(*this, "meg")
, m_lcd(*this, "lcd")
, m_ioport_p7(*this, "P7")
, m_ioport_p8(*this, "P8")
{ }
void mu80(machine_config &config);
private:
enum {
P2_LCD_RS = 0x01,
P2_LCD_RW = 0x02,
P2_LCD_ENABLE = 0x04
};
enum {
P6_LCD_RS = 0x04,
P6_LCD_RW = 0x02,
P6_LCD_ENABLE = 0x01
};
enum {
PA_LCD_RS = 0x02,
PA_LCD_ENABLE = 0x20,
PA_LCD_RW = 0x40
};
required_device<h83002_device> m_mu80cpu;
required_device<swp20_device> m_swp20_0;
required_device<swp20_device> m_swp20_1;
required_device<meg_device> m_meg;
required_device<mulcd_device> m_lcd;
required_ioport m_ioport_p7;
required_ioport m_ioport_p8;
u8 cur_p6, cur_pa, cur_pb, cur_ic32;
u16 adc_zero_r();
u16 adc_ar_r();
u16 adc_al_r();
u16 adc_midisw_r();
u16 adc_battery_r();
void p6_w(u16 data);
u16 p6_r();
void pa_w(u16 data);
u16 pa_r();
void pb_w(u16 data);
u16 pb_r();
virtual void machine_start() override;
void mu80_iomap(address_map &map);
void mu80_map(address_map &map);
};
void mu80_state::machine_start()
{
cur_p6 = cur_pa = cur_pb = cur_ic32 = 0xff;
}
void mu80_state::mu80_map(address_map &map)
{
map(0x000000, 0x07ffff).rom().region("mu80cpu", 0);
map(0x200000, 0x20ffff).ram(); // 64K work RAM
map(0x400000, 0x40003f).m(m_swp20_0, FUNC(swp20_device::map));
map(0x440000, 0x44001f).m(m_meg, FUNC(meg_device::map));
map(0x460000, 0x46003f).m(m_swp20_1, FUNC(swp20_device::map));
}
// Grounded adc input
u16 mu80_state::adc_zero_r()
{
return 0;
}
// Analog input right (also sent to the swp)
u16 mu80_state::adc_ar_r()
{
return 0;
}
// Analog input left (also sent to the swp)
u16 mu80_state::adc_al_r()
{
return 0;
}
// Put the host switch to pure midi
u16 mu80_state::adc_midisw_r()
{
return 0;
}
// Battery level
u16 mu80_state::adc_battery_r()
{
return 0x200;
}
void mu80_state::pb_w(u16 data)
{
cur_pb = data;
}
u16 mu80_state::pb_r()
{
if((cur_pa & PA_LCD_ENABLE)) {
if(cur_pa & PA_LCD_RW) {
if(cur_pa & PA_LCD_RS)
return m_lcd->data_read();
else
return m_lcd->control_read();
} else {
if(!(cur_pa & 0x10)) {
u8 val = 0xff;
if(!(cur_ic32 & 0x20))
val &= m_ioport_p7->read();
if(!(cur_ic32 & 0x40))
val &= m_ioport_p8->read();
return val;
}
return 0x00;
}
}
return cur_pb;
}
void mu80_state::p6_w(u16 data)
{
cur_p6 = data;
}
u16 mu80_state::p6_r()
{
return cur_p6;
}
void mu80_state::pa_w(u16 data)
{
data ^= PA_LCD_ENABLE;
if(!(cur_pa & PA_LCD_ENABLE) && (data & PA_LCD_ENABLE)) {
if(!(cur_pa & PA_LCD_RW)) {
if(cur_pa & PA_LCD_RS)
m_lcd->data_write(cur_pb);
else
m_lcd->control_write(cur_pb);
}
}
if(!(cur_pa & 0x08) && (data & 0x08))
cur_ic32 = cur_pb;
cur_pa = data;
}
u16 mu80_state::pa_r()
{
return cur_pa;
}
void mu80_state::mu80_iomap(address_map &map)
{
map(h8_device::PORT_6, h8_device::PORT_6).rw(FUNC(mu80_state::p6_r), FUNC(mu80_state::p6_w));
map(h8_device::PORT_A, h8_device::PORT_A).rw(FUNC(mu80_state::pa_r), FUNC(mu80_state::pa_w));
map(h8_device::PORT_B, h8_device::PORT_B).rw(FUNC(mu80_state::pb_r), FUNC(mu80_state::pb_w));
map(h8_device::ADC_0, h8_device::ADC_0).r(FUNC(mu80_state::adc_ar_r));
map(h8_device::ADC_1, h8_device::ADC_1).r(FUNC(mu80_state::adc_zero_r));
map(h8_device::ADC_2, h8_device::ADC_2).r(FUNC(mu80_state::adc_al_r));
map(h8_device::ADC_3, h8_device::ADC_3).r(FUNC(mu80_state::adc_zero_r));
map(h8_device::ADC_4, h8_device::ADC_4).r(FUNC(mu80_state::adc_midisw_r));
map(h8_device::ADC_5, h8_device::ADC_6).r(FUNC(mu80_state::adc_zero_r));
map(h8_device::ADC_6, h8_device::ADC_6).r(FUNC(mu80_state::adc_battery_r));
map(h8_device::ADC_7, h8_device::ADC_7).r(FUNC(mu80_state::adc_zero_r)); // inputmod from the gate array
}
void mu80_state::mu80(machine_config &config)
{
H83002(config, m_mu80cpu, 12_MHz_XTAL);
m_mu80cpu->set_addrmap(AS_PROGRAM, &mu80_state::mu80_map);
m_mu80cpu->set_addrmap(AS_IO, &mu80_state::mu80_iomap);
MULCD(config, m_lcd);
SPEAKER(config, "lspeaker").front_left();
SPEAKER(config, "rspeaker").front_right();
SWP20(config, m_swp20_0);
m_swp20_0->set_device_rom_tag("swp20");
SWP20(config, m_swp20_1);
m_swp20_1->set_device_rom_tag("swp20");
MEG(config, m_meg);
auto &mdin_a(MIDI_PORT(config, "mdin_a"));
midiin_slot(mdin_a);
mdin_a.rxd_handler().set("mu80cpu:sci1", FUNC(h8_sci_device::rx_w));
auto &mdin_b(MIDI_PORT(config, "mdin_b"));
midiin_slot(mdin_b);
mdin_b.rxd_handler().set("mu80cpu:sci0", FUNC(h8_sci_device::rx_w));
auto &mdout(MIDI_PORT(config, "mdout"));
midiout_slot(mdout);
m_mu80cpu->subdevice<h8_sci_device>("sci0")->tx_handler().set(mdout, FUNC(midi_port_device::write_txd));
}
ROM_START( mu80 )
ROM_REGION( 0x80000, "mu80cpu", 0 )
ROM_LOAD16_WORD_SWAP( "yamaha_mu80.bin", 0x000000, 0x080000, CRC(c31074c0) SHA1(a11bd4523cd8ff1e1744078c3b4c18112b73c61e) )
ROM_REGION( 0x800000, "swp20", ROMREGION_ERASE00 )
ROM_END
CONS( 1994, mu80, 0, 0, mu80, mu80, mu80_state, empty_init, "Yamaha", "MU80", MACHINE_NOT_WORKING )

268
src/mame/drivers/ymvl70.cpp Normal file
View File

@ -0,0 +1,268 @@
// license:BSD-3-Clause
// copyright-holders:R. Belmont, Olivier Galibert
#include "emu.h"
#include "bus/midi/midiinport.h"
#include "bus/midi/midioutport.h"
#include "cpu/h8/h83003.h"
#include "machine/mulcd.h"
#include "sound/meg.h"
#include "sound/dspv.h"
#include "debugger.h"
#include "speaker.h"
static INPUT_PORTS_START( vl70 )
PORT_START("B0")
PORT_BIT(0x83, IP_ACTIVE_LOW, IPT_UNUSED)
PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Play") PORT_CODE(KEYCODE_A)
PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Effect") PORT_CODE(KEYCODE_F)
PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Midi/WX") PORT_CODE(KEYCODE_X)
PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Enter") PORT_CODE(KEYCODE_ENTER)
PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Exit") PORT_CODE(KEYCODE_BACKSPACE)
PORT_START("B1")
PORT_BIT(0x83, IP_ACTIVE_LOW, IPT_UNUSED)
PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Edit") PORT_CODE(KEYCODE_E)
PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Mode") PORT_CODE(KEYCODE_M)
PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Part -") PORT_CODE(KEYCODE_OPENBRACE)
PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Select <") PORT_CODE(KEYCODE_COMMA)
PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Part +") PORT_CODE(KEYCODE_CLOSEBRACE)
PORT_START("B2")
PORT_BIT(0x83, IP_ACTIVE_LOW, IPT_UNUSED)
PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Util") PORT_CODE(KEYCODE_U)
PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Breath") PORT_CODE(KEYCODE_B)
PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Value -") PORT_CODE(KEYCODE_MINUS)
PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Select >") PORT_CODE(KEYCODE_STOP)
PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Value +") PORT_CODE(KEYCODE_EQUALS)
INPUT_PORTS_END
class vl70_state : public driver_device
{
public:
vl70_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag)
, m_vl70cpu(*this, "vl70cpu")
, m_dspv(*this, "dspv")
, m_meg(*this, "meg")
, m_lcd(*this, "lcd")
, m_ioport_b0(*this, "B0")
, m_ioport_b1(*this, "B1")
, m_ioport_b2(*this, "B2")
{ }
void vl70(machine_config &config);
private:
enum {
P2_LCD_RS = 0x01,
P2_LCD_RW = 0x02,
P2_LCD_ENABLE = 0x04
};
enum {
P6_LCD_RS = 0x04,
P6_LCD_RW = 0x02,
P6_LCD_ENABLE = 0x01
};
enum {
PA_LCD_RS = 0x02,
PA_LCD_ENABLE = 0x20,
PA_LCD_RW = 0x40
};
required_device<h83003_device> m_vl70cpu;
required_device<dspv_device> m_dspv;
required_device<meg_device> m_meg;
required_device<mulcd_device> m_lcd;
required_ioport m_ioport_b0;
required_ioport m_ioport_b1;
required_ioport m_ioport_b2;
u8 cur_p1, cur_p2, cur_p3, cur_p5, cur_p6, cur_pa, cur_pb, cur_pc, cur_pf, cur_pg;
u8 cur_ic32;
u16 adc_zero_r();
u16 adc_ar_r();
u16 adc_al_r();
u16 adc_midisw_r();
u16 adc_battery_r();
u16 adc_breath_r();
void p6_w(u16 data);
u16 p6_r();
void pa_w(u16 data);
u16 pa_r();
void pb_w(u16 data);
void pc_w(u16 data);
u16 pc_r();
virtual void machine_start() override;
void vl70_iomap(address_map &map);
void vl70_map(address_map &map);
};
void vl70_state::machine_start()
{
cur_p1 = cur_p2 = cur_p3 = cur_p5 = cur_p6 = cur_pa = cur_pc = cur_pf = cur_pg = cur_ic32 = 0xff;
}
void vl70_state::vl70_map(address_map &map)
{
map(0x000000, 0x1fffff).rom().region("vl70cpu", 0);
map(0x200000, 0x20ffff).ram(); // 64K work RAM
map(0x400000, 0x40007f).m(m_dspv, FUNC(dspv_device::map));
map(0x600000, 0x60001f).m(m_meg, FUNC(meg_device::map));
}
// Grounded adc input
u16 vl70_state::adc_zero_r()
{
return 0;
}
// Analog input right (also sent to the swp)
u16 vl70_state::adc_ar_r()
{
return 0;
}
// Analog input left (also sent to the swp)
u16 vl70_state::adc_al_r()
{
return 0;
}
// Put the host switch to pure midi
u16 vl70_state::adc_midisw_r()
{
return 0;
}
// Battery level
u16 vl70_state::adc_battery_r()
{
return 0x200;
}
// Breath controller
u16 vl70_state::adc_breath_r()
{
return 0x000;
}
void vl70_state::p6_w(u16 data)
{
if(!(cur_p6 & P6_LCD_ENABLE) && (data & P6_LCD_ENABLE)) {
if(!(cur_p6 & P6_LCD_RW)) {
if(cur_p6 & P6_LCD_RS)
m_lcd->data_write(cur_pa);
else
m_lcd->control_write(cur_pa);
}
}
cur_p6 = data;
}
void vl70_state::pb_w(u16 data)
{
m_lcd->set_leds(bitswap<6>((data >> 2) ^ 0x3f, 5, 3, 1, 4, 2, 0));
}
void vl70_state::pc_w(u16 data)
{
cur_pc = data;
}
u16 vl70_state::pc_r()
{
u8 r = 0xff;
if(!(cur_pc & 0x01))
r &= m_ioport_b0->read();
if(!(cur_pc & 0x02))
r &= m_ioport_b1->read();
if(!(cur_pc & 0x80))
r &= m_ioport_b2->read();
return r;
}
u16 vl70_state::p6_r()
{
return cur_p6;
}
void vl70_state::pa_w(u16 data)
{
cur_pa = data;
}
u16 vl70_state::pa_r()
{
if((cur_p6 & P6_LCD_ENABLE)) {
if(cur_p6 & P6_LCD_RW)
{
if(cur_p6 & P6_LCD_RS)
return m_lcd->data_read();
else
return m_lcd->control_read();
} else
return 0x00;
}
return cur_pa;
}
void vl70_state::vl70_iomap(address_map &map)
{
map(h8_device::PORT_6, h8_device::PORT_6).rw(FUNC(vl70_state::p6_r), FUNC(vl70_state::p6_w));
map(h8_device::PORT_A, h8_device::PORT_A).rw(FUNC(vl70_state::pa_r), FUNC(vl70_state::pa_w));
map(h8_device::PORT_B, h8_device::PORT_B).w(FUNC(vl70_state::pb_w));
map(h8_device::PORT_C, h8_device::PORT_C).rw(FUNC(vl70_state::pc_r), FUNC(vl70_state::pc_w));
map(h8_device::ADC_0, h8_device::ADC_0).r(FUNC(vl70_state::adc_breath_r));
map(h8_device::ADC_1, h8_device::ADC_6).r(FUNC(vl70_state::adc_zero_r));
map(h8_device::ADC_2, h8_device::ADC_2).r(FUNC(vl70_state::adc_midisw_r));
map(h8_device::ADC_3, h8_device::ADC_6).r(FUNC(vl70_state::adc_zero_r));
map(h8_device::ADC_4, h8_device::ADC_4).r(FUNC(vl70_state::adc_battery_r));
map(h8_device::ADC_5, h8_device::ADC_6).r(FUNC(vl70_state::adc_zero_r));
map(h8_device::ADC_6, h8_device::ADC_6).r(FUNC(vl70_state::adc_zero_r));
map(h8_device::ADC_7, h8_device::ADC_7).r(FUNC(vl70_state::adc_zero_r));
}
void vl70_state::vl70(machine_config &config)
{
H83003(config, m_vl70cpu, 10_MHz_XTAL);
m_vl70cpu->set_addrmap(AS_PROGRAM, &vl70_state::vl70_map);
m_vl70cpu->set_addrmap(AS_IO, &vl70_state::vl70_iomap);
MULCD(config, m_lcd);
SPEAKER(config, "lspeaker").front_left();
SPEAKER(config, "rspeaker").front_right();
DSPV(config, m_dspv);
MEG(config, m_meg);
auto &mdin_a(MIDI_PORT(config, "mdin_a"));
midiin_slot(mdin_a);
mdin_a.rxd_handler().set("vl70cpu:sci1", FUNC(h8_sci_device::rx_w));
auto &mdin_b(MIDI_PORT(config, "mdin_b"));
midiin_slot(mdin_b);
mdin_b.rxd_handler().set("vl70cpu:sci0", FUNC(h8_sci_device::rx_w));
auto &mdout(MIDI_PORT(config, "mdout"));
midiout_slot(mdout);
m_vl70cpu->subdevice<h8_sci_device>("sci0")->tx_handler().set(mdout, FUNC(midi_port_device::write_txd));
}
ROM_START( vl70 )
ROM_REGION( 0x200000, "vl70cpu", 0 )
ROM_LOAD16_WORD_SWAP( "vl70m_v111_27c160.bin", 0x000000, 0x200000, CRC(efdba9f0) SHA1(cfa9fb7d2a991e4752393c9677e4ddcbe10866c7) )
ROM_END
CONS( 1996, vl70, 0, 0, vl70, vl70, vl70_state, empty_init, "Yamaha", "VL70-m", MACHINE_NOT_WORKING )

View File

@ -40109,11 +40109,17 @@ kof2002umj // (c)2009 SNK Playmore / New Channel
yiear // GX407 (c) 1985
yiear2 // GX407 (c) 1985
@source:ymmu100.cpp
@source:ymmu50.cpp
mu50 // 1995 MU-50
@source:ymmu80.cpp
mu80 // 1994 MU-80
@source:ymmu100.cpp
mu100 // 1997 MU-100
mu100r // 1997 MU-100 Rackable version
@source:ymvl70.cpp
vl70 // 1996 VL70-m
@source:yunsun16.cpp

View File

@ -899,7 +899,10 @@ xavix2.cpp
xbox.cpp
xerox820.cpp
xor100.cpp
ymmu50.cpp
ymmu80.cpp
ymmu100.cpp
ymvl70.cpp
z100.cpp
z1013.cpp
z29.cpp