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https://github.com/holub/mame
synced 2025-04-24 09:20:02 +03:00
added basic stuff for Z80CTC, I'm assuming this is used as support for a DAC sound system possibly even timing of the whole game. if it waits on the z80?
not hooked it up yet, ran out of ran out of time for now, if anybody fancies improving the driver this evening / tomorrow then feel free, it's interesting at least :-)
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@ -16,6 +16,7 @@
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Actel A1010A-PL68C (custom blitter maybe?)
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2x 8 DSW, bottom corner, away from everything..
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Sub / Sound board:
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@ -37,7 +38,7 @@
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#include "cpu/z80/z80.h"
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#include "video/ramdac.h"
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#include "machine/i8255.h"
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#include "machine/z80ctc.h"
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class megaphx_state : public driver_device
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{
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@ -46,12 +47,14 @@ public:
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: driver_device(mconfig, type, tag),
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m_maincpu(*this, "maincpu"),
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m_mainram(*this, "mainram"),
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m_vram(*this, "vram")
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m_vram(*this, "vram"),
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m_ctc(*this, "ctc")
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{ }
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required_device<cpu_device> m_maincpu;
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required_shared_ptr<UINT16> m_mainram;
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required_shared_ptr<UINT16> m_vram;
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required_device<z80ctc_device> m_ctc;
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DECLARE_DRIVER_INIT(megaphx);
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@ -63,6 +66,9 @@ public:
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DECLARE_READ16_MEMBER(tms_host_r);
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DECLARE_WRITE16_MEMBER(tms_host_w);
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DECLARE_WRITE_LINE_MEMBER(z80ctc_to0);
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DECLARE_WRITE_LINE_MEMBER(z80ctc_to1);
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DECLARE_WRITE_LINE_MEMBER(z80ctc_to2);
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};
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@ -95,7 +101,7 @@ static ADDRESS_MAP_START( megaphx_68k_map, AS_PROGRAM, 16, megaphx_state )
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AM_RANGE(0x040000, 0x040007) AM_READWRITE(tms_host_r, tms_host_w)
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// AM_RANGE(0x050000, 0x050001) AM_WRITENOP
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AM_RANGE(0x050000, 0x050001) AM_WRITENOP
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AM_RANGE(0x050002, 0x050003) AM_READ_PORT("P3")
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@ -140,7 +146,7 @@ static void megaphx_scanline(screen_device &screen, bitmap_rgb32 &bitmap, int sc
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{
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megaphx_state *state = screen.machine().driver_data<megaphx_state>();
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UINT16 *vram = &state->m_vram[(params->rowaddr << 8) & 0x1ff00];
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UINT16 *vram = &state->m_vram[(params->rowaddr << 8) & 0x3ff00];
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UINT32 *dest = &bitmap.pix32(scanline);
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const pen_t *paldata = screen.machine().pens;
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@ -330,6 +336,31 @@ static I8255A_INTERFACE( ppi8255_intf_0 )
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WRITE_LINE_MEMBER(megaphx_state::z80ctc_to0)
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{
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printf("z80ctc_to0 %d\n", state);
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}
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WRITE_LINE_MEMBER(megaphx_state::z80ctc_to1)
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{
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printf("z80ctc_to1 %d\n", state);
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}
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WRITE_LINE_MEMBER(megaphx_state::z80ctc_to2)
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{
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printf("z80ctc_to2 %d\n", state);
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}
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static Z80CTC_INTERFACE( z80ctc_intf )
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{
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DEVCB_CPU_INPUT_LINE("audiocpu", INPUT_LINE_IRQ0), // interrupt handler
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DEVCB_DEVICE_LINE_MEMBER("ctc", megaphx_state, z80ctc_to0), // ZC/TO0 callback
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DEVCB_DEVICE_LINE_MEMBER("ctc", megaphx_state, z80ctc_to1), // ZC/TO1 callback
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DEVCB_DEVICE_LINE_MEMBER("ctc", megaphx_state, z80ctc_to2) // ZC/TO2 callback
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};
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static MACHINE_CONFIG_START( megaphx, megaphx_state )
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MCFG_CPU_ADD("maincpu", M68000, 8000000) // ?? can't read xtal due to reflections, CPU is an 8Mhz part
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@ -346,7 +377,7 @@ static MACHINE_CONFIG_START( megaphx, megaphx_state )
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MCFG_CPU_IO_MAP(sound_io)
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MCFG_I8255A_ADD( "ppi8255_0", ppi8255_intf_0 )
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MCFG_Z80CTC_ADD( "ctc", 4000000, z80ctc_intf ) // unk freq
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MCFG_MACHINE_RESET_OVERRIDE(megaphx_state,megaphx)
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@ -366,7 +397,7 @@ DRIVER_INIT_MEMBER(megaphx_state,megaphx)
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{
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UINT16 *src = (UINT16*)memregion( "roms67" )->base();
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// copy vector table?
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memcpy(m_mainram, src, 0x100);
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memcpy(m_mainram, src, 0x10000);
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}
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