mirror of
https://github.com/holub/mame
synced 2025-10-06 17:08:28 +03:00
converted I/O to 16 bit (nw)
This commit is contained in:
smf-
parent
c77779c816
commit
47a7cb2fcc
@ -277,20 +277,19 @@ public:
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m_maincpu(*this, "maincpu") { }
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// memm variant interface
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DECLARE_WRITE32_MEMBER(key_w);
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DECLARE_READ32_MEMBER(range_r);
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DECLARE_WRITE32_MEMBER(bank_w);
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DECLARE_WRITE16_MEMBER(key_w);
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DECLARE_READ16_MEMBER(range_r);
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DECLARE_WRITE16_MEMBER(bank_w);
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// memn variant interface
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DECLARE_READ32_MEMBER (nand_status_r);
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DECLARE_WRITE32_MEMBER(nand_address1_w);
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DECLARE_WRITE32_MEMBER(nand_address2_w);
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DECLARE_WRITE32_MEMBER(nand_address3_w);
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DECLARE_WRITE32_MEMBER(nand_address4_w);
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DECLARE_READ32_MEMBER (nand_data_r);
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DECLARE_WRITE32_MEMBER(watchdog_w);
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DECLARE_WRITE32_MEMBER(nand_block_w);
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DECLARE_READ32_MEMBER (nand_block_r);
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DECLARE_READ16_MEMBER (nand_status_r);
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DECLARE_WRITE8_MEMBER(nand_address1_w);
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DECLARE_WRITE8_MEMBER(nand_address2_w);
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DECLARE_WRITE8_MEMBER(nand_address3_w);
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DECLARE_WRITE8_MEMBER(nand_address4_w);
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DECLARE_READ16_MEMBER(nand_data_r);
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DECLARE_WRITE16_MEMBER(nand_block_w);
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DECLARE_READ16_MEMBER(nand_block_r);
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UINT8 *nand_base;
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void nand_copy( UINT32 *dst, UINT32 address, int len );
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@ -300,7 +299,7 @@ private:
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UINT8 cnt;
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UINT32 bank_base;
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UINT32 nand_address;
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UINT32 block[0x1ff];
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UINT16 block[0x1ff];
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UINT16 nand_read( UINT32 address );
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UINT16 nand_read2( UINT32 address );
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@ -338,27 +337,21 @@ ADDRESS_MAP_END
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// bios copies 62000-37ffff from the flash to 80012000 in ram through the
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// decryption in range_r then jumps there (and dies horribly, of course)
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WRITE32_MEMBER(namcos10_state::key_w )
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WRITE16_MEMBER(namcos10_state::key_w )
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{
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key = (data >> 15) | (data << 1);
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logerror("key_w %04x\n", key);
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cnt = 0;
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}
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WRITE32_MEMBER(namcos10_state::bank_w)
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WRITE16_MEMBER(namcos10_state::bank_w)
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{
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bank_base = 0x80000*(offset*2 + (ACCESSING_BITS_16_31 ? 1 : 0));
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bank_base = 0x80000 * offset;
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}
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READ32_MEMBER(namcos10_state::range_r)
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READ16_MEMBER(namcos10_state::range_r)
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{
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UINT32 data32 = ((const UINT32 *)(memregion("maincpu:rom")->base()))[offset+bank_base];
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UINT16 d16;
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if(ACCESSING_BITS_16_31)
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d16 = data32 >> 16;
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else
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d16 = data32;
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UINT32 d16 = ((const UINT16 *)(memregion("maincpu:rom")->base()))[offset+bank_base];
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/* This is not entirely correct, but not entirely incorrect either...
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It's also specific to mrdriller2, it seems.
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@ -390,16 +383,13 @@ READ32_MEMBER(namcos10_state::range_r)
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cnt++;
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if(ACCESSING_BITS_16_31)
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return dd16 << 16;
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else
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return dd16;
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return dd16;
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}
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static ADDRESS_MAP_START( namcos10_memm_map, AS_PROGRAM, 32, namcos10_state )
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AM_RANGE(0x1f300000, 0x1f300003) AM_WRITE(key_w)
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AM_RANGE(0x1f400000, 0x1f5fffff) AM_READ (range_r)
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AM_RANGE(0x1fb40000, 0x1fb4000f) AM_WRITE(bank_w)
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AM_RANGE(0x1f300000, 0x1f300003) AM_WRITE16(key_w, 0x0000fffff)
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AM_RANGE(0x1f400000, 0x1f5fffff) AM_READ16(range_r, 0xffffffff)
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AM_RANGE(0x1fb40000, 0x1fb4000f) AM_WRITE16(bank_w, 0xffffffff)
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AM_IMPORT_FROM(namcos10_map)
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ADDRESS_MAP_END
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@ -410,32 +400,32 @@ ADDRESS_MAP_END
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// Block access to the nand. Something strange is going on with the
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// status port. Interaction with the decryption is unclear at best.
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READ32_MEMBER(namcos10_state::nand_status_r )
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READ16_MEMBER(namcos10_state::nand_status_r )
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{
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return 0;
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}
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WRITE32_MEMBER(namcos10_state::nand_address1_w )
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WRITE8_MEMBER(namcos10_state::nand_address1_w )
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{
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logerror("nand_a1_w %08x (%08x)\n", data, space.device().safe_pc());
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// nand_address = ( nand_address & 0x00ffffff ) | ( ( data & 0xff ) << 24 );
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// nand_address = ( nand_address & 0x00ffffff ) | ( data << 24 );
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}
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WRITE32_MEMBER(namcos10_state::nand_address2_w )
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WRITE8_MEMBER( namcos10_state::nand_address2_w )
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{
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logerror("nand_a2_w %08x (%08x)\n", data, space.device().safe_pc());
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nand_address = ( nand_address & 0xffffff00 ) | ( ( data & 0xff ) << 0 );
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nand_address = ( nand_address & 0xffffff00 ) | ( data << 0 );
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}
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WRITE32_MEMBER(namcos10_state::nand_address3_w )
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WRITE8_MEMBER( namcos10_state::nand_address3_w )
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{
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logerror("nand_a3_w %08x (%08x)\n", data, space.device().safe_pc());
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nand_address = ( nand_address & 0xffff00ff ) | ( ( data & 0xff ) << 8 );
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nand_address = ( nand_address & 0xffff00ff ) | ( data << 8 );
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}
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WRITE32_MEMBER(namcos10_state::nand_address4_w )
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WRITE8_MEMBER( namcos10_state::nand_address4_w )
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{
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nand_address = ( nand_address & 0xff00ffff ) | ( ( data & 0xff ) << 16 );
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nand_address = ( nand_address & 0xff00ffff ) | ( data << 16 );
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logerror("nand_a4_w %08x (%08x) -> %08x\n", data, space.device().safe_pc(), nand_address*2);
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}
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@ -451,9 +441,9 @@ UINT16 namcos10_state::nand_read2( UINT32 address )
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return nand_base[ index + 1 ] | ( nand_base[ index ] << 8 );
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}
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READ32_MEMBER(namcos10_state::nand_data_r )
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READ16_MEMBER( namcos10_state::nand_data_r )
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{
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UINT32 data = nand_read2( nand_address * 2 );
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UINT16 data = nand_read2( nand_address * 2 );
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// logerror("read %08x = %04x\n", nand_address*2, data);
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@ -473,30 +463,26 @@ void namcos10_state::nand_copy( UINT32 *dst, UINT32 address, int len )
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}
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}
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WRITE32_MEMBER(namcos10_state::nand_block_w)
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WRITE16_MEMBER(namcos10_state::nand_block_w)
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{
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COMBINE_DATA( &block[offset] );
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}
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READ32_MEMBER(namcos10_state::nand_block_r)
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READ16_MEMBER(namcos10_state::nand_block_r)
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{
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return block[ offset ];
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}
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WRITE32_MEMBER(namcos10_state::watchdog_w)
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{
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}
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static ADDRESS_MAP_START( namcos10_memn_map, AS_PROGRAM, 32, namcos10_state )
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AM_RANGE(0x1f300000, 0x1f300003) AM_WRITE(key_w)
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AM_RANGE(0x1f300000, 0x1f300003) AM_WRITE16(key_w, 0x0000ffff)
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AM_RANGE(0x1f400000, 0x1f400003) AM_READ (nand_status_r)
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AM_RANGE(0x1f410000, 0x1f410003) AM_WRITE(nand_address1_w)
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AM_RANGE(0x1f420000, 0x1f420003) AM_WRITE(nand_address2_w)
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AM_RANGE(0x1f430000, 0x1f430003) AM_WRITE(nand_address3_w)
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AM_RANGE(0x1f440000, 0x1f440003) AM_WRITE(nand_address4_w)
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AM_RANGE(0x1f450000, 0x1f450003) AM_READ (nand_data_r)
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AM_RANGE(0x1fb60000, 0x1fb60003) AM_READWRITE(nand_block_r, nand_block_w)
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AM_RANGE(0x1f400000, 0x1f400003) AM_READ16(nand_status_r, 0x0000ffff)
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AM_RANGE(0x1f410000, 0x1f410003) AM_WRITE8(nand_address1_w, 0x000000ff)
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AM_RANGE(0x1f420000, 0x1f420003) AM_WRITE8(nand_address2_w, 0x000000ff)
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AM_RANGE(0x1f430000, 0x1f430003) AM_WRITE8(nand_address3_w, 0x000000ff)
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AM_RANGE(0x1f440000, 0x1f440003) AM_WRITE8(nand_address4_w, 0x000000ff)
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AM_RANGE(0x1f450000, 0x1f450003) AM_READ16(nand_data_r, 0x0000ffff)
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AM_RANGE(0x1fb60000, 0x1fb60003) AM_READWRITE16(nand_block_r, nand_block_w, 0x0000ffff)
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AM_IMPORT_FROM(namcos10_map)
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ADDRESS_MAP_END
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