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New working machines
-------------------- Chess Champion: Super System IV [hap, Berger, Achim]
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hap
parent
66853f23d4
commit
487e5eea67
@ -35,7 +35,11 @@ PSU ("permanent storage unit"?) is just a 256x4 battery-backed RAM (TC5501P)
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module, not sure why it was so expensive (~180DM).
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A chess clock accessory was also announced but unreleased.
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SciSys Super System IV is on similar hardware.
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SciSys Super System IV (AKA MK IV) is on similar hardware. It was supposed to
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be a modular chesscomputer, not only with accessory hardware like MK III, but
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also a module slot for the program. The box mentions other modules, such as a
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reversi program called "The Moor". The chesscomputer was discontinued soon after
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release, and none of the accessories or other games came out.
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TODO:
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- 6522 ACR register is initialized with 0xe3. Meaning: PA and PB inputs are set
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@ -43,17 +47,17 @@ TODO:
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it meant to write 0xe0. Maybe 6522 CA1 pin emulation is wrong? Documentation
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says it's edge-triggered, but here it's tied to VCC. I added a trivial hack to
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work around this, see rom defs.
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- 6522 timer runs too fast, currently worked around by clocking it at 1MHz. PB6/PB7
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was measured 997Hz on real device, it's 1989Hz on MAME at 2MHz, both 50% duty cycle.
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- 2nd 7474 /2 clock divider on each 4000-7fff access, this also applies to 6522 clock
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(doesn't affect chess calculation speed, only I/O access, eg. beeper pitch).
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Should be doable to add, but 6522 device doesn't support live clock changes.
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- LCD TC pin? connects to the display, source is a 50hz timer(from power supply),
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probably to keep refreshing the LCD when inactive, there is no need to emulate it
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- dump/add chessboard lcd and printer unit
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- dump/add 1980 program revision, were the BTANB fixed?
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- dump/add ssystem3 1980 program revision, were the BTANB fixed?
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- ssystem4 softwarelist if a prototype cartridge is ever dumped
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- ssystem4 internal artwork (same button functions, different look)
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BTANB:
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BTANB (ssystem3):
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- If the TIME switch is held up, it will sometimes recognize the wrong input when
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another button is pressed. I assume they noticed this bug too late and tried to
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lessen the chance by adding a spring to the switch.
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@ -96,6 +100,9 @@ public:
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// machine configs
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void ssystem3(machine_config &config);
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void ssystem4(machine_config &config);
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void init_ssystem3() { m_xor_kludge = true; }
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protected:
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virtual void machine_start() override;
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@ -107,11 +114,12 @@ private:
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required_device<md4332b_device> m_lcd;
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required_device<pwm_display_device> m_display;
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required_device<dac_bit_interface> m_dac;
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required_shared_ptr<u8> m_nvram;
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optional_shared_ptr<u8> m_nvram;
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required_ioport_array<4+2> m_inputs;
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// address maps
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void main_map(address_map &map);
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void ssystem3_map(address_map &map);
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void ssystem4_map(address_map &map);
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// I/O handlers
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DECLARE_WRITE32_MEMBER(lcd_q_w) { m_lcd_q = data; }
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@ -126,6 +134,7 @@ private:
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u8 m_control = 0;
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u8 m_shift = 0;
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u32 m_lcd_q = 0;
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bool m_xor_kludge = false;
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};
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void ssystem3_state::machine_start()
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@ -176,6 +185,10 @@ READ8_MEMBER(ssystem3_state::input_r)
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if (m_inp_mux & m_inputs[i]->read())
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data |= 1 << (i+4);
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// PA5-PA7: freq sel from _PA0
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if (~m_inp_mux & 1)
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data |= m_inputs[5]->read() & 0xe0;
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return ~data;
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}
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@ -196,7 +209,7 @@ WRITE8_MEMBER(ssystem3_state::control_w)
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m_shift = m_shift << 1 | m_lcd->do_r();
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// weird TTL maze, I assume it's a hw kludge to fix a bug after the maskroms were already manufactured
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u8 xorval = (BIT(m_shift, 3) & ~(BIT(m_shift, 1) ^ BIT(m_shift, 4)) & ~(BIT(m_lcd_q, 7) & BIT(m_lcd_q, 23))) ? 0x12 : 0;
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u8 xorval = m_xor_kludge && (BIT(m_shift, 3) & ~(BIT(m_shift, 1) ^ BIT(m_shift, 4)) & ~(BIT(m_lcd_q, 7) & BIT(m_lcd_q, 23))) ? 0x12 : 0;
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// update display
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for (int i = 0; i < 4; i++)
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@ -226,7 +239,7 @@ READ8_MEMBER(ssystem3_state::control_r)
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Address Maps
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******************************************************************************/
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void ssystem3_state::main_map(address_map &map)
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void ssystem3_state::ssystem3_map(address_map &map)
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{
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map(0x0000, 0x03ff).mirror(0x3c00).ram();
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map(0x4000, 0x40ff).mirror(0x1f00).ram().rw(FUNC(ssystem3_state::nvram_r), FUNC(ssystem3_state::nvram_w)).share("nvram");
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@ -234,6 +247,14 @@ void ssystem3_state::main_map(address_map &map)
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map(0x8000, 0x9fff).mirror(0x6000).rom();
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}
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void ssystem3_state::ssystem4_map(address_map &map)
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{
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map(0x0000, 0x03ff).ram();
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map(0x4400, 0x440f).m(m_via, FUNC(via6522_device::map));
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map(0x4800, 0x48ff).noprw(); // no nvram
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map(0xd000, 0xffff).rom();
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}
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/******************************************************************************
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@ -273,10 +294,21 @@ static INPUT_PORTS_START( ssystem3 )
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PORT_CONFSETTING( 0x00, DEF_STR( Off ) )
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PORT_CONFSETTING( 0x02, DEF_STR( On ) )
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PORT_START("IN.5") // accessories
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PORT_START("IN.5") // accessories/diodes
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PORT_CONFNAME( 0x01, 0x01, "Memory Unit" )
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PORT_CONFSETTING( 0x00, DEF_STR( Off ) )
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PORT_CONFSETTING( 0x01, DEF_STR( On ) )
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PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_CUSTOM)
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INPUT_PORTS_END
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static INPUT_PORTS_START( ssystem4 )
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PORT_INCLUDE( ssystem3 )
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PORT_MODIFY("IN.3")
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PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_TOGGLE PORT_CODE(KEYCODE_T) PORT_NAME("Time")
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PORT_MODIFY("IN.5")
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PORT_BIT(0xff, IP_ACTIVE_HIGH, IPT_UNUSED)
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INPUT_PORTS_END
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@ -285,20 +317,18 @@ INPUT_PORTS_END
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Machine Configs
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******************************************************************************/
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void ssystem3_state::ssystem3(machine_config &config)
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void ssystem3_state::ssystem4(machine_config &config)
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{
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/* basic machine hardware */
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M6502(config, m_maincpu, 4_MHz_XTAL / 2);
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m_maincpu->set_addrmap(AS_PROGRAM, &ssystem3_state::main_map);
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m_maincpu->set_addrmap(AS_PROGRAM, &ssystem3_state::ssystem4_map);
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VIA6522(config, m_via, 4_MHz_XTAL / 4); // WRONG! should be 2MHz
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VIA6522(config, m_via, 4_MHz_XTAL / 2);
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m_via->writepa_handler().set(FUNC(ssystem3_state::input_w));
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m_via->readpa_handler().set(FUNC(ssystem3_state::input_r));
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m_via->writepb_handler().set(FUNC(ssystem3_state::control_w));
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m_via->readpb_handler().set(FUNC(ssystem3_state::control_r));
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NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0);
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/* video hardware */
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MD4332B(config, m_lcd);
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m_lcd->write_q().set(FUNC(ssystem3_state::lcd_q_w));
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@ -309,7 +339,6 @@ void ssystem3_state::ssystem3(machine_config &config)
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screen.set_visarea_full();
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PWM_DISPLAY(config, m_display).set_size(5, 9);
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m_display->set_segmask(0xf, 0x7f);
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m_display->set_bri_levels(0.25);
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config.set_default_layout(layout_saitek_ssystem3);
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@ -320,6 +349,19 @@ void ssystem3_state::ssystem3(machine_config &config)
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VOLTAGE_REGULATOR(config, "vref").add_route(0, "dac", 1.0, DAC_VREF_POS_INPUT);
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}
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void ssystem3_state::ssystem3(machine_config &config)
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{
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ssystem4(config);
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/* basic machine hardware */
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m_maincpu->set_addrmap(AS_PROGRAM, &ssystem3_state::ssystem3_map);
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NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0);
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m_display->set_segmask(0xf, 0x7f); // 7segs are at expected positions
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config.set_default_layout(layout_saitek_ssystem3);
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}
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/******************************************************************************
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@ -341,6 +383,19 @@ ROM_START( ssystem3 )
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ROM_LOAD( "ssystem3.svg", 0, 53552, CRC(6047f88f) SHA1(2ff9cfce01cd3811a3f46f84b47fdc4ea2cf2ba8) )
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ROM_END
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ROM_START( ssystem4 )
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ROM_REGION( 0x10000, "maincpu", 0 ) // roms in a cartridge
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ROM_LOAD("c45021_ss4-lrom", 0xd000, 0x1000, CRC(fc86a4fc) SHA1(ee292925165d4bf7b948c60a81d95f7a4064e797) ) // 2332
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ROM_LOAD("c45022_ss4-mrom", 0xe000, 0x1000, CRC(c6110af1) SHA1(4b63454a23b2fe6b5c8f3fa6718eb49770cb6907) ) // "
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ROM_LOAD("c45023_ss4-hrom", 0xf000, 0x1000, CRC(ab4a4343) SHA1(6eeee7168e13dc1115cb5833f1938a8ea8c01d69) ) // "
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// HACK! 6522 ACR register setup
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ROM_FILL(0xd05b, 1, 0xe0) // was 0xe3
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ROM_REGION( 53552, "screen", 0) // looks same, but different pinout
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ROM_LOAD( "ssystem4.svg", 0, 53552, CRC(b69b12e3) SHA1(c2e39d015397d403309f1c23619fe8abc3745d87) )
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ROM_END
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} // anonymous namespace
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@ -349,5 +404,6 @@ ROM_END
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Drivers
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******************************************************************************/
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// YEAR NAME PARENT CMP MACHINE INPUT STATE INIT COMPANY, FULLNAME, FLAGS
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CONS( 1979, ssystem3, 0, 0, ssystem3, ssystem3, ssystem3_state, empty_init, "SciSys / Novag", "Chess Champion: Super System III", MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK )
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// YEAR NAME PARENT CMP MACHINE INPUT STATE INIT COMPANY, FULLNAME, FLAGS
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CONS( 1979, ssystem3, 0, 0, ssystem3, ssystem3, ssystem3_state, init_ssystem3, "SciSys / Novag", "Chess Champion: Super System III", MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK )
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CONS( 1980, ssystem4, 0, 0, ssystem4, ssystem4, ssystem3_state, empty_init, "SciSys", "Chess Champion: Super System IV", MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK )
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@ -35186,20 +35186,20 @@ safarirj // (c) 1979 Shin Nihon Kikaku (SNK)
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sag
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@source:sage2.cpp
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sage2 //
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sage2
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@source:saitek_chesstrv.cpp
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chesstrv //
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chesstrv
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@source:saitek_corona.cpp
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corona
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coronaa
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@source:saitek_cp2000.cpp
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cp2000 //
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cp2000
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@source:saitek_delta1.cpp
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ccdelta1 //
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ccdelta1
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@source:saitek_exchess.cpp
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exchess
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@ -35224,15 +35224,16 @@ renaissa
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renaissaa
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@source:saitek_risc2500.cpp
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montreux //
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risc2500 //
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risc2500a //
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montreux
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risc2500
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risc2500a
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@source:saitek_schess.cpp
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schess
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@source:saitek_ssystem3.cpp
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ssystem3 // Chess Champion Super System III / MK III
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ssystem3
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ssystem4
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@source:saitek_stratos.cpp
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stratos
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