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https://github.com/holub/mame
synced 2025-07-01 16:19:38 +03:00
cpu/m68000: Don't emulate byte smearing for the 68040, and fix disabling the FPU for the 68030. [R. Belmont]
This commit is contained in:
arbee
parent
89f45fc8a8
commit
48d56fa00a
@ -19,8 +19,9 @@ std::unique_ptr<util::disasm_interface> m68030_device::create_disassembler()
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}
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m68030_device::m68030_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
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: m68000_musashi_device(mconfig, tag, owner, clock, M68030, 32,32)
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: m68000_musashi_device(mconfig, tag, owner, clock, M68030, 32, 32)
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{
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m_has_fpu = true;
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}
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void m68030_device::device_start()
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@ -27,6 +27,7 @@ std::unique_ptr<util::disasm_interface> m68040_device::create_disassembler()
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m68040_device::m68040_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
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: m68000_musashi_device(mconfig, tag, owner, clock, M68040, 32,32)
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{
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m_has_fpu = true;
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}
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@ -1602,6 +1602,238 @@ void m68000_musashi_device::init32mmu(address_space &space, address_space &ospac
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};
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}
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/* interface for 32-bit data bus without byte smearing 68040) */
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void m68000_musashi_device::init32_no_smear(address_space &space, address_space &ospace)
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{
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m_space = &space;
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m_ospace = &ospace;
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ospace.cache(m_oprogram32);
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space.specific(m_program32);
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m_readimm16 = [this](offs_t address) -> u16
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{ return m_oprogram32.read_word(address); };
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m_read8 = [this](offs_t address) -> u8
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{ return m_program32.read_byte(address); };
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m_read16 = [this](offs_t address) -> u16
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{ return m_program32.read_word_unaligned(address); };
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m_read32 = [this](offs_t address) -> u32
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{ return m_program32.read_dword_unaligned(address); };
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m_write8 = [this](offs_t address, u8 data)
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{ return m_program32.write_byte(address, data); };
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m_write16 = [this](offs_t address, u16 data)
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{
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if (address & 1)
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{
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m_program32.write_byte(address, data >> 8);
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m_program32.write_byte(address + 1, data & 0xff);
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}
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else
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{
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m_program32.write_word(address, data);
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}
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return;
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};
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m_write32 = [this](offs_t address, u32 data)
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{
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switch (address & 3)
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{
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case 0:
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m_program32.write_dword(address, data, 0xffffffffU);
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break;
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case 1:
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m_program32.write_dword(address - 1, (data & 0xff000000U) | (data & 0xffffff00U) >> 8, 0x00ffffff);
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m_program32.write_dword(address + 3, dword_from_byte(data & 0x000000ff), 0xff000000U);
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break;
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case 2:
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m_program32.write_dword(address - 2, dword_from_word((data & 0xffff0000U) >> 16), 0x0000ffff);
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m_program32.write_dword(address + 2, dword_from_word(data & 0x0000ffff), 0xffff0000U);
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break;
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case 3:
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m_program32.write_dword(address - 3, dword_from_unaligned_word((data & 0xffff0000U) >> 16), 0x000000ff);
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m_program32.write_dword(address + 1, rotl_32(data, 8), 0xffffff00U);
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break;
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}
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};
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}
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/* interface for 32-bit data bus with PMMU without byte smearing (68040)*/
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void m68000_musashi_device::init32mmu_no_smear(address_space &space, address_space &ospace)
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{
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m_space = &space;
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m_ospace = &ospace;
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ospace.cache(m_oprogram32);
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space.specific(m_program32);
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m_readimm16 = [this](offs_t address) -> u16
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{
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if (m_pmmu_enabled)
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{
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address = pmmu_translate_addr(address, 1);
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if (m_mmu_tmp_buserror_occurred)
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return ~0;
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}
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return m_oprogram32.read_word(address);
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};
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m_read8 = [this](offs_t address) -> u8
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{
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if (m_pmmu_enabled)
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{
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address = pmmu_translate_addr(address, 1);
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if (m_mmu_tmp_buserror_occurred)
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return ~0;
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}
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return m_program32.read_byte(address);
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};
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m_read16 = [this](offs_t address) -> u16
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{
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if (m_pmmu_enabled)
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{
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u32 address0 = pmmu_translate_addr(address, 1);
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if (m_mmu_tmp_buserror_occurred)
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return ~0;
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if (WORD_ALIGNED(address))
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return m_program32.read_word(address0);
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u32 address1 = pmmu_translate_addr(address + 1, 1);
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if (m_mmu_tmp_buserror_occurred)
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return ~0;
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u16 result = m_program32.read_byte(address0) << 8;
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return result | m_program32.read_byte(address1);
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}
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return m_program32.read_word_unaligned(address);
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};
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m_read32 = [this](offs_t address) -> u32
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{
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if (m_pmmu_enabled)
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{
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u32 address0 = pmmu_translate_addr(address, 1);
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if (m_mmu_tmp_buserror_occurred)
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return ~0;
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if ((address + 3) & 0xfc)
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// not at page boundary; use default code
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address = address0;
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else if (DWORD_ALIGNED(address)) // 0
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return m_program32.read_dword(address0);
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else
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{
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u32 address2 = pmmu_translate_addr(address + 2, 1);
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if (m_mmu_tmp_buserror_occurred)
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return ~0;
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if (WORD_ALIGNED(address))
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{ // 2
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u32 result = m_program32.read_word(address0) << 16;
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return result | m_program32.read_word(address2);
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}
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u32 address1 = pmmu_translate_addr(address + 1, 1);
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u32 address3 = pmmu_translate_addr(address + 3, 1);
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if (m_mmu_tmp_buserror_occurred)
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return ~0;
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u32 result = m_program32.read_byte(address0) << 24;
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result |= m_program32.read_word(address1) << 8;
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return result | m_program32.read_byte(address3);
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}
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}
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return m_program32.read_dword_unaligned(address);
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};
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m_write8 = [this](offs_t address, u8 data)
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{
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u32 address0 = address;
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if (m_pmmu_enabled)
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{
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address0 = pmmu_translate_addr(address, 0);
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if (m_mmu_tmp_buserror_occurred)
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return;
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}
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m_program32.write_byte(address0, data);
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};
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m_write16 = [this](offs_t address, u16 data)
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{
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u32 address0 = address;
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if (m_pmmu_enabled)
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{
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address0 = pmmu_translate_addr(address0, 0);
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if (m_mmu_tmp_buserror_occurred)
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return;
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}
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if (address0 & 1)
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{
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m_program32.write_byte(address0, data >> 8);
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m_program32.write_byte(address0 + 1, data & 0xff);
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}
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else
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{
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m_program32.write_word(address0, data);
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}
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};
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m_write32 = [this](offs_t address, u32 data)
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{
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u32 address0 = address;
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if (m_pmmu_enabled)
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{
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address0 = pmmu_translate_addr(address0, 0);
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if (m_mmu_tmp_buserror_occurred)
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return;
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}
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switch (address & 3)
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{
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case 0:
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m_program32.write_dword(address0, data, 0xffffffffU);
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break;
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case 1:
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{
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u32 address3 = address + 3;
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if (m_pmmu_enabled)
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{
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address3 = pmmu_translate_addr(address3, 0);
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if (m_mmu_tmp_buserror_occurred)
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return;
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}
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m_program32.write_dword(address0 - 1, (data & 0xff000000U) | (data & 0xffffff00U) >> 8, 0x00ffffff);
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m_program32.write_dword(address3, dword_from_byte(data & 0x000000ff), 0xff000000U);
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break;
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}
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case 2:
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{
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u32 address2 = address + 2;
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if (m_pmmu_enabled)
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{
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address2 = pmmu_translate_addr(address2, 0);
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if (m_mmu_tmp_buserror_occurred)
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return;
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}
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m_program32.write_dword(address0 - 2, dword_from_word((data & 0xffff0000U) >> 16), 0x0000ffff);
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m_program32.write_dword(address2, dword_from_word(data & 0x0000ffff), 0xffff0000U);
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break;
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}
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case 3:
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{
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u32 address1 = address + 1;
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if (m_pmmu_enabled)
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{
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address1 = pmmu_translate_addr(address1, 0);
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if (m_mmu_tmp_buserror_occurred)
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return;
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}
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m_program32.write_dword(address0 - 3, dword_from_unaligned_word((data & 0xffff0000U) >> 16), 0x000000ff);
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m_program32.write_dword(address1, rotl_32(data, 8), 0xffffff00U);
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break;
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}
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}
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};
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}
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void m68000_musashi_device::init32hmmu(address_space &space, address_space &ospace)
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{
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m_space = &space;
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@ -1997,7 +2229,6 @@ void m68000_musashi_device::init_cpu_m68030(void)
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m_cyc_shift = 1;
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m_cyc_reset = 518;
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m_has_pmmu = 1;
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m_has_fpu = 1;
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define_state();
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}
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@ -2040,7 +2271,7 @@ void m68000_musashi_device::init_cpu_m68040(void)
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m_cpu_type = CPU_TYPE_040;
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init32mmu(*m_program, *m_oprogram);
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init32mmu_no_smear(*m_program, *m_oprogram);
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m_sr_mask = 0xf71f; /* T1 T0 S M -- I2 I1 I0 -- -- -- X N Z V C */
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m_state_table = m68ki_instruction_state_table[5];
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m_cyc_instruction = m68ki_cycles[5];
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@ -2055,7 +2286,6 @@ void m68000_musashi_device::init_cpu_m68040(void)
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m_cyc_shift = 1;
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m_cyc_reset = 518;
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m_has_pmmu = 1;
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m_has_fpu = 1;
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define_state();
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}
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@ -2068,7 +2298,7 @@ void m68000_musashi_device::init_cpu_m68ec040(void)
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m_cpu_type = CPU_TYPE_EC040;
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init32(*m_program, *m_oprogram);
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init32_no_smear(*m_program, *m_oprogram);
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m_sr_mask = 0xf71f; /* T1 T0 S M -- I2 I1 I0 -- -- -- X N Z V C */
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m_state_table = m68ki_instruction_state_table[5];
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m_cyc_instruction = m68ki_cycles[5];
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@ -2096,7 +2326,7 @@ void m68000_musashi_device::init_cpu_m68lc040(void)
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m_cpu_type = CPU_TYPE_LC040;
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init32mmu(*m_program, *m_oprogram);
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init32mmu_no_smear(*m_program, *m_oprogram);
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m_sr_mask = 0xf71f; /* T1 T0 S M -- I2 I1 I0 -- -- -- X N Z V C */
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m_state_table = m68ki_instruction_state_table[5];
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m_cyc_instruction = m68ki_cycles[5];
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@ -121,6 +121,7 @@ public:
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void set_emmu_enable(bool enable);
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bool get_pmmu_enable() const {return m_pmmu_enabled;}
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void set_fpu_enable(bool enable);
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bool get_fpu_enable() const { return m_has_fpu; }
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void set_buserror_details(u32 fault_addr, u8 rw, u8 fc, bool rerun = false);
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void restart_this_instruction();
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@ -219,7 +220,9 @@ protected:
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void init8(address_space &space, address_space &ospace);
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void init16(address_space &space, address_space &ospace);
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void init32(address_space &space, address_space &ospace);
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void init32_no_smear(address_space &space, address_space &ospace);
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void init32mmu(address_space &space, address_space &ospace);
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void init32mmu_no_smear(address_space &space, address_space &ospace);
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void init32hmmu(address_space &space, address_space &ospace);
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std::function<u16 (offs_t)> m_readimm16; // Immediate read 16 bit
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