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mcs48: Convert ports to devcb (nw)

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- T0, T1 and PROG handlers are now 1-bit rather than 8-bit
- Eliminate several T0/T1 handlers that DEVCB macros can take care of now
- T0 CLK output emulation (untested)
This commit is contained in:
AJR 2017-05-04 22:14:19 -04:00 committed by Vas Crabb
parent 4930ecef12
commit 48f24cb5f3
122 changed files with 792 additions and 1064 deletions
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14
src/devices/bus/abckb/abc77.cpp
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@ -101,10 +101,6 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( abc77_io, AS_IO, 8, abc77_device )
AM_RANGE(0x00, 0x00) AM_MIRROR(0xff) AM_WRITE(j3_w)
AM_RANGE(0x00, 0x00) AM_MIRROR(0xff) AM_READ_PORT("DSW")
AM_RANGE(MCS48_PORT_P1, MCS48_PORT_P1) AM_READ(p1_r)
AM_RANGE(MCS48_PORT_P2, MCS48_PORT_P2) AM_WRITE(p2_w)
AM_RANGE(MCS48_PORT_T1, MCS48_PORT_T1) AM_READ(t1_r)
AM_RANGE(MCS48_PORT_PROG, MCS48_PORT_PROG) AM_WRITE(prog_w)
ADDRESS_MAP_END
@ -136,6 +132,10 @@ static MACHINE_CONFIG_FRAGMENT( abc77 )
MCFG_CPU_ADD(I8035_TAG, I8035, XTAL_4_608MHz)
MCFG_CPU_PROGRAM_MAP(abc77_map)
MCFG_CPU_IO_MAP(abc77_io)
MCFG_MCS48_PORT_P1_IN_CB(READ8(abc77_device, p1_r))
MCFG_MCS48_PORT_P2_OUT_CB(WRITE8(abc77_device, p2_w))
MCFG_MCS48_PORT_T1_IN_CB(READLINE(abc77_device, t1_r))
MCFG_MCS48_PORT_PROG_OUT_CB(WRITELINE(abc77_device, prog_w))
// watchdog
MCFG_WATCHDOG_ADD("watchdog")
@ -592,7 +592,7 @@ WRITE8_MEMBER( abc77_device::p2_w )
// t1_r -
//-------------------------------------------------
READ8_MEMBER( abc77_device::t1_r )
READ_LINE_MEMBER( abc77_device::t1_r )
{
return m_clock;
}
@ -602,9 +602,9 @@ READ8_MEMBER( abc77_device::t1_r )
// prog_w -
//-------------------------------------------------
WRITE8_MEMBER( abc77_device::prog_w )
WRITE_LINE_MEMBER( abc77_device::prog_w )
{
m_stb = BIT(data, 0);
m_stb = state;
}

4
src/devices/bus/abckb/abc77.h
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@ -46,8 +46,8 @@ public:
DECLARE_READ8_MEMBER( p1_r );
DECLARE_WRITE8_MEMBER( p2_w );
DECLARE_READ8_MEMBER( t1_r );
DECLARE_WRITE8_MEMBER( prog_w );
DECLARE_READ_LINE_MEMBER( t1_r );
DECLARE_WRITE_LINE_MEMBER( prog_w );
DECLARE_WRITE8_MEMBER( j3_w );
protected:

18
src/devices/bus/abckb/abc800kb.cpp
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@ -108,24 +108,16 @@ const tiny_rom_entry *abc800_keyboard_device::device_rom_region() const
}
//-------------------------------------------------
// ADDRESS_MAP( abc800_keyboard_io )
//-------------------------------------------------
static ADDRESS_MAP_START( abc800_keyboard_io, AS_IO, 8, abc800_keyboard_device )
AM_RANGE(MCS48_PORT_P1, MCS48_PORT_P1) AM_READWRITE(kb_p1_r, kb_p1_w)
AM_RANGE(MCS48_PORT_P2, MCS48_PORT_P2) AM_WRITE(kb_p2_w)
AM_RANGE(MCS48_PORT_T1, MCS48_PORT_T1) AM_READ(kb_t1_r)
ADDRESS_MAP_END
//-------------------------------------------------
// MACHINE_DRIVER( abc800_keyboard )
//-------------------------------------------------
static MACHINE_CONFIG_FRAGMENT( abc800_keyboard )
MCFG_CPU_ADD(I8048_TAG, I8048, XTAL_5_9904MHz)
MCFG_CPU_IO_MAP(abc800_keyboard_io)
MCFG_MCS48_PORT_P1_IN_CB(READ8(abc800_keyboard_device, kb_p1_r))
MCFG_MCS48_PORT_P1_OUT_CB(WRITE8(abc800_keyboard_device, kb_p1_w))
MCFG_MCS48_PORT_P2_OUT_CB(WRITE8(abc800_keyboard_device, kb_p2_w))
MCFG_MCS48_PORT_T1_IN_CB(READLINE(abc800_keyboard_device, kb_t1_r))
MACHINE_CONFIG_END
@ -480,7 +472,7 @@ WRITE8_MEMBER( abc800_keyboard_device::kb_p2_w )
// kb_t1_r - keyboard T1 timer read
//-------------------------------------------------
READ8_MEMBER( abc800_keyboard_device::kb_t1_r )
READ_LINE_MEMBER( abc800_keyboard_device::kb_t1_r )
{
return m_clk;
}

2
src/devices/bus/abckb/abc800kb.h
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@ -43,7 +43,7 @@ public:
DECLARE_READ8_MEMBER( kb_p1_r );
DECLARE_WRITE8_MEMBER( kb_p1_w );
DECLARE_WRITE8_MEMBER( kb_p2_w );
DECLARE_READ8_MEMBER( kb_t1_r );
DECLARE_READ_LINE_MEMBER( kb_t1_r );
protected:
// device-level overrides

29
src/devices/bus/abckb/abc99.cpp
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@ -133,10 +133,6 @@ static ADDRESS_MAP_START( abc99_z2_io, AS_IO, 8, abc99_device )
AM_RANGE(0x3d, 0x3d) AM_READ_PORT("X13") AM_WRITENOP
AM_RANGE(0x3e, 0x3e) AM_READ_PORT("X14") AM_WRITENOP
AM_RANGE(0x3f, 0x3f) AM_READ_PORT("X15") AM_WRITENOP
AM_RANGE(MCS48_PORT_P1, MCS48_PORT_P1) AM_WRITE(z2_p1_w)
AM_RANGE(MCS48_PORT_P2, MCS48_PORT_P2) AM_READ(z2_p2_r)
AM_RANGE(MCS48_PORT_T0, MCS48_PORT_T0) AM_READ(z2_t0_r)
AM_RANGE(MCS48_PORT_T1, MCS48_PORT_T1) AM_READ(z2_t1_r)
ADDRESS_MAP_END
@ -149,18 +145,6 @@ static ADDRESS_MAP_START( abc99_z5_mem, AS_PROGRAM, 8, abc99_device )
ADDRESS_MAP_END
//-------------------------------------------------
// ADDRESS_MAP( abc99_z5_io )
//-------------------------------------------------
static ADDRESS_MAP_START( abc99_z5_io, AS_IO, 8, abc99_device )
/* AM_RANGE(MCS48_PORT_P1, MCS48_PORT_P1) AM_READ(z5_p1_r)
AM_RANGE(MCS48_PORT_P2, MCS48_PORT_P2) AM_WRITE(z5_p2_w)
AM_RANGE(MCS48_PORT_T0, MCS48_PORT_T0) AM_WRITENOP // Z2 CLK
AM_RANGE(MCS48_PORT_T1, MCS48_PORT_T1) AM_READ(z5_t1_r)*/
ADDRESS_MAP_END
//-------------------------------------------------
// MACHINE_DRIVER( abc99 )
//-------------------------------------------------
@ -170,11 +154,18 @@ static MACHINE_CONFIG_FRAGMENT( abc99 )
MCFG_CPU_ADD(I8035_Z2_TAG, I8035, XTAL_6MHz/3) // from Z5 T0 output
MCFG_CPU_PROGRAM_MAP(abc99_z2_mem)
MCFG_CPU_IO_MAP(abc99_z2_io)
MCFG_MCS48_PORT_P1_OUT_CB(WRITE8(abc99_device, z2_p1_w))
MCFG_MCS48_PORT_P2_IN_CB(READ8(abc99_device, z2_p2_r))
MCFG_MCS48_PORT_T0_IN_CB(READLINE(abc99_device, z2_t0_r))
MCFG_MCS48_PORT_T1_IN_CB(READLINE(abc99_device, z2_t1_r))
// mouse CPU
MCFG_CPU_ADD(I8035_Z5_TAG, I8035, XTAL_6MHz)
MCFG_CPU_PROGRAM_MAP(abc99_z5_mem)
MCFG_CPU_IO_MAP(abc99_z5_io)
//MCFG_MCS48_PORT_P1_IN_CB(READ8(abc99_device, z5_p1_r))
//MCFG_MCS48_PORT_P2_OUT_CB(WRITE8(abc99_device, z5_p2_w))
//MCFG_MCS48_PORT_T0_CLK_CUSTOM() // Z2 CLK
//MCFG_MCS48_PORT_T1_IN_CB(READ8(abc99_device, z5_t1_r))
MCFG_DEVICE_DISABLE() // HACK fix for broken serial I/O
// sound hardware
@ -676,7 +667,7 @@ READ8_MEMBER( abc99_device::z2_p2_r )
// z2_t0_r -
//-------------------------------------------------
READ8_MEMBER( abc99_device::z2_t0_r )
READ_LINE_MEMBER( abc99_device::z2_t0_r )
{
return 1; // 0=mouse connected, 1=no mouse
}
@ -686,7 +677,7 @@ READ8_MEMBER( abc99_device::z2_t0_r )
// z2_t1_r -
//-------------------------------------------------
READ8_MEMBER( abc99_device::z2_t1_r )
READ_LINE_MEMBER( abc99_device::z2_t1_r )
{
return m_t1_z2;
}

4
src/devices/bus/abckb/abc99.h
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@ -44,8 +44,8 @@ public:
DECLARE_WRITE8_MEMBER( z2_led_w );
DECLARE_WRITE8_MEMBER( z2_p1_w );
DECLARE_READ8_MEMBER( z2_p2_r );
DECLARE_READ8_MEMBER( z2_t0_r );
DECLARE_READ8_MEMBER( z2_t1_r );
DECLARE_READ_LINE_MEMBER( z2_t0_r );
DECLARE_READ_LINE_MEMBER( z2_t1_r );
DECLARE_READ8_MEMBER( z5_p1_r );
DECLARE_WRITE8_MEMBER( z5_p2_w );
DECLARE_READ8_MEMBER( z5_t1_r );

12
src/devices/bus/dmv/k806.cpp
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@ -19,15 +19,11 @@ ROM_START( dmv_k806 )
ROM_LOAD( "dmv_mouse_8741a.bin", 0x0000, 0x0400, CRC(2163737a) SHA1(b82c14dba6c25cb1f60cf623989ca8c0c1ee4cc3))
ROM_END
static ADDRESS_MAP_START( k806_io, AS_IO, 8, dmv_k806_device )
AM_RANGE(MCS48_PORT_P1, MCS48_PORT_P1) AM_READ(port1_r)
AM_RANGE(MCS48_PORT_P2, MCS48_PORT_P2) AM_WRITE(port2_w)
AM_RANGE(MCS48_PORT_T1, MCS48_PORT_T1) AM_READ(portt1_r)
ADDRESS_MAP_END
static MACHINE_CONFIG_FRAGMENT( dmv_k806 )
MCFG_CPU_ADD("mcu", I8741, XTAL_6MHz)
MCFG_CPU_IO_MAP(k806_io)
MCFG_MCS48_PORT_P1_IN_CB(READ8(dmv_k806_device, port1_r))
MCFG_MCS48_PORT_P2_OUT_CB(WRITE8(dmv_k806_device, port2_w))
MCFG_MCS48_PORT_T1_IN_CB(READLINE(dmv_k806_device, portt1_r))
MCFG_TIMER_DRIVER_ADD_PERIODIC("mouse_timer", dmv_k806_device, mouse_timer, attotime::from_hz(1000))
MACHINE_CONFIG_END
@ -174,7 +170,7 @@ READ8_MEMBER( dmv_k806_device::port1_r )
return data;
}
READ8_MEMBER( dmv_k806_device::portt1_r )
READ_LINE_MEMBER( dmv_k806_device::portt1_r )
{
return BIT(m_jumpers->read(), 7) ? 0 : 1;
}

2
src/devices/bus/dmv/k806.h
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@ -28,7 +28,7 @@ public:
virtual ioport_constructor device_input_ports() const override;
virtual machine_config_constructor device_mconfig_additions() const override;
DECLARE_READ8_MEMBER(portt1_r);
DECLARE_READ_LINE_MEMBER(portt1_r);
DECLARE_READ8_MEMBER(port1_r);
DECLARE_WRITE8_MEMBER(port2_w);

21
src/devices/bus/isa/wdxt_gen.cpp
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@ -94,10 +94,6 @@ const tiny_rom_entry *wdxt_gen_device::device_rom_region() const
static ADDRESS_MAP_START( wd1015_io, AS_IO, 8, wdxt_gen_device )
AM_RANGE(0x00, 0xff) AM_DEVREADWRITE(WD11C00_17_TAG, wd11c00_17_device, read, write)
AM_RANGE(MCS48_PORT_T0, MCS48_PORT_T0) AM_READ(wd1015_t0_r)
AM_RANGE(MCS48_PORT_T1, MCS48_PORT_T1) AM_READ(wd1015_t1_r)
AM_RANGE(MCS48_PORT_P1, MCS48_PORT_P1) AM_READWRITE(wd1015_p1_r, wd1015_p1_w)
AM_RANGE(MCS48_PORT_P2, MCS48_PORT_P2) AM_READWRITE(wd1015_p2_r, wd1015_p2_w)
ADDRESS_MAP_END
@ -145,6 +141,12 @@ WRITE8_MEMBER( wdxt_gen_device::ram_w )
static MACHINE_CONFIG_FRAGMENT( wdxt_gen )
MCFG_CPU_ADD(WD1015_TAG, I8049, 5000000)
MCFG_CPU_IO_MAP(wd1015_io)
MCFG_MCS48_PORT_T0_IN_CB(DEVREADLINE(WD11C00_17_TAG, wd11c00_17_device, busy_r))
MCFG_MCS48_PORT_T1_IN_CB(READLINE(wdxt_gen_device, wd1015_t1_r))
MCFG_MCS48_PORT_P1_IN_CB(READ8(wdxt_gen_device, wd1015_p1_r))
MCFG_MCS48_PORT_P1_OUT_CB(WRITE8(wdxt_gen_device, wd1015_p1_w))
MCFG_MCS48_PORT_P2_IN_CB(READ8(wdxt_gen_device, wd1015_p2_r))
MCFG_MCS48_PORT_P2_OUT_CB(WRITE8(wdxt_gen_device, wd1015_p2_w))
MCFG_DEVICE_ADD(WD11C00_17_TAG, WD11C00_17, 5000000)
MCFG_WD11C00_17_OUT_IRQ5_CB(WRITELINE(wdxt_gen_device, irq5_w))
@ -243,21 +245,12 @@ void wdxt_gen_device::dack_w(int line, uint8_t data)
m_host->dack_w(data);
}
//-------------------------------------------------
// wd1015_t0_r -
//-------------------------------------------------
READ8_MEMBER( wdxt_gen_device::wd1015_t0_r )
{
return m_host->busy_r();
}
//-------------------------------------------------
// wd1015_t1_r -
//-------------------------------------------------
READ8_MEMBER( wdxt_gen_device::wd1015_t1_r )
READ_LINE_MEMBER( wdxt_gen_device::wd1015_t1_r )
{
return 0; // TODO
}

3
src/devices/bus/isa/wdxt_gen.h
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@ -51,8 +51,7 @@ public:
DECLARE_READ8_MEMBER( rd322_r );
DECLARE_READ8_MEMBER( ram_r );
DECLARE_WRITE8_MEMBER( ram_w );
DECLARE_READ8_MEMBER( wd1015_t0_r );
DECLARE_READ8_MEMBER( wd1015_t1_r );
DECLARE_READ_LINE_MEMBER( wd1015_t1_r );
DECLARE_READ8_MEMBER( wd1015_p1_r );
DECLARE_WRITE8_MEMBER( wd1015_p1_w );
DECLARE_READ8_MEMBER( wd1015_p2_r );

12
src/devices/bus/odyssey2/slot.h
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@ -37,7 +37,7 @@ public:
virtual void write_bank(int bank) {}
virtual DECLARE_WRITE8_MEMBER(io_write) {}
virtual DECLARE_READ8_MEMBER(t0_read) { return 0; }
virtual DECLARE_READ_LINE_MEMBER(t0_read) { return 0; }
void rom_alloc(uint32_t size, const char *tag);
void ram_alloc(uint32_t size);
@ -88,12 +88,12 @@ public:
virtual std::string get_default_card_software(get_default_card_software_hook &hook) const override;
// reading and writing
virtual DECLARE_READ8_MEMBER(read_rom04);
virtual DECLARE_READ8_MEMBER(read_rom0c);
virtual DECLARE_WRITE8_MEMBER(io_write);
virtual DECLARE_READ8_MEMBER(t0_read) { if (m_cart) return m_cart->t0_read(space, offset); else return 0; }
DECLARE_READ8_MEMBER(read_rom04);
DECLARE_READ8_MEMBER(read_rom0c);
DECLARE_WRITE8_MEMBER(io_write);
DECLARE_READ_LINE_MEMBER(t0_read) { if (m_cart) return m_cart->t0_read(); else return 0; }
virtual void write_bank(int bank) { if (m_cart) m_cart->write_bank(bank); }
void write_bank(int bank) { if (m_cart) m_cart->write_bank(bank); }
protected:

2
src/devices/bus/odyssey2/voice.h
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@ -31,7 +31,7 @@ public:
DECLARE_WRITE_LINE_MEMBER(lrq_callback);
virtual DECLARE_WRITE8_MEMBER(io_write) override;
virtual DECLARE_READ8_MEMBER(t0_read) override { return m_speech->lrq_r() ? 0 : 1; }
virtual DECLARE_READ_LINE_MEMBER(t0_read) override { return m_speech->lrq_r() ? 0 : 1; }
private:
required_device<sp0256_device> m_speech;

20
src/devices/bus/pc_kbd/ec1841.cpp
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@ -62,25 +62,17 @@ const tiny_rom_entry *ec_1841_keyboard_device::device_rom_region() const
}
//-------------------------------------------------
// ADDRESS_MAP( kb_io )
//-------------------------------------------------
static ADDRESS_MAP_START( ec_1841_keyboard_io, AS_IO, 8, ec_1841_keyboard_device )
AM_RANGE(MCS48_PORT_BUS, MCS48_PORT_BUS) AM_WRITE(bus_w)
AM_RANGE(MCS48_PORT_P1, MCS48_PORT_P1) AM_READWRITE(p1_r, p1_w)
AM_RANGE(MCS48_PORT_P2, MCS48_PORT_P2) AM_WRITE(p2_w)
AM_RANGE(MCS48_PORT_T1, MCS48_PORT_T1) AM_READ(t1_r)
ADDRESS_MAP_END
//-------------------------------------------------
// MACHINE_DRIVER( ec_1841_keyboard )
//-------------------------------------------------
static MACHINE_CONFIG_FRAGMENT( ec_1841_keyboard )
MCFG_CPU_ADD(I8048_TAG, I8048, XTAL_5_46MHz)
MCFG_CPU_IO_MAP(ec_1841_keyboard_io)
MCFG_MCS48_PORT_BUS_OUT_CB(WRITE8(ec_1841_keyboard_device, bus_w))
MCFG_MCS48_PORT_P1_IN_CB(READ8(ec_1841_keyboard_device, p1_r))
MCFG_MCS48_PORT_P1_OUT_CB(WRITE8(ec_1841_keyboard_device, p1_w))
MCFG_MCS48_PORT_P2_OUT_CB(WRITE8(ec_1841_keyboard_device, p2_w))
MCFG_MCS48_PORT_T1_IN_CB(READLINE(ec_1841_keyboard_device, t1_r))
MACHINE_CONFIG_END
@ -438,7 +430,7 @@ WRITE8_MEMBER( ec_1841_keyboard_device::p2_w )
// t1_r -
//-------------------------------------------------
READ8_MEMBER( ec_1841_keyboard_device::t1_r )
READ_LINE_MEMBER( ec_1841_keyboard_device::t1_r )
{
if (BIT(m_p2,0)) {
m_q = 1;

2
src/devices/bus/pc_kbd/ec1841.h
View File

@ -38,7 +38,7 @@ public:
DECLARE_READ8_MEMBER( p1_r );
DECLARE_WRITE8_MEMBER( p1_w );
DECLARE_WRITE8_MEMBER( p2_w );
DECLARE_READ8_MEMBER( t1_r );
DECLARE_READ_LINE_MEMBER( t1_r );
protected:
// device-level overrides

11
src/devices/bus/pc_kbd/iskr1030.cpp
View File

@ -62,10 +62,7 @@ const tiny_rom_entry *iskr_1030_keyboard_device::device_rom_region() const
//-------------------------------------------------
static ADDRESS_MAP_START( iskr_1030_keyboard_io, AS_IO, 8, iskr_1030_keyboard_device )
AM_RANGE(0x00, 0xFF) AM_READWRITE(ram_r, ram_w)
AM_RANGE(MCS48_PORT_P1, MCS48_PORT_P1) AM_READWRITE(p1_r, p1_w)
AM_RANGE(MCS48_PORT_P2, MCS48_PORT_P2) AM_WRITE(p2_w)
AM_RANGE(MCS48_PORT_T1, MCS48_PORT_T1) AM_READ(t1_r)
AM_RANGE(0x00, 0xff) AM_READWRITE(ram_r, ram_w)
ADDRESS_MAP_END
@ -76,6 +73,10 @@ ADDRESS_MAP_END
static MACHINE_CONFIG_FRAGMENT( iskr_1030_keyboard )
MCFG_CPU_ADD(I8048_TAG, I8048, XTAL_5MHz)
MCFG_CPU_IO_MAP(iskr_1030_keyboard_io)
MCFG_MCS48_PORT_P1_IN_CB(READ8(iskr_1030_keyboard_device, p1_r))
MCFG_MCS48_PORT_P1_OUT_CB(WRITE8(iskr_1030_keyboard_device, p1_w))
MCFG_MCS48_PORT_P2_OUT_CB(WRITE8(iskr_1030_keyboard_device, p2_w))
MCFG_MCS48_PORT_T1_IN_CB(READLINE(iskr_1030_keyboard_device, t1_r))
MACHINE_CONFIG_END
@ -347,7 +348,7 @@ WRITE_LINE_MEMBER( iskr_1030_keyboard_device::data_write )
// t1_r -
//-------------------------------------------------
READ8_MEMBER( iskr_1030_keyboard_device::t1_r )
READ_LINE_MEMBER( iskr_1030_keyboard_device::t1_r )
{
uint8_t data = data_signal();
uint8_t bias = m_p1 & 15;

2
src/devices/bus/pc_kbd/iskr1030.h
View File

@ -40,7 +40,7 @@ public:
DECLARE_READ8_MEMBER( p1_r );
DECLARE_WRITE8_MEMBER( p1_w );
DECLARE_WRITE8_MEMBER( p2_w );
DECLARE_READ8_MEMBER( t1_r );
DECLARE_READ_LINE_MEMBER( t1_r );
protected:
// device-level overrides

21
src/devices/bus/pc_kbd/pc83.cpp
View File

@ -46,25 +46,16 @@ const tiny_rom_entry *ibm_pc_83_keyboard_device::device_rom_region() const
}
//-------------------------------------------------
// ADDRESS_MAP( kb_io )
//-------------------------------------------------
static ADDRESS_MAP_START( ibm_pc_83_keyboard_io, AS_IO, 8, ibm_pc_83_keyboard_device )
AM_RANGE(MCS48_PORT_BUS, MCS48_PORT_BUS) AM_WRITE(bus_w)
AM_RANGE(MCS48_PORT_P1, MCS48_PORT_P1) AM_READ(p1_r) AM_WRITENOP
AM_RANGE(MCS48_PORT_P2, MCS48_PORT_P2) AM_WRITE(p2_w)
AM_RANGE(MCS48_PORT_T0, MCS48_PORT_T0) AM_READ(t1_r)
ADDRESS_MAP_END
//-------------------------------------------------
// MACHINE_DRIVER( ibm_pc_83_keyboard )
//-------------------------------------------------
static MACHINE_CONFIG_FRAGMENT( ibm_pc_83_keyboard )
MCFG_CPU_ADD(I8048_TAG, I8048, MCS48_LC_CLOCK(IND_U(47), CAP_P(20)))
MCFG_CPU_IO_MAP(ibm_pc_83_keyboard_io)
MCFG_MCS48_PORT_BUS_OUT_CB(WRITE8(ibm_pc_83_keyboard_device, bus_w))
MCFG_MCS48_PORT_P1_IN_CB(READ8(ibm_pc_83_keyboard_device, p1_r))
MCFG_MCS48_PORT_P2_OUT_CB(WRITE8(ibm_pc_83_keyboard_device, p2_w))
MCFG_MCS48_PORT_T0_IN_CB(READLINE(ibm_pc_83_keyboard_device, t0_r))
MACHINE_CONFIG_END
@ -362,10 +353,10 @@ WRITE8_MEMBER( ibm_pc_83_keyboard_device::p2_w )
//-------------------------------------------------
// t1_r -
// t0_r -
//-------------------------------------------------
READ8_MEMBER( ibm_pc_83_keyboard_device::t1_r )
READ_LINE_MEMBER( ibm_pc_83_keyboard_device::t0_r )
{
uint8_t data = 0xff;

2
src/devices/bus/pc_kbd/pc83.h
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@ -38,7 +38,7 @@ public:
DECLARE_WRITE8_MEMBER( bus_w );
DECLARE_READ8_MEMBER( p1_r );
DECLARE_WRITE8_MEMBER( p2_w );
DECLARE_READ8_MEMBER( t1_r );
DECLARE_READ_LINE_MEMBER( t0_r );
protected:
// device-level overrides

25
src/devices/bus/pc_kbd/pcat84.cpp
View File

@ -99,26 +99,19 @@ const tiny_rom_entry *ibm_3270pc_122_keyboard_device::device_rom_region() const
}
//-------------------------------------------------
// ADDRESS_MAP( kb_io )
//-------------------------------------------------
static ADDRESS_MAP_START( ibm_pc_at_84_keyboard_io, AS_IO, 8, ibm_pc_at_84_keyboard_device )
AM_RANGE(MCS48_PORT_BUS, MCS48_PORT_BUS) AM_READNOP AM_WRITE(bus_w)
AM_RANGE(MCS48_PORT_P1, MCS48_PORT_P1) AM_READWRITE(p1_r, p1_w)
AM_RANGE(MCS48_PORT_P2, MCS48_PORT_P2) AM_READWRITE(p2_r, p2_w)
AM_RANGE(MCS48_PORT_T0, MCS48_PORT_T0) AM_READ(t0_r)
AM_RANGE(MCS48_PORT_T1, MCS48_PORT_T1) AM_READ(t1_r)
ADDRESS_MAP_END
//-------------------------------------------------
// MACHINE_DRIVER( ibm_pc_at_84_keyboard )
//-------------------------------------------------
static MACHINE_CONFIG_FRAGMENT( ibm_pc_at_84_keyboard )
MCFG_CPU_ADD(I8048_TAG, I8048, 5364000)
MCFG_CPU_IO_MAP(ibm_pc_at_84_keyboard_io)
MCFG_MCS48_PORT_BUS_OUT_CB(WRITE8(ibm_pc_at_84_keyboard_device, bus_w))
MCFG_MCS48_PORT_P1_IN_CB(READ8(ibm_pc_at_84_keyboard_device, p1_r))
MCFG_MCS48_PORT_P1_OUT_CB(WRITE8(ibm_pc_at_84_keyboard_device, p1_w))
MCFG_MCS48_PORT_P2_IN_CB(READ8(ibm_pc_at_84_keyboard_device, p2_r))
MCFG_MCS48_PORT_P2_OUT_CB(WRITE8(ibm_pc_at_84_keyboard_device, p2_w))
MCFG_MCS48_PORT_T0_IN_CB(READLINE(ibm_pc_at_84_keyboard_device, t0_r))
MCFG_MCS48_PORT_T1_IN_CB(READLINE(ibm_pc_at_84_keyboard_device, t1_r))
MACHINE_CONFIG_END
@ -553,7 +546,7 @@ WRITE8_MEMBER( ibm_pc_at_84_keyboard_device::p2_w )
// t0_r -
//-------------------------------------------------
READ8_MEMBER( ibm_pc_at_84_keyboard_device::t0_r )
READ_LINE_MEMBER( ibm_pc_at_84_keyboard_device::t0_r )
{
return !data_signal();
}
@ -563,7 +556,7 @@ READ8_MEMBER( ibm_pc_at_84_keyboard_device::t0_r )
// t1_r -
//-------------------------------------------------
READ8_MEMBER( ibm_pc_at_84_keyboard_device::t1_r )
READ_LINE_MEMBER( ibm_pc_at_84_keyboard_device::t1_r )
{
return key_depressed();
}

4
src/devices/bus/pc_kbd/pcat84.h
View File

@ -41,8 +41,8 @@ public:
DECLARE_WRITE8_MEMBER( p1_w );
DECLARE_READ8_MEMBER( p2_r );
DECLARE_WRITE8_MEMBER( p2_w );
DECLARE_READ8_MEMBER( t0_r );
DECLARE_READ8_MEMBER( t1_r );
DECLARE_READ_LINE_MEMBER( t0_r );
DECLARE_READ_LINE_MEMBER( t1_r );
protected:
// device-level overrides

24
src/devices/bus/pc_kbd/pcxt83.cpp
View File

@ -68,26 +68,18 @@ const tiny_rom_entry *ibm_pc_xt_83_keyboard_device::device_rom_region() const
}
//-------------------------------------------------
// ADDRESS_MAP( kb_io )
//-------------------------------------------------
static ADDRESS_MAP_START( ibm_pc_xt_83_keyboard_io, AS_IO, 8, ibm_pc_xt_83_keyboard_device )
AM_RANGE(MCS48_PORT_BUS, MCS48_PORT_BUS) AM_READWRITE(bus_r, bus_w)
AM_RANGE(MCS48_PORT_P1, MCS48_PORT_P1) AM_WRITE(p1_w)
AM_RANGE(MCS48_PORT_P2, MCS48_PORT_P2) AM_WRITE(p2_w)
AM_RANGE(MCS48_PORT_T0, MCS48_PORT_T0) AM_READ(t0_r)
AM_RANGE(MCS48_PORT_T1, MCS48_PORT_T1) AM_READ(t1_r)
ADDRESS_MAP_END
//-------------------------------------------------
// MACHINE_DRIVER( ibm_pc_xt_83_keyboard )
//-------------------------------------------------
static MACHINE_CONFIG_FRAGMENT( ibm_pc_xt_83_keyboard )
MCFG_CPU_ADD(I8048_TAG, I8048, MCS48_LC_CLOCK(IND_U(47), CAP_P(20.7)))
MCFG_CPU_IO_MAP(ibm_pc_xt_83_keyboard_io)
MCFG_MCS48_PORT_BUS_IN_CB(READ8(ibm_pc_xt_83_keyboard_device, bus_r))
MCFG_MCS48_PORT_BUS_OUT_CB(WRITE8(ibm_pc_xt_83_keyboard_device, bus_w))
MCFG_MCS48_PORT_P1_OUT_CB(WRITE8(ibm_pc_xt_83_keyboard_device, p1_w))
MCFG_MCS48_PORT_P2_OUT_CB(WRITE8(ibm_pc_xt_83_keyboard_device, p2_w))
MCFG_MCS48_PORT_T0_IN_CB(READLINE(ibm_pc_xt_83_keyboard_device, t0_r))
MCFG_MCS48_PORT_T1_IN_CB(READLINE(ibm_pc_xt_83_keyboard_device, t1_r))
MACHINE_CONFIG_END
@ -425,7 +417,7 @@ WRITE8_MEMBER( ibm_pc_xt_83_keyboard_device::p2_w )
// t0_r -
//-------------------------------------------------
READ8_MEMBER( ibm_pc_xt_83_keyboard_device::t0_r )
READ_LINE_MEMBER( ibm_pc_xt_83_keyboard_device::t0_r )
{
return clock_signal();
}
@ -435,7 +427,7 @@ READ8_MEMBER( ibm_pc_xt_83_keyboard_device::t0_r )
// t1_r -
//-------------------------------------------------
READ8_MEMBER( ibm_pc_xt_83_keyboard_device::t1_r )
READ_LINE_MEMBER( ibm_pc_xt_83_keyboard_device::t1_r )
{
return BIT(m_p2, 3) && m_q;
}

4
src/devices/bus/pc_kbd/pcxt83.h
View File

@ -39,8 +39,8 @@ public:
DECLARE_WRITE8_MEMBER( bus_w );
DECLARE_WRITE8_MEMBER( p1_w );
DECLARE_WRITE8_MEMBER( p2_w );
DECLARE_READ8_MEMBER( t0_r );
DECLARE_READ8_MEMBER( t1_r );
DECLARE_READ_LINE_MEMBER( t0_r );
DECLARE_READ_LINE_MEMBER( t1_r );
protected:
// device-level overrides

99
src/devices/cpu/mcs48/mcs48.cpp
View File

@ -128,17 +128,16 @@
#define ram_r(a) m_data->read_byte(a)
#define ram_w(a,V) m_data->write_byte(a, V)
/* ports are mapped to AS_IO */
/* ports are mapped to AS_IO and callbacks */
#define ext_r(a) m_io->read_byte(a)
#define ext_w(a,V) m_io->write_byte(a, V)
#define port_r(a) m_io->read_byte(MCS48_PORT_P0 + a)
#define port_w(a,V) m_io->write_byte(MCS48_PORT_P0 + a, V)
#define test_r(a) m_io->read_byte(MCS48_PORT_T0 + a)
#define test_w(a,V) m_io->write_byte(MCS48_PORT_T0 + a, V)
#define bus_r() m_io->read_byte(MCS48_PORT_BUS)
#define bus_w(V) m_io->write_byte(MCS48_PORT_BUS, V)
#define ea_r() m_io->read_byte(MCS48_PORT_EA)
#define prog_w(V) m_io->write_byte(MCS48_PORT_PROG, V)
#define port_r(a) m_port_in_cb[a-1]()
#define port_w(a,V) m_port_out_cb[a-1](V)
#define test_r(a) m_test_in_cb[a]()
#define test_w(a,V) m_test_out_cb[a](V)
#define bus_r() m_bus_in_cb()
#define bus_w(V) m_bus_out_cb(V)
#define prog_w(V) m_prog_out_cb(V)
/* r0-r7 map to memory via the regptr */
#define R0 m_regptr[0]
@ -209,7 +208,14 @@ mcs48_cpu_device::mcs48_cpu_device(const machine_config &mconfig, device_type ty
, ( ( rom_size == 1024 ) ? ADDRESS_MAP_NAME(program_10bit) : ( ( rom_size == 2048 ) ? ADDRESS_MAP_NAME(program_11bit) : ( ( rom_size == 4096 ) ? ADDRESS_MAP_NAME(program_12bit) : nullptr ) ) ))
, m_data_config("data", ENDIANNESS_LITTLE, 8, ( ( ram_size == 64 ) ? 6 : ( ( ram_size == 128 ) ? 7 : 8 ) ), 0
, ( ( ram_size == 64 ) ? ADDRESS_MAP_NAME(data_6bit) : ( ( ram_size == 128 ) ? ADDRESS_MAP_NAME(data_7bit) : ADDRESS_MAP_NAME(data_8bit) ) ))
, m_io_config("io", ENDIANNESS_LITTLE, 8, 9, 0)
, m_io_config("io", ENDIANNESS_LITTLE, 8, 8, 0)
, m_port_in_cb{{*this}, {*this}}
, m_port_out_cb{{*this}, {*this}}
, m_bus_in_cb(*this)
, m_bus_out_cb(*this)
, m_test_in_cb{{*this}, {*this}}
, m_t0_clk_func()
, m_prog_out_cb(*this)
, m_psw(0)
, m_feature_mask(feature_mask)
, m_int_rom_size(rom_size)
@ -516,16 +522,16 @@ uint8_t mcs48_cpu_device::p2_mask()
the 8243 expander chip
-------------------------------------------------*/
void mcs48_cpu_device::expander_operation(uint8_t operation, uint8_t port)
void mcs48_cpu_device::expander_operation(expander_op operation, uint8_t port)
{
/* put opcode/data on low 4 bits of P2 */
port_w(2, m_p2 = (m_p2 & 0xf0) | (operation << 2) | (port & 3));
port_w(2, m_p2 = (m_p2 & 0xf0) | (uint8_t(operation) << 2) | (port & 3));
/* generate high-to-low transition on PROG line */
prog_w(0);
/* put data on low 4 bits of P2 */
if (operation != 0)
if (operation != EXPANDER_OP_READ)
port_w(2, m_p2 = (m_p2 & 0xf0) | (m_a & 0x0f));
else
m_a = port_r(2) | 0x0f;
@ -591,10 +597,10 @@ OPHANDLER( anl_a_n ) { m_a &= argument_fetch(); return 2; }
OPHANDLER( anl_bus_n ) { bus_w(bus_r() & argument_fetch()); return 2; }
OPHANDLER( anl_p1_n ) { port_w(1, m_p1 &= argument_fetch()); return 2; }
OPHANDLER( anl_p2_n ) { port_w(2, m_p2 &= argument_fetch() | ~p2_mask()); return 2; }
OPHANDLER( anld_p4_a ) { expander_operation(MCS48_EXPANDER_OP_AND, 4); return 2; }
OPHANDLER( anld_p5_a ) { expander_operation(MCS48_EXPANDER_OP_AND, 5); return 2; }
OPHANDLER( anld_p6_a ) { expander_operation(MCS48_EXPANDER_OP_AND, 6); return 2; }
OPHANDLER( anld_p7_a ) { expander_operation(MCS48_EXPANDER_OP_AND, 7); return 2; }
OPHANDLER( anld_p4_a ) { expander_operation(EXPANDER_OP_AND, 4); return 2; }
OPHANDLER( anld_p5_a ) { expander_operation(EXPANDER_OP_AND, 5); return 2; }
OPHANDLER( anld_p6_a ) { expander_operation(EXPANDER_OP_AND, 6); return 2; }
OPHANDLER( anld_p7_a ) { expander_operation(EXPANDER_OP_AND, 7); return 2; }
OPHANDLER( call_0 ) { execute_call(argument_fetch() | 0x000); return 2; }
OPHANDLER( call_1 ) { execute_call(argument_fetch() | 0x100); return 2; }
@ -661,7 +667,10 @@ OPHANDLER( en_dma ) { m_dma_enabled = true; port_w(2, m_p2); return 1; }
OPHANDLER( en_flags ) { m_flags_enabled = true; port_w(2, m_p2); return 1; }
OPHANDLER( ent0_clk )
{
logerror("MCS-48 PC:%04X - Unimplemented opcode = %02x\n", m_pc - 1, program_r(m_pc - 1));
if (!m_t0_clk_func.isnull())
m_t0_clk_func(clock() / 3);
else
logerror("T0 clock enabled\n");
return 1;
}
@ -765,14 +774,14 @@ OPHANDLER( mov_xr1_a ) { ram_w(R1, m_a); return 1; }
OPHANDLER( mov_xr0_n ) { ram_w(R0, argument_fetch()); return 2; }
OPHANDLER( mov_xr1_n ) { ram_w(R1, argument_fetch()); return 2; }
OPHANDLER( movd_a_p4 ) { expander_operation(MCS48_EXPANDER_OP_READ, 4); return 2; }
OPHANDLER( movd_a_p5 ) { expander_operation(MCS48_EXPANDER_OP_READ, 5); return 2; }
OPHANDLER( movd_a_p6 ) { expander_operation(MCS48_EXPANDER_OP_READ, 6); return 2; }
OPHANDLER( movd_a_p7 ) { expander_operation(MCS48_EXPANDER_OP_READ, 7); return 2; }
OPHANDLER( movd_p4_a ) { expander_operation(MCS48_EXPANDER_OP_WRITE, 4); return 2; }
OPHANDLER( movd_p5_a ) { expander_operation(MCS48_EXPANDER_OP_WRITE, 5); return 2; }
OPHANDLER( movd_p6_a ) { expander_operation(MCS48_EXPANDER_OP_WRITE, 6); return 2; }
OPHANDLER( movd_p7_a ) { expander_operation(MCS48_EXPANDER_OP_WRITE, 7); return 2; }
OPHANDLER( movd_a_p4 ) { expander_operation(EXPANDER_OP_READ, 4); return 2; }
OPHANDLER( movd_a_p5 ) { expander_operation(EXPANDER_OP_READ, 5); return 2; }
OPHANDLER( movd_a_p6 ) { expander_operation(EXPANDER_OP_READ, 6); return 2; }
OPHANDLER( movd_a_p7 ) { expander_operation(EXPANDER_OP_READ, 7); return 2; }
OPHANDLER( movd_p4_a ) { expander_operation(EXPANDER_OP_WRITE, 4); return 2; }
OPHANDLER( movd_p5_a ) { expander_operation(EXPANDER_OP_WRITE, 5); return 2; }
OPHANDLER( movd_p6_a ) { expander_operation(EXPANDER_OP_WRITE, 6); return 2; }
OPHANDLER( movd_p7_a ) { expander_operation(EXPANDER_OP_WRITE, 7); return 2; }
OPHANDLER( movp_a_xa ) { m_a = program_r((m_pc & 0xf00) | m_a); return 2; }
OPHANDLER( movp3_a_xa ) { m_a = program_r(0x300 | m_a); return 2; }
@ -799,10 +808,10 @@ OPHANDLER( orl_a_n ) { m_a |= argument_fetch(); return 2; }
OPHANDLER( orl_bus_n ) { bus_w(bus_r() | argument_fetch()); return 2; }
OPHANDLER( orl_p1_n ) { port_w(1, m_p1 |= argument_fetch()); return 2; }
OPHANDLER( orl_p2_n ) { port_w(2, m_p2 |= argument_fetch() & p2_mask()); return 2; }
OPHANDLER( orld_p4_a ) { expander_operation(MCS48_EXPANDER_OP_OR, 4); return 2; }
OPHANDLER( orld_p5_a ) { expander_operation(MCS48_EXPANDER_OP_OR, 5); return 2; }
OPHANDLER( orld_p6_a ) { expander_operation(MCS48_EXPANDER_OP_OR, 6); return 2; }
OPHANDLER( orld_p7_a ) { expander_operation(MCS48_EXPANDER_OP_OR, 7); return 2; }
OPHANDLER( orld_p4_a ) { expander_operation(EXPANDER_OP_OR, 4); return 2; }
OPHANDLER( orld_p5_a ) { expander_operation(EXPANDER_OP_OR, 5); return 2; }
OPHANDLER( orld_p6_a ) { expander_operation(EXPANDER_OP_OR, 6); return 2; }
OPHANDLER( orld_p7_a ) { expander_operation(EXPANDER_OP_OR, 7); return 2; }
OPHANDLER( outl_bus_a ) { bus_w(m_a); return 2; }
OPHANDLER( outl_p1_a ) { port_w(1, m_p1 = m_a); return 2; }
@ -940,6 +949,13 @@ const mcs48_cpu_device::mcs48_ophandler mcs48_cpu_device::s_opcode_table[256]=
INITIALIZATION/RESET
***************************************************************************/
void mcs48_cpu_device::device_config_complete()
{
m_t0_clk_func.bind_relative_to(*owner());
if (!m_t0_clk_func.isnull())
m_t0_clk_func(clock() / 3);
}
/*-------------------------------------------------
mcs48_init - generic MCS-48 initialization
-------------------------------------------------*/
@ -967,6 +983,17 @@ void mcs48_cpu_device::device_start()
m_data = &space(AS_DATA);
m_io = &space(AS_IO);
// resolve callbacks
for (auto &cb : m_port_in_cb)
cb.resolve_safe(0xff);
for (auto &cb : m_port_out_cb)
cb.resolve_safe();
m_bus_in_cb.resolve_safe(0xff);
m_bus_out_cb.resolve_safe();
for (auto &cb : m_test_in_cb)
cb.resolve_safe(0);
m_prog_out_cb.resolve_safe();
/* set up the state table */
{
state_add(MCS48_PC, "PC", m_pc).mask(0xfff);
@ -1046,6 +1073,8 @@ void mcs48_cpu_device::device_reset()
m_sts = 0;
m_flags_enabled = false;
m_dma_enabled = false;
if (!m_t0_clk_func.isnull())
m_t0_clk_func(0);
/* confirmed from interrupt logic description */
m_irq_in_progress = false;
@ -1242,6 +1271,16 @@ WRITE8_MEMBER( upi41_cpu_device::upi41_master_w )
}
READ8_MEMBER(mcs48_cpu_device::p1_r)
{
return m_p1;
}
READ8_MEMBER(mcs48_cpu_device::p2_r)
{
return m_p2;
}
/***************************************************************************
GENERAL CONTEXT ACCESS

92
src/devices/cpu/mcs48/mcs48.h
View File

@ -56,30 +56,6 @@ enum
};
/* special I/O space ports */
enum
{
MCS48_PORT_P0 = 0x100, /* Not used */
MCS48_PORT_P1 = 0x101,
MCS48_PORT_P2 = 0x102,
MCS48_PORT_T0 = 0x110,
MCS48_PORT_T1 = 0x111,
MCS48_PORT_BUS = 0x120,
MCS48_PORT_PROG = 0x121 /* PROG line to 8243 expander */
};
/* 8243 expander operations */
enum
{
MCS48_EXPANDER_OP_READ = 0,
MCS48_EXPANDER_OP_WRITE = 1,
MCS48_EXPANDER_OP_OR = 2,
MCS48_EXPANDER_OP_AND = 3
};
/***************************************************************************
MACROS
***************************************************************************/
@ -90,6 +66,41 @@ enum
#define MCS48_ALE_CLOCK(_clock) \
attotime::from_hz(_clock/(3*5))
#define MCFG_MCS48_PORT_P1_IN_CB(_devcb) \
devcb = &mcs48_cpu_device::set_port_in_cb(*device, 0, DEVCB_##_devcb);
#define MCFG_MCS48_PORT_P1_OUT_CB(_devcb) \
devcb = &mcs48_cpu_device::set_port_out_cb(*device, 0, DEVCB_##_devcb);
#define MCFG_MCS48_PORT_P2_IN_CB(_devcb) \
devcb = &mcs48_cpu_device::set_port_in_cb(*device, 1, DEVCB_##_devcb);
#define MCFG_MCS48_PORT_P2_OUT_CB(_devcb) \
devcb = &mcs48_cpu_device::set_port_out_cb(*device, 1, DEVCB_##_devcb);
#define MCFG_MCS48_PORT_T0_IN_CB(_devcb) \
devcb = &mcs48_cpu_device::set_test_in_cb(*device, 0, DEVCB_##_devcb);
#define MCFG_MCS48_PORT_T0_CLK_DEVICE(_tag) \
mcs48_cpu_device::set_t0_clk_cb(*device, clock_update_delegate(FUNC(device_t::set_unscaled_clock), _tag, (device_t *)nullptr));
#define MCFG_MCS48_PORT_T0_CLK_CUSTOM(_class, _func) \
mcs48_cpu_device::set_t0_clk_cb(*device, clock_update_delegate(&_class::_func, #_class "::" _func, owner));
#define MCFG_MCS48_PORT_T1_IN_CB(_devcb) \
devcb = &mcs48_cpu_device::set_test_in_cb(*device, 1, DEVCB_##_devcb);
#define MCFG_MCS48_PORT_BUS_IN_CB(_devcb) \
devcb = &mcs48_cpu_device::set_bus_in_cb(*device, DEVCB_##_devcb);
#define MCFG_MCS48_PORT_BUS_OUT_CB(_devcb) \
devcb = &mcs48_cpu_device::set_bus_out_cb(*device, DEVCB_##_devcb);
// PROG line to 8243 expander
#define MCFG_MCS48_PORT_PROG_OUT_CB(_devcb) \
devcb = &mcs48_cpu_device::set_prog_out_cb(*device, DEVCB_##_devcb);
/***************************************************************************
TYPES
***************************************************************************/
/* Official Intel MCS-48 parts */
extern const device_type I8021; /* 1k internal ROM, 64 bytes internal RAM */
extern const device_type I8022; /* 2k internal ROM, 128 bytes internal RAM */
@ -120,12 +131,34 @@ extern const device_type M58715; /* 8049 clone */
class mcs48_cpu_device : public cpu_device
{
public:
// 8243 expander operations
enum expander_op
{
EXPANDER_OP_READ = 0,
EXPANDER_OP_WRITE = 1,
EXPANDER_OP_OR = 2,
EXPANDER_OP_AND = 3
};
// construction/destruction
mcs48_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, int rom_size, int ram_size, uint8_t feature_mask = 0);
// static configuration
template<class Object> static devcb_base &set_port_in_cb(device_t &device, int n, Object &&obj) { return downcast<mcs48_cpu_device &>(device).m_port_in_cb[n].set_callback(std::forward<Object>(obj)); }
template<class Object> static devcb_base &set_port_out_cb(device_t &device, int n, Object &&obj) { return downcast<mcs48_cpu_device &>(device).m_port_out_cb[n].set_callback(std::forward<Object>(obj)); }
template<class Object> static devcb_base &set_bus_in_cb(device_t &device, Object &&obj) { return downcast<mcs48_cpu_device &>(device).m_bus_in_cb.set_callback(std::forward<Object>(obj)); }
template<class Object> static devcb_base &set_bus_out_cb(device_t &device, Object &&obj) { return downcast<mcs48_cpu_device &>(device).m_bus_out_cb.set_callback(std::forward<Object>(obj)); }
template<class Object> static devcb_base &set_test_in_cb(device_t &device, int n, Object &&obj) { return downcast<mcs48_cpu_device &>(device).m_test_in_cb[n].set_callback(std::forward<Object>(obj)); }
static void set_t0_clk_cb(device_t &device, clock_update_delegate &&func) { downcast<mcs48_cpu_device &>(device).m_t0_clk_func = std::move(func); }
template<class Object> static devcb_base &set_prog_out_cb(device_t &device, Object &&obj) { return downcast<mcs48_cpu_device &>(device).m_prog_out_cb.set_callback(std::forward<Object>(obj)); }
DECLARE_READ8_MEMBER(p1_r);
DECLARE_READ8_MEMBER(p2_r);
protected:
// device-level overrides
virtual void device_start() override;
virtual void device_config_complete() override;
virtual void device_reset() override;
// device_execute_interface overrides
@ -159,6 +192,15 @@ protected:
address_space_config m_data_config;
address_space_config m_io_config;
devcb_read8 m_port_in_cb[2];
devcb_write8 m_port_out_cb[2];
devcb_read8 m_bus_in_cb;
devcb_write8 m_bus_out_cb;
devcb_read_line m_test_in_cb[2];
clock_update_delegate m_t0_clk_func;
devcb_write_line m_prog_out_cb;
uint16_t m_prevpc; /* 16-bit previous program counter */
uint16_t m_pc; /* 16-bit program counter */
@ -215,7 +257,7 @@ protected:
void execute_call(uint16_t address);
void execute_jcc(uint8_t result);
uint8_t p2_mask();
void expander_operation(uint8_t operation, uint8_t port);
void expander_operation(expander_op operation, uint8_t port);
int check_irqs();
void burn_cycles(int count);

18
src/devices/machine/at_keybc.cpp
View File

@ -17,14 +17,6 @@
const device_type AT_KEYBOARD_CONTROLLER = device_creator<at_keyboard_controller_device>;
// i/o map for the 8042
static ADDRESS_MAP_START( at_keybc_io, AS_IO, 8, at_keyboard_controller_device)
AM_RANGE(MCS48_PORT_T0, MCS48_PORT_T0) AM_READ(t0_r)
AM_RANGE(MCS48_PORT_T1, MCS48_PORT_T1) AM_READ(t1_r)
AM_RANGE(MCS48_PORT_P1, MCS48_PORT_P1) AM_READ( p1_r)
AM_RANGE(MCS48_PORT_P2, MCS48_PORT_P2) AM_READWRITE(p2_r, p2_w)
ADDRESS_MAP_END
static INPUT_PORTS_START( at_keybc )
PORT_START("DSW")
PORT_BIT( 0xbf, 0xbf, IPT_UNUSED )
@ -36,7 +28,11 @@ INPUT_PORTS_END
// machine fragment
static MACHINE_CONFIG_FRAGMENT( at_keybc )
MCFG_CPU_ADD("at_keybc", I8042, DERIVED_CLOCK(1,1))
MCFG_CPU_IO_MAP(at_keybc_io)
MCFG_MCS48_PORT_T0_IN_CB(READLINE(at_keyboard_controller_device, t0_r))
MCFG_MCS48_PORT_T1_IN_CB(READLINE(at_keyboard_controller_device, t1_r))
MCFG_MCS48_PORT_P1_IN_CB(READ8(at_keyboard_controller_device, p1_r))
MCFG_MCS48_PORT_P2_IN_CB(READ8(at_keyboard_controller_device, p2_r))
MCFG_MCS48_PORT_P2_OUT_CB(WRITE8(at_keyboard_controller_device, p2_w))
MACHINE_CONFIG_END
// rom definition for the 8042 internal rom
@ -134,12 +130,12 @@ void at_keyboard_controller_device::device_reset()
// INTERNAL 8042 READ/WRITE HANDLERS
//**************************************************************************
READ8_MEMBER( at_keyboard_controller_device::t0_r )
READ_LINE_MEMBER( at_keyboard_controller_device::t0_r )
{
return m_clock_signal;
}
READ8_MEMBER( at_keyboard_controller_device::t1_r )
READ_LINE_MEMBER( at_keyboard_controller_device::t1_r )
{
return m_data_signal;
}

4
src/devices/machine/at_keybc.h
View File

@ -56,8 +56,8 @@ public:
template<class _Object> static devcb_base &set_keyboard_data_callback(device_t &device, _Object object) { return downcast<at_keyboard_controller_device &>(device).m_keyboard_data_cb.set_callback(object); }
// internal 8042 interface
DECLARE_READ8_MEMBER( t0_r );
DECLARE_READ8_MEMBER( t1_r );
DECLARE_READ_LINE_MEMBER( t0_r );
DECLARE_READ_LINE_MEMBER( t1_r );
DECLARE_READ8_MEMBER( p1_r );
DECLARE_READ8_MEMBER( p2_r );
DECLARE_WRITE8_MEMBER( p2_w );

31
src/devices/machine/i8243.cpp
View File

@ -4,11 +4,12 @@
i8243.c
Intel 8243 Port Expander
Intel 8243 Port Expander (for MCS-48)
***************************************************************************/
#include "emu.h"
#include "cpu/mcs48/mcs48.h"
#include "i8243.h"
//**************************************************************************
@ -56,7 +57,7 @@ void i8243_device::device_reset()
i8243_p2_r - handle a read from port 2
-------------------------------------------------*/
READ8_MEMBER(i8243_device::i8243_p2_r)
READ8_MEMBER(i8243_device::p2_r)
{
return m_p2out;
}
@ -66,7 +67,7 @@ READ8_MEMBER(i8243_device::i8243_p2_r)
i8243_p2_r - handle a write to port 2
-------------------------------------------------*/
WRITE8_MEMBER(i8243_device::i8243_p2_w)
WRITE8_MEMBER(i8243_device::p2_w)
{
m_p2 = data & 0x0f;
}
@ -77,18 +78,15 @@ WRITE8_MEMBER(i8243_device::i8243_p2_w)
line state
-------------------------------------------------*/
WRITE8_MEMBER(i8243_device::i8243_prog_w)
WRITE_LINE_MEMBER(i8243_device::prog_w)
{
/* only care about low bit */
data &= 1;
/* on high->low transition state, latch opcode/port */
if(m_prog && !data)
if (m_prog && !state)
{
m_opcode = m_p2;
/* if this is a read opcode, copy result to p2out */
if((m_opcode >> 2) == MCS48_EXPANDER_OP_READ)
if ((m_opcode >> 2) == mcs48_cpu_device::EXPANDER_OP_READ)
{
if (m_readhandler.isnull())
{
@ -99,21 +97,24 @@ WRITE8_MEMBER(i8243_device::i8243_prog_w)
}
/* on low->high transition state, act on opcode */
else if(!m_prog && data)
else if (!m_prog && state)
{
switch(m_opcode >> 2)
switch (m_opcode >> 2)
{
case MCS48_EXPANDER_OP_WRITE:
case mcs48_cpu_device::EXPANDER_OP_READ:
break; // handled above
case mcs48_cpu_device::EXPANDER_OP_WRITE:
m_p[m_opcode & 3] = m_p2 & 0x0f;
m_writehandler((offs_t)(m_opcode & 3), m_p[m_opcode & 3]);
break;
case MCS48_EXPANDER_OP_OR:
case mcs48_cpu_device::EXPANDER_OP_OR:
m_p[m_opcode & 3] |= m_p2 & 0x0f;
m_writehandler((offs_t)(m_opcode & 3), m_p[m_opcode & 3]);
break;
case MCS48_EXPANDER_OP_AND:
case mcs48_cpu_device::EXPANDER_OP_AND:
m_p[m_opcode & 3] &= m_p2 & 0x0f;
m_writehandler((offs_t)(m_opcode & 3), m_p[m_opcode & 3]);
break;
@ -121,5 +122,5 @@ WRITE8_MEMBER(i8243_device::i8243_prog_w)
}
/* remember the state */
m_prog = data;
m_prog = state;
}

8
src/devices/machine/i8243.h
View File

@ -13,8 +13,6 @@
#ifndef __I8243_H__
#define __I8243_H__
#include "cpu/mcs48/mcs48.h"
/***************************************************************************
@ -46,10 +44,10 @@ public:
template<class _Object> static devcb_base &set_read_handler(device_t &device, _Object object) { return downcast<i8243_device &>(device).m_readhandler.set_callback(object); }
template<class _Object> static devcb_base &set_write_handler(device_t &device, _Object object) { return downcast<i8243_device &>(device).m_writehandler.set_callback(object); }
DECLARE_READ8_MEMBER(i8243_p2_r);
DECLARE_WRITE8_MEMBER(i8243_p2_w);
DECLARE_READ8_MEMBER(p2_r);
DECLARE_WRITE8_MEMBER(p2_w);
DECLARE_WRITE8_MEMBER(i8243_prog_w);
DECLARE_WRITE_LINE_MEMBER(prog_w);
protected:
// device-level overrides

21
src/devices/machine/ldpr8210.cpp
View File

@ -150,17 +150,17 @@ static const uint8_t text_bitmap[0x40][7] =
static ADDRESS_MAP_START( pr8210_portmap, AS_IO, 8, pioneer_pr8210_device )
AM_RANGE(0x00, 0xff) AM_READWRITE(i8049_pia_r, i8049_pia_w)
AM_RANGE(MCS48_PORT_BUS, MCS48_PORT_BUS) AM_READ(i8049_bus_r)
AM_RANGE(MCS48_PORT_P1, MCS48_PORT_P1) AM_WRITE(i8049_port1_w)
AM_RANGE(MCS48_PORT_P2, MCS48_PORT_P2) AM_WRITE(i8049_port2_w)
AM_RANGE(MCS48_PORT_T0, MCS48_PORT_T0) AM_READ(i8049_t0_r)
AM_RANGE(MCS48_PORT_T1, MCS48_PORT_T1) AM_READ(i8049_t1_r)
ADDRESS_MAP_END
static MACHINE_CONFIG_FRAGMENT( pr8210 )
MCFG_CPU_ADD("pr8210", I8049, XTAL_4_41MHz)
MCFG_CPU_IO_MAP(pr8210_portmap)
MCFG_MCS48_PORT_BUS_IN_CB(READ8(pioneer_pr8210_device, i8049_bus_r))
MCFG_MCS48_PORT_P1_OUT_CB(WRITE8(pioneer_pr8210_device, i8049_port1_w))
MCFG_MCS48_PORT_P2_OUT_CB(WRITE8(pioneer_pr8210_device, i8049_port2_w))
MCFG_MCS48_PORT_T0_IN_CB(READLINE(pioneer_pr8210_device, i8049_t0_r))
MCFG_MCS48_PORT_T1_IN_CB(READLINE(pioneer_pr8210_device, i8049_t1_r))
MACHINE_CONFIG_END
@ -733,7 +733,7 @@ WRITE8_MEMBER( pioneer_pr8210_device::i8049_port2_w )
// T0 input (connected to VSYNC)
//-------------------------------------------------
READ8_MEMBER( pioneer_pr8210_device::i8049_t0_r )
READ_LINE_MEMBER( pioneer_pr8210_device::i8049_t0_r )
{
// returns VSYNC state
return !m_vsync;
@ -745,7 +745,7 @@ READ8_MEMBER( pioneer_pr8210_device::i8049_t0_r )
// T1 input (pulled high)
//-------------------------------------------------
READ8_MEMBER( pioneer_pr8210_device::i8049_t1_r )
READ_LINE_MEMBER( pioneer_pr8210_device::i8049_t1_r )
{
return 1;
}
@ -858,14 +858,15 @@ void pioneer_pr8210_device::overlay_draw_char(bitmap_yuy16 &bitmap, uint8_t ch,
static ADDRESS_MAP_START( simutrek_portmap, AS_IO, 8, simutrek_special_device )
AM_RANGE(0x00, 0xff) AM_READ(i8748_data_r)
AM_RANGE(MCS48_PORT_P2, MCS48_PORT_P2) AM_READWRITE(i8748_port2_r, i8748_port2_w)
AM_RANGE(MCS48_PORT_T0, MCS48_PORT_T0) AM_READ(i8748_t0_r)
ADDRESS_MAP_END
static MACHINE_CONFIG_FRAGMENT( simutrek )
MCFG_CPU_ADD("simutrek", I8748, XTAL_6MHz)
MCFG_CPU_IO_MAP(simutrek_portmap)
MCFG_MCS48_PORT_P2_IN_CB(READ8(simutrek_special_device, i8748_port2_r))
MCFG_MCS48_PORT_P2_OUT_CB(WRITE8(simutrek_special_device, i8748_port2_w))
MCFG_MCS48_PORT_T0_IN_CB(READLINE(simutrek_special_device, i8748_t0_r))
MCFG_FRAGMENT_ADD(pr8210)
MACHINE_CONFIG_END
@ -1100,7 +1101,7 @@ READ8_MEMBER( simutrek_special_device::i8748_data_r )
// T0 input
//-------------------------------------------------
READ8_MEMBER( simutrek_special_device::i8748_t0_r )
READ_LINE_MEMBER( simutrek_special_device::i8748_t0_r )
{
// return 1 if data is waiting from main CPU
return m_data_ready;

6
src/devices/machine/ldpr8210.h
View File

@ -106,8 +106,8 @@ public:
DECLARE_READ8_MEMBER( i8049_bus_r );
DECLARE_WRITE8_MEMBER( i8049_port1_w );
DECLARE_WRITE8_MEMBER( i8049_port2_w );
DECLARE_READ8_MEMBER( i8049_t0_r );
DECLARE_READ8_MEMBER( i8049_t1_r );
DECLARE_READ_LINE_MEMBER( i8049_t0_r );
DECLARE_READ_LINE_MEMBER( i8049_t1_r );
protected:
// internal overlay helpers
@ -176,7 +176,7 @@ public:
DECLARE_READ8_MEMBER( i8748_port2_r );
DECLARE_WRITE8_MEMBER( i8748_port2_w );
DECLARE_READ8_MEMBER( i8748_data_r );
DECLARE_READ8_MEMBER( i8748_t0_r );
DECLARE_READ_LINE_MEMBER( i8748_t0_r );
protected:
// internal state

14
src/devices/machine/ldvp931.cpp
View File

@ -58,16 +58,18 @@ static ADDRESS_MAP_START( vp931_portmap, AS_IO, 8, phillips_22vp931_device )
AM_RANGE(0x10, 0x10) AM_MIRROR(0xcf) AM_READWRITE(i8049_unknown_r, i8049_output1_w)
AM_RANGE(0x20, 0x20) AM_MIRROR(0xcf) AM_READWRITE(i8049_datic_r, i8049_lcd_w)
AM_RANGE(0x30, 0x30) AM_MIRROR(0xcf) AM_READWRITE(i8049_from_controller_r, i8049_to_controller_w)
AM_RANGE(MCS48_PORT_P1, MCS48_PORT_P1) AM_READWRITE(i8049_port1_r, i8049_port1_w)
AM_RANGE(MCS48_PORT_P2, MCS48_PORT_P2) AM_READWRITE(i8049_port2_r, i8049_port2_w)
AM_RANGE(MCS48_PORT_T0, MCS48_PORT_T0) AM_READ(i8049_t0_r)
AM_RANGE(MCS48_PORT_T1, MCS48_PORT_T1) AM_READ(i8049_t1_r)
ADDRESS_MAP_END
static MACHINE_CONFIG_FRAGMENT( vp931 )
MCFG_CPU_ADD("vp931", I8049, XTAL_11MHz)
MCFG_CPU_IO_MAP(vp931_portmap)
MCFG_MCS48_PORT_P1_IN_CB(READ8(phillips_22vp931_device, i8049_port1_r))
MCFG_MCS48_PORT_P1_OUT_CB(WRITE8(phillips_22vp931_device, i8049_port1_w))
MCFG_MCS48_PORT_P2_IN_CB(READ8(phillips_22vp931_device, i8049_port2_r))
MCFG_MCS48_PORT_P2_OUT_CB(WRITE8(phillips_22vp931_device, i8049_port2_w))
MCFG_MCS48_PORT_T0_IN_CB(READLINE(phillips_22vp931_device, i8049_t0_r))
MCFG_MCS48_PORT_T1_IN_CB(READLINE(phillips_22vp931_device, i8049_t1_r))
MACHINE_CONFIG_END
@ -635,7 +637,7 @@ WRITE8_MEMBER( phillips_22vp931_device::i8049_port2_w )
// connected to the DATIC's data strobe line
//-------------------------------------------------
READ8_MEMBER( phillips_22vp931_device::i8049_t0_r )
READ_LINE_MEMBER( phillips_22vp931_device::i8049_t0_r )
{
return m_datastrobe;
}
@ -647,7 +649,7 @@ READ8_MEMBER( phillips_22vp931_device::i8049_t0_r )
// to count the number of tracks advanced
//-------------------------------------------------
READ8_MEMBER( phillips_22vp931_device::i8049_t1_r )
READ_LINE_MEMBER( phillips_22vp931_device::i8049_t1_r )
{
return m_trackstate;
}

4
src/devices/machine/ldvp931.h
View File

@ -98,8 +98,8 @@ public:
DECLARE_WRITE8_MEMBER( i8049_port1_w );
DECLARE_READ8_MEMBER( i8049_port2_r );
DECLARE_WRITE8_MEMBER( i8049_port2_w );
DECLARE_READ8_MEMBER( i8049_t0_r );
DECLARE_READ8_MEMBER( i8049_t1_r );
DECLARE_READ_LINE_MEMBER( i8049_t0_r );
DECLARE_READ_LINE_MEMBER( i8049_t1_r );
protected:
// internal state

12
src/mame/audio/carnival.cpp
View File

@ -184,7 +184,7 @@ WRITE8_MEMBER( vicdual_state::carnival_music_port_2_w )
}
READ8_MEMBER( vicdual_state::carnival_music_port_t1_r )
READ_LINE_MEMBER( vicdual_state::carnival_music_port_t1_r )
{
// T1: comms from audio port 2 d3
return ~m_port2State >> 3 & 1;
@ -195,19 +195,15 @@ static ADDRESS_MAP_START( mboard_map, AS_PROGRAM, 8, vicdual_state )
AM_RANGE(0x0000, 0x03ff) AM_ROM
ADDRESS_MAP_END
static ADDRESS_MAP_START( mboard_io_map, AS_IO, 8, vicdual_state )
AM_RANGE(MCS48_PORT_P1, MCS48_PORT_P1) AM_WRITE(carnival_music_port_1_w)
AM_RANGE(MCS48_PORT_P2, MCS48_PORT_P2) AM_WRITE(carnival_music_port_2_w)
AM_RANGE(MCS48_PORT_T1, MCS48_PORT_T1) AM_READ(carnival_music_port_t1_r)
ADDRESS_MAP_END
MACHINE_CONFIG_FRAGMENT( carnival_audio )
/* music board */
MCFG_CPU_ADD("audiocpu", I8039, XTAL_3_579545MHz)
MCFG_CPU_PROGRAM_MAP(mboard_map)
MCFG_CPU_IO_MAP(mboard_io_map)
MCFG_MCS48_PORT_P1_OUT_CB(WRITE8(vicdual_state, carnival_music_port_1_w))
MCFG_MCS48_PORT_P2_OUT_CB(WRITE8(vicdual_state, carnival_music_port_2_w))
MCFG_MCS48_PORT_T1_IN_CB(READLINE(vicdual_state, carnival_music_port_t1_r))
MCFG_SOUND_ADD("psg", AY8912, XTAL_3_579545MHz/3)
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.25)

40
src/mame/audio/dkong.cpp
View File

@ -1273,44 +1273,21 @@ WRITE8_MEMBER(dkong_state::dkong_audio_irq_w)
*
*************************************/
READ8_MEMBER(dkong_state::sound_t0_r)
{
return m_dev_6h->bit5_q_r();
}
READ8_MEMBER(dkong_state::sound_t1_r)
{
return m_dev_6h->bit4_q_r();
}
static ADDRESS_MAP_START( dkong_sound_map, AS_PROGRAM, 8, dkong_state )
AM_RANGE(0x0000, 0x0fff) AM_ROM
ADDRESS_MAP_END
static ADDRESS_MAP_START( dkong_sound_io_map, AS_IO, 8, dkong_state )
AM_RANGE(0x00, 0xFF) AM_READWRITE(dkong_tune_r, dkong_voice_w)
AM_RANGE(MCS48_PORT_BUS, MCS48_PORT_BUS) AM_READWRITE(dkong_tune_r, dkong_voice_w)
AM_RANGE(MCS48_PORT_P1, MCS48_PORT_P1) AM_WRITE(dkong_p1_w) /* only write to dac */
AM_RANGE(MCS48_PORT_P2, MCS48_PORT_P2) AM_DEVREADWRITE("virtual_p2", latch8_device, read, write)
AM_RANGE(MCS48_PORT_T0, MCS48_PORT_T0) AM_READ(sound_t0_r)
AM_RANGE(MCS48_PORT_T1, MCS48_PORT_T1) AM_READ(sound_t1_r)
AM_RANGE(0x00, 0xff) AM_READWRITE(dkong_tune_r, dkong_voice_w)
ADDRESS_MAP_END
static ADDRESS_MAP_START( dkongjr_sound_io_map, AS_IO, 8, dkong_state )
AM_RANGE(0x00, 0x00) AM_MIRROR(0xff) AM_DEVREAD("ls174.3d", latch8_device, read)
AM_RANGE(MCS48_PORT_P1, MCS48_PORT_P1) AM_WRITE(dkong_p1_w) /* only write to dac */
AM_RANGE(MCS48_PORT_P2, MCS48_PORT_P2) AM_DEVREADWRITE("virtual_p2", latch8_device, read, write)
AM_RANGE(MCS48_PORT_T0, MCS48_PORT_T0) AM_READ(sound_t0_r)
AM_RANGE(MCS48_PORT_T1, MCS48_PORT_T1) AM_READ(sound_t1_r)
ADDRESS_MAP_END
static ADDRESS_MAP_START( radarscp1_sound_io_map, AS_IO, 8, dkong_state )
AM_RANGE(0x00, 0x00) AM_MIRROR(0xff) AM_DEVREAD("ls175.3d", latch8_device, read)
AM_RANGE(0x00, 0xff) AM_WRITE(dkong_p1_w) /* DAC here */
AM_RANGE(MCS48_PORT_P1, MCS48_PORT_P1) AM_DEVREAD("virtual_p1", latch8_device, read) AM_WRITE(M58817_command_w)
AM_RANGE(MCS48_PORT_P2, MCS48_PORT_P2) AM_DEVWRITE("virtual_p2", latch8_device, write)
AM_RANGE(MCS48_PORT_T0, MCS48_PORT_T0) AM_READ(sound_t0_r)
AM_RANGE(MCS48_PORT_T1, MCS48_PORT_T1) AM_READ(sound_t1_r)
ADDRESS_MAP_END
static ADDRESS_MAP_START( dkong3_sound1_map, AS_PROGRAM, 8, dkong_state )
@ -1361,6 +1338,13 @@ MACHINE_CONFIG_FRAGMENT( dkong2b_audio )
MCFG_CPU_ADD("soundcpu", MB8884, I8035_CLOCK)
MCFG_CPU_PROGRAM_MAP(dkong_sound_map)
MCFG_CPU_IO_MAP(dkong_sound_io_map)
MCFG_MCS48_PORT_BUS_IN_CB(READ8(dkong_state, dkong_tune_r))
MCFG_MCS48_PORT_BUS_OUT_CB(WRITE8(dkong_state, dkong_voice_w))
MCFG_MCS48_PORT_P1_OUT_CB(WRITE8(dkong_state, dkong_p1_w)) // only write to dac
MCFG_MCS48_PORT_P2_IN_CB(DEVREAD8("virtual_p2", latch8_device, read))
MCFG_MCS48_PORT_P2_OUT_CB(DEVWRITE8("virtual_p2", latch8_device, write))
MCFG_MCS48_PORT_T0_IN_CB(DEVREADLINE("ls259.6h", latch8_device, bit5_q_r))
MCFG_MCS48_PORT_T1_IN_CB(DEVREADLINE("ls259.6h", latch8_device, bit4_q_r))
MCFG_SPEAKER_STANDARD_MONO("mono")
MCFG_DISCRETE_ADD("discrete", 0, dkong2b)
@ -1378,6 +1362,9 @@ MACHINE_CONFIG_DERIVED( radarscp1_audio, radarscp_audio )
MCFG_CPU_MODIFY("soundcpu")
MCFG_CPU_IO_MAP(radarscp1_sound_io_map)
MCFG_MCS48_PORT_P1_IN_CB(DEVREAD8("virtual_p1", latch8_device, read))
MCFG_MCS48_PORT_P1_OUT_CB(WRITE8(dkong_state, M58817_command_w))
MCFG_MCS48_PORT_P2_IN_CB(NOOP)
/* virtual_p2 is not read -see memory map-, all bits are output bits */
MCFG_LATCH8_ADD( "virtual_p1" ) /* virtual latch for port A */
@ -1424,6 +1411,11 @@ MACHINE_CONFIG_FRAGMENT( dkongjr_audio )
MCFG_CPU_ADD("soundcpu", MB8884, I8035_CLOCK)
MCFG_CPU_PROGRAM_MAP(dkong_sound_map)
MCFG_CPU_IO_MAP(dkongjr_sound_io_map)
MCFG_MCS48_PORT_P1_OUT_CB(WRITE8(dkong_state, dkong_p1_w)) // only write to dac
MCFG_MCS48_PORT_P2_IN_CB(DEVREAD8("virtual_p2", latch8_device, read))
MCFG_MCS48_PORT_P2_OUT_CB(DEVWRITE8("virtual_p2", latch8_device, write))
MCFG_MCS48_PORT_T0_IN_CB(DEVREADLINE("ls259.6h", latch8_device, bit5_q_r))
MCFG_MCS48_PORT_T1_IN_CB(DEVREADLINE("ls259.6h", latch8_device, bit4_q_r))
MCFG_SPEAKER_STANDARD_MONO("mono")

18
src/mame/audio/mario.cpp
View File

@ -475,14 +475,14 @@ READ8_MEMBER(mario_state::mario_sh_p2_r)
return I8035_P2_R(space) & 0xEF; /* Bit 4 connected to GND! */
}
READ8_MEMBER(mario_state::mario_sh_t0_r)
READ_LINE_MEMBER(mario_state::mario_sh_t0_r)
{
return I8035_T_R(space, 0);
return I8035_T_R(machine().dummy_space(), 0);
}
READ8_MEMBER(mario_state::mario_sh_t1_r)
READ_LINE_MEMBER(mario_state::mario_sh_t1_r)
{
return I8035_T_R(space, 1);
return I8035_T_R(machine().dummy_space(), 1);
}
READ8_MEMBER(mario_state::mario_sh_tune_r)
@ -612,10 +612,6 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( mario_sound_io_map, AS_IO, 8, mario_state )
AM_RANGE(0x00, 0xff) AM_READ(mario_sh_tune_r) AM_WRITE(mario_sh_sound_w)
AM_RANGE(MCS48_PORT_P1, MCS48_PORT_P1) AM_READWRITE(mario_sh_p1_r, mario_sh_p1_w)
AM_RANGE(MCS48_PORT_P2, MCS48_PORT_P2) AM_READWRITE(mario_sh_p2_r, mario_sh_p2_w)
AM_RANGE(MCS48_PORT_T0, MCS48_PORT_T0) AM_READ(mario_sh_t0_r)
AM_RANGE(MCS48_PORT_T1, MCS48_PORT_T1) AM_READ(mario_sh_t1_r)
ADDRESS_MAP_END
static ADDRESS_MAP_START( masao_sound_map, AS_PROGRAM, 8, mario_state )
@ -641,6 +637,12 @@ MACHINE_CONFIG_FRAGMENT( mario_audio )
#endif
MCFG_CPU_PROGRAM_MAP(mario_sound_map)
MCFG_CPU_IO_MAP(mario_sound_io_map)
MCFG_MCS48_PORT_P1_IN_CB(READ8(mario_state, mario_sh_p1_r))
MCFG_MCS48_PORT_P1_OUT_CB(WRITE8(mario_state, mario_sh_p1_w))
MCFG_MCS48_PORT_P2_IN_CB(READ8(mario_state, mario_sh_p2_r))
MCFG_MCS48_PORT_P2_OUT_CB(WRITE8(mario_state, mario_sh_p2_w))
MCFG_MCS48_PORT_T0_IN_CB(READLINE(mario_state, mario_sh_t0_r))
MCFG_MCS48_PORT_T1_IN_CB(READLINE(mario_state, mario_sh_t1_r))
MCFG_SPEAKER_STANDARD_MONO("mono")

39
src/mame/audio/n8080.cpp
View File

@ -286,21 +286,21 @@ READ8_MEMBER(n8080_state::n8080_8035_p1_r)
}
READ8_MEMBER(n8080_state::n8080_8035_t0_r)
READ_LINE_MEMBER(n8080_state::n8080_8035_t0_r)
{
return (m_curr_sound_pins >> 0x7) & 1;
}
READ8_MEMBER(n8080_state::n8080_8035_t1_r)
READ_LINE_MEMBER(n8080_state::n8080_8035_t1_r)
{
return (m_curr_sound_pins >> 0xc) & 1;
}
READ8_MEMBER(n8080_state::helifire_8035_t0_r)
READ_LINE_MEMBER(n8080_state::helifire_8035_t0_r)
{
return (m_curr_sound_pins >> 0x3) & 1;
}
READ8_MEMBER(n8080_state::helifire_8035_t1_r)
READ_LINE_MEMBER(n8080_state::helifire_8035_t1_r)
{
return (m_curr_sound_pins >> 0x4) & 1;
}
@ -470,24 +470,8 @@ static ADDRESS_MAP_START( n8080_sound_cpu_map, AS_PROGRAM, 8, n8080_state )
ADDRESS_MAP_END
static ADDRESS_MAP_START( n8080_sound_io_map, AS_IO, 8, n8080_state )
AM_RANGE(MCS48_PORT_T0, MCS48_PORT_T0) AM_READ(n8080_8035_t0_r)
AM_RANGE(MCS48_PORT_T1, MCS48_PORT_T1) AM_READ(n8080_8035_t1_r)
AM_RANGE(MCS48_PORT_P1, MCS48_PORT_P1) AM_READ(n8080_8035_p1_r)
AM_RANGE(MCS48_PORT_P2, MCS48_PORT_P2) AM_WRITE(n8080_dac_w)
ADDRESS_MAP_END
static ADDRESS_MAP_START( helifire_sound_io_map, AS_IO, 8, n8080_state )
AM_RANGE(MCS48_PORT_T0, MCS48_PORT_T0) AM_READ(helifire_8035_t0_r)
AM_RANGE(MCS48_PORT_T1, MCS48_PORT_T1) AM_READ(helifire_8035_t1_r)
AM_RANGE(MCS48_PORT_P2, MCS48_PORT_P2) AM_READ(helifire_8035_p2_r)
AM_RANGE(0x00, 0x7f) AM_READ(helifire_8035_external_ram_r)
AM_RANGE(MCS48_PORT_P1, MCS48_PORT_P1) AM_DEVWRITE("helifire_dac", dac_byte_interface, write)
AM_RANGE(MCS48_PORT_P2, MCS48_PORT_P2) AM_WRITE(helifire_sound_ctrl_w)
ADDRESS_MAP_END
@ -499,7 +483,10 @@ MACHINE_CONFIG_FRAGMENT( spacefev_sound )
/* basic machine hardware */
MCFG_CPU_ADD("audiocpu", I8035, 6000000)
MCFG_CPU_PROGRAM_MAP(n8080_sound_cpu_map)
MCFG_CPU_IO_MAP(n8080_sound_io_map)
MCFG_MCS48_PORT_T0_IN_CB(READLINE(n8080_state, n8080_8035_t0_r))
MCFG_MCS48_PORT_T1_IN_CB(READLINE(n8080_state, n8080_8035_t1_r))
MCFG_MCS48_PORT_P1_IN_CB(READ8(n8080_state, n8080_8035_p1_r))
MCFG_MCS48_PORT_P2_OUT_CB(WRITE8(n8080_state, n8080_dac_w))
MCFG_TIMER_DRIVER_ADD_PERIODIC("vco_timer", n8080_state, spacefev_vco_voltage_timer, attotime::from_hz(1000))
@ -536,7 +523,10 @@ MACHINE_CONFIG_FRAGMENT( sheriff_sound )
/* basic machine hardware */
MCFG_CPU_ADD("audiocpu", I8035, 6000000)
MCFG_CPU_PROGRAM_MAP(n8080_sound_cpu_map)
MCFG_CPU_IO_MAP(n8080_sound_io_map)
MCFG_MCS48_PORT_T0_IN_CB(READLINE(n8080_state, n8080_8035_t0_r))
MCFG_MCS48_PORT_T1_IN_CB(READLINE(n8080_state, n8080_8035_t1_r))
MCFG_MCS48_PORT_P1_IN_CB(READ8(n8080_state, n8080_8035_p1_r))
MCFG_MCS48_PORT_P2_OUT_CB(WRITE8(n8080_state, n8080_dac_w))
/* sound hardware */
MCFG_SPEAKER_STANDARD_MONO("speaker")
@ -572,6 +562,11 @@ MACHINE_CONFIG_FRAGMENT( helifire_sound )
MCFG_CPU_ADD("audiocpu", I8035, 6000000)
MCFG_CPU_PROGRAM_MAP(n8080_sound_cpu_map)
MCFG_CPU_IO_MAP(helifire_sound_io_map)
MCFG_MCS48_PORT_T0_IN_CB(READLINE(n8080_state, helifire_8035_t0_r))
MCFG_MCS48_PORT_T1_IN_CB(READLINE(n8080_state, helifire_8035_t1_r))
MCFG_MCS48_PORT_P2_IN_CB(READ8(n8080_state, helifire_8035_p2_r))
MCFG_MCS48_PORT_P1_OUT_CB(DEVWRITE8("helifire_dac", dac_byte_interface, write))
MCFG_MCS48_PORT_P2_OUT_CB(WRITE8(n8080_state, helifire_sound_ctrl_w))
MCFG_TIMER_DRIVER_ADD_PERIODIC("helifire_dac_volume_timer", n8080_state, helifire_dac_volume_timer, attotime::from_hz(1000))

33
src/mame/audio/segag80r.cpp
View File

@ -671,23 +671,6 @@ static const char *const monsterb_sample_names[] =
};
/*************************************
*
* N7751 memory maps
*
*************************************/
static ADDRESS_MAP_START( monsterb_7751_portmap, AS_IO, 8, segag80r_state )
AM_RANGE(MCS48_PORT_T1, MCS48_PORT_T1) AM_READ(n7751_t1_r)
AM_RANGE(MCS48_PORT_P2, MCS48_PORT_P2) AM_READ(n7751_command_r)
AM_RANGE(MCS48_PORT_BUS, MCS48_PORT_BUS) AM_READ(n7751_rom_r)
AM_RANGE(MCS48_PORT_P1, MCS48_PORT_P1) AM_DEVWRITE("dac", dac_byte_interface, write)
AM_RANGE(MCS48_PORT_P2, MCS48_PORT_P2) AM_WRITE(n7751_p2_w)
AM_RANGE(MCS48_PORT_PROG, MCS48_PORT_PROG) AM_DEVWRITE("audio_8243", i8243_device, i8243_prog_w)
ADDRESS_MAP_END
/*************************************
*
* Machine driver
@ -703,7 +686,12 @@ MACHINE_CONFIG_FRAGMENT( monsterb_sound_board )
/* basic machine hardware */
MCFG_CPU_ADD("audiocpu", N7751, 6000000)
MCFG_CPU_IO_MAP(monsterb_7751_portmap)
MCFG_MCS48_PORT_T1_IN_CB(GND) // labelled as "TEST", connected to ground
MCFG_MCS48_PORT_P2_IN_CB(READ8(segag80r_state, n7751_command_r))
MCFG_MCS48_PORT_BUS_IN_CB(READ8(segag80r_state, n7751_rom_r))
MCFG_MCS48_PORT_P1_OUT_CB(DEVWRITE8("dac", dac_byte_interface, write))
MCFG_MCS48_PORT_P2_OUT_CB(WRITE8(segag80r_state, n7751_p2_w))
MCFG_MCS48_PORT_PROG_OUT_CB(DEVWRITELINE("audio_8243", i8243_device, prog_w))
MCFG_I8243_ADD("audio_8243", NOOP, WRITE8(segag80r_state,n7751_rom_control_w))
@ -847,16 +835,9 @@ WRITE8_MEMBER(segag80r_state::n7751_p2_w)
{
i8243_device *device = machine().device<i8243_device>("audio_8243");
/* write to P2; low 4 bits go to 8243 */
device->i8243_p2_w(space, offset, data & 0x0f);
device->p2_w(space, offset, data & 0x0f);
/* output of bit $80 indicates we are ready (1) or busy (0) */
/* no other outputs are used */
m_n7751_busy = data >> 7;
}
READ8_MEMBER(segag80r_state::n7751_t1_r)
{
/* T1 - labelled as "TEST", connected to ground */
return 0;
}

22
src/mame/audio/segasnd.cpp
View File

@ -100,12 +100,12 @@ void speech_sound_device::device_start()
READ8_MEMBER( speech_sound_device::t0_r )
READ_LINE_MEMBER( speech_sound_device::t0_r )
{
return m_t0;
}
READ8_MEMBER( speech_sound_device::t1_r )
READ_LINE_MEMBER( speech_sound_device::t1_r )
{
return m_drq;
}
@ -204,10 +204,6 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( speech_portmap, AS_IO, 8, speech_sound_device )
AM_RANGE(0x00, 0xff) AM_DEVREAD("segaspeech", speech_sound_device, rom_r)
AM_RANGE(0x00, 0xff) AM_DEVWRITE("speech", sp0250_device, write)
AM_RANGE(MCS48_PORT_P1, MCS48_PORT_P1) AM_DEVREADWRITE("segaspeech", speech_sound_device, p1_r, p1_w)
AM_RANGE(MCS48_PORT_P2, MCS48_PORT_P2) AM_DEVWRITE("segaspeech", speech_sound_device, p2_w)
AM_RANGE(MCS48_PORT_T0, MCS48_PORT_T0) AM_DEVREAD("segaspeech", speech_sound_device, t0_r)
AM_RANGE(MCS48_PORT_T1, MCS48_PORT_T1) AM_DEVREAD("segaspeech", speech_sound_device, t1_r)
ADDRESS_MAP_END
@ -223,6 +219,11 @@ MACHINE_CONFIG_FRAGMENT( sega_speech_board )
MCFG_CPU_ADD("audiocpu", I8035, SPEECH_MASTER_CLOCK) /* divide by 15 in CPU */
MCFG_CPU_PROGRAM_MAP(speech_map)
MCFG_CPU_IO_MAP(speech_portmap)
MCFG_MCS48_PORT_P1_IN_CB(DEVREAD8("segaspeech", speech_sound_device, p1_r))
MCFG_MCS48_PORT_P1_OUT_CB(DEVWRITE8("segaspeech", speech_sound_device, p1_w))
MCFG_MCS48_PORT_P2_OUT_CB(DEVWRITE8("segaspeech", speech_sound_device, p2_w))
MCFG_MCS48_PORT_T0_IN_CB(DEVREADLINE("segaspeech", speech_sound_device, t0_r))
MCFG_MCS48_PORT_T1_IN_CB(DEVREADLINE("segaspeech", speech_sound_device, t1_r))
/* sound hardware */
MCFG_SOUND_ADD("segaspeech", SEGASPEECH, 0)
@ -488,7 +489,7 @@ WRITE8_MEMBER( usb_sound_device::p2_w )
}
READ8_MEMBER( usb_sound_device::t1_r )
READ_LINE_MEMBER( usb_sound_device::t1_r )
{
/* T1 returns 1 based on the value of the T1 clock; the exact */
/* pattern is determined by one or more jumpers on the board. */
@ -852,9 +853,6 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( usb_portmap, AS_IO, 8, usb_sound_device )
AM_RANGE(0x00, 0xff) AM_READWRITE(workram_r, workram_w) AM_SHARE("workram")
AM_RANGE(MCS48_PORT_P1, MCS48_PORT_P1) AM_READWRITE(p1_r, p1_w)
AM_RANGE(MCS48_PORT_P2, MCS48_PORT_P2) AM_WRITE(p2_w)
AM_RANGE(MCS48_PORT_T1, MCS48_PORT_T1) AM_READ(t1_r)
ADDRESS_MAP_END
@ -870,6 +868,10 @@ MACHINE_CONFIG_FRAGMENT( segausb )
MCFG_CPU_ADD("ourcpu", I8035, USB_MASTER_CLOCK) /* divide by 15 in CPU */
MCFG_CPU_PROGRAM_MAP(usb_map)
MCFG_CPU_IO_MAP(usb_portmap)
MCFG_MCS48_PORT_P1_IN_CB(READ8(usb_sound_device, p1_r))
MCFG_MCS48_PORT_P1_OUT_CB(WRITE8(usb_sound_device, p1_w))
MCFG_MCS48_PORT_P2_OUT_CB(WRITE8(usb_sound_device, p2_w))
MCFG_MCS48_PORT_T1_IN_CB(READLINE(usb_sound_device, t1_r))
MCFG_TIMER_DRIVER_ADD_PERIODIC("usb_timer", usb_sound_device, increment_t1_clock_timer_cb, attotime::from_hz(USB_2MHZ_CLOCK / 256))
MACHINE_CONFIG_END

6
src/mame/audio/segasnd.h
View File

@ -18,8 +18,8 @@ public:
DECLARE_WRITE8_MEMBER( data_w );
DECLARE_WRITE8_MEMBER( control_w );
DECLARE_READ8_MEMBER( t0_r );
DECLARE_READ8_MEMBER( t1_r );
DECLARE_READ_LINE_MEMBER( t0_r );
DECLARE_READ_LINE_MEMBER( t1_r );
DECLARE_READ8_MEMBER( p1_r );
DECLARE_READ8_MEMBER( rom_r );
DECLARE_WRITE8_MEMBER( p1_w );
@ -128,7 +128,7 @@ public:
DECLARE_READ8_MEMBER( p1_r );
DECLARE_WRITE8_MEMBER( p1_w );
DECLARE_WRITE8_MEMBER( p2_w );
DECLARE_READ8_MEMBER( t1_r );
DECLARE_READ_LINE_MEMBER( t1_r );
DECLARE_READ8_MEMBER( workram_r );
DECLARE_WRITE8_MEMBER( workram_w );

8
src/mame/audio/spacefb.cpp
View File

@ -22,15 +22,15 @@ READ8_MEMBER(spacefb_state::audio_p2_r)
}
READ8_MEMBER(spacefb_state::audio_t0_r)
READ_LINE_MEMBER(spacefb_state::audio_t0_r)
{
return m_sound_latch & 0x20;
return BIT(m_sound_latch, 6);
}
READ8_MEMBER(spacefb_state::audio_t1_r)
READ_LINE_MEMBER(spacefb_state::audio_t1_r)
{
return m_sound_latch & 0x04;
return BIT(m_sound_latch, 2);
}

7
src/mame/drivers/advision.cpp
View File

@ -43,9 +43,6 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( io_map, AS_IO, 8, advision_state )
AM_RANGE(0x00, 0xff) AM_READWRITE(ext_ram_r, ext_ram_w)
AM_RANGE(MCS48_PORT_P1, MCS48_PORT_P1) AM_READWRITE(controller_r, bankswitch_w)
AM_RANGE(MCS48_PORT_P2, MCS48_PORT_P2) AM_WRITE(av_control_w)
AM_RANGE(MCS48_PORT_T1, MCS48_PORT_T1) AM_READ(vsync_r)
ADDRESS_MAP_END
/* Input Ports */
@ -69,6 +66,10 @@ static MACHINE_CONFIG_START( advision, advision_state )
MCFG_CPU_ADD(I8048_TAG, I8048, XTAL_11MHz)
MCFG_CPU_PROGRAM_MAP(program_map)
MCFG_CPU_IO_MAP(io_map)
MCFG_MCS48_PORT_P1_IN_CB(READ8(advision_state, controller_r))
MCFG_MCS48_PORT_P1_OUT_CB(WRITE8(advision_state, bankswitch_w))
MCFG_MCS48_PORT_P2_OUT_CB(WRITE8(advision_state, av_control_w))
MCFG_MCS48_PORT_T1_IN_CB(READLINE(advision_state, vsync_r))
MCFG_CPU_ADD(COP411_TAG, COP411, 52631*4) // COP411L-KCN/N, R11=82k, C8=56pF
MCFG_COP400_CONFIG(COP400_CKI_DIVISOR_4, COP400_CKO_RAM_POWER_SUPPLY, false)

14
src/mame/drivers/alpha68k.cpp
View File

@ -1902,14 +1902,6 @@ MACHINE_START_MEMBER(alpha68k_state,alpha68k_II)
}
static ADDRESS_MAP_START( i8748_portmap, AS_IO, 8, alpha68k_state )
// AM_RANGE(MCS48_PORT_BUS, MCS48_PORT_BUS) AM_READ(saiyugoub1_mcu_command_r)
// AM_RANGE(MCS48_PORT_T0, MCS48_PORT_T0) AM_DEVWRITE_LEGACY("adpcm", saiyugoub1_m5205_clk_w) /* Drives the clock on the m5205 at 1/8 of this frequency */
// AM_RANGE(MCS48_PORT_T1, MCS48_PORT_T1) AM_READ(saiyugoub1_m5205_irq_r)
// AM_RANGE(MCS48_PORT_P1, MCS48_PORT_P1) AM_WRITE(saiyugoub1_adpcm_rom_addr_w)
// AM_RANGE(MCS48_PORT_P2, MCS48_PORT_P2) AM_DEVWRITE_LEGACY("adpcm", saiyugoub1_adpcm_control_w)
ADDRESS_MAP_END
// Pixel clock, assuming that it can't be 4 MHz because 4 MHz / 15,20 KHz = 263 HTOTAL (VERY unlikely).
#define ALPHA68K_PIXEL_CLOCK XTAL_24MHz/4
#define ALPHA68K_HTOTAL 394
@ -1935,7 +1927,11 @@ static MACHINE_CONFIG_START( sstingry, alpha68k_state )
MCFG_CPU_ADD("mcu", I8748, 9263750) /* 9.263750 MHz oscillator, divided by 3*5 internally */
// MCFG_CPU_PROGRAM_MAP(i8748_map)
MCFG_CPU_IO_MAP(i8748_portmap)
// MCFG_MCS48_PORT_BUS_IN_CB(READ8(alpha68k_state, saiyugoub1_mcu_command_r))
// MCFG_MCS48_PORT_T0_CLK_CUSTOM(alpha68k_state, saiyugoub1_m5205_clk_w) /* Drives the clock on the m5205 at 1/8 of this frequency */
// MCFG_MCS48_PORT_T1_IN_CB(READLINE(alpha68k_state, saiyugoub1_m5205_irq_r))
// MCFG_MCS48_PORT_P1_OUT_CB(WRITE8(alpha68k_state, saiyugoub1_adpcm_rom_addr_w))
// MCFG_MCS48_PORT_P2_OUT_CB(WRITE8(alpha68k_state, saiyugoub1_adpcm_control_w))
MCFG_DEVICE_DISABLE()
MCFG_MACHINE_START_OVERRIDE(alpha68k_state,common)

5
src/mame/drivers/bitgraph.cpp
View File

@ -424,9 +424,6 @@ WRITE8_MEMBER(bitgraph_state::ppu_write)
#ifdef UNUSED_FUNCTION
static ADDRESS_MAP_START(ppu_io, AS_IO, 8, bitgraph_state)
// AM_RANGE(0x00, 0x00) AM_READ(ppu_irq)
// AM_RANGE(MCS48_PORT_P1, MCS48_PORT_P1)
// AM_RANGE(MCS48_PORT_T0, MCS48_PORT_T0) AM_READ(ppu_t0_r)
AM_RANGE(MCS48_PORT_PROG, MCS48_PORT_PROG) AM_DEVWRITE("i8243", i8243_device, i8243_prog_w)
ADDRESS_MAP_END
#endif
@ -554,6 +551,8 @@ MACHINE_CONFIG_END
static MACHINE_CONFIG_FRAGMENT( bg_ppu )
MCFG_CPU_ADD(PPU_TAG, I8035, XTAL_6_9MHz)
MCFG_CPU_IO_MAP(ppu_io)
// MCFG_MCS48_PORT_T0_IN_CB(READLINE(bitgraph_state, ppu_t0_r))
MCFG_MCS48_PORT_PROG_OUT_CB(DEVWRITELINE("i8243", i8243_device, prog_w))
MCFG_I8243_ADD("i8243", NOOP, WRITE8(bitgraph_state, ppu_i8243_w))

19
src/mame/drivers/cgc7900.cpp
View File

@ -293,17 +293,6 @@ static ADDRESS_MAP_START( keyboard_mem, AS_PROGRAM, 8, cgc7900_state )
AM_RANGE(0x000, 0x7ff) AM_ROM
ADDRESS_MAP_END
/*-------------------------------------------------
ADDRESS_MAP( keyboard_io )
-------------------------------------------------*/
static ADDRESS_MAP_START( keyboard_io, AS_IO, 8, cgc7900_state )
/* AM_RANGE(MCS48_PORT_P1, MCS48_PORT_P1)
AM_RANGE(MCS48_PORT_P2, MCS48_PORT_P2)
AM_RANGE(MCS48_PORT_T1, MCS48_PORT_T1)
AM_RANGE(MCS48_PORT_BUS, MCS48_PORT_BUS)*/
ADDRESS_MAP_END
/***************************************************************************
INPUT PORTS
***************************************************************************/
@ -373,7 +362,13 @@ static MACHINE_CONFIG_START( cgc7900, cgc7900_state )
MCFG_CPU_ADD(I8035_TAG, I8035, 1000000)
MCFG_CPU_PROGRAM_MAP(keyboard_mem)
MCFG_CPU_IO_MAP(keyboard_io)
//MCFG_MCS48_PORT_P1_IN_CB(READ8())
//MCFG_MCS48_PORT_P1_OUT_CB(WRITE8())
//MCFG_MCS48_PORT_P2_IN_CB(READ8())
//MCFG_MCS48_PORT_P2_OUT_CB(WRITE8())
//MCFG_MCS48_PORT_T1_IN_CB(READLINE())
//MCFG_MCS48_PORT_BUS_IN_CB(READ8())
//MCFG_MCS48_PORT_BUS_OUT_CB(WRITE8())
MCFG_DEVICE_DISABLE()
/* MCFG_CPU_ADD(AM2910_TAG, AM2910, XTAL_17_36MHz)

19
src/mame/drivers/chinagat.cpp
View File

@ -107,7 +107,7 @@ public:
DECLARE_WRITE8_MEMBER( saiyugoub1_adpcm_rom_addr_w );
DECLARE_WRITE8_MEMBER( saiyugoub1_adpcm_control_w );
DECLARE_WRITE8_MEMBER( saiyugoub1_m5205_clk_w );
DECLARE_READ8_MEMBER( saiyugoub1_m5205_irq_r );
DECLARE_READ_LINE_MEMBER(saiyugoub1_m5205_irq_r);
DECLARE_WRITE_LINE_MEMBER(saiyugoub1_m5205_irq_w);
optional_device<msm5205_device> m_adpcm;
};
@ -309,7 +309,7 @@ WRITE8_MEMBER(chinagat_state::saiyugoub1_m5205_clk_w )
#endif
}
READ8_MEMBER(chinagat_state::saiyugoub1_m5205_irq_r )
READ_LINE_MEMBER(chinagat_state::saiyugoub1_m5205_irq_r )
{
if (m_adpcm_sound_irq)
{
@ -394,14 +394,6 @@ static ADDRESS_MAP_START( i8748_map, AS_PROGRAM, 8, chinagat_state )
AM_RANGE(0x0400, 0x07ff) AM_ROM /* i8749 version */
ADDRESS_MAP_END
static ADDRESS_MAP_START( i8748_portmap, AS_IO, 8, chinagat_state )
AM_RANGE(MCS48_PORT_BUS, MCS48_PORT_BUS) AM_READ(saiyugoub1_mcu_command_r)
AM_RANGE(MCS48_PORT_T0, MCS48_PORT_T0) AM_WRITE(saiyugoub1_m5205_clk_w) /* Drives the clock on the m5205 at 1/8 of this frequency */
AM_RANGE(MCS48_PORT_T1, MCS48_PORT_T1) AM_READ(saiyugoub1_m5205_irq_r)
AM_RANGE(MCS48_PORT_P1, MCS48_PORT_P1) AM_WRITE(saiyugoub1_adpcm_rom_addr_w)
AM_RANGE(MCS48_PORT_P2, MCS48_PORT_P2) AM_WRITE(saiyugoub1_adpcm_control_w)
ADDRESS_MAP_END
static INPUT_PORTS_START( chinagat )
@ -609,7 +601,12 @@ static MACHINE_CONFIG_START( saiyugoub1, chinagat_state )
MCFG_CPU_ADD("mcu", I8748, 9263750) /* 9.263750 MHz oscillator, divided by 3*5 internally */
MCFG_CPU_PROGRAM_MAP(i8748_map)
MCFG_CPU_IO_MAP(i8748_portmap)
MCFG_MCS48_PORT_BUS_IN_CB(READ8(chinagat_state, saiyugoub1_mcu_command_r))
//MCFG_MCS48_PORT_T0_CLK_CUSTOM(chinagat_state, saiyugoub1_m5205_clk_w) /* Drives the clock on the m5205 at 1/8 of this frequency */
MCFG_MCS48_PORT_T1_IN_CB(READLINE(chinagat_state, saiyugoub1_m5205_irq_r))
MCFG_MCS48_PORT_P1_OUT_CB(WRITE8(chinagat_state, saiyugoub1_adpcm_rom_addr_w))
MCFG_MCS48_PORT_P2_OUT_CB(WRITE8(chinagat_state, saiyugoub1_adpcm_control_w))
MCFG_QUANTUM_TIME(attotime::from_hz(6000)) /* heavy interleaving to sync up sprite<->main cpu's */

40
src/mame/drivers/cp1.cpp
View File

@ -42,12 +42,8 @@ public:
virtual void machine_reset() override;
DECLARE_READ8_MEMBER(port1_r);
DECLARE_READ8_MEMBER(port2_r);
DECLARE_READ8_MEMBER(getbus);
DECLARE_READ8_MEMBER(t0_r);
DECLARE_READ8_MEMBER(t1_r);
DECLARE_WRITE8_MEMBER(port1_w);
DECLARE_WRITE8_MEMBER(port2_w);
DECLARE_WRITE8_MEMBER(putbus);
DECLARE_QUICKLOAD_LOAD_MEMBER(quickload);
DECLARE_READ8_MEMBER(i8155_read);
@ -113,29 +109,6 @@ WRITE8_MEMBER(cp1_state::port2_w)
m_port2 = data;
}
READ8_MEMBER(cp1_state::t0_r)
{
logerror("t0_r\n");
return 0;
}
READ8_MEMBER(cp1_state::t1_r)
{
logerror("t1_r\n");
return 0;
}
READ8_MEMBER(cp1_state::getbus)
{
logerror("getbus\n");
return 0;
}
WRITE8_MEMBER(cp1_state::putbus)
{
logerror("putbus\n");
}
READ8_MEMBER(cp1_state::i8155_read)
{
uint8_t data = 0;
@ -209,11 +182,6 @@ WRITE8_MEMBER(cp1_state::i8155_portc_w)
static ADDRESS_MAP_START( cp1_io , AS_IO, 8, cp1_state)
ADDRESS_MAP_UNMAP_HIGH
AM_RANGE( 0x00, 0xff ) AM_READWRITE( i8155_read, i8155_write)
AM_RANGE( MCS48_PORT_P1, MCS48_PORT_P1) AM_READWRITE( port1_r, port1_w )
AM_RANGE( MCS48_PORT_P2, MCS48_PORT_P2) AM_READWRITE( port2_r, port2_w )
AM_RANGE( MCS48_PORT_BUS, MCS48_PORT_BUS) AM_READWRITE( getbus, putbus )
AM_RANGE( MCS48_PORT_T0, MCS48_PORT_T0) AM_READ( t0_r )
AM_RANGE( MCS48_PORT_T1, MCS48_PORT_T1) AM_READ( t1_r )
ADDRESS_MAP_END
/* Input ports */
@ -287,6 +255,14 @@ static MACHINE_CONFIG_START( cp1, cp1_state )
/* basic machine hardware */
MCFG_CPU_ADD("maincpu", I8049, XTAL_6MHz)
MCFG_CPU_IO_MAP(cp1_io)
MCFG_MCS48_PORT_P1_IN_CB(READ8(cp1_state, port1_r))
MCFG_MCS48_PORT_P1_OUT_CB(WRITE8(cp1_state, port1_w))
MCFG_MCS48_PORT_P2_IN_CB(READ8(cp1_state, port2_r))
MCFG_MCS48_PORT_P2_OUT_CB(WRITE8(cp1_state, port2_w))
MCFG_MCS48_PORT_BUS_IN_CB(LOGGER("getbus"))
MCFG_MCS48_PORT_BUS_OUT_CB(LOGGER("putbus"))
MCFG_MCS48_PORT_T0_IN_CB(LOGGER("t0_r"))
MCFG_MCS48_PORT_T1_IN_CB(LOGGER("t1_r"))
MCFG_DEVICE_ADD("i8155", I8155, 0)
MCFG_I8155_OUT_PORTA_CB(WRITE8(cp1_state, i8155_porta_w))

10
src/mame/drivers/decocass.cpp
View File

@ -135,11 +135,6 @@ static ADDRESS_MAP_START( decocass_sound_map, AS_PROGRAM, 8, decocass_state )
ADDRESS_MAP_END
static ADDRESS_MAP_START( decocass_mcu_portmap, AS_IO, 8, decocass_state )
AM_RANGE(MCS48_PORT_P1, MCS48_PORT_P1) AM_READWRITE(i8041_p1_r, i8041_p1_w)
AM_RANGE(MCS48_PORT_P2, MCS48_PORT_P2) AM_READWRITE(i8041_p2_r, i8041_p2_w)
ADDRESS_MAP_END
static INPUT_PORTS_START( decocass )
PORT_START("IN0")
PORT_BIT( 0x01, IP_ACTIVE_HIGH,IPT_JOYSTICK_RIGHT )
@ -789,7 +784,10 @@ static MACHINE_CONFIG_START( decocass, decocass_state )
MCFG_TIMER_DRIVER_ADD_SCANLINE("audionmi", decocass_state, decocass_audio_nmi_gen, "screen", 0, 8)
MCFG_CPU_ADD("mcu", I8041, HCLK)
MCFG_CPU_IO_MAP(decocass_mcu_portmap)
MCFG_MCS48_PORT_P1_IN_CB(READ8(decocass_state, i8041_p1_r))
MCFG_MCS48_PORT_P1_OUT_CB(WRITE8(decocass_state, i8041_p1_w))
MCFG_MCS48_PORT_P2_IN_CB(READ8(decocass_state, i8041_p2_r))
MCFG_MCS48_PORT_P2_OUT_CB(WRITE8(decocass_state, i8041_p2_w))
MCFG_QUANTUM_TIME(attotime::from_hz(4200)) /* interleave CPUs */

9
src/mame/drivers/dmv.cpp
View File

@ -554,11 +554,6 @@ WRITE8_MEMBER(dmv_state::kb_mcu_port2_w)
m_slot7->keyint_w(BIT(data, 4));
}
static ADDRESS_MAP_START( dmv_kb_ctrl_io, AS_IO, 8, dmv_state )
AM_RANGE(MCS48_PORT_P1, MCS48_PORT_P1) AM_READWRITE(kb_mcu_port1_r, kb_mcu_port1_w) // bit 0 data from kb, bit 1 data to kb
AM_RANGE(MCS48_PORT_P2, MCS48_PORT_P2) AM_WRITE(kb_mcu_port2_w)
ADDRESS_MAP_END
static ADDRESS_MAP_START( upd7220_map, AS_0, 16, dmv_state )
ADDRESS_MAP_GLOBAL_MASK(0x1ffff)
AM_RANGE(0x00000, 0x1ffff) AM_RAM AM_SHARE("video_ram")
@ -724,7 +719,9 @@ static MACHINE_CONFIG_START( dmv, dmv_state )
MCFG_CPU_IO_MAP(dmv_io)
MCFG_CPU_ADD("kb_ctrl_mcu", I8741, XTAL_6MHz)
MCFG_CPU_IO_MAP(dmv_kb_ctrl_io)
MCFG_MCS48_PORT_P1_IN_CB(READ8(dmv_state, kb_mcu_port1_r)) // bit 0 data from kb
MCFG_MCS48_PORT_P1_OUT_CB(WRITE8(dmv_state, kb_mcu_port1_w)) // bit 1 data to kb
MCFG_MCS48_PORT_P2_OUT_CB(WRITE8(dmv_state, kb_mcu_port2_w))
MCFG_QUANTUM_PERFECT_CPU("maincpu")

54
src/mame/drivers/drw80pkr.cpp
View File

@ -56,17 +56,13 @@ public:
uint8_t m_pkr_io_ram[0x100];
uint16_t m_video_ram[0x0400];
uint8_t m_color_ram[0x0400];
DECLARE_WRITE8_MEMBER(t0_w);
DECLARE_WRITE8_MEMBER(t1_w);
DECLARE_WRITE8_MEMBER(p0_w);
DECLARE_WRITE8_MEMBER(p1_w);
DECLARE_WRITE8_MEMBER(p2_w);
DECLARE_WRITE8_MEMBER(prog_w);
DECLARE_WRITE_LINE_MEMBER(prog_w);
DECLARE_WRITE8_MEMBER(bus_w);
DECLARE_WRITE8_MEMBER(drw80pkr_io_w);
DECLARE_READ8_MEMBER(t0_r);
DECLARE_READ8_MEMBER(t1_r);
DECLARE_READ8_MEMBER(p0_r);
DECLARE_READ_LINE_MEMBER(t0_r);
DECLARE_READ_LINE_MEMBER(t1_r);
DECLARE_READ8_MEMBER(p1_r);
DECLARE_READ8_MEMBER(p2_r);
DECLARE_READ8_MEMBER(bus_r);
@ -95,21 +91,6 @@ void drw80pkr_state::machine_start()
* Write Handlers *
******************/
WRITE8_MEMBER(drw80pkr_state::t0_w)
{
m_t0 = data;
}
WRITE8_MEMBER(drw80pkr_state::t1_w)
{
m_t1 = data;
}
WRITE8_MEMBER(drw80pkr_state::p0_w)
{
m_p0 = data;
}
WRITE8_MEMBER(drw80pkr_state::p1_w)
{
m_p1 = data;
@ -120,9 +101,9 @@ WRITE8_MEMBER(drw80pkr_state::p2_w)
m_p2 = data;
}
WRITE8_MEMBER(drw80pkr_state::prog_w)
WRITE_LINE_MEMBER(drw80pkr_state::prog_w)
{
m_prog = data;
m_prog = state;
// Bankswitch Program Memory
if (m_prog == 0x01)
@ -216,21 +197,16 @@ WRITE8_MEMBER(drw80pkr_state::drw80pkr_io_w)
* Read Handlers *
****************/
READ8_MEMBER(drw80pkr_state::t0_r)
READ_LINE_MEMBER(drw80pkr_state::t0_r)
{
return m_t0;
}
READ8_MEMBER(drw80pkr_state::t1_r)
READ_LINE_MEMBER(drw80pkr_state::t1_r)
{
return m_t1;
}
READ8_MEMBER(drw80pkr_state::p0_r)
{
return m_p0;
}
READ8_MEMBER(drw80pkr_state::p1_r)
{
return m_p1;
@ -428,13 +404,6 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( drw80pkr_io_map, AS_IO, 8, drw80pkr_state )
AM_RANGE(0x00, 0xff) AM_READWRITE(drw80pkr_io_r, drw80pkr_io_w)
AM_RANGE(MCS48_PORT_T0, MCS48_PORT_T0) AM_READWRITE(t0_r, t0_w)
AM_RANGE(MCS48_PORT_T1, MCS48_PORT_T1) AM_READWRITE(t1_r, t1_w)
AM_RANGE(MCS48_PORT_P0, MCS48_PORT_P0) AM_READWRITE(p0_r, p0_w)
AM_RANGE(MCS48_PORT_P1, MCS48_PORT_P1) AM_READWRITE(p1_r, p1_w)
AM_RANGE(MCS48_PORT_P2, MCS48_PORT_P2) AM_READWRITE(p2_r, p2_w)
AM_RANGE(MCS48_PORT_PROG, MCS48_PORT_PROG) AM_RAM_WRITE(prog_w)
AM_RANGE(MCS48_PORT_BUS, MCS48_PORT_BUS) AM_READWRITE(bus_r, bus_w)
ADDRESS_MAP_END
/*************************
@ -474,6 +443,15 @@ static MACHINE_CONFIG_START( drw80pkr, drw80pkr_state )
MCFG_CPU_ADD("maincpu", I8039, CPU_CLOCK)
MCFG_CPU_PROGRAM_MAP(drw80pkr_map)
MCFG_CPU_IO_MAP(drw80pkr_io_map)
MCFG_MCS48_PORT_T0_IN_CB(READLINE(drw80pkr_state, t0_r))
MCFG_MCS48_PORT_T1_IN_CB(READLINE(drw80pkr_state, t1_r))
MCFG_MCS48_PORT_P1_IN_CB(READ8(drw80pkr_state, p1_r))
MCFG_MCS48_PORT_P1_OUT_CB(WRITE8(drw80pkr_state, p1_w))
MCFG_MCS48_PORT_P2_IN_CB(READ8(drw80pkr_state, p2_r))
MCFG_MCS48_PORT_P2_OUT_CB(WRITE8(drw80pkr_state, p2_w))
MCFG_MCS48_PORT_PROG_OUT_CB(WRITELINE(drw80pkr_state, prog_w))
MCFG_MCS48_PORT_BUS_IN_CB(READ8(drw80pkr_state, bus_r))
MCFG_MCS48_PORT_BUS_OUT_CB(WRITE8(drw80pkr_state, bus_w))
MCFG_CPU_VBLANK_INT_DRIVER("screen", drw80pkr_state, irq0_line_hold)

23
src/mame/drivers/fidelmcs48.cpp
View File

@ -46,8 +46,8 @@ public:
DECLARE_WRITE8_MEMBER(sc6_mux_w);
DECLARE_WRITE8_MEMBER(sc6_select_w);
DECLARE_READ8_MEMBER(sc6_input_r);
DECLARE_READ8_MEMBER(sc6_input6_r);
DECLARE_READ8_MEMBER(sc6_input7_r);
DECLARE_READ_LINE_MEMBER(sc6_input6_r);
DECLARE_READ_LINE_MEMBER(sc6_input7_r);
};
@ -94,13 +94,13 @@ READ8_MEMBER(fidelmcs48_state::sc6_input_r)
return (~read_inputs(9) & 0x3f) | 0xc0;
}
READ8_MEMBER(fidelmcs48_state::sc6_input6_r)
READ_LINE_MEMBER(fidelmcs48_state::sc6_input6_r)
{
// T0: multiplexed inputs bit 6
return ~read_inputs(9) >> 6 & 1;
}
READ8_MEMBER(fidelmcs48_state::sc6_input7_r)
READ_LINE_MEMBER(fidelmcs48_state::sc6_input7_r)
{
// T1: multiplexed inputs bit 7
return ~read_inputs(9) >> 7 & 1;
@ -118,14 +118,6 @@ static ADDRESS_MAP_START( sc6_map, AS_PROGRAM, 8, fidelmcs48_state )
AM_RANGE(0x0000, 0x0fff) AM_ROM
ADDRESS_MAP_END
static ADDRESS_MAP_START( sc6_io, AS_IO, 8, fidelmcs48_state )
ADDRESS_MAP_UNMAP_HIGH
AM_RANGE(MCS48_PORT_P2, MCS48_PORT_P2) AM_WRITE(sc6_mux_w) AM_READNOP
AM_RANGE(MCS48_PORT_P1, MCS48_PORT_P1) AM_READWRITE(sc6_input_r, sc6_select_w)
AM_RANGE(MCS48_PORT_T0, MCS48_PORT_T0) AM_READ(sc6_input6_r)
AM_RANGE(MCS48_PORT_T1, MCS48_PORT_T1) AM_READ(sc6_input7_r)
ADDRESS_MAP_END
/******************************************************************************
@ -157,7 +149,12 @@ static MACHINE_CONFIG_START( sc6, fidelmcs48_state )
/* basic machine hardware */
MCFG_CPU_ADD("maincpu", I8040, XTAL_11MHz)
MCFG_CPU_PROGRAM_MAP(sc6_map)
MCFG_CPU_IO_MAP(sc6_io)
MCFG_MCS48_PORT_P2_OUT_CB(WRITE8(fidelmcs48_state, sc6_mux_w))
MCFG_MCS48_PORT_P2_IN_CB(CONSTANT(0xff))
MCFG_MCS48_PORT_P1_IN_CB(READ8(fidelmcs48_state, sc6_input_r))
MCFG_MCS48_PORT_P1_OUT_CB(WRITE8(fidelmcs48_state, sc6_select_w))
MCFG_MCS48_PORT_T0_IN_CB(READLINE(fidelmcs48_state, sc6_input6_r))
MCFG_MCS48_PORT_T1_IN_CB(READLINE(fidelmcs48_state, sc6_input7_r))
MCFG_TIMER_DRIVER_ADD_PERIODIC("display_decay", fidelbase_state, display_decay_tick, attotime::from_msec(1))
MCFG_DEFAULT_LAYOUT(layout_fidel_sc6)

27
src/mame/drivers/fidelz80.cpp
View File

@ -573,8 +573,8 @@ public:
void vbrc_prepare_display();
DECLARE_WRITE8_MEMBER(vbrc_speech_w);
DECLARE_WRITE8_MEMBER(vbrc_mcu_p1_w);
DECLARE_READ8_MEMBER(vbrc_mcu_t0_r);
DECLARE_READ8_MEMBER(vbrc_mcu_t1_r);
DECLARE_READ_LINE_MEMBER(vbrc_mcu_t0_r);
DECLARE_READ_LINE_MEMBER(vbrc_mcu_t1_r);
DECLARE_READ8_MEMBER(vbrc_mcu_p2_r);
DECLARE_WRITE8_MEMBER(vbrc_ioexp_port_w);
@ -1068,16 +1068,16 @@ READ8_MEMBER(fidelz80_state::vbrc_mcu_p2_r)
{
// P20-P23: I8243 P2
// P24-P27: multiplexed inputs (active low)
return (m_i8243->i8243_p2_r(space, offset) & 0x0f) | (read_inputs(8) << 4 ^ 0xf0);
return (m_i8243->p2_r(space, offset) & 0x0f) | (read_inputs(8) << 4 ^ 0xf0);
}
READ8_MEMBER(fidelz80_state::vbrc_mcu_t0_r)
READ_LINE_MEMBER(fidelz80_state::vbrc_mcu_t0_r)
{
// T0: card scanner?
return 0;
}
READ8_MEMBER(fidelz80_state::vbrc_mcu_t1_r)
READ_LINE_MEMBER(fidelz80_state::vbrc_mcu_t1_r)
{
// T1: ? (locks up on const 0 or 1)
return machine().rand() & 1;
@ -1227,15 +1227,6 @@ static ADDRESS_MAP_START( vbrc_main_io, AS_IO, 8, fidelz80_state )
AM_RANGE(0x00, 0x01) AM_DEVREADWRITE("mcu", i8041_device, upi41_master_r, upi41_master_w)
ADDRESS_MAP_END
static ADDRESS_MAP_START( vbrc_mcu_map, AS_IO, 8, fidelz80_state )
ADDRESS_MAP_UNMAP_LOW
AM_RANGE(MCS48_PORT_P1, MCS48_PORT_P1) AM_WRITE(vbrc_mcu_p1_w)
AM_RANGE(MCS48_PORT_P2, MCS48_PORT_P2) AM_READ(vbrc_mcu_p2_r) AM_DEVWRITE("i8243", i8243_device, i8243_p2_w)
AM_RANGE(MCS48_PORT_PROG, MCS48_PORT_PROG) AM_DEVWRITE("i8243", i8243_device, i8243_prog_w)
AM_RANGE(MCS48_PORT_T0, MCS48_PORT_T0) AM_READ(vbrc_mcu_t0_r)
AM_RANGE(MCS48_PORT_T1, MCS48_PORT_T1) AM_READ(vbrc_mcu_t1_r)
ADDRESS_MAP_END
// DSC
@ -1784,7 +1775,13 @@ static MACHINE_CONFIG_START( vbrc, fidelz80_state )
MCFG_QUANTUM_PERFECT_CPU("maincpu")
MCFG_CPU_ADD("mcu", I8041, XTAL_5MHz)
MCFG_CPU_IO_MAP(vbrc_mcu_map)
MCFG_MCS48_PORT_P1_IN_CB(CONSTANT(0)) // ???
MCFG_MCS48_PORT_P1_OUT_CB(WRITE8(fidelz80_state, vbrc_mcu_p1_w))
MCFG_MCS48_PORT_P2_IN_CB(READ8(fidelz80_state, vbrc_mcu_p2_r))
MCFG_MCS48_PORT_P2_OUT_CB(DEVWRITE8("i8243", i8243_device, p2_w))
MCFG_MCS48_PORT_PROG_OUT_CB(DEVWRITELINE("i8243", i8243_device, prog_w))
MCFG_MCS48_PORT_T0_IN_CB(READLINE(fidelz80_state, vbrc_mcu_t0_r))
MCFG_MCS48_PORT_T1_IN_CB(READLINE(fidelz80_state, vbrc_mcu_t1_r))
MCFG_I8243_ADD("i8243", NOOP, WRITE8(fidelz80_state, vbrc_ioexp_port_w))

10
src/mame/drivers/finalizr.cpp
View File

@ -77,7 +77,7 @@ WRITE8_MEMBER(finalizr_state::i8039_irqen_w)
m_audiocpu->set_input_line(0, CLEAR_LINE);
}
READ8_MEMBER(finalizr_state::i8039_T1_r)
READ_LINE_MEMBER(finalizr_state::i8039_T1_r)
{
/* I suspect the clock-out from the I8039 T0 line should be connected
here (See the i8039_T0_w handler below).
@ -138,10 +138,6 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( sound_io_map, AS_IO, 8, finalizr_state )
AM_RANGE(0x00, 0xff) AM_DEVREAD("soundlatch", generic_latch_8_device, read)
AM_RANGE(MCS48_PORT_P1, MCS48_PORT_P1) AM_DEVWRITE("dac", dac_byte_interface, write)
AM_RANGE(MCS48_PORT_P2, MCS48_PORT_P2) AM_WRITE(i8039_irqen_w)
AM_RANGE(MCS48_PORT_T0, MCS48_PORT_T0) AM_WRITE(i8039_T0_w)
AM_RANGE(MCS48_PORT_T1, MCS48_PORT_T1) AM_READ(i8039_T1_r)
ADDRESS_MAP_END
@ -274,6 +270,10 @@ static MACHINE_CONFIG_START( finalizr, finalizr_state )
MCFG_CPU_ADD("audiocpu", I8039,XTAL_18_432MHz/2) /* 9.216MHz clkin ?? */
MCFG_CPU_PROGRAM_MAP(sound_map)
MCFG_CPU_IO_MAP(sound_io_map)
MCFG_MCS48_PORT_P1_OUT_CB(DEVWRITE8("dac", dac_byte_interface, write))
MCFG_MCS48_PORT_P2_OUT_CB(WRITE8(finalizr_state, i8039_irqen_w))
//MCFG_MCS48_PORT_T0_CLK_CUSTOM(finalizr_state, i8039_T0_w)
MCFG_MCS48_PORT_T1_IN_CB(READLINE(finalizr_state, i8039_T1_r))
MCFG_WATCHDOG_ADD("watchdog")

68
src/mame/drivers/gladiatr.cpp
View File

@ -290,16 +290,6 @@ READ8_MEMBER(gladiatr_state::ucpu_p2_r)
return BITSWAP8(m_dsw1->read(), 0,1,2,3,4,5,6,7);
}
READ8_MEMBER(gladiatr_state::cctl_t_r)
{
return BIT(m_coins->read(), offset + 2);
}
READ8_MEMBER(gladiatr_state::ccpu_t_r)
{
return BIT(m_coins->read(), offset);
}
WRITE8_MEMBER(gladiatr_state::ccpu_p2_w)
{
// FIXME: active high or active low? (bootleg MCU never uses these outputs)
@ -307,13 +297,13 @@ WRITE8_MEMBER(gladiatr_state::ccpu_p2_w)
machine().bookkeeping().coin_counter_w(1, BIT(data, 7));
}
READ8_MEMBER(gladiatr_state::tclk_r)
READ_LINE_MEMBER(gladiatr_state::tclk_r)
{
// fed to t0 on comms MCUs
return m_tclk_val ? 0x01 : 0x00;
return m_tclk_val ? 1 : 0;
}
READ8_MEMBER(gladiatr_state::ucpu_t1_r)
READ_LINE_MEMBER(gladiatr_state::ucpu_t1_r)
{
// connected to p1 on other MCU
return BIT(m_csnd_p1, 1);
@ -332,7 +322,7 @@ WRITE8_MEMBER(gladiatr_state::ucpu_p1_w)
m_ucpu_p1 = data;
}
READ8_MEMBER(gladiatr_state::csnd_t1_r)
READ_LINE_MEMBER(gladiatr_state::csnd_t1_r)
{
// connected to p1 on other MCU
return BIT(m_ucpu_p1, 1);
@ -540,33 +530,6 @@ static ADDRESS_MAP_START( gladiatr_cpu2_io, AS_IO, 8, gladiatr_state )
ADDRESS_MAP_END
static ADDRESS_MAP_START( cctl_io_map, AS_IO, 8, gladiatr_state )
AM_RANGE(MCS48_PORT_T0, MCS48_PORT_T1) AM_READ(cctl_t_r)
AM_RANGE(MCS48_PORT_P1, MCS48_PORT_P1) AM_READ(cctl_p1_r)
AM_RANGE(MCS48_PORT_P2, MCS48_PORT_P2) AM_READ(cctl_p2_r)
ADDRESS_MAP_END
static ADDRESS_MAP_START( ccpu_io_map, AS_IO, 8, gladiatr_state )
AM_RANGE(MCS48_PORT_P1, MCS48_PORT_P1) AM_READ_PORT("IN0")
AM_RANGE(MCS48_PORT_P2, MCS48_PORT_P2) AM_READ_PORT("IN1") AM_WRITE(ccpu_p2_w)
AM_RANGE(MCS48_PORT_T0, MCS48_PORT_T1) AM_READ(ccpu_t_r)
ADDRESS_MAP_END
static ADDRESS_MAP_START( ucpu_io_map, AS_IO, 8, gladiatr_state )
AM_RANGE(MCS48_PORT_P1, MCS48_PORT_P1) AM_READWRITE(ucpu_p1_r, ucpu_p1_w)
AM_RANGE(MCS48_PORT_P2, MCS48_PORT_P2) AM_READ(ucpu_p2_r)
AM_RANGE(MCS48_PORT_T0, MCS48_PORT_T0) AM_READ(tclk_r)
AM_RANGE(MCS48_PORT_T1, MCS48_PORT_T1) AM_READ(ucpu_t1_r)
ADDRESS_MAP_END
static ADDRESS_MAP_START( csnd_io_map, AS_IO, 8, gladiatr_state )
AM_RANGE(MCS48_PORT_P1, MCS48_PORT_P1) AM_READWRITE(csnd_p1_r, csnd_p1_w)
AM_RANGE(MCS48_PORT_P2, MCS48_PORT_P2) AM_READ(csnd_p2_r)
AM_RANGE(MCS48_PORT_T0, MCS48_PORT_T0) AM_READ(tclk_r)
AM_RANGE(MCS48_PORT_T1, MCS48_PORT_T1) AM_READ(csnd_t1_r)
ADDRESS_MAP_END
static INPUT_PORTS_START( gladiatr )
PORT_START("DSW1") /* (8741-0 parallel port)*/
PORT_DIPNAME( 0x03, 0x02, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW1:1,2")
@ -785,16 +748,31 @@ static MACHINE_CONFIG_START( gladiatr, gladiatr_state )
MCFG_NVRAM_ADD_0FILL("nvram")
MCFG_DEVICE_ADD("cctl", I8741, XTAL_12MHz/2) /* verified on pcb */
MCFG_CPU_IO_MAP(cctl_io_map)
MCFG_MCS48_PORT_T0_IN_CB(IOPORT("COINS")) MCFG_DEVCB_RSHIFT(3)
MCFG_MCS48_PORT_T1_IN_CB(IOPORT("COINS")) MCFG_DEVCB_RSHIFT(2)
MCFG_MCS48_PORT_P1_IN_CB(READ8(gladiatr_state, cctl_p1_r))
MCFG_MCS48_PORT_P2_IN_CB(READ8(gladiatr_state, cctl_p2_r))
MCFG_DEVICE_ADD("ccpu", I8741, XTAL_12MHz/2) /* verified on pcb */
MCFG_CPU_IO_MAP(ccpu_io_map)
MCFG_MCS48_PORT_P1_IN_CB(IOPORT("IN0"))
MCFG_MCS48_PORT_P2_IN_CB(IOPORT("IN1"))
MCFG_MCS48_PORT_P2_OUT_CB(WRITE8(gladiatr_state, ccpu_p2_w))
MCFG_MCS48_PORT_T0_IN_CB(IOPORT("COINS")) MCFG_DEVCB_RSHIFT(1)
MCFG_MCS48_PORT_T1_IN_CB(IOPORT("COINS")) MCFG_DEVCB_RSHIFT(0)
MCFG_DEVICE_ADD("ucpu", I8741, XTAL_12MHz/2) /* verified on pcb */
MCFG_CPU_IO_MAP(ucpu_io_map)
MCFG_MCS48_PORT_P1_IN_CB(READ8(gladiatr_state, ucpu_p1_r))
MCFG_MCS48_PORT_P1_OUT_CB(WRITE8(gladiatr_state, ucpu_p1_w))
MCFG_MCS48_PORT_P2_IN_CB(READ8(gladiatr_state, ucpu_p2_r))
MCFG_MCS48_PORT_T0_IN_CB(READLINE(gladiatr_state, tclk_r))
MCFG_MCS48_PORT_T1_IN_CB(READLINE(gladiatr_state, ucpu_t1_r))
MCFG_DEVICE_ADD("csnd", I8741, XTAL_12MHz/2) /* verified on pcb */
MCFG_CPU_IO_MAP(csnd_io_map)
MCFG_MCS48_PORT_P1_IN_CB(READ8(gladiatr_state, csnd_p1_r))
MCFG_MCS48_PORT_P1_OUT_CB(WRITE8(gladiatr_state, csnd_p1_w))
MCFG_MCS48_PORT_P2_IN_CB(READ8(gladiatr_state, csnd_p2_r))
MCFG_MCS48_PORT_T0_IN_CB(READLINE(gladiatr_state, tclk_r))
MCFG_MCS48_PORT_T1_IN_CB(READLINE(gladiatr_state, csnd_t1_r))
/* lazy way to make polled serial between MCUs work */
MCFG_QUANTUM_PERFECT_CPU("ucpu")

30
src/mame/drivers/gsword.cpp
View File

@ -382,12 +382,6 @@ READ8_MEMBER(josvolly_state::mcu2_p2_r)
return 0x7fU & ioport("DSW2")->read();
}
READ8_MEMBER(josvolly_state::mcu2_test_r)
{
// TEST0 and TEST1 are driven by P20 and P21 on the other MCU
return BIT(m_mcu1_p2, offset);
}
WRITE8_MEMBER(josvolly_state::cpu2_nmi_enable_w)
{
m_cpu2_nmi_enable = true;
@ -536,17 +530,6 @@ static ADDRESS_MAP_START( josvolly_cpu2_io_map, AS_IO, 8, josvolly_state )
AM_RANGE(0xC1, 0xC1) AM_WRITE(cpu2_irq_clear_w);
ADDRESS_MAP_END
static ADDRESS_MAP_START( josvolly_mcu1_io_map, AS_IO, 8, josvolly_state )
AM_RANGE(MCS48_PORT_P1, MCS48_PORT_P1) AM_READWRITE(mcu1_p1_r, mcu1_p1_w)
AM_RANGE(MCS48_PORT_P2, MCS48_PORT_P2) AM_READWRITE(mcu1_p2_r, mcu1_p2_w)
ADDRESS_MAP_END
static ADDRESS_MAP_START( josvolly_mcu2_io_map, AS_IO, 8, josvolly_state )
AM_RANGE(MCS48_PORT_P1, MCS48_PORT_P1) AM_READWRITE(mcu2_p1_r, mcu2_p1_w)
AM_RANGE(MCS48_PORT_P2, MCS48_PORT_P2) AM_READWRITE(mcu2_p2_r, mcu2_p2_w)
AM_RANGE(MCS48_PORT_T0, MCS48_PORT_T1) AM_READ(mcu2_test_r)
ADDRESS_MAP_END
static INPUT_PORTS_START( gsword )
PORT_START("IN0") /* IN0 (8741-2 port1?) */
@ -863,10 +846,19 @@ static MACHINE_CONFIG_START( josvolly, josvolly_state )
MCFG_CPU_VBLANK_INT_DRIVER("screen", josvolly_state, irq0_line_assert)
MCFG_DEVICE_ADD("mcu1", I8741, 18000000/2) /* ? */
MCFG_CPU_IO_MAP(josvolly_mcu1_io_map)
MCFG_MCS48_PORT_P1_IN_CB(READ8(josvolly_state, mcu1_p1_r))
MCFG_MCS48_PORT_P1_OUT_CB(WRITE8(josvolly_state, mcu1_p1_w))
MCFG_MCS48_PORT_P2_IN_CB(READ8(josvolly_state, mcu1_p2_r))
MCFG_MCS48_PORT_P2_OUT_CB(WRITE8(josvolly_state, mcu1_p2_w))
MCFG_DEVICE_ADD("mcu2", I8741, 12000000/2) /* ? */
MCFG_CPU_IO_MAP(josvolly_mcu2_io_map)
MCFG_MCS48_PORT_P1_IN_CB(READ8(josvolly_state, mcu2_p1_r))
MCFG_MCS48_PORT_P1_OUT_CB(WRITE8(josvolly_state, mcu2_p1_w))
MCFG_MCS48_PORT_P2_IN_CB(READ8(josvolly_state, mcu2_p2_r))
MCFG_MCS48_PORT_P2_OUT_CB(WRITE8(josvolly_state, mcu2_p2_w))
// TEST0 and TEST1 are driven by P20 and P21 on the other MCU
MCFG_MCS48_PORT_T0_IN_CB(DEVREAD8("mcu1", i8741_device, p2_r)) MCFG_DEVCB_RSHIFT(0)
MCFG_MCS48_PORT_T1_IN_CB(DEVREAD8("mcu1", i8741_device, p2_r)) MCFG_DEVCB_RSHIFT(1)
MCFG_DEVICE_ADD("aa_007", I8255, 0)
MCFG_I8255_IN_PORTA_CB(IOPORT("IN1")) // 1PL

4
src/mame/drivers/gyruss.cpp
View File

@ -234,8 +234,6 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( audio_cpu2_io_map, AS_IO, 8, gyruss_state )
AM_RANGE(0x00, 0xff) AM_DEVREAD("soundlatch2", generic_latch_8_device, read)
AM_RANGE(MCS48_PORT_P1, MCS48_PORT_P1) AM_WRITE(gyruss_dac_w)
AM_RANGE(MCS48_PORT_P2, MCS48_PORT_P2) AM_WRITE(gyruss_irq_clear_w)
ADDRESS_MAP_END
@ -481,6 +479,8 @@ static MACHINE_CONFIG_START( gyruss, gyruss_state )
MCFG_CPU_ADD("audio2", I8039, XTAL_8MHz)
MCFG_CPU_PROGRAM_MAP(audio_cpu2_map)
MCFG_CPU_IO_MAP(audio_cpu2_io_map)
MCFG_MCS48_PORT_P1_OUT_CB(WRITE8(gyruss_state, gyruss_dac_w))
MCFG_MCS48_PORT_P2_OUT_CB(WRITE8(gyruss_state, gyruss_irq_clear_w))
MCFG_QUANTUM_TIME(attotime::from_hz(6000))

26
src/mame/drivers/imds2.cpp
View File

@ -155,18 +155,6 @@ static ADDRESS_MAP_START(ioc_io_map , AS_IO , 8 , imds2_state)
AM_RANGE(0xf0 , 0xf8) AM_DEVREADWRITE("iocdma" , i8257_device , read , write)
ADDRESS_MAP_END
static ADDRESS_MAP_START(pio_io_map , AS_IO , 8 , imds2_state)
AM_RANGE(MCS48_PORT_P1 , MCS48_PORT_P1) AM_READWRITE(imds2_pio_port_p1_r , imds2_pio_port_p1_w)
AM_RANGE(MCS48_PORT_P2 , MCS48_PORT_P2) AM_READWRITE(imds2_pio_port_p2_r , imds2_pio_port_p2_w)
ADDRESS_MAP_END
static ADDRESS_MAP_START(kb_io_map , AS_IO , 8 , imds2_state)
AM_RANGE(MCS48_PORT_P1 , MCS48_PORT_P1) AM_WRITE(imds2_kb_port_p1_w)
AM_RANGE(MCS48_PORT_P2 , MCS48_PORT_P2) AM_READ(imds2_kb_port_p2_r)
AM_RANGE(MCS48_PORT_T0 , MCS48_PORT_T0) AM_READ(imds2_kb_port_t0_r)
AM_RANGE(MCS48_PORT_T1 , MCS48_PORT_T1) AM_READ(imds2_kb_port_t1_r)
ADDRESS_MAP_END
imds2_state::imds2_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig , type , tag),
m_ipccpu(*this , "ipccpu"),
@ -366,14 +354,14 @@ WRITE8_MEMBER(imds2_state::imds2_kb_port_p1_w)
m_kb_p1 = data;
}
READ8_MEMBER(imds2_state::imds2_kb_port_t0_r)
READ_LINE_MEMBER(imds2_state::imds2_kb_port_t0_r)
{
// T0 tied low
// It appears to be some kind of strapping option on kb hw
return 0;
}
READ8_MEMBER(imds2_state::imds2_kb_port_t1_r)
READ_LINE_MEMBER(imds2_state::imds2_kb_port_t1_r)
{
// T1 tied low
// It appears to be some kind of strapping option on kb hw
@ -869,11 +857,17 @@ static MACHINE_CONFIG_START(imds2 , imds2_state)
MCFG_SLOT_FIXED(true)
MCFG_CPU_ADD("iocpio" , I8041 , IOC_XTAL_Y3)
MCFG_CPU_IO_MAP(pio_io_map)
MCFG_MCS48_PORT_P1_IN_CB(READ8(imds2_state, imds2_pio_port_p1_r))
MCFG_MCS48_PORT_P1_OUT_CB(WRITE8(imds2_state, imds2_pio_port_p1_w))
MCFG_MCS48_PORT_P2_IN_CB(READ8(imds2_state, imds2_pio_port_p2_r))
MCFG_MCS48_PORT_P2_OUT_CB(WRITE8(imds2_state, imds2_pio_port_p2_w))
MCFG_QUANTUM_TIME(attotime::from_hz(100))
MCFG_CPU_ADD("kbcpu", I8741, XTAL_3_579545MHz) /* 3.579545 MHz */
MCFG_CPU_IO_MAP(kb_io_map)
MCFG_MCS48_PORT_P1_OUT_CB(WRITE8(imds2_state, imds2_kb_port_p1_w))
MCFG_MCS48_PORT_P2_IN_CB(READ8(imds2_state, imds2_kb_port_p2_r))
MCFG_MCS48_PORT_T0_IN_CB(READLINE(imds2_state, imds2_kb_port_t0_r))
MCFG_MCS48_PORT_T1_IN_CB(READLINE(imds2_state, imds2_kb_port_t1_r))
MCFG_QUANTUM_TIME(attotime::from_hz(100))
MCFG_CENTRONICS_ADD("centronics", centronics_devices, "printer")

25
src/mame/drivers/itt3030.cpp
View File

@ -255,7 +255,7 @@ public:
DECLARE_READ8_MEMBER(vsync_r);
DECLARE_WRITE8_MEMBER( beep_w );
DECLARE_WRITE8_MEMBER(bank_w);
DECLARE_READ8_MEMBER(kbd_matrix_r);
DECLARE_READ_LINE_MEMBER(kbd_matrix_r);
DECLARE_WRITE8_MEMBER(kbd_matrix_w);
DECLARE_READ8_MEMBER(kbd_port2_r);
DECLARE_WRITE8_MEMBER(kbd_port2_w);
@ -462,7 +462,7 @@ static ADDRESS_MAP_START( itt3030_io, AS_IO, 8, itt3030_state )
AM_RANGE(0xf6, 0xf6) AM_WRITE(bank_w)
ADDRESS_MAP_END
READ8_MEMBER(itt3030_state::kbd_matrix_r)
READ_LINE_MEMBER(itt3030_state::kbd_matrix_r)
{
return m_kbdread;
}
@ -494,17 +494,6 @@ READ8_MEMBER(itt3030_state::kbd_port2_r)
return m_kbdport2;
}
// Schematics + i8278 datasheet says:
// Port 1 goes to the keyboard matrix.
// bits 0-2 select bit to read back, bits 3-6 choose column to read from, bit 7 clocks the process (rising edge strobes the row, falling edge reads the data)
// T0 is the key matrix return
// pin 23 is the UPI-41 host IRQ line, it's unknown how it's connected to the Z80
static ADDRESS_MAP_START( kbdmcu_io, AS_IO, 8, itt3030_state )
AM_RANGE(MCS48_PORT_T0, MCS48_PORT_T0) AM_READ(kbd_matrix_r)
AM_RANGE(MCS48_PORT_P1, MCS48_PORT_P1) AM_WRITE(kbd_matrix_w)
AM_RANGE(MCS48_PORT_P2, MCS48_PORT_P2) AM_READWRITE(kbd_port2_r, kbd_port2_w)
ADDRESS_MAP_END
static INPUT_PORTS_START( itt3030 )
PORT_START("ROW.0")
PORT_BIT(0x0001, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("F4") PORT_CODE(KEYCODE_F4) PORT_CHAR(UCHAR_MAMEKEY(F4))
@ -673,8 +662,16 @@ static MACHINE_CONFIG_START( itt3030, itt3030_state )
MCFG_CPU_PROGRAM_MAP(itt3030_map)
MCFG_CPU_IO_MAP(itt3030_io)
// Schematics + i8278 datasheet says:
// Port 1 goes to the keyboard matrix.
// bits 0-2 select bit to read back, bits 3-6 choose column to read from, bit 7 clocks the process (rising edge strobes the row, falling edge reads the data)
// T0 is the key matrix return
// pin 23 is the UPI-41 host IRQ line, it's unknown how it's connected to the Z80
MCFG_CPU_ADD("kbdmcu", I8741, XTAL_6MHz)
MCFG_CPU_IO_MAP(kbdmcu_io)
MCFG_MCS48_PORT_T0_IN_CB(READLINE(itt3030_state, kbd_matrix_r))
MCFG_MCS48_PORT_P1_OUT_CB(WRITE8(itt3030_state, kbd_matrix_w))
MCFG_MCS48_PORT_P2_IN_CB(READ8(itt3030_state, kbd_port2_r))
MCFG_MCS48_PORT_P2_OUT_CB(WRITE8(itt3030_state, kbd_port2_w))
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)

4
src/mame/drivers/junofrst.cpp
View File

@ -337,8 +337,6 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( mcu_io_map, AS_IO, 8, junofrst_state )
AM_RANGE(0x00, 0xff) AM_DEVREAD("soundlatch2", generic_latch_8_device, read)
AM_RANGE(MCS48_PORT_P1, MCS48_PORT_P1) AM_DEVWRITE("dac", dac_byte_interface, write)
AM_RANGE(MCS48_PORT_P2, MCS48_PORT_P2) AM_WRITE(i8039_irqen_and_status_w)
ADDRESS_MAP_END
@ -425,6 +423,8 @@ static MACHINE_CONFIG_START( junofrst, junofrst_state )
MCFG_CPU_ADD("mcu", I8039,8000000) /* 8MHz crystal */
MCFG_CPU_PROGRAM_MAP(mcu_map)
MCFG_CPU_IO_MAP(mcu_io_map)
MCFG_MCS48_PORT_P1_OUT_CB(DEVWRITE8("dac", dac_byte_interface, write))
MCFG_MCS48_PORT_P2_OUT_CB(WRITE8(junofrst_state, i8039_irqen_and_status_w))
MCFG_WATCHDOG_ADD("watchdog")

21
src/mame/drivers/k28.cpp
View File

@ -81,8 +81,7 @@ public:
DECLARE_READ8_MEMBER(mcu_p1_r);
DECLARE_READ8_MEMBER(mcu_p2_r);
DECLARE_WRITE8_MEMBER(mcu_p2_w);
DECLARE_WRITE8_MEMBER(mcu_prog_w);
DECLARE_READ8_MEMBER(mcu_t1_r);
DECLARE_WRITE_LINE_MEMBER(mcu_prog_w);
DECLARE_INPUT_CHANGED_MEMBER(power_on);
void power_off();
@ -333,10 +332,9 @@ WRITE8_MEMBER(k28_state::mcu_p2_w)
m_phoneme = (m_phoneme & ~0xf) | (data & 0xf);
}
WRITE8_MEMBER(k28_state::mcu_prog_w)
WRITE_LINE_MEMBER(k28_state::mcu_prog_w)
{
// 8021 PROG: clock VFD driver
int state = (data) ? 1 : 0;
bool rise = state == 1 && !m_vfd_clock;
m_vfd_clock = state;
@ -374,19 +372,9 @@ WRITE8_MEMBER(k28_state::mcu_prog_w)
}
}
READ8_MEMBER(k28_state::mcu_t1_r)
{
// 8021 T1: SC-01 A/R pin
return m_speech->request() ? 1 : 0;
}
static ADDRESS_MAP_START( k28_mcu_map, AS_IO, 8, k28_state )
AM_RANGE(0x00, 0x00) AM_MIRROR(0xff) AM_WRITE(mcu_p0_w)
AM_RANGE(MCS48_PORT_P1, MCS48_PORT_P1) AM_READ(mcu_p1_r)
AM_RANGE(MCS48_PORT_P2, MCS48_PORT_P2) AM_READWRITE(mcu_p2_r, mcu_p2_w)
AM_RANGE(MCS48_PORT_PROG, MCS48_PORT_PROG) AM_WRITE(mcu_prog_w)
AM_RANGE(MCS48_PORT_T1, MCS48_PORT_T1) AM_READ(mcu_t1_r)
ADDRESS_MAP_END
@ -482,6 +470,11 @@ static MACHINE_CONFIG_START( k28, k28_state )
/* basic machine hardware */
MCFG_CPU_ADD("maincpu", I8021, XTAL_3_579545MHz)
MCFG_CPU_IO_MAP(k28_mcu_map)
MCFG_MCS48_PORT_P1_IN_CB(READ8(k28_state, mcu_p1_r))
MCFG_MCS48_PORT_P2_IN_CB(READ8(k28_state, mcu_p2_r))
MCFG_MCS48_PORT_P2_OUT_CB(WRITE8(k28_state, mcu_p2_w))
MCFG_MCS48_PORT_PROG_OUT_CB(WRITELINE(k28_state, mcu_prog_w))
MCFG_MCS48_PORT_T1_IN_CB(DEVREADLINE("speech", votrax_sc01_device, request)) // SC-01 A/R pin
MCFG_DEVICE_ADD("tms6100", TMS6100, XTAL_3_579545MHz) // CLK tied to 8021 ALE pin

10
src/mame/drivers/m63.cpp
View File

@ -191,7 +191,7 @@ public:
DECLARE_WRITE8_MEMBER(p1_w);
DECLARE_WRITE8_MEMBER(p2_w);
DECLARE_READ8_MEMBER(snd_status_r);
DECLARE_READ8_MEMBER(irq_r);
DECLARE_READ_LINE_MEMBER(irq_r);
DECLARE_READ8_MEMBER(snddata_r);
DECLARE_WRITE8_MEMBER(fghtbskt_samples_w);
SAMPLES_START_CB_MEMBER(fghtbskt_sh_start);
@ -432,7 +432,7 @@ READ8_MEMBER(m63_state::snd_status_r)
return m_sound_status;
}
READ8_MEMBER(m63_state::irq_r)
READ_LINE_MEMBER(m63_state::irq_r)
{
if (m_sound_irq)
{
@ -518,9 +518,6 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( i8039_port_map, AS_IO, 8, m63_state )
AM_RANGE(0x00, 0xff) AM_READWRITE(snddata_r, snddata_w)
AM_RANGE(MCS48_PORT_P1, MCS48_PORT_P1) AM_WRITE(p1_w)
AM_RANGE(MCS48_PORT_P2, MCS48_PORT_P2) AM_WRITE(p2_w)
AM_RANGE(MCS48_PORT_T1, MCS48_PORT_T1) AM_READ(irq_r)
ADDRESS_MAP_END
@ -762,6 +759,9 @@ static MACHINE_CONFIG_START( m63, m63_state )
MCFG_CPU_ADD("soundcpu",I8039,XTAL_12MHz/4) /* ????? */
MCFG_CPU_PROGRAM_MAP(i8039_map)
MCFG_CPU_IO_MAP(i8039_port_map)
MCFG_MCS48_PORT_P1_OUT_CB(WRITE8(m63_state, p1_w))
MCFG_MCS48_PORT_P2_OUT_CB(WRITE8(m63_state, p2_w))
MCFG_MCS48_PORT_T1_IN_CB(READLINE(m63_state, irq_r))
MCFG_CPU_PERIODIC_INT_DRIVER(m63_state, snd_irq, 60)
MCFG_MACHINE_START_OVERRIDE(m63_state,m63)

4
src/mame/drivers/megazone.cpp
View File

@ -130,8 +130,6 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( megazone_i8039_io_map, AS_IO, 8, megazone_state )
AM_RANGE(0x00, 0xff) AM_DEVREAD("soundlatch", generic_latch_8_device, read)
AM_RANGE(MCS48_PORT_P1, MCS48_PORT_P1) AM_DEVWRITE("dac", dac_byte_interface, write)
AM_RANGE(MCS48_PORT_P2, MCS48_PORT_P2) AM_WRITE(i8039_irqen_and_status_w)
ADDRESS_MAP_END
static INPUT_PORTS_START( megazone )
@ -252,6 +250,8 @@ static MACHINE_CONFIG_START( megazone, megazone_state )
MCFG_CPU_ADD("daccpu", I8039,14318000/2) /* 1/2 14MHz crystal */
MCFG_CPU_PROGRAM_MAP(megazone_i8039_map)
MCFG_CPU_IO_MAP(megazone_i8039_io_map)
MCFG_MCS48_PORT_P1_OUT_CB(DEVWRITE8("dac", dac_byte_interface, write))
MCFG_MCS48_PORT_P2_OUT_CB(WRITE8(megazone_state, i8039_irqen_and_status_w))
MCFG_QUANTUM_TIME(attotime::from_hz(900))

16
src/mame/drivers/microvsn.cpp
View File

@ -54,7 +54,7 @@ public:
DECLARE_WRITE8_MEMBER(i8021_p0_write);
DECLARE_WRITE8_MEMBER(i8021_p1_write);
DECLARE_WRITE8_MEMBER(i8021_p2_write);
DECLARE_READ8_MEMBER(i8021_t1_read);
DECLARE_READ_LINE_MEMBER(i8021_t1_read);
DECLARE_READ8_MEMBER(i8021_bus_read);
// TMS1100 interface
@ -388,7 +388,7 @@ WRITE8_MEMBER( microvision_state::i8021_p2_write )
}
READ8_MEMBER( microvision_state::i8021_t1_read )
READ_LINE_MEMBER( microvision_state::i8021_t1_read )
{
return m_t1;
}
@ -634,17 +634,17 @@ INPUT_PORTS_END
static ADDRESS_MAP_START( microvision_8021_io, AS_IO, 8, microvision_state )
AM_RANGE( 0x00, 0xFF ) AM_WRITE( i8021_p0_write )
AM_RANGE( MCS48_PORT_P0, MCS48_PORT_P0 ) AM_WRITE( i8021_p0_write )
AM_RANGE( MCS48_PORT_P1, MCS48_PORT_P1 ) AM_WRITE( i8021_p1_write )
AM_RANGE( MCS48_PORT_P2, MCS48_PORT_P2 ) AM_WRITE( i8021_p2_write )
AM_RANGE( MCS48_PORT_T1, MCS48_PORT_T1 ) AM_READ( i8021_t1_read )
AM_RANGE( MCS48_PORT_BUS, MCS48_PORT_BUS ) AM_READ( i8021_bus_read )
ADDRESS_MAP_END
static MACHINE_CONFIG_START( microvision, microvision_state )
MCFG_CPU_ADD("maincpu1", I8021, 2000000) // approximately
MCFG_CPU_IO_MAP( microvision_8021_io )
MCFG_CPU_IO_MAP(microvision_8021_io)
MCFG_MCS48_PORT_P1_OUT_CB(WRITE8(microvision_state, i8021_p1_write))
MCFG_MCS48_PORT_P2_OUT_CB(WRITE8(microvision_state, i8021_p2_write))
MCFG_MCS48_PORT_T1_IN_CB(READLINE(microvision_state, i8021_t1_read))
MCFG_MCS48_PORT_BUS_IN_CB(READ8(microvision_state, i8021_bus_read))
MCFG_CPU_ADD("maincpu2", TMS1100, 500000) // most games seem to be running at approximately this speed
MCFG_TMS1XXX_OUTPUT_PLA( microvision_output_pla_0 )
MCFG_TMS1XXX_READ_K_CB( READ8( microvision_state, tms1100_read_k ) )

5
src/mame/drivers/monzagp.cpp
View File

@ -403,8 +403,6 @@ WRITE8_MEMBER(monzagp_state::port2_w)
static ADDRESS_MAP_START( monzagp_io, AS_IO, 8, monzagp_state )
AM_RANGE(0x00, 0xff) AM_READWRITE(port_r, port_w)
AM_RANGE(MCS48_PORT_P1, MCS48_PORT_P1) AM_WRITE(port1_w)
AM_RANGE(MCS48_PORT_P2, MCS48_PORT_P2) AM_READWRITE(port2_r, port2_w)
ADDRESS_MAP_END
static INPUT_PORTS_START( monzagp )
@ -489,6 +487,9 @@ static MACHINE_CONFIG_START( monzagp, monzagp_state )
MCFG_CPU_ADD("maincpu", I8035, 12000000/4) /* 400KHz ??? - Main board Crystal is 12MHz */
MCFG_CPU_PROGRAM_MAP(monzagp_map)
MCFG_CPU_IO_MAP(monzagp_io)
MCFG_MCS48_PORT_P1_OUT_CB(WRITE8(monzagp_state, port1_w))
MCFG_MCS48_PORT_P2_IN_CB(READ8(monzagp_state, port2_r))
MCFG_MCS48_PORT_P2_OUT_CB(WRITE8(monzagp_state, port2_w))
MCFG_CPU_VBLANK_INT_DRIVER("screen", monzagp_state, irq0_line_hold)
/* video hardware */

21
src/mame/drivers/novagmcs48.cpp
View File

@ -104,21 +104,6 @@ MACHINE_RESET_MEMBER(novagmcs48_state, octo)
/******************************************************************************
Address Maps
******************************************************************************/
// Presto/Octo
static ADDRESS_MAP_START( presto_io, AS_IO, 8, novagmcs48_state )
ADDRESS_MAP_UNMAP_HIGH
AM_RANGE(MCS48_PORT_P1, MCS48_PORT_P1) AM_READ(presto_input_r) AM_WRITENOP
AM_RANGE(MCS48_PORT_P2, MCS48_PORT_P2) AM_WRITE(presto_control_w)
AM_RANGE(MCS48_PORT_BUS, MCS48_PORT_BUS) AM_WRITE(presto_mux_w)
ADDRESS_MAP_END
/******************************************************************************
Input Ports
******************************************************************************/
@ -157,11 +142,15 @@ INPUT_CHANGED_MEMBER(novagmcs48_state::octo_cpu_freq)
Machine Drivers
******************************************************************************/
// Presto/Octo
static MACHINE_CONFIG_START( presto, novagmcs48_state )
/* basic machine hardware */
MCFG_CPU_ADD("maincpu", I8049, 6000000) // LC circuit, measured
MCFG_CPU_IO_MAP(presto_io)
MCFG_MCS48_PORT_P1_IN_CB(READ8(novagmcs48_state, presto_input_r))
MCFG_MCS48_PORT_P2_OUT_CB(WRITE8(novagmcs48_state, presto_control_w))
MCFG_MCS48_PORT_BUS_OUT_CB(WRITE8(novagmcs48_state, presto_mux_w))
MCFG_TIMER_DRIVER_ADD_PERIODIC("display_decay", novagbase_state, display_decay_tick, attotime::from_msec(1))
MCFG_DEFAULT_LAYOUT(layout_novag_presto)

47
src/mame/drivers/odyssey2.cpp
View File

@ -52,7 +52,7 @@ public:
DECLARE_WRITE8_MEMBER(p1_write);
DECLARE_READ8_MEMBER(p2_read);
DECLARE_WRITE8_MEMBER(p2_write);
DECLARE_READ8_MEMBER(t1_read);
DECLARE_READ_LINE_MEMBER(t1_read);
DECLARE_DRIVER_INIT(odyssey2);
virtual void machine_start() override;
virtual void machine_reset() override;
@ -111,23 +111,12 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( odyssey2_io , AS_IO, 8, odyssey2_state )
AM_RANGE(0x00, 0xff) AM_READWRITE(io_read, io_write)
AM_RANGE(MCS48_PORT_P1, MCS48_PORT_P1) AM_READWRITE(p1_read, p1_write)
AM_RANGE(MCS48_PORT_P2, MCS48_PORT_P2) AM_READWRITE(p2_read, p2_write)
AM_RANGE(MCS48_PORT_BUS, MCS48_PORT_BUS) AM_READWRITE(bus_read, bus_write)
AM_RANGE(MCS48_PORT_T0, MCS48_PORT_T0) AM_DEVREAD("cartslot", o2_cart_slot_device, t0_read)
AM_RANGE(MCS48_PORT_T1, MCS48_PORT_T1) AM_READ(t1_read)
AM_RANGE(0x00, 0xff) AM_READWRITE(io_read, io_write)
ADDRESS_MAP_END
static ADDRESS_MAP_START( g7400_io , AS_IO, 8, g7400_state )
AM_RANGE(0x00, 0xff) AM_READWRITE(io_read, io_write)
AM_RANGE(MCS48_PORT_P1, MCS48_PORT_P1) AM_READWRITE(p1_read, p1_write)
AM_RANGE(MCS48_PORT_P2, MCS48_PORT_P2) AM_READWRITE(p2_read, p2_write)
AM_RANGE(MCS48_PORT_BUS, MCS48_PORT_BUS) AM_READWRITE(bus_read, bus_write)
AM_RANGE(MCS48_PORT_T0, MCS48_PORT_T0) AM_DEVREAD("cartslot", o2_cart_slot_device, t0_read)
AM_RANGE(MCS48_PORT_T1, MCS48_PORT_T1) AM_READ(t1_read)
AM_RANGE(MCS48_PORT_PROG, MCS48_PORT_PROG) AM_DEVWRITE("i8243", i8243_device, i8243_prog_w);
AM_RANGE(0x00, 0xff) AM_READWRITE(io_read, io_write)
ADDRESS_MAP_END
@ -471,7 +460,7 @@ uint32_t odyssey2_state::screen_update_odyssey2(screen_device &screen, bitmap_in
}
READ8_MEMBER(odyssey2_state::t1_read)
READ_LINE_MEMBER(odyssey2_state::t1_read)
{
if ( m_i8244->vblank() || m_i8244->hblank() )
{
@ -543,7 +532,7 @@ WRITE8_MEMBER(odyssey2_state::p2_write)
WRITE8_MEMBER(g7400_state::p2_write)
{
m_p2 = data;
m_i8243->i8243_p2_w( space, 0, m_p2 & 0x0f );
m_i8243->p2_w( space, 0, m_p2 & 0x0f );
}
@ -673,6 +662,14 @@ static MACHINE_CONFIG_START( odyssey2, odyssey2_state )
MCFG_CPU_ADD("maincpu", I8048, ( ( XTAL_7_15909MHz * 3 ) / 4 ) )
MCFG_CPU_PROGRAM_MAP(odyssey2_mem)
MCFG_CPU_IO_MAP(odyssey2_io)
MCFG_MCS48_PORT_P1_IN_CB(READ8(odyssey2_state, p1_read))
MCFG_MCS48_PORT_P1_OUT_CB(WRITE8(odyssey2_state, p1_write))
MCFG_MCS48_PORT_P2_IN_CB(READ8(odyssey2_state, p2_read))
MCFG_MCS48_PORT_P2_OUT_CB(WRITE8(odyssey2_state, p2_write))
MCFG_MCS48_PORT_BUS_IN_CB(READ8(odyssey2_state, bus_read))
MCFG_MCS48_PORT_BUS_OUT_CB(WRITE8(odyssey2_state, bus_write))
MCFG_MCS48_PORT_T0_IN_CB(DEVREADLINE("cartslot", o2_cart_slot_device, t0_read))
MCFG_MCS48_PORT_T1_IN_CB(READLINE(odyssey2_state, t1_read))
MCFG_QUANTUM_TIME(attotime::from_hz(60))
/* video hardware */
@ -725,6 +722,15 @@ static MACHINE_CONFIG_START( g7400, g7400_state )
MCFG_CPU_ADD("maincpu", I8048, XTAL_5_911MHz )
MCFG_CPU_PROGRAM_MAP(odyssey2_mem)
MCFG_CPU_IO_MAP(g7400_io)
MCFG_MCS48_PORT_P1_IN_CB(READ8(g7400_state, p1_read))
MCFG_MCS48_PORT_P1_OUT_CB(WRITE8(g7400_state, p1_write))
MCFG_MCS48_PORT_P2_IN_CB(READ8(g7400_state, p2_read))
MCFG_MCS48_PORT_P2_OUT_CB(WRITE8(g7400_state, p2_write))
MCFG_MCS48_PORT_BUS_IN_CB(READ8(g7400_state, bus_read))
MCFG_MCS48_PORT_BUS_OUT_CB(WRITE8(g7400_state, bus_write))
MCFG_MCS48_PORT_T0_IN_CB(DEVREADLINE("cartslot", o2_cart_slot_device, t0_read))
MCFG_MCS48_PORT_T1_IN_CB(READLINE(g7400_state, t1_read))
MCFG_MCS48_PORT_PROG_OUT_CB(DEVWRITELINE("i8243", i8243_device, prog_w))
MCFG_QUANTUM_TIME(attotime::from_hz(60))
/* video hardware */
@ -757,6 +763,15 @@ static MACHINE_CONFIG_START( odyssey3, g7400_state )
MCFG_CPU_ADD("maincpu", I8048, XTAL_5_911MHz )
MCFG_CPU_PROGRAM_MAP(odyssey2_mem)
MCFG_CPU_IO_MAP(g7400_io)
MCFG_MCS48_PORT_P1_IN_CB(READ8(g7400_state, p1_read))
MCFG_MCS48_PORT_P1_OUT_CB(WRITE8(g7400_state, p1_write))
MCFG_MCS48_PORT_P2_IN_CB(READ8(g7400_state, p2_read))
MCFG_MCS48_PORT_P2_OUT_CB(WRITE8(g7400_state, p2_write))
MCFG_MCS48_PORT_BUS_IN_CB(READ8(g7400_state, bus_read))
MCFG_MCS48_PORT_BUS_OUT_CB(WRITE8(g7400_state, bus_write))
MCFG_MCS48_PORT_T0_IN_CB(DEVREADLINE("cartslot", o2_cart_slot_device, t0_read))
MCFG_MCS48_PORT_T1_IN_CB(READLINE(g7400_state, t1_read))
MCFG_MCS48_PORT_PROG_OUT_CB(DEVWRITELINE("i8243", i8243_device, prog_w))
MCFG_QUANTUM_TIME(attotime::from_hz(60))
/* video hardware */

25
src/mame/drivers/othello.cpp
View File

@ -106,7 +106,6 @@ public:
DECLARE_WRITE8_MEMBER(ay_data_w);
DECLARE_READ8_MEMBER(n7751_rom_r);
DECLARE_READ8_MEMBER(n7751_command_r);
DECLARE_READ8_MEMBER(n7751_t1_r);
DECLARE_WRITE8_MEMBER(n7751_p2_w);
DECLARE_WRITE8_MEMBER(n7751_rom_control_w);
virtual void machine_start() override;
@ -314,28 +313,13 @@ WRITE8_MEMBER(othello_state::n7751_p2_w)
i8243_device *device = machine().device<i8243_device>("n7751_8243");
/* write to P2; low 4 bits go to 8243 */
device->i8243_p2_w(space, offset, data & 0x0f);
device->p2_w(space, offset, data & 0x0f);
/* output of bit $80 indicates we are ready (1) or busy (0) */
/* no other outputs are used */
m_n7751_busy = data;
}
READ8_MEMBER(othello_state::n7751_t1_r)
{
/* T1 - labelled as "TEST", connected to ground */
return 0;
}
static ADDRESS_MAP_START( n7751_portmap, AS_IO, 8, othello_state )
AM_RANGE(MCS48_PORT_T1, MCS48_PORT_T1) AM_READ(n7751_t1_r)
AM_RANGE(MCS48_PORT_P2, MCS48_PORT_P2) AM_READ(n7751_command_r)
AM_RANGE(MCS48_PORT_BUS, MCS48_PORT_BUS) AM_READ(n7751_rom_r)
AM_RANGE(MCS48_PORT_P1, MCS48_PORT_P1) AM_DEVWRITE("dac", dac_byte_interface, write)
AM_RANGE(MCS48_PORT_P2, MCS48_PORT_P2) AM_WRITE(n7751_p2_w)
AM_RANGE(MCS48_PORT_PROG, MCS48_PORT_PROG) AM_DEVWRITE("n7751_8243", i8243_device, i8243_prog_w)
ADDRESS_MAP_END
static INPUT_PORTS_START( othello )
PORT_START("DSW")
PORT_DIPNAME( 0x01, 0x00, DEF_STR( Cabinet ) ) PORT_DIPLOCATION("SW1:1")
@ -418,7 +402,12 @@ static MACHINE_CONFIG_START( othello, othello_state )
MCFG_CPU_IO_MAP(audio_portmap)
MCFG_CPU_ADD("n7751", N7751, XTAL_6MHz)
MCFG_CPU_IO_MAP(n7751_portmap)
MCFG_MCS48_PORT_T1_IN_CB(GND) // labelled as "TEST", connected to ground
MCFG_MCS48_PORT_P2_IN_CB(READ8(othello_state, n7751_command_r))
MCFG_MCS48_PORT_BUS_IN_CB(READ8(othello_state, n7751_rom_r))
MCFG_MCS48_PORT_P1_OUT_CB(DEVWRITE8("dac", dac_byte_interface, write))
MCFG_MCS48_PORT_P2_OUT_CB(WRITE8(othello_state, n7751_p2_w))
MCFG_MCS48_PORT_PROG_OUT_CB(DEVWRITELINE("n7751_8243", i8243_device, prog_w))
MCFG_I8243_ADD("n7751_8243", NOOP, WRITE8(othello_state,n7751_rom_control_w))

4
src/mame/drivers/pandoras.cpp
View File

@ -179,8 +179,6 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( pandoras_i8039_io_map, AS_IO, 8, pandoras_state )
AM_RANGE(0x00, 0xff) AM_DEVREAD("soundlatch2", generic_latch_8_device, read)
AM_RANGE(MCS48_PORT_P1, MCS48_PORT_P1) AM_DEVWRITE("dac", dac_byte_interface, write)
AM_RANGE(MCS48_PORT_P2, MCS48_PORT_P2) AM_WRITE(i8039_irqen_and_status_w)
ADDRESS_MAP_END
@ -340,6 +338,8 @@ static MACHINE_CONFIG_START( pandoras, pandoras_state )
MCFG_CPU_ADD("mcu", I8039, SOUND_CLOCK/2)
MCFG_CPU_PROGRAM_MAP(pandoras_i8039_map)
MCFG_CPU_IO_MAP(pandoras_i8039_io_map)
MCFG_MCS48_PORT_P1_OUT_CB(DEVWRITE8("dac", dac_byte_interface, write))
MCFG_MCS48_PORT_P2_OUT_CB(WRITE8(pandoras_state, i8039_irqen_and_status_w))
MCFG_QUANTUM_TIME(attotime::from_hz(6000)) /* 100 CPU slices per frame - needed for correct synchronization of the sound CPUs */

39
src/mame/drivers/pcw.cpp
View File

@ -819,13 +819,13 @@ WRITE8_MEMBER(pcw_state::mcu_printer_p2_w)
}
// Paper sensor
READ8_MEMBER(pcw_state::mcu_printer_t1_r)
READ_LINE_MEMBER(pcw_state::mcu_printer_t1_r)
{
return 1;
}
// Print head location (0 if at left margin, otherwise 1)
READ8_MEMBER(pcw_state::mcu_printer_t0_r)
READ_LINE_MEMBER(pcw_state::mcu_printer_t0_r)
{
if(m_printer_headpos == 0)
return 0;
@ -920,12 +920,12 @@ READ8_MEMBER(pcw_state::mcu_kb_data_r)
return 0xff;
}
READ8_MEMBER(pcw_state::mcu_kb_t1_r)
READ_LINE_MEMBER(pcw_state::mcu_kb_t1_r)
{
return 1;
}
READ8_MEMBER(pcw_state::mcu_kb_t0_r)
READ_LINE_MEMBER(pcw_state::mcu_kb_t0_r)
{
return 0;
}
@ -977,22 +977,6 @@ static ADDRESS_MAP_START(pcw9512_io, AS_IO, 8, pcw_state )
AM_RANGE(0x0fc, 0x0fd) AM_READWRITE(pcw9512_parallel_r, pcw9512_parallel_w)
ADDRESS_MAP_END
/* i8041 MCU */
static ADDRESS_MAP_START(pcw_printer_io, AS_IO, 8, pcw_state )
AM_RANGE(MCS48_PORT_P2, MCS48_PORT_P2) AM_READWRITE(mcu_printer_p2_r,mcu_printer_p2_w)
AM_RANGE(MCS48_PORT_P1, MCS48_PORT_P1) AM_READWRITE(mcu_printer_p1_r, mcu_printer_p1_w)
AM_RANGE(MCS48_PORT_T1, MCS48_PORT_T1) AM_READ(mcu_printer_t1_r)
AM_RANGE(MCS48_PORT_T0, MCS48_PORT_T0) AM_READ(mcu_printer_t0_r)
ADDRESS_MAP_END
static ADDRESS_MAP_START(pcw_keyboard_io, AS_IO, 8, pcw_state )
AM_RANGE(MCS48_PORT_P1, MCS48_PORT_P1) AM_READWRITE(mcu_kb_scan_r,mcu_kb_scan_w)
AM_RANGE(MCS48_PORT_P2, MCS48_PORT_P2) AM_READWRITE(mcu_kb_scan_high_r,mcu_kb_scan_high_w)
AM_RANGE(MCS48_PORT_T1, MCS48_PORT_T1) AM_READ(mcu_kb_t1_r)
AM_RANGE(MCS48_PORT_T0, MCS48_PORT_T0) AM_READ(mcu_kb_t0_r)
AM_RANGE(MCS48_PORT_BUS, MCS48_PORT_BUS) AM_READ(mcu_kb_data_r)
ADDRESS_MAP_END
TIMER_CALLBACK_MEMBER(pcw_state::setup_beep)
{
@ -1263,10 +1247,21 @@ static MACHINE_CONFIG_START( pcw, pcw_state )
MCFG_CPU_IO_MAP(pcw_io)
MCFG_CPU_ADD("printer_mcu", I8041, 11000000) // 11MHz
MCFG_CPU_IO_MAP(pcw_printer_io)
MCFG_MCS48_PORT_P2_IN_CB(READ8(pcw_state, mcu_printer_p2_r))
MCFG_MCS48_PORT_P2_OUT_CB(WRITE8(pcw_state, mcu_printer_p2_w))
MCFG_MCS48_PORT_P1_IN_CB(READ8(pcw_state, mcu_printer_p1_r))
MCFG_MCS48_PORT_P1_OUT_CB(WRITE8(pcw_state, mcu_printer_p1_w))
MCFG_MCS48_PORT_T1_IN_CB(READLINE(pcw_state, mcu_printer_t1_r))
MCFG_MCS48_PORT_T0_IN_CB(READLINE(pcw_state, mcu_printer_t0_r))
MCFG_CPU_ADD("keyboard_mcu", I8048, 5000000) // 5MHz
MCFG_CPU_IO_MAP(pcw_keyboard_io)
MCFG_MCS48_PORT_P1_IN_CB(READ8(pcw_state, mcu_kb_scan_r))
MCFG_MCS48_PORT_P1_OUT_CB(WRITE8(pcw_state, mcu_kb_scan_w))
MCFG_MCS48_PORT_P2_IN_CB(READ8(pcw_state, mcu_kb_scan_high_r))
MCFG_MCS48_PORT_P2_OUT_CB(WRITE8(pcw_state, mcu_kb_scan_high_w))
MCFG_MCS48_PORT_T1_IN_CB(READLINE(pcw_state, mcu_kb_t1_r))
MCFG_MCS48_PORT_T0_IN_CB(READLINE(pcw_state, mcu_kb_t0_r))
MCFG_MCS48_PORT_BUS_IN_CB(READ8(pcw_state, mcu_kb_data_r))
// MCFG_QUANTUM_TIME(attotime::from_hz(50))
MCFG_QUANTUM_PERFECT_CPU("maincpu")

13
src/mame/drivers/ql.cpp
View File

@ -167,7 +167,7 @@ public:
DECLARE_WRITE8_MEMBER( ipc_port1_w );
DECLARE_WRITE8_MEMBER( ipc_port2_w );
DECLARE_READ8_MEMBER( ipc_port2_r );
DECLARE_READ8_MEMBER( ipc_t1_r );
DECLARE_READ_LINE_MEMBER( ipc_t1_r );
DECLARE_READ8_MEMBER( ipc_bus_r );
DECLARE_WRITE_LINE_MEMBER( ql_baudx4_w );
DECLARE_WRITE_LINE_MEMBER( ql_comdata_w );
@ -440,7 +440,7 @@ WRITE8_MEMBER( ql_state::ipc_port2_w )
// ipc_t1_r -
//-------------------------------------------------
READ8_MEMBER( ql_state::ipc_t1_r )
READ_LINE_MEMBER( ql_state::ipc_t1_r )
{
return m_baudx4;
}
@ -503,10 +503,6 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( ipc_io, AS_IO, 8, ql_state )
AM_RANGE(0x00, 0x7f) AM_WRITE(ipc_w)
AM_RANGE(0x27, 0x28) AM_READNOP // IPC reads these to set P0 (bus) to Hi-Z mode
AM_RANGE(MCS48_PORT_P1, MCS48_PORT_P1) AM_WRITE(ipc_port1_w)
AM_RANGE(MCS48_PORT_P2, MCS48_PORT_P2) AM_READWRITE(ipc_port2_r, ipc_port2_w)
AM_RANGE(MCS48_PORT_T1, MCS48_PORT_T1) AM_READ(ipc_t1_r)
AM_RANGE(MCS48_PORT_BUS, MCS48_PORT_BUS) AM_READ(ipc_bus_r) AM_WRITENOP
ADDRESS_MAP_END
@ -899,6 +895,11 @@ static MACHINE_CONFIG_START( ql, ql_state )
MCFG_CPU_ADD(I8749_TAG, I8749, X4)
MCFG_CPU_IO_MAP(ipc_io)
MCFG_MCS48_PORT_P1_OUT_CB(WRITE8(ql_state, ipc_port1_w))
MCFG_MCS48_PORT_P2_IN_CB(READ8(ql_state, ipc_port2_r))
MCFG_MCS48_PORT_P2_OUT_CB(WRITE8(ql_state, ipc_port2_w))
MCFG_MCS48_PORT_T1_IN_CB(READLINE(ql_state, ipc_t1_r))
MCFG_MCS48_PORT_BUS_IN_CB(READ8(ql_state, ipc_bus_r))
// video hardware
MCFG_SCREEN_ADD(SCREEN_TAG, RASTER)

8
src/mame/drivers/quasar.cpp
View File

@ -103,9 +103,9 @@ READ8_MEMBER(quasar_state::quasar_sh_command_r)
return m_soundlatch->read(space, 0) + (ioport("DSW2")->read() & 0x30);
}
READ8_MEMBER(quasar_state::audio_t1_r)
READ_LINE_MEMBER(quasar_state::audio_t1_r)
{
return (m_soundlatch->read(space, 0) == 0);
return (m_soundlatch->read(machine().dummy_space(), 0) == 0);
}
// memory map taken from the manual
@ -144,8 +144,6 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( sound_portmap, AS_IO, 8, quasar_state )
AM_RANGE(0x00, 0x7f) AM_RAM
AM_RANGE(0x80, 0x80) AM_READ(quasar_sh_command_r)
AM_RANGE(MCS48_PORT_T1, MCS48_PORT_T1) AM_READ(audio_t1_r)
AM_RANGE(MCS48_PORT_P1, MCS48_PORT_P1) AM_DEVWRITE("dac", dac_byte_interface, write)
ADDRESS_MAP_END
/************************************************************************
@ -307,6 +305,8 @@ static MACHINE_CONFIG_START( quasar, quasar_state )
MCFG_CPU_ADD("soundcpu",I8035,6000000) /* 6MHz crystal divide by 15 in CPU */
MCFG_CPU_PROGRAM_MAP(sound_map)
MCFG_CPU_IO_MAP(sound_portmap)
MCFG_MCS48_PORT_T1_IN_CB(READLINE(quasar_state, audio_t1_r))
MCFG_MCS48_PORT_P1_OUT_CB(DEVWRITE8("dac", dac_byte_interface, write))
MCFG_MACHINE_START_OVERRIDE(quasar_state,quasar)
MCFG_MACHINE_RESET_OVERRIDE(quasar_state,quasar)

35
src/mame/drivers/segas16a.cpp
View File

@ -405,7 +405,7 @@ READ8_MEMBER( segas16a_state::n7751_p2_r )
{
// read from P2 - 8255's PC0-2 connects to 7751's S0-2 (P24-P26 on an 8048)
// bit 0x80 is an alternate way to control the sample on/off; doesn't appear to be used
return 0x80 | ((m_n7751_command & 0x07) << 4) | (m_n7751_i8243->i8243_p2_r(space, offset) & 0x0f);
return 0x80 | ((m_n7751_command & 0x07) << 4) | (m_n7751_i8243->p2_r(space, offset) & 0x0f);
}
@ -416,24 +416,13 @@ READ8_MEMBER( segas16a_state::n7751_p2_r )
WRITE8_MEMBER( segas16a_state::n7751_p2_w )
{
// write to P2; low 4 bits go to 8243
m_n7751_i8243->i8243_p2_w(space, offset, data & 0x0f);
m_n7751_i8243->p2_w(space, offset, data & 0x0f);
// output of bit $80 indicates we are ready (1) or busy (0)
// no other outputs are used
}
//-------------------------------------------------
// n7751_t1_r - MCU reads from the T1 line
//-------------------------------------------------
READ8_MEMBER( segas16a_state::n7751_t1_r )
{
// T1 - labelled as "TEST", connected to ground
return 0;
}
//**************************************************************************
// I8751 MCU READ/WRITE HANDLERS
@ -999,19 +988,6 @@ static ADDRESS_MAP_START( sound_no7751_portmap, AS_IO, 8, segas16a_state )
ADDRESS_MAP_END
//**************************************************************************
// N7751 SOUND GENERATOR CPU ADDRESS MAPS
//**************************************************************************
static ADDRESS_MAP_START( n7751_portmap, AS_IO, 8, segas16a_state )
AM_RANGE(MCS48_PORT_BUS, MCS48_PORT_BUS) AM_READ(n7751_rom_r)
AM_RANGE(MCS48_PORT_T1, MCS48_PORT_T1) AM_READ(n7751_t1_r)
AM_RANGE(MCS48_PORT_P1, MCS48_PORT_P1) AM_DEVWRITE("dac", dac_byte_interface, write)
AM_RANGE(MCS48_PORT_P2, MCS48_PORT_P2) AM_READWRITE(n7751_p2_r, n7751_p2_w)
AM_RANGE(MCS48_PORT_PROG, MCS48_PORT_PROG) AM_DEVWRITE("n7751_8243", i8243_device, i8243_prog_w)
ADDRESS_MAP_END
//**************************************************************************
// I8751 MCU ADDRESS MAPS
@ -1904,7 +1880,12 @@ static MACHINE_CONFIG_START( system16a, segas16a_state )
MCFG_CPU_IO_MAP(sound_portmap)
MCFG_CPU_ADD("n7751", N7751, 6000000)
MCFG_CPU_IO_MAP(n7751_portmap)
MCFG_MCS48_PORT_BUS_IN_CB(READ8(segas16a_state, n7751_rom_r))
MCFG_MCS48_PORT_T1_IN_CB(GND) // labelled as "TEST", connected to ground
MCFG_MCS48_PORT_P1_OUT_CB(DEVWRITE8("dac", dac_byte_interface, write))
MCFG_MCS48_PORT_P2_IN_CB(READ8(segas16a_state, n7751_p2_r))
MCFG_MCS48_PORT_P2_OUT_CB(WRITE8(segas16a_state, n7751_p2_w))
MCFG_MCS48_PORT_PROG_OUT_CB(DEVWRITELINE("n7751_8243", i8243_device, prog_w))
MCFG_I8243_ADD("n7751_8243", NOOP, WRITE8(segas16a_state,n7751_rom_offset_w))

13
src/mame/drivers/spacefb.cpp
View File

@ -243,14 +243,6 @@ static ADDRESS_MAP_START( spacefb_main_io_map, AS_IO, 8, spacefb_state )
ADDRESS_MAP_END
static ADDRESS_MAP_START( spacefb_audio_io_map, AS_IO, 8, spacefb_state )
AM_RANGE(MCS48_PORT_P1, MCS48_PORT_P1) AM_DEVWRITE("dac", dac_byte_interface, write)
AM_RANGE(MCS48_PORT_P2, MCS48_PORT_P2) AM_READ(audio_p2_r)
AM_RANGE(MCS48_PORT_T0, MCS48_PORT_T0) AM_READ(audio_t0_r)
AM_RANGE(MCS48_PORT_T1, MCS48_PORT_T1) AM_READ(audio_t1_r)
ADDRESS_MAP_END
/*************************************
*
@ -345,7 +337,10 @@ static MACHINE_CONFIG_START( spacefb, spacefb_state )
MCFG_CPU_ADD("audiocpu", I8035, SPACEFB_AUDIO_CPU_CLOCK)
MCFG_CPU_PROGRAM_MAP(spacefb_audio_map)
MCFG_CPU_IO_MAP(spacefb_audio_io_map)
MCFG_MCS48_PORT_P1_OUT_CB(DEVWRITE8("dac", dac_byte_interface, write))
MCFG_MCS48_PORT_P2_IN_CB(READ8(spacefb_state, audio_p2_r))
MCFG_MCS48_PORT_T0_IN_CB(READLINE(spacefb_state, audio_t0_r))
MCFG_MCS48_PORT_T1_IN_CB(READLINE(spacefb_state, audio_t1_r))
MCFG_QUANTUM_TIME(attotime::from_hz(180))

15
src/mame/drivers/spcforce.cpp
View File

@ -93,7 +93,7 @@ WRITE8_MEMBER(spcforce_state::SN76496_select_w)
if (~data & 0x10) m_sn3->write(space, 0, m_sn76496_latch);
}
READ8_MEMBER(spcforce_state::t0_r)
READ_LINE_MEMBER(spcforce_state::t0_r)
{
/* SN76496 status according to Al - not supported by MAME?? */
return machine().rand() & 1;
@ -135,13 +135,6 @@ static ADDRESS_MAP_START( spcforce_sound_map, AS_PROGRAM, 8, spcforce_state )
AM_RANGE(0x0000, 0x07ff) AM_ROM
ADDRESS_MAP_END
static ADDRESS_MAP_START( spcforce_sound_io_map, AS_IO, 8, spcforce_state )
AM_RANGE(MCS48_PORT_BUS, MCS48_PORT_BUS) AM_DEVREAD("soundlatch", generic_latch_8_device, read)
AM_RANGE(MCS48_PORT_P1, MCS48_PORT_P1) AM_WRITE(SN76496_latch_w)
AM_RANGE(MCS48_PORT_P2, MCS48_PORT_P2) AM_READWRITE(SN76496_select_r, SN76496_select_w)
AM_RANGE(MCS48_PORT_T0, MCS48_PORT_T0) AM_READ(t0_r)
ADDRESS_MAP_END
static INPUT_PORTS_START( spcforce )
PORT_START("DSW")
@ -291,7 +284,11 @@ static MACHINE_CONFIG_START( spcforce, spcforce_state )
MCFG_CPU_ADD("audiocpu", I8035, 6144000) /* divisor ??? */
MCFG_CPU_PROGRAM_MAP(spcforce_sound_map)
MCFG_CPU_IO_MAP(spcforce_sound_io_map)
MCFG_MCS48_PORT_BUS_IN_CB(DEVREAD8("soundlatch", generic_latch_8_device, read))
MCFG_MCS48_PORT_P1_OUT_CB(WRITE8(spcforce_state, SN76496_latch_w))
MCFG_MCS48_PORT_P2_IN_CB(READ8(spcforce_state, SN76496_select_r))
MCFG_MCS48_PORT_P2_OUT_CB(WRITE8(spcforce_state, SN76496_select_w))
MCFG_MCS48_PORT_T0_IN_CB(READLINE(spcforce_state, t0_r))
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)

10
src/mame/drivers/supstarf.cpp
View File

@ -34,7 +34,7 @@ public:
DECLARE_READ_LINE_MEMBER(contacts_r);
DECLARE_WRITE_LINE_MEMBER(displays_w);
DECLARE_WRITE8_MEMBER(driver_clk_w);
DECLARE_READ8_MEMBER(phase_detect_r);
DECLARE_READ_LINE_MEMBER(phase_detect_r);
DECLARE_WRITE8_MEMBER(lights_a_w);
DECLARE_WRITE8_MEMBER(lights_b_w);
@ -69,9 +69,6 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START(sound_io_map, AS_IO, 8, supstarf_state)
AM_RANGE(0x00, 0xff) AM_READWRITE(psg_latch_r, psg_latch_w)
AM_RANGE(MCS48_PORT_P1, MCS48_PORT_P1) AM_WRITE(port1_w)
AM_RANGE(MCS48_PORT_P2, MCS48_PORT_P2) AM_WRITE(port2_w)
AM_RANGE(MCS48_PORT_T1, MCS48_PORT_T1) AM_READ(phase_detect_r)
ADDRESS_MAP_END
READ8_MEMBER(supstarf_state::psg_latch_r)
@ -142,7 +139,7 @@ WRITE8_MEMBER(supstarf_state::driver_clk_w)
{
}
READ8_MEMBER(supstarf_state::phase_detect_r)
READ_LINE_MEMBER(supstarf_state::phase_detect_r)
{
return 0;
}
@ -176,6 +173,9 @@ static MACHINE_CONFIG_START(supstarf, supstarf_state)
MCFG_CPU_ADD("soundcpu", I8035, XTAL_5_0688MHz / 2) // from 8085 pin 37 (CLK OUT)
MCFG_CPU_PROGRAM_MAP(sound_map)
MCFG_CPU_IO_MAP(sound_io_map)
MCFG_MCS48_PORT_P1_OUT_CB(WRITE8(supstarf_state, port1_w))
MCFG_MCS48_PORT_P2_OUT_CB(WRITE8(supstarf_state, port2_w))
MCFG_MCS48_PORT_T1_IN_CB(READLINE(supstarf_state, phase_detect_r))
MCFG_GENERIC_LATCH_8_ADD("soundlatch1")
MCFG_GENERIC_LATCH_DATA_PENDING_CB(INPUTLINE("maincpu", I8085_RST55_LINE))

13
src/mame/drivers/tnzs.cpp
View File

@ -835,13 +835,6 @@ static ADDRESS_MAP_START( tnzsb_io_map, AS_IO, 8, tnzsb_state )
AM_RANGE(0x02, 0x02) AM_DEVREAD("soundlatch", generic_latch_8_device, read)
ADDRESS_MAP_END
static ADDRESS_MAP_START( i8742_map, AS_IO, 8, tnzs_mcu_state )
AM_RANGE(MCS48_PORT_P1, MCS48_PORT_P1) AM_READ(mcu_port1_r)
AM_RANGE(MCS48_PORT_P2, MCS48_PORT_P2) AM_READWRITE(mcu_port2_r, mcu_port2_w)
AM_RANGE(MCS48_PORT_T0, MCS48_PORT_T0) AM_READ_PORT("COIN1")
AM_RANGE(MCS48_PORT_T1, MCS48_PORT_T1) AM_READ_PORT("COIN2")
ADDRESS_MAP_END
static ADDRESS_MAP_START( jpopnics_main_map, AS_PROGRAM, 8, jpopnics_state )
AM_RANGE(0x0000, 0x7fff) AM_ROM
AM_RANGE(0x8000, 0xbfff) AM_DEVICE("mainbank", address_map_bank_device, amap8)
@ -1550,7 +1543,11 @@ MACHINE_CONFIG_END
static MACHINE_CONFIG_DERIVED_CLASS( tnzs, tnzs_base, tnzs_state )
MCFG_CPU_ADD("mcu", I8742, 12000000/2) /* 400KHz ??? - Main board Crystal is 12MHz */
MCFG_CPU_IO_MAP(i8742_map)
MCFG_MCS48_PORT_P1_IN_CB(READ8(tnzs_mcu_state, mcu_port1_r))
MCFG_MCS48_PORT_P2_IN_CB(READ8(tnzs_mcu_state, mcu_port2_r))
MCFG_MCS48_PORT_P2_OUT_CB(WRITE8(tnzs_mcu_state, mcu_port2_w))
MCFG_MCS48_PORT_T0_IN_CB(IOPORT("COIN1"))
MCFG_MCS48_PORT_T1_IN_CB(IOPORT("COIN2"))
MCFG_CPU_MODIFY("sub")
MCFG_CPU_PROGRAM_MAP(tnzs_sub_map)

25
src/mame/drivers/vega.cpp
View File

@ -141,7 +141,7 @@ public:
DECLARE_WRITE8_MEMBER(extern_w);
DECLARE_WRITE8_MEMBER(p2_w);
DECLARE_READ8_MEMBER(p2_r);
DECLARE_READ8_MEMBER(t1_r);
DECLARE_READ_LINE_MEMBER(t1_r);
DECLARE_WRITE8_MEMBER(rombank_w);
DECLARE_READ8_MEMBER(txtram_r);
@ -374,7 +374,7 @@ WRITE8_MEMBER(vega_state::p2_w)
m_p2_data=data;
}
READ8_MEMBER(vega_state::t1_r)
READ_LINE_MEMBER(vega_state::t1_r)
{
return machine().rand();
}
@ -390,21 +390,8 @@ static ADDRESS_MAP_START( vega_map, AS_PROGRAM, 8, vega_state )
AM_RANGE(0x800, 0xfff) AM_ROM
ADDRESS_MAP_END
/*
MCS48_PORT_P0 = 0x100,
MCS48_PORT_P1 = 0x101,
MCS48_PORT_P2 = 0x102,
MCS48_PORT_T0 = 0x110,
MCS48_PORT_T1 = 0x111,
MCS48_PORT_BUS = 0x120,
MCS48_PORT_PROG = 0x121 0/1
*/
static ADDRESS_MAP_START( vega_io_map, AS_IO, 8, vega_state )
AM_RANGE(0x00, 0xff) AM_READWRITE(extern_r, extern_w)
AM_RANGE(MCS48_PORT_P1, MCS48_PORT_P1) AM_READ_PORT("DSW") AM_WRITE(rombank_w) //101
AM_RANGE(MCS48_PORT_P2, MCS48_PORT_P2) AM_READWRITE(p2_r, p2_w)//102
AM_RANGE(MCS48_PORT_T1, MCS48_PORT_T1) AM_READ(t1_r) //111
AM_RANGE(MCS48_PORT_PROG, MCS48_PORT_PROG) AM_WRITENOP /* prog - inputs CLK */
ADDRESS_MAP_END
@ -803,11 +790,15 @@ void vega_state::machine_start()
static MACHINE_CONFIG_START( vega, vega_state )
MCFG_CPU_ADD("maincpu", I8035, 4000000)
MCFG_CPU_PROGRAM_MAP(vega_map)
MCFG_CPU_IO_MAP(vega_io_map)
MCFG_MCS48_PORT_P1_IN_CB(IOPORT("DSW"))
MCFG_MCS48_PORT_P1_OUT_CB(WRITE8(vega_state, rombank_w))
MCFG_MCS48_PORT_P2_IN_CB(READ8(vega_state, p2_r))
MCFG_MCS48_PORT_P2_OUT_CB(WRITE8(vega_state, p2_w))
MCFG_MCS48_PORT_T1_IN_CB(READLINE(vega_state, t1_r))
MCFG_MCS48_PORT_PROG_OUT_CB(NOOP) /* prog - inputs CLK */
MCFG_CPU_VBLANK_INT_DRIVER("screen", vega_state, irq0_line_hold)
MCFG_DEVICE_ADD("ppi8255", I8255A, 0)

30
src/mame/drivers/videopkr.cpp
View File

@ -349,8 +349,8 @@ public:
DECLARE_READ8_MEMBER(videopkr_p2_data_r);
DECLARE_WRITE8_MEMBER(videopkr_p1_data_w);
DECLARE_WRITE8_MEMBER(videopkr_p2_data_w);
DECLARE_READ8_MEMBER(videopkr_t0_latch);
DECLARE_WRITE8_MEMBER(prog_w);
DECLARE_READ_LINE_MEMBER(videopkr_t0_latch);
DECLARE_WRITE_LINE_MEMBER(prog_w);
DECLARE_READ8_MEMBER(sound_io_r);
DECLARE_WRITE8_MEMBER(sound_io_w);
DECLARE_READ8_MEMBER(sound_p2_r);
@ -751,14 +751,14 @@ WRITE8_MEMBER(videopkr_state::videopkr_p2_data_w)
m_p2 = data;
}
READ8_MEMBER(videopkr_state::videopkr_t0_latch)
READ_LINE_MEMBER(videopkr_state::videopkr_t0_latch)
{
return m_t0_latch;
}
WRITE8_MEMBER(videopkr_state::prog_w)
WRITE_LINE_MEMBER(videopkr_state::prog_w)
{
if (!data)
if (!state)
m_maincpu->set_input_line(0, CLEAR_LINE); /* clear interrupt FF */
}
@ -963,11 +963,7 @@ static ADDRESS_MAP_START( i8039_map, AS_PROGRAM, 8, videopkr_state )
ADDRESS_MAP_END
static ADDRESS_MAP_START( i8039_io_port, AS_IO, 8, videopkr_state )
AM_RANGE(0x00, 0xff ) AM_READWRITE(videopkr_io_r, videopkr_io_w)
AM_RANGE(MCS48_PORT_P1, MCS48_PORT_P1 ) AM_READWRITE(videopkr_p1_data_r, videopkr_p1_data_w)
AM_RANGE(MCS48_PORT_P2, MCS48_PORT_P2 ) AM_READWRITE(videopkr_p2_data_r, videopkr_p2_data_w)
AM_RANGE(MCS48_PORT_PROG, MCS48_PORT_PROG) AM_WRITE(prog_w)
AM_RANGE(MCS48_PORT_T0, MCS48_PORT_T0 ) AM_READ(videopkr_t0_latch)
AM_RANGE(0x00, 0xff) AM_READWRITE(videopkr_io_r, videopkr_io_w)
ADDRESS_MAP_END
static ADDRESS_MAP_START( i8039_sound_mem, AS_PROGRAM, 8, videopkr_state )
@ -975,9 +971,7 @@ static ADDRESS_MAP_START( i8039_sound_mem, AS_PROGRAM, 8, videopkr_state )
ADDRESS_MAP_END
static ADDRESS_MAP_START( i8039_sound_port, AS_IO, 8, videopkr_state )
AM_RANGE(0x00 , 0xff ) AM_READWRITE(sound_io_r, sound_io_w)
AM_RANGE(MCS48_PORT_P1, MCS48_PORT_P1) AM_DEVWRITE("dac", dac_byte_interface, write)
AM_RANGE(MCS48_PORT_P2, MCS48_PORT_P2) AM_READWRITE(sound_p2_r, sound_p2_w)
AM_RANGE(0x00, 0xff) AM_READWRITE(sound_io_r, sound_io_w)
ADDRESS_MAP_END
@ -1235,12 +1229,22 @@ static MACHINE_CONFIG_START( videopkr, videopkr_state )
MCFG_CPU_ADD("maincpu", I8039, CPU_CLOCK)
MCFG_CPU_PROGRAM_MAP(i8039_map)
MCFG_CPU_IO_MAP(i8039_io_port)
MCFG_MCS48_PORT_P1_IN_CB(READ8(videopkr_state, videopkr_p1_data_r))
MCFG_MCS48_PORT_P1_OUT_CB(WRITE8(videopkr_state, videopkr_p1_data_w))
MCFG_MCS48_PORT_P2_IN_CB(READ8(videopkr_state, videopkr_p2_data_r))
MCFG_MCS48_PORT_P2_OUT_CB(WRITE8(videopkr_state, videopkr_p1_data_w))
MCFG_MCS48_PORT_PROG_OUT_CB(WRITELINE(videopkr_state, prog_w))
MCFG_MCS48_PORT_T0_IN_CB(READLINE(videopkr_state, videopkr_t0_latch))
MCFG_CPU_VBLANK_INT_DRIVER("screen", videopkr_state, irq0_line_assert)
MCFG_CPU_ADD("soundcpu", I8039, SOUND_CLOCK)
MCFG_CPU_PROGRAM_MAP(i8039_sound_mem)
MCFG_CPU_IO_MAP(i8039_sound_port)
MCFG_MCS48_PORT_P1_OUT_CB(DEVWRITE8("dac", dac_byte_interface, write))
MCFG_MCS48_PORT_P2_IN_CB(READ8(videopkr_state, sound_p2_r))
MCFG_MCS48_PORT_P2_OUT_CB(WRITE8(videopkr_state, sound_p2_w))
MCFG_NVRAM_ADD_0FILL("nvram")
MCFG_TIMER_DRIVER_ADD_PERIODIC("t1_timer", videopkr_state, sound_t1_callback, attotime::from_hz(50))

2
src/mame/includes/advision.h
View File

@ -55,7 +55,7 @@ public:
DECLARE_READ8_MEMBER( controller_r );
DECLARE_WRITE8_MEMBER( bankswitch_w );
DECLARE_WRITE8_MEMBER( av_control_w );
DECLARE_READ8_MEMBER( vsync_r );
DECLARE_READ_LINE_MEMBER( vsync_r );
DECLARE_READ8_MEMBER( sound_cmd_r );
DECLARE_WRITE8_MEMBER( sound_g_w );
DECLARE_WRITE8_MEMBER( sound_d_w );

2
src/mame/includes/finalizr.h
View File

@ -54,7 +54,7 @@ public:
DECLARE_WRITE8_MEMBER(finalizr_flipscreen_w);
DECLARE_WRITE8_MEMBER(finalizr_i8039_irq_w);
DECLARE_WRITE8_MEMBER(i8039_irqen_w);
DECLARE_READ8_MEMBER(i8039_T1_r);
DECLARE_READ_LINE_MEMBER(i8039_T1_r);
DECLARE_WRITE8_MEMBER(i8039_T0_w);
DECLARE_WRITE8_MEMBER(finalizr_videoctrl_w);
TILE_GET_INFO_MEMBER(get_bg_tile_info);

8
src/mame/includes/gladiatr.h
View File

@ -106,17 +106,15 @@ public:
DECLARE_WRITE_LINE_MEMBER(gladiator_ym_irq);
DECLARE_WRITE_LINE_MEMBER(tclk_w);
DECLARE_READ8_MEMBER(cctl_t_r);
DECLARE_READ8_MEMBER(cctl_p1_r);
DECLARE_READ8_MEMBER(cctl_p2_r);
DECLARE_READ8_MEMBER(ccpu_t_r);
DECLARE_WRITE8_MEMBER(ccpu_p2_w);
DECLARE_READ8_MEMBER(tclk_r);
DECLARE_READ8_MEMBER(ucpu_t1_r);
DECLARE_READ_LINE_MEMBER(tclk_r);
DECLARE_READ_LINE_MEMBER(ucpu_t1_r);
DECLARE_READ8_MEMBER(ucpu_p1_r);
DECLARE_WRITE8_MEMBER(ucpu_p1_w);
DECLARE_READ8_MEMBER(ucpu_p2_r);
DECLARE_READ8_MEMBER(csnd_t1_r);
DECLARE_READ_LINE_MEMBER(csnd_t1_r);
DECLARE_READ8_MEMBER(csnd_p1_r);
DECLARE_WRITE8_MEMBER(csnd_p1_w);
DECLARE_READ8_MEMBER(csnd_p2_r);

1
src/mame/includes/gsword.h
View File

@ -121,7 +121,6 @@ public:
DECLARE_READ8_MEMBER(mcu1_p2_r);
DECLARE_READ8_MEMBER(mcu2_p1_r);
DECLARE_READ8_MEMBER(mcu2_p2_r);
DECLARE_READ8_MEMBER(mcu2_test_r);
DECLARE_WRITE8_MEMBER(cpu2_nmi_enable_w);
DECLARE_WRITE8_MEMBER(cpu2_irq_clear_w);

4
src/mame/includes/imds2.h
View File

@ -41,8 +41,8 @@ class imds2_state : public driver_device
DECLARE_READ8_MEMBER(imds2_kb_read);
DECLARE_READ8_MEMBER(imds2_kb_port_p2_r);
DECLARE_WRITE8_MEMBER(imds2_kb_port_p1_w);
DECLARE_READ8_MEMBER(imds2_kb_port_t0_r);
DECLARE_READ8_MEMBER(imds2_kb_port_t1_r);
DECLARE_READ_LINE_MEMBER(imds2_kb_port_t0_r);
DECLARE_READ_LINE_MEMBER(imds2_kb_port_t1_r);
DECLARE_WRITE8_MEMBER(imds2_ioc_dbbout_w);
DECLARE_WRITE8_MEMBER(imds2_ioc_f0_w);
DECLARE_WRITE8_MEMBER(imds2_ioc_set_f1_w);

4
src/mame/includes/mario.h
View File

@ -114,8 +114,8 @@ public:
DECLARE_WRITE8_MEMBER(mario_flip_w);
DECLARE_READ8_MEMBER(mario_sh_p1_r);
DECLARE_READ8_MEMBER(mario_sh_p2_r);
DECLARE_READ8_MEMBER(mario_sh_t0_r);
DECLARE_READ8_MEMBER(mario_sh_t1_r);
DECLARE_READ_LINE_MEMBER(mario_sh_t0_r);
DECLARE_READ_LINE_MEMBER(mario_sh_t1_r);
DECLARE_READ8_MEMBER(mario_sh_tune_r);
DECLARE_WRITE8_MEMBER(mario_sh_p1_w);
DECLARE_WRITE8_MEMBER(mario_sh_p2_w);

8
src/mame/includes/n8080.h
View File

@ -67,10 +67,10 @@ public:
DECLARE_WRITE8_MEMBER(n8080_sound_1_w);
DECLARE_WRITE8_MEMBER(n8080_sound_2_w);
DECLARE_READ8_MEMBER(n8080_8035_p1_r);
DECLARE_READ8_MEMBER(n8080_8035_t0_r);
DECLARE_READ8_MEMBER(n8080_8035_t1_r);
DECLARE_READ8_MEMBER(helifire_8035_t0_r);
DECLARE_READ8_MEMBER(helifire_8035_t1_r);
DECLARE_READ_LINE_MEMBER(n8080_8035_t0_r);
DECLARE_READ_LINE_MEMBER(n8080_8035_t1_r);
DECLARE_READ_LINE_MEMBER(helifire_8035_t0_r);
DECLARE_READ_LINE_MEMBER(helifire_8035_t1_r);
DECLARE_READ8_MEMBER(helifire_8035_external_ram_r);
DECLARE_READ8_MEMBER(helifire_8035_p2_r);
DECLARE_WRITE8_MEMBER(n8080_dac_w);

8
src/mame/includes/pcw.h
View File

@ -93,15 +93,15 @@ public:
DECLARE_WRITE8_MEMBER(mcu_printer_p1_w);
DECLARE_READ8_MEMBER(mcu_printer_p2_r);
DECLARE_WRITE8_MEMBER(mcu_printer_p2_w);
DECLARE_READ8_MEMBER(mcu_printer_t1_r);
DECLARE_READ8_MEMBER(mcu_printer_t0_r);
DECLARE_READ_LINE_MEMBER(mcu_printer_t1_r);
DECLARE_READ_LINE_MEMBER(mcu_printer_t0_r);
DECLARE_READ8_MEMBER(mcu_kb_scan_r);
DECLARE_WRITE8_MEMBER(mcu_kb_scan_w);
DECLARE_READ8_MEMBER(mcu_kb_scan_high_r);
DECLARE_WRITE8_MEMBER(mcu_kb_scan_high_w);
DECLARE_READ8_MEMBER(mcu_kb_data_r);
DECLARE_READ8_MEMBER(mcu_kb_t1_r);
DECLARE_READ8_MEMBER(mcu_kb_t0_r);
DECLARE_READ_LINE_MEMBER(mcu_kb_t1_r);
DECLARE_READ_LINE_MEMBER(mcu_kb_t0_r);
DECLARE_READ8_MEMBER(pcw9512_parallel_r);
DECLARE_WRITE8_MEMBER(pcw9512_parallel_w);
void mcu_transmit_serial(uint8_t bit);

2
src/mame/includes/quasar.h
View File

@ -25,7 +25,7 @@ public:
DECLARE_WRITE8_MEMBER(quasar_bullet_w);
DECLARE_WRITE8_MEMBER(quasar_sh_command_w);
DECLARE_READ8_MEMBER(quasar_sh_command_r);
DECLARE_READ8_MEMBER(audio_t1_r);
DECLARE_READ_LINE_MEMBER(audio_t1_r);
DECLARE_MACHINE_START(quasar);
DECLARE_MACHINE_RESET(quasar);
DECLARE_VIDEO_START(quasar);

1
src/mame/includes/segag80r.h
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@ -114,7 +114,6 @@ public:
DECLARE_WRITE8_MEMBER(spaceod_sound_w);
DECLARE_READ8_MEMBER(n7751_rom_r);
DECLARE_READ8_MEMBER(n7751_command_r);
DECLARE_READ8_MEMBER(n7751_t1_r);
DECLARE_INPUT_CHANGED_MEMBER(service_switch);
DECLARE_WRITE8_MEMBER(usb_ram_w);
DECLARE_WRITE8_MEMBER(sindbadm_soundport_w);

1
src/mame/includes/segas16a.h
View File

@ -74,7 +74,6 @@ public:
DECLARE_READ8_MEMBER( n7751_rom_r );
DECLARE_READ8_MEMBER( n7751_p2_r );
DECLARE_WRITE8_MEMBER( n7751_p2_w );
DECLARE_READ8_MEMBER( n7751_t1_r );
// I8751 MCU read/write handlers
DECLARE_WRITE8_MEMBER( mcu_control_w );

4
src/mame/includes/spacefb.h
View File

@ -58,8 +58,8 @@ public:
DECLARE_WRITE8_MEMBER(port_1_w);
DECLARE_WRITE8_MEMBER(port_2_w);
DECLARE_READ8_MEMBER(audio_p2_r);
DECLARE_READ8_MEMBER(audio_t0_r);
DECLARE_READ8_MEMBER(audio_t1_r);
DECLARE_READ_LINE_MEMBER(audio_t0_r);
DECLARE_READ_LINE_MEMBER(audio_t1_r);
virtual void machine_start() override;
virtual void machine_reset() override;

2
src/mame/includes/spcforce.h
View File

@ -43,7 +43,7 @@ public:
DECLARE_WRITE_LINE_MEMBER(write_sn1_ready);
DECLARE_WRITE_LINE_MEMBER(write_sn2_ready);
DECLARE_WRITE_LINE_MEMBER(write_sn3_ready);
DECLARE_READ8_MEMBER(t0_r);
DECLARE_READ_LINE_MEMBER(t0_r);
DECLARE_WRITE8_MEMBER(soundtrigger_w);
DECLARE_WRITE8_MEMBER(irq_mask_w);
DECLARE_WRITE8_MEMBER(flip_screen_w);

2
src/mame/includes/vicdual.h
View File

@ -113,7 +113,7 @@ public:
/*----------- defined in audio/carnival.c -----------*/
DECLARE_WRITE8_MEMBER( carnival_audio_1_w );
DECLARE_WRITE8_MEMBER( carnival_audio_2_w );
DECLARE_READ8_MEMBER( carnival_music_port_t1_r );
DECLARE_READ_LINE_MEMBER( carnival_music_port_t1_r );
DECLARE_WRITE8_MEMBER( carnival_music_port_1_w );
DECLARE_WRITE8_MEMBER( carnival_music_port_2_w );
void carnival_psg_latch(address_space &space);

2
src/mame/machine/advision.cpp
View File

@ -157,7 +157,7 @@ WRITE8_MEMBER( advision_state::av_control_w )
m_video_bank = (data & 0xe0) >> 5;
}
READ8_MEMBER( advision_state::vsync_r )
READ_LINE_MEMBER( advision_state::vsync_r )
{
if (m_frame_start)
{

20
src/mame/machine/compiskb.cpp
View File

@ -51,26 +51,18 @@ const tiny_rom_entry *compis_keyboard_device::device_rom_region() const
}
//-------------------------------------------------
// ADDRESS_MAP( compis_keyboard_io )
//-------------------------------------------------
static ADDRESS_MAP_START( compis_keyboard_io, AS_IO, 8, compis_keyboard_device )
AM_RANGE(MCS48_PORT_BUS, MCS48_PORT_BUS) AM_READWRITE(bus_r, bus_w)
AM_RANGE(MCS48_PORT_P1, MCS48_PORT_P1) AM_READ(p1_r) AM_WRITENOP
AM_RANGE(MCS48_PORT_P2, MCS48_PORT_P2) AM_READ(p2_r) AM_WRITENOP
AM_RANGE(MCS48_PORT_T0, MCS48_PORT_T0) AM_NOP
AM_RANGE(MCS48_PORT_T1, MCS48_PORT_T1) AM_NOP
ADDRESS_MAP_END
//-------------------------------------------------
// MACHINE_DRIVER( compis_keyboard )
//-------------------------------------------------
static MACHINE_CONFIG_FRAGMENT( compis_keyboard )
MCFG_CPU_ADD(I8748_TAG, I8748, 2016000) // XTAL_4_032MHz/2 ???
MCFG_CPU_IO_MAP(compis_keyboard_io)
MCFG_MCS48_PORT_BUS_IN_CB(READ8(compis_keyboard_device, bus_r))
MCFG_MCS48_PORT_BUS_OUT_CB(WRITE8(compis_keyboard_device, bus_w))
MCFG_MCS48_PORT_P1_IN_CB(READ8(compis_keyboard_device, p1_r))
MCFG_MCS48_PORT_P2_IN_CB(READ8(compis_keyboard_device, p2_r))
MCFG_MCS48_PORT_T0_IN_CB(NOOP) // ???
MCFG_MCS48_PORT_T1_IN_CB(NOOP) // ???
// sound hardware
MCFG_SPEAKER_STANDARD_MONO("mono")

10
src/mame/machine/dmv_keyb.cpp
View File

@ -27,15 +27,11 @@ ROM_START( dmv_keyboard )
ROM_END
static ADDRESS_MAP_START( dmv_keyboard_io, AS_IO, 8, dmv_keyboard_device )
AM_RANGE(MCS48_PORT_P1, MCS48_PORT_P1) AM_READ(port1_r)
AM_RANGE(MCS48_PORT_P2, MCS48_PORT_P2) AM_READWRITE(port2_r, port2_w)
ADDRESS_MAP_END
static MACHINE_CONFIG_FRAGMENT( dmv_keyboard )
MCFG_CPU_ADD("mcu", I8741, XTAL_6MHz)
MCFG_CPU_IO_MAP(dmv_keyboard_io)
MCFG_MCS48_PORT_P1_IN_CB(READ8(dmv_keyboard_device, port1_r))
MCFG_MCS48_PORT_P2_IN_CB(READ8(dmv_keyboard_device, port2_r))
MCFG_MCS48_PORT_P2_OUT_CB(WRITE8(dmv_keyboard_device, port2_w))
MACHINE_CONFIG_END

19
src/mame/machine/ibm6580_fdc.cpp
View File

@ -30,17 +30,14 @@ const tiny_rom_entry *dw_fdc_device::device_rom_region() const
return ROM_NAME( dw_fdc );
}
static ADDRESS_MAP_START( dw_fdc_io, AS_IO, 8, dw_fdc_device )
// AM_RANGE(MCS48_PORT_BUS, MCS48_PORT_BUS) AM_READWRITE(bus_r, bus_w)
AM_RANGE(MCS48_PORT_P1, MCS48_PORT_P1) AM_WRITE(p1_w)
AM_RANGE(MCS48_PORT_P2, MCS48_PORT_P2) AM_WRITE(p2_w)
// AM_RANGE(MCS48_PORT_T0, MCS48_PORT_T0) AM_READ(t0_r)
AM_RANGE(MCS48_PORT_T1, MCS48_PORT_T1) AM_READ(t1_r)
ADDRESS_MAP_END
static MACHINE_CONFIG_FRAGMENT( dw_fdc )
MCFG_CPU_ADD("mcu", I8048, XTAL_24MHz/4) // divisor is unverified
MCFG_CPU_IO_MAP(dw_fdc_io)
// MCFG_MCS48_PORT_BUS_IN_CB(READ8(dw_fdc_device, bus_r))
// MCFG_MCS48_PORT_BUS_OUT_CB(WRITE8(dw_fdc_device, bus_w))
MCFG_MCS48_PORT_P1_OUT_CB(WRITE8(dw_fdc_device, p1_w))
MCFG_MCS48_PORT_P2_OUT_CB(WRITE8(dw_fdc_device, p2_w))
// MCFG_MCS48_PORT_T0_IN_CB(READLINE(dw_fdc_device, t0_r))
MCFG_MCS48_PORT_T1_IN_CB(READLINE(dw_fdc_device, t1_r))
MCFG_DEVICE_ADD("ppi8255", I8255, 0)
@ -106,14 +103,14 @@ READ8_MEMBER( dw_fdc_device::p2_r )
return data;
}
READ8_MEMBER( dw_fdc_device::t0_r )
READ_LINE_MEMBER( dw_fdc_device::t0_r )
{
DBG_LOG(2,"t0",( "== %d\n", m_t0));
return m_t0;
}
READ8_MEMBER( dw_fdc_device::t1_r )
READ_LINE_MEMBER( dw_fdc_device::t1_r )
{
DBG_LOG(2,"t1",( "== %d\n", m_t1));

4
src/mame/machine/ibm6580_fdc.h
View File

@ -39,8 +39,8 @@ public:
DECLARE_WRITE8_MEMBER(p1_w);
DECLARE_WRITE8_MEMBER(p2_w);
DECLARE_READ8_MEMBER(p2_r);
DECLARE_READ8_MEMBER(t0_r);
DECLARE_READ8_MEMBER(t1_r);
DECLARE_READ_LINE_MEMBER(t0_r);
DECLARE_READ_LINE_MEMBER(t1_r);
DECLARE_WRITE_LINE_MEMBER(reset_w);
DECLARE_WRITE_LINE_MEMBER(ack_w);

20
src/mame/machine/ibm6580_kbd.cpp
View File

@ -29,17 +29,15 @@ const tiny_rom_entry *dw_keyboard_device::device_rom_region() const
return ROM_NAME( dw_keyboard );
}
static ADDRESS_MAP_START( dw_keyboard_io, AS_IO, 8, dw_keyboard_device )
AM_RANGE(MCS48_PORT_BUS, MCS48_PORT_BUS) AM_READWRITE(bus_r, bus_w)
AM_RANGE(MCS48_PORT_P1, MCS48_PORT_P1) AM_WRITE(p1_w)
AM_RANGE(MCS48_PORT_P2, MCS48_PORT_P2) AM_READWRITE(p2_r, p2_w)
AM_RANGE(MCS48_PORT_T0, MCS48_PORT_T0) AM_READ(t0_r)
AM_RANGE(MCS48_PORT_T1, MCS48_PORT_T1) AM_READ(t1_r)
ADDRESS_MAP_END
static MACHINE_CONFIG_FRAGMENT( dw_keyboard )
MCFG_CPU_ADD("mcu", I8049, XTAL_6MHz) // XXX RC oscillator
MCFG_CPU_IO_MAP(dw_keyboard_io)
MCFG_MCS48_PORT_BUS_IN_CB(READ8(dw_keyboard_device, bus_r))
MCFG_MCS48_PORT_BUS_OUT_CB(WRITE8(dw_keyboard_device, bus_w))
MCFG_MCS48_PORT_P1_OUT_CB(WRITE8(dw_keyboard_device, p1_w))
MCFG_MCS48_PORT_P2_IN_CB(READ8(dw_keyboard_device, p2_r))
MCFG_MCS48_PORT_P2_OUT_CB(WRITE8(dw_keyboard_device, p2_w))
MCFG_MCS48_PORT_T0_IN_CB(READLINE(dw_keyboard_device, t0_r))
MCFG_MCS48_PORT_T1_IN_CB(READLINE(dw_keyboard_device, t1_r))
MACHINE_CONFIG_END
machine_config_constructor dw_keyboard_device::device_mconfig_additions() const
@ -239,14 +237,14 @@ READ8_MEMBER( dw_keyboard_device::p2_r )
return data;
}
READ8_MEMBER( dw_keyboard_device::t0_r )
READ_LINE_MEMBER( dw_keyboard_device::t0_r )
{
DBG_LOG(3,"t0",( "== %d\n", m_ack));
return m_ack;
}
READ8_MEMBER( dw_keyboard_device::t1_r )
READ_LINE_MEMBER( dw_keyboard_device::t1_r )
{
DBG_LOG(2,"t1",( "== %d\n", m_keylatch));

4
src/mame/machine/ibm6580_kbd.h
View File

@ -36,8 +36,8 @@ public:
DECLARE_WRITE8_MEMBER(p1_w);
DECLARE_WRITE8_MEMBER(p2_w);
DECLARE_READ8_MEMBER(p2_r);
DECLARE_READ8_MEMBER(t0_r);
DECLARE_READ8_MEMBER(t1_r);
DECLARE_READ_LINE_MEMBER(t0_r);
DECLARE_READ_LINE_MEMBER(t1_r);
DECLARE_WRITE_LINE_MEMBER(reset_w);
DECLARE_WRITE_LINE_MEMBER(ack_w);

20
src/mame/machine/km035.cpp
View File

@ -49,14 +49,6 @@ static ADDRESS_MAP_START( km035_map, AS_PROGRAM, 8, km035_device )
AM_RANGE(0x0000, 0x07ff) AM_ROM
ADDRESS_MAP_END
static ADDRESS_MAP_START( km035_iomap, AS_IO, 8, km035_device )
AM_RANGE(MCS48_PORT_BUS, MCS48_PORT_BUS) AM_WRITE(bus_w)
AM_RANGE(MCS48_PORT_P1, MCS48_PORT_P1) AM_READWRITE(p1_r, p1_w)
AM_RANGE(MCS48_PORT_P2, MCS48_PORT_P2) AM_READWRITE(p2_r, p2_w)
AM_RANGE(MCS48_PORT_T0, MCS48_PORT_T0) AM_READ(t0_r)
AM_RANGE(MCS48_PORT_T1, MCS48_PORT_T1) AM_READ(t1_r)
ADDRESS_MAP_END
//-------------------------------------------------
// MACHINE_CONFIG
//-------------------------------------------------
@ -64,7 +56,13 @@ ADDRESS_MAP_END
static MACHINE_CONFIG_FRAGMENT( km035 )
MCFG_CPU_ADD(KM035_CPU_TAG, I8035, XTAL_4_608MHz)
MCFG_CPU_PROGRAM_MAP(km035_map)
MCFG_CPU_IO_MAP(km035_iomap)
MCFG_MCS48_PORT_BUS_OUT_CB(WRITE8(km035_device, bus_w))
MCFG_MCS48_PORT_P1_IN_CB(READ8(km035_device, p1_r))
MCFG_MCS48_PORT_P1_OUT_CB(WRITE8(km035_device, p1_w))
MCFG_MCS48_PORT_P2_IN_CB(READ8(km035_device, p2_r))
MCFG_MCS48_PORT_P2_OUT_CB(WRITE8(km035_device, p2_w))
MCFG_MCS48_PORT_T0_IN_CB(READLINE(km035_device, t0_r))
MCFG_MCS48_PORT_T1_IN_CB(READLINE(km035_device, t1_r))
MCFG_SPEAKER_STANDARD_MONO("mono")
MCFG_SOUND_ADD(KM035_SPK_TAG, BEEP, 3250)
@ -369,7 +367,7 @@ WRITE8_MEMBER( km035_device::bus_w )
// t0_r -
//-------------------------------------------------
READ8_MEMBER( km035_device::t0_r )
READ_LINE_MEMBER( km035_device::t0_r )
{
return m_keylatch;
}
@ -378,7 +376,7 @@ READ8_MEMBER( km035_device::t0_r )
// t1_r -
//-------------------------------------------------
READ8_MEMBER( km035_device::t1_r )
READ_LINE_MEMBER( km035_device::t1_r )
{
return m_rx;
}

4
src/mame/machine/km035.h
View File

@ -44,8 +44,8 @@ public:
DECLARE_WRITE8_MEMBER( p2_w );
DECLARE_READ8_MEMBER( p1_r );
DECLARE_READ8_MEMBER( p2_r );
DECLARE_READ8_MEMBER( t0_r );
DECLARE_READ8_MEMBER( t1_r );
DECLARE_READ_LINE_MEMBER( t0_r );
DECLARE_READ_LINE_MEMBER( t1_r );
DECLARE_WRITE_LINE_MEMBER( write_rxd );

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