Sprinter/mame
2
0
Fork 0
mirror of https://github.com/holub/mame synced 2025-04-24 09:20:02 +03:00
Code Issues Actions Packages Projects Releases Wiki Activity

hpz80unk.cpp: UART cleanup (nw)

Browse Source
This commit is contained in:
AJR 2018-03-04 21:36:12 -05:00
parent b59b8e1485
commit 48f7473754
1 changed files with 24 additions and 79 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

103
src/mame/drivers/hpz80unk.cpp
View File

@ -54,20 +54,13 @@ public:
: driver_device(mconfig, type, tag)
, m_maincpu(*this, "maincpu")
, m_p_rom(*this, "rom")
, m_uart1(*this, "uart1")
, m_uart2(*this, "uart2")
, m_uart3(*this, "uart3")
, m_uart(*this, "uart%u", 1)
{ }
DECLARE_READ8_MEMBER(port00_r);
DECLARE_READ8_MEMBER(port01_r);
DECLARE_READ8_MEMBER(port02_r);
DECLARE_READ8_MEMBER(port03_r);
DECLARE_READ8_MEMBER(port04_r);
DECLARE_READ8_MEMBER(port0d_r);
DECLARE_WRITE8_MEMBER(port01_w);
DECLARE_WRITE8_MEMBER(port04_w);
DECLARE_WRITE8_MEMBER(port0e_w);
DECLARE_READ8_MEMBER(portfc_r);
void hpz80unk(machine_config &config);
@ -78,27 +71,12 @@ private:
virtual void machine_reset() override;
required_device<cpu_device> m_maincpu;
required_shared_ptr<uint8_t> m_p_rom;
required_device<ay31015_device> m_uart1;
required_device<ay31015_device> m_uart2;
required_device<ay31015_device> m_uart3;
required_device_array<ay51013_device, 3> m_uart;
};
READ8_MEMBER( hpz80unk_state::port00_r )
{
return (m_uart1->dav_r() << 1) | (m_uart1->tbmt_r()) | 0xfc;
}
READ8_MEMBER( hpz80unk_state::port01_r )
{
m_uart1->write_rdav(0);
uint8_t result = m_uart1->get_received_data();
m_uart1->write_rdav(1);
return result;
}
WRITE8_MEMBER( hpz80unk_state::port01_w )
{
m_uart1->set_transmit_data(data);
return (m_uart[0]->dav_r() << 1) | (m_uart[0]->tbmt_r()) | 0xfc;
}
READ8_MEMBER( hpz80unk_state::port02_r )
@ -109,30 +87,12 @@ READ8_MEMBER( hpz80unk_state::port02_r )
READ8_MEMBER( hpz80unk_state::port03_r )
{
return (m_uart2->dav_r() << 1) | (m_uart2->tbmt_r()) | 0xfc;
}
READ8_MEMBER( hpz80unk_state::port04_r )
{
m_uart2->write_rdav(0);
uint8_t result = m_uart2->get_received_data();
m_uart2->write_rdav(1);
return result;
}
WRITE8_MEMBER( hpz80unk_state::port04_w )
{
m_uart2->set_transmit_data(data);
return (m_uart[1]->dav_r() << 1) | (m_uart[1]->tbmt_r()) | 0xfc;
}
READ8_MEMBER( hpz80unk_state::port0d_r )
{
return (m_uart3->dav_r() << 1) | (m_uart3->tbmt_r()) | 0xfc;
}
WRITE8_MEMBER( hpz80unk_state::port0e_w )
{
m_uart3->set_transmit_data(data);
return (m_uart[2]->dav_r() << 1) | (m_uart[2]->tbmt_r()) | 0xfc;
}
READ8_MEMBER( hpz80unk_state::portfc_r )
@ -150,12 +110,12 @@ ADDRESS_MAP_START(hpz80unk_state::hpz80unk_io)
ADDRESS_MAP_UNMAP_HIGH
ADDRESS_MAP_GLOBAL_MASK(0xff)
AM_RANGE(0x00, 0x00) AM_READ(port00_r) // uart1 status
AM_RANGE(0x01, 0x01) AM_READWRITE(port01_r,port01_w) // uart1 data
AM_RANGE(0x01, 0x01) AM_DEVREADWRITE("uart1", ay31015_device, receive, transmit) // uart1 data
AM_RANGE(0x02, 0x02) AM_READ(port02_r)
AM_RANGE(0x03, 0x03) AM_READ(port03_r) // uart2 status
AM_RANGE(0x04, 0x04) AM_READWRITE(port04_r,port04_w) // uart2 data
AM_RANGE(0x04, 0x04) AM_DEVREADWRITE("uart2", ay31015_device, receive, transmit) // uart2 data
AM_RANGE(0x0d, 0x0d) AM_READ(port0d_r) // uart3 status
AM_RANGE(0x0e, 0x0e) AM_WRITE(port0e_w) // uart3 data
AM_RANGE(0x0e, 0x0e) AM_DEVWRITE("uart3", ay31015_device, transmit) // uart3 data
AM_RANGE(0x1d, 0x1e) // top of memory is written here, big-endian
AM_RANGE(0x1f, 0x1f) AM_READ_PORT("DSW") // select which uarts to use
AM_RANGE(0xfc, 0xfc) AM_READ(portfc_r)
@ -180,38 +140,20 @@ void hpz80unk_state::machine_reset()
m_maincpu->set_pc(0xc000);
// no idea if these are hard-coded, or programmable
m_uart1->write_xr(0);
m_uart1->write_xr(1);
m_uart1->write_swe(0);
m_uart1->write_np(1);
m_uart1->write_tsb(0);
m_uart1->write_nb1(1);
m_uart1->write_nb2(1);
m_uart1->write_eps(1);
m_uart1->write_cs(1);
m_uart1->write_cs(0);
for (auto &uart : m_uart)
{
uart->write_xr(0);
uart->write_xr(1);
uart->write_swe(0);
uart->write_np(1);
uart->write_tsb(0);
uart->write_nb1(1);
uart->write_nb2(1);
uart->write_eps(1);
uart->write_cs(1);
uart->write_cs(0);
}
m_uart2->write_xr(0);
m_uart2->write_xr(1);
m_uart2->write_swe(0);
m_uart2->write_np(1);
m_uart2->write_tsb(0);
m_uart2->write_nb1(1);
m_uart2->write_nb2(1);
m_uart2->write_eps(1);
m_uart2->write_cs(1);
m_uart2->write_cs(0);
m_uart3->write_xr(0);
m_uart3->write_xr(1);
m_uart3->write_swe(0);
m_uart3->write_np(1);
m_uart3->write_tsb(0);
m_uart3->write_nb1(1);
m_uart3->write_nb2(1);
m_uart3->write_eps(1);
m_uart3->write_cs(1);
m_uart3->write_cs(0);
// this should be rom/ram banking
}
@ -228,6 +170,7 @@ MACHINE_CONFIG_START(hpz80unk_state::hpz80unk)
MCFG_AY51013_RX_CLOCK(153600)
MCFG_AY51013_READ_SI_CB(DEVREADLINE("rs232a", rs232_port_device, rxd_r))
MCFG_AY51013_WRITE_SO_CB(DEVWRITELINE("rs232a", rs232_port_device, write_txd))
MCFG_AY51013_AUTO_RDAV(true)
MCFG_RS232_PORT_ADD("rs232a", default_rs232_devices, "terminal")
MCFG_DEVICE_ADD("uart2", AY51013, 0) // COM2502
@ -235,6 +178,7 @@ MACHINE_CONFIG_START(hpz80unk_state::hpz80unk)
MCFG_AY51013_RX_CLOCK(153600)
MCFG_AY51013_READ_SI_CB(DEVREADLINE("rs232b", rs232_port_device, rxd_r))
MCFG_AY51013_WRITE_SO_CB(DEVWRITELINE("rs232b", rs232_port_device, write_txd))
MCFG_AY51013_AUTO_RDAV(true)
MCFG_RS232_PORT_ADD("rs232b", default_rs232_devices, nullptr)
MCFG_DEVICE_ADD("uart3", AY51013, 0) // COM2502
@ -242,6 +186,7 @@ MACHINE_CONFIG_START(hpz80unk_state::hpz80unk)
MCFG_AY51013_RX_CLOCK(153600)
MCFG_AY51013_READ_SI_CB(DEVREADLINE("rs232c", rs232_port_device, rxd_r))
MCFG_AY51013_WRITE_SO_CB(DEVWRITELINE("rs232c", rs232_port_device, write_txd))
MCFG_AY51013_AUTO_RDAV(true)
MCFG_RS232_PORT_ADD("rs232c", default_rs232_devices, nullptr)
MACHINE_CONFIG_END