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more debug consistency. (nw)

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This commit is contained in:
smf- 2016-09-28 12:58:26 +01:00
parent 07ef5054f5
commit 48fd80f624
9 changed files with 76 additions and 176 deletions
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6
src/devices/cpu/dsp56k/dsp56k.cpp
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@ -421,7 +421,6 @@ void dsp56k_device::device_reset()
logerror("Dsp56k reset\n"); logerror("Dsp56k reset\n");
m_dsp56k_core.interrupt_cycles = 0; m_dsp56k_core.interrupt_cycles = 0;
m_dsp56k_core.ppc = 0x0000;
m_dsp56k_core.repFlag = 0; m_dsp56k_core.repFlag = 0;
m_dsp56k_core.repAddr = 0x0000; m_dsp56k_core.repAddr = 0x0000;
@ -431,6 +430,8 @@ void dsp56k_device::device_reset()
agu_reset(&m_dsp56k_core); agu_reset(&m_dsp56k_core);
alu_reset(&m_dsp56k_core); alu_reset(&m_dsp56k_core);
m_dsp56k_core.ppc = m_dsp56k_core.PCU.pc;
/* HACK - Put a jump to 0x0000 at 0x0000 - this keeps the CPU locked to the instruction at address 0x0000 */ /* HACK - Put a jump to 0x0000 at 0x0000 - this keeps the CPU locked to the instruction at address 0x0000 */
m_dsp56k_core.program->write_word(0x0000, 0x0124); m_dsp56k_core.program->write_word(0x0000, 0x0124);
} }
@ -450,9 +451,10 @@ void dsp56k_device::device_reset()
static size_t execute_one_new(dsp56k_core* cpustate) static size_t execute_one_new(dsp56k_core* cpustate)
{ {
// For MAME // For MAME
cpustate->op = ROPCODE(ADDRESS(PC)); cpustate->ppc = PC;
debugger_instruction_hook(cpustate->device, PC); debugger_instruction_hook(cpustate->device, PC);
cpustate->op = ROPCODE(ADDRESS(PC));
UINT16 w0 = ROPCODE(ADDRESS(PC)); UINT16 w0 = ROPCODE(ADDRESS(PC));
UINT16 w1 = ROPCODE(ADDRESS(PC) + ADDRESS(1)); UINT16 w1 = ROPCODE(ADDRESS(PC) + ADDRESS(1));

27
src/devices/cpu/dsp56k/dsp56ops.hxx
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@ -240,9 +240,10 @@ static void execute_one(dsp56k_core* cpustate)
UINT8 cycle_count = 0; UINT8 cycle_count = 0;
/* For MAME */ /* For MAME */
cpustate->op = ROPCODE(ADDRESS(PC)); cpustate->ppc = PC;
debugger_instruction_hook(cpustate->device, PC); debugger_instruction_hook(cpustate->device, PC);
cpustate->op = ROPCODE(ADDRESS(PC));
/* The words we're going to be working with */ /* The words we're going to be working with */
op = ROPCODE(ADDRESS(PC)); op = ROPCODE(ADDRESS(PC));
op2 = ROPCODE(ADDRESS(PC) + ADDRESS(1)); op2 = ROPCODE(ADDRESS(PC) + ADDRESS(1));
@ -2499,10 +2500,7 @@ static size_t dsp56k_op_bcc(dsp56k_core* cpustate, const UINT16 op, const UINT16
{ {
INT16 offset = (INT16)op2; INT16 offset = (INT16)op2;
PC += 2; PC += offset + 2;
cpustate->ppc = PC;
PC += offset;
cycles += 4; cycles += 4;
return 0; return 0;
@ -2527,10 +2525,7 @@ static size_t dsp56k_op_bcc_1(dsp56k_core* cpustate, const UINT16 op, UINT8* cyc
{ {
INT16 offset = (INT16)assemble_address_from_6bit_signed_relative_short_address(cpustate, BITS(op,0x003f)); INT16 offset = (INT16)assemble_address_from_6bit_signed_relative_short_address(cpustate, BITS(op,0x003f));
PC += 1; PC += offset + 1;
cpustate->ppc = PC;
PC += offset;
cycles += 4; cycles += 4;
return 0; return 0;
@ -2572,7 +2567,6 @@ static size_t dsp56k_op_bra_1(dsp56k_core* cpustate, const UINT16 op, UINT8* cyc
PC += 1; PC += 1;
/* Jump */ /* Jump */
cpustate->ppc = PC;
PC += branchOffset; PC += branchOffset;
/* S L E U N Z V C */ /* S L E U N Z V C */
@ -2597,7 +2591,6 @@ static size_t dsp56k_op_brkcc(dsp56k_core* cpustate, const UINT16 op, UINT8* cyc
if (shouldBreak) if (shouldBreak)
{ {
/* TODO: I think this PC = LA thing is off-by-1, but it's working this way because its consistently so */ /* TODO: I think this PC = LA thing is off-by-1, but it's working this way because its consistently so */
cpustate->ppc = PC;
PC = LA; PC = LA;
SR = SSL; /* TODO: A-83. I believe only the Loop Flag and Forever Flag come back here. */ SR = SSL; /* TODO: A-83. I believe only the Loop Flag and Forever Flag come back here. */
@ -2637,7 +2630,6 @@ static size_t dsp56k_op_bscc(dsp56k_core* cpustate, const UINT16 op, const UINT1
SSL = SR; SSL = SR;
/* Change */ /* Change */
cpustate->ppc = PC;
PC = PC + (INT16)op2; PC = PC + (INT16)op2;
/* S L E U N Z V C */ /* S L E U N Z V C */
@ -2672,7 +2664,6 @@ static size_t dsp56k_op_bsr(dsp56k_core* cpustate, const UINT16 op, const UINT16
SSL = SR; SSL = SR;
/* Change */ /* Change */
cpustate->ppc = PC;
PC = PC + (INT16)op2; PC = PC + (INT16)op2;
/* S L E U N Z V C */ /* S L E U N Z V C */
@ -2838,7 +2829,6 @@ static size_t dsp56k_op_do_1(dsp56k_core* cpustate, const UINT16 op, const UINT1
else else
{ {
/* Skip over the contents of the loop */ /* Skip over the contents of the loop */
cpustate->ppc = PC;
PC = PC + 2 + op2; PC = PC + 2 + op2;
cycles += 10; /* TODO: + mv oscillator cycles */ cycles += 10; /* TODO: + mv oscillator cycles */
@ -2908,7 +2898,6 @@ static size_t dsp56k_op_do_2(dsp56k_core* cpustate, const UINT16 op, const UINT1
else else
{ {
/* Skip over the contents of the loop */ /* Skip over the contents of the loop */
cpustate->ppc = PC;
PC = PC + 2 + op2; PC = PC + 2 + op2;
cycles += 10; /* TODO: + mv oscillator cycles */ cycles += 10; /* TODO: + mv oscillator cycles */
@ -3048,7 +3037,6 @@ static size_t dsp56k_op_jcc_1(dsp56k_core* cpustate, const UINT16 op, UINT8* cyc
/* JMP : 0000 0001 0011 01-- xxxx xxxx xxxx xxxx : A-110 */ /* JMP : 0000 0001 0011 01-- xxxx xxxx xxxx xxxx : A-110 */
static size_t dsp56k_op_jmp(dsp56k_core* cpustate, const UINT16 op, const UINT16 op2, UINT8* cycles) static size_t dsp56k_op_jmp(dsp56k_core* cpustate, const UINT16 op, const UINT16 op2, UINT8* cycles)
{ {
cpustate->ppc = PC;
PC = op2; PC = op2;
/* S L E U N Z V C */ /* S L E U N Z V C */
@ -3064,7 +3052,6 @@ static size_t dsp56k_op_jmp_1(dsp56k_core* cpustate, const UINT16 op, UINT8* cyc
typed_pointer R = { nullptr, DT_BYTE }; typed_pointer R = { nullptr, DT_BYTE };
decode_RR_table(cpustate, BITS(op,0x0003), &R); decode_RR_table(cpustate, BITS(op,0x0003), &R);
cpustate->ppc = PC;
PC = *((UINT16*)R.addr); PC = *((UINT16*)R.addr);
/* S L E U N Z V C */ /* S L E U N Z V C */
@ -3091,7 +3078,6 @@ static size_t dsp56k_op_jscc(dsp56k_core* cpustate, const UINT16 op, const UINT1
SSH = PC; SSH = PC;
SSL = SR; SSL = SR;
cpustate->ppc = PC;
PC = branchOffset; PC = branchOffset;
cycles += 4; /* TODO: +jx oscillator clock cycles */ cycles += 4; /* TODO: +jx oscillator clock cycles */
@ -3133,7 +3119,6 @@ static size_t dsp56k_op_jsr(dsp56k_core* cpustate, const UINT16 op, const UINT16
SSH = cpustate->ppc; SSH = cpustate->ppc;
SSL = SR; SSL = SR;
cpustate->ppc = cpustate->ppc;
PC = branchOffset; PC = branchOffset;
} }
else else
@ -3143,7 +3128,6 @@ static size_t dsp56k_op_jsr(dsp56k_core* cpustate, const UINT16 op, const UINT16
SSH = PC; SSH = PC;
SSL = SR; SSL = SR;
cpustate->ppc = PC;
PC = branchOffset; PC = branchOffset;
} }
@ -3863,7 +3847,6 @@ static size_t dsp56k_op_rti(dsp56k_core* cpustate, const UINT16 op, UINT8* cycle
return 0; return 0;
} }
cpustate->ppc = PC;
PC = SSH; PC = SSH;
SR = SSL; SR = SSL;
@ -3880,7 +3863,6 @@ static size_t dsp56k_op_rti(dsp56k_core* cpustate, const UINT16 op, UINT8* cycle
static size_t dsp56k_op_rts(dsp56k_core* cpustate, const UINT16 op, UINT8* cycles) static size_t dsp56k_op_rts(dsp56k_core* cpustate, const UINT16 op, UINT8* cycles)
{ {
/* Pop */ /* Pop */
cpustate->ppc = PC;
PC = SSH; PC = SSH;
/* SR = SSL; The status register is not affected. */ /* SR = SSL; The status register is not affected. */
@ -4586,7 +4568,6 @@ static void dsp56k_process_loop(dsp56k_core* cpustate)
{ {
LC--; LC--;
cpustate->ppc = PC;
PC = SSH; PC = SSH;
} }
} }

1
src/devices/cpu/dsp56k/dsp56pcu.cpp
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@ -273,7 +273,6 @@ void pcu_service_interrupts(dsp56k_core* cpustate)
{ {
/* TODO: Implement long interrupts & fast interrupts correctly! */ /* TODO: Implement long interrupts & fast interrupts correctly! */
/* Right now they are handled in the JSR & BSR ops. SupahLame. */ /* Right now they are handled in the JSR & BSR ops. SupahLame. */
cpustate->ppc = PC;
/* Are you anything but the Host Command interrupt? */ /* Are you anything but the Host Command interrupt? */
if (interrupt_index != 22) if (interrupt_index != 22)

2
src/devices/cpu/dsp56k/inst.h
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@ -1524,7 +1524,6 @@ public:
} }
void evaluate(dsp56k_core* cpustate) override void evaluate(dsp56k_core* cpustate) override
{ {
cpustate->ppc = PC;
PC = m_displacement; PC = m_displacement;
/* S L E U N Z V C */ /* S L E U N Z V C */
@ -1557,7 +1556,6 @@ public:
} }
void evaluate(dsp56k_core* cpustate) override void evaluate(dsp56k_core* cpustate) override
{ {
cpustate->ppc = PC;
PC = regValue16(cpustate, m_destination); PC = regValue16(cpustate, m_destination);
/* S L E U N Z V C */ /* S L E U N Z V C */

57
src/devices/cpu/sh2/sh2.cpp
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@ -450,8 +450,7 @@ void sh2_device::BFS(UINT32 d)
if ((m_sh2_state->sr & T) == 0) if ((m_sh2_state->sr & T) == 0)
{ {
INT32 disp = ((INT32)d << 24) >> 24; INT32 disp = ((INT32)d << 24) >> 24;
m_delay = m_sh2_state->pc; m_delay = m_sh2_state->ea = m_sh2_state->pc + disp * 2 + 2;
m_sh2_state->pc = m_sh2_state->ea = m_sh2_state->pc + disp * 2 + 2;
m_sh2_state->icount--; m_sh2_state->icount--;
} }
} }
@ -467,7 +466,7 @@ void sh2_device::BRA(UINT32 d)
#if BUSY_LOOP_HACKS #if BUSY_LOOP_HACKS
if (disp == -2) if (disp == -2)
{ {
UINT32 next_opcode = RW( m_sh2_state->ppc & AM ); UINT32 next_opcode = RW(m_sh2_state->pc & AM);
/* BRA $ /* BRA $
* NOP * NOP
*/ */
@ -475,8 +474,7 @@ void sh2_device::BRA(UINT32 d)
m_sh2_state->icount %= 3; /* cycles for BRA $ and NOP taken (3) */ m_sh2_state->icount %= 3; /* cycles for BRA $ and NOP taken (3) */
} }
#endif #endif
m_delay = m_sh2_state->pc; m_delay = m_sh2_state->ea = m_sh2_state->pc + disp * 2 + 2;
m_sh2_state->pc = m_sh2_state->ea = m_sh2_state->pc + disp * 2 + 2;
m_sh2_state->icount--; m_sh2_state->icount--;
} }
@ -486,8 +484,7 @@ void sh2_device::BRA(UINT32 d)
*/ */
void sh2_device::BRAF(UINT32 m) void sh2_device::BRAF(UINT32 m)
{ {
m_delay = m_sh2_state->pc; m_delay = m_sh2_state->pc + m_sh2_state->r[m] + 2;
m_sh2_state->pc += m_sh2_state->r[m] + 2;
m_sh2_state->icount--; m_sh2_state->icount--;
} }
@ -500,8 +497,7 @@ void sh2_device::BSR(UINT32 d)
INT32 disp = ((INT32)d << 20) >> 20; INT32 disp = ((INT32)d << 20) >> 20;
m_sh2_state->pr = m_sh2_state->pc + 2; m_sh2_state->pr = m_sh2_state->pc + 2;
m_delay = m_sh2_state->pc; m_delay = m_sh2_state->ea = m_sh2_state->pc + disp * 2 + 2;
m_sh2_state->pc = m_sh2_state->ea = m_sh2_state->pc + disp * 2 + 2;
m_sh2_state->icount--; m_sh2_state->icount--;
} }
@ -512,8 +508,7 @@ void sh2_device::BSR(UINT32 d)
void sh2_device::BSRF(UINT32 m) void sh2_device::BSRF(UINT32 m)
{ {
m_sh2_state->pr = m_sh2_state->pc + 2; m_sh2_state->pr = m_sh2_state->pc + 2;
m_delay = m_sh2_state->pc; m_delay = m_sh2_state->pc + m_sh2_state->r[m] + 2;
m_sh2_state->pc += m_sh2_state->r[m] + 2;
m_sh2_state->icount--; m_sh2_state->icount--;
} }
@ -540,8 +535,7 @@ void sh2_device::BTS(UINT32 d)
if ((m_sh2_state->sr & T) != 0) if ((m_sh2_state->sr & T) != 0)
{ {
INT32 disp = ((INT32)d << 24) >> 24; INT32 disp = ((INT32)d << 24) >> 24;
m_delay = m_sh2_state->pc; m_delay = m_sh2_state->ea = m_sh2_state->pc + disp * 2 + 2;
m_sh2_state->pc = m_sh2_state->ea = m_sh2_state->pc + disp * 2 + 2;
m_sh2_state->icount--; m_sh2_state->icount--;
} }
} }
@ -895,7 +889,7 @@ void sh2_device::DT(UINT32 n)
m_sh2_state->sr &= ~T; m_sh2_state->sr &= ~T;
#if BUSY_LOOP_HACKS #if BUSY_LOOP_HACKS
{ {
UINT32 next_opcode = RW( m_sh2_state->ppc & AM ); UINT32 next_opcode = RW(m_sh2_state->pc & AM);
/* DT Rn /* DT Rn
* BF $-2 * BF $-2
*/ */
@ -955,17 +949,15 @@ void sh2_device::ILLEGAL()
/* JMP @Rm */ /* JMP @Rm */
void sh2_device::JMP(UINT32 m) void sh2_device::JMP(UINT32 m)
{ {
m_delay = m_sh2_state->pc; m_delay = m_sh2_state->ea = m_sh2_state->r[m];
m_sh2_state->pc = m_sh2_state->ea = m_sh2_state->r[m];
m_sh2_state->icount--; m_sh2_state->icount--;
} }
/* JSR @Rm */ /* JSR @Rm */
void sh2_device::JSR(UINT32 m) void sh2_device::JSR(UINT32 m)
{ {
m_delay = m_sh2_state->pc;
m_sh2_state->pr = m_sh2_state->pc + 2; m_sh2_state->pr = m_sh2_state->pc + 2;
m_sh2_state->pc = m_sh2_state->ea = m_sh2_state->r[m]; m_delay = m_sh2_state->ea = m_sh2_state->r[m];
m_sh2_state->icount--; m_sh2_state->icount--;
} }
@ -1575,8 +1567,7 @@ void sh2_device::ROTR(UINT32 n)
void sh2_device::RTE() void sh2_device::RTE()
{ {
m_sh2_state->ea = m_sh2_state->r[15]; m_sh2_state->ea = m_sh2_state->r[15];
m_delay = m_sh2_state->pc; m_delay = RL( m_sh2_state->ea );
m_sh2_state->pc = RL( m_sh2_state->ea );
m_sh2_state->r[15] += 4; m_sh2_state->r[15] += 4;
m_sh2_state->ea = m_sh2_state->r[15]; m_sh2_state->ea = m_sh2_state->r[15];
m_sh2_state->sr = RL( m_sh2_state->ea ) & FLAGS; m_sh2_state->sr = RL( m_sh2_state->ea ) & FLAGS;
@ -1588,8 +1579,7 @@ void sh2_device::RTE()
/* RTS */ /* RTS */
void sh2_device::RTS() void sh2_device::RTS()
{ {
m_delay = m_sh2_state->pc; m_delay = m_sh2_state->ea = m_sh2_state->pr;
m_sh2_state->pc = m_sh2_state->ea = m_sh2_state->pr;
m_sh2_state->icount--; m_sh2_state->icount--;
} }
@ -2262,7 +2252,7 @@ void sh2_device::op1111(UINT16 opcode)
void sh2_device::device_reset() void sh2_device::device_reset()
{ {
m_sh2_state->ppc = m_sh2_state->pc = m_sh2_state->pr = m_sh2_state->sr = m_sh2_state->gbr = m_sh2_state->vbr = m_sh2_state->mach = m_sh2_state->macl = 0; m_sh2_state->pc = m_sh2_state->pr = m_sh2_state->sr = m_sh2_state->gbr = m_sh2_state->vbr = m_sh2_state->mach = m_sh2_state->macl = 0;
m_sh2_state->evec = m_sh2_state->irqsr = 0; m_sh2_state->evec = m_sh2_state->irqsr = 0;
memset(&m_sh2_state->r[0], 0, sizeof(m_sh2_state->r[0])*16); memset(&m_sh2_state->r[0], 0, sizeof(m_sh2_state->r[0])*16);
m_sh2_state->ea = m_delay = m_cpu_off = m_dvsr = m_dvdnth = m_dvdntl = m_dvcr = 0; m_sh2_state->ea = m_delay = m_cpu_off = m_dvsr = m_dvdnth = m_dvdntl = m_dvcr = 0;
@ -2319,19 +2309,17 @@ void sh2_device::execute_run()
{ {
UINT32 opcode; UINT32 opcode;
debugger_instruction_hook(this, m_sh2_state->pc & AM);
opcode = m_program->read_word(m_sh2_state->pc & AM);
if (m_delay) if (m_delay)
{ {
opcode = m_program->read_word(((UINT32)(m_delay & AM))); m_sh2_state->pc = m_delay;
m_sh2_state->pc -= 2; m_delay = 0;
} }
else else
opcode = m_program->read_word(((UINT32)(m_sh2_state->pc & AM))); m_sh2_state->pc += 2;
debugger_instruction_hook(this, m_sh2_state->pc);
m_delay = 0;
m_sh2_state->pc += 2;
m_sh2_state->ppc = m_sh2_state->pc;
switch (opcode & ( 15 << 12)) switch (opcode & ( 15 << 12))
{ {
@ -2459,14 +2447,13 @@ void sh2_device::device_start()
state_add( SH2_EA, "EA", m_sh2_state->ea).formatstr("%08X"); state_add( SH2_EA, "EA", m_sh2_state->ea).formatstr("%08X");
state_add( STATE_GENPC, "GENPC", m_sh2_state->pc ).noshow(); state_add( STATE_GENPC, "GENPC", m_sh2_state->pc ).noshow();
state_add( STATE_GENPCBASE, "CURPC", m_sh2_state->ppc ).noshow(); state_add( STATE_GENPCBASE, "CURPC", m_sh2_state->pc ).noshow();
state_add( STATE_GENSP, "GENSP", m_sh2_state->r[15] ).noshow(); state_add( STATE_GENSP, "GENSP", m_sh2_state->r[15] ).noshow();
state_add( STATE_GENFLAGS, "GENFLAGS", m_sh2_state->sr ).formatstr("%6s").noshow(); state_add( STATE_GENFLAGS, "GENFLAGS", m_sh2_state->sr ).formatstr("%6s").noshow();
m_icountptr = &m_sh2_state->icount; m_icountptr = &m_sh2_state->icount;
// Clear state // Clear state
m_sh2_state->ppc = 0;
m_sh2_state->pc = 0; m_sh2_state->pc = 0;
m_sh2_state->pr = 0; m_sh2_state->pr = 0;
m_sh2_state->sr = 0; m_sh2_state->sr = 0;
@ -2620,7 +2607,7 @@ void sh2_device::state_export(const device_state_entry &entry)
switch (entry.index()) switch (entry.index())
{ {
case SH2_PC: case SH2_PC:
m_debugger_temp = (m_delay) ? (m_delay & AM) : (m_sh2_state->pc & AM); m_debugger_temp = m_sh2_state->pc & AM;
break; break;
} }
} }

1
src/devices/cpu/sh2/sh2.h
View File

@ -145,7 +145,6 @@ private:
// Data that needs to be stored close to the generated DRC code // Data that needs to be stored close to the generated DRC code
struct internal_sh2_state struct internal_sh2_state
{ {
UINT32 ppc;
UINT32 pc; UINT32 pc;
UINT32 pr; UINT32 pr;
UINT32 sr; UINT32 sr;

153
src/devices/cpu/sh4/sh4.cpp
View File

@ -533,8 +533,7 @@ inline void sh34_base_device::BFS(const UINT16 opcode)
if ((m_sr & T) == 0) if ((m_sr & T) == 0)
{ {
INT32 disp = ((INT32)(opcode&0xff) << 24) >> 24; INT32 disp = ((INT32)(opcode&0xff) << 24) >> 24;
m_delay = m_pc; m_delay = m_ea = m_pc + disp * 2 + 2;
m_pc = m_ea = m_pc + disp * 2 + 2;
m_sh4_icount--; m_sh4_icount--;
} }
} }
@ -550,7 +549,7 @@ inline void sh34_base_device::BRA(const UINT16 opcode)
#if BUSY_LOOP_HACKS #if BUSY_LOOP_HACKS
if (disp == -2) if (disp == -2)
{ {
UINT32 next_opcode = RW(m_ppc & AM); UINT32 next_opcode = RW(m_pc & AM);
/* BRA $ /* BRA $
* NOP * NOP
*/ */
@ -558,8 +557,7 @@ inline void sh34_base_device::BRA(const UINT16 opcode)
m_sh4_icount %= 3; /* cycles for BRA $ and NOP taken (3) */ m_sh4_icount %= 3; /* cycles for BRA $ and NOP taken (3) */
} }
#endif #endif
m_delay = m_pc; m_delay = m_ea = m_pc + disp * 2 + 2;
m_pc = m_ea = m_pc + disp * 2 + 2;
m_sh4_icount--; m_sh4_icount--;
} }
@ -569,8 +567,7 @@ inline void sh34_base_device::BRA(const UINT16 opcode)
*/ */
inline void sh34_base_device::BRAF(const UINT16 opcode) inline void sh34_base_device::BRAF(const UINT16 opcode)
{ {
m_delay = m_pc; m_delay = m_pc + m_r[Rn] + 2;
m_pc += m_r[Rn] + 2;
m_sh4_icount--; m_sh4_icount--;
} }
@ -583,8 +580,7 @@ inline void sh34_base_device::BSR(const UINT16 opcode)
INT32 disp = ((INT32)(opcode&0xfff) << 20) >> 20; INT32 disp = ((INT32)(opcode&0xfff) << 20) >> 20;
m_pr = m_pc + 2; m_pr = m_pc + 2;
m_delay = m_pc; m_delay = m_ea = m_pc + disp * 2 + 2;
m_pc = m_ea = m_pc + disp * 2 + 2;
m_sh4_icount--; m_sh4_icount--;
} }
@ -595,8 +591,7 @@ inline void sh34_base_device::BSR(const UINT16 opcode)
inline void sh34_base_device::BSRF(const UINT16 opcode) inline void sh34_base_device::BSRF(const UINT16 opcode)
{ {
m_pr = m_pc + 2; m_pr = m_pc + 2;
m_delay = m_pc; m_delay = m_pc + m_r[Rn] + 2;
m_pc += m_r[Rn] + 2;
m_sh4_icount--; m_sh4_icount--;
} }
@ -623,8 +618,7 @@ inline void sh34_base_device::BTS(const UINT16 opcode)
if ((m_sr & T) != 0) if ((m_sr & T) != 0)
{ {
INT32 disp = ((INT32)(opcode&0xff) << 24) >> 24; INT32 disp = ((INT32)(opcode&0xff) << 24) >> 24;
m_delay = m_pc; m_delay = m_ea = m_pc + disp * 2 + 2;
m_pc = m_ea = m_pc + disp * 2 + 2;
m_sh4_icount--; m_sh4_icount--;
} }
} }
@ -988,7 +982,7 @@ inline void sh34_base_device::DT(const UINT16 opcode)
m_sr &= ~T; m_sr &= ~T;
#if BUSY_LOOP_HACKS #if BUSY_LOOP_HACKS
{ {
UINT32 next_opcode = RW(m_ppc & AM); UINT32 next_opcode = RW(m_pc & AM);
/* DT Rn /* DT Rn
* BF $-2 * BF $-2
*/ */
@ -1031,16 +1025,14 @@ inline void sh34_base_device::EXTUW(const UINT16 opcode)
/* JMP @Rm */ /* JMP @Rm */
inline void sh34_base_device::JMP(const UINT16 opcode) inline void sh34_base_device::JMP(const UINT16 opcode)
{ {
m_delay = m_pc; m_delay = m_ea = m_r[Rn];
m_pc = m_ea = m_r[Rn];
} }
/* JSR @Rm */ /* JSR @Rm */
inline void sh34_base_device::JSR(const UINT16 opcode) inline void sh34_base_device::JSR(const UINT16 opcode)
{ {
m_delay = m_pc;
m_pr = m_pc + 2; m_pr = m_pc + 2;
m_pc = m_ea = m_r[Rn]; m_delay = m_ea = m_r[Rn];
m_sh4_icount--; m_sh4_icount--;
} }
@ -1680,8 +1672,7 @@ inline void sh34_base_device::ROTR(const UINT16 opcode)
/* RTE */ /* RTE */
inline void sh34_base_device::RTE(const UINT16 opcode) inline void sh34_base_device::RTE(const UINT16 opcode)
{ {
m_delay = m_pc; m_delay = m_ea = m_spc;
m_pc = m_ea = m_spc;
if ((machine().debug_flags & DEBUG_FLAG_ENABLED) != 0) if ((machine().debug_flags & DEBUG_FLAG_ENABLED) != 0)
sh4_syncronize_register_bank((m_sr & sRB) >> 29); sh4_syncronize_register_bank((m_sr & sRB) >> 29);
if ((m_ssr & sRB) != (m_sr & sRB)) if ((m_ssr & sRB) != (m_sr & sRB))
@ -1694,8 +1685,7 @@ inline void sh34_base_device::RTE(const UINT16 opcode)
/* RTS */ /* RTS */
inline void sh34_base_device::RTS(const UINT16 opcode) inline void sh34_base_device::RTS(const UINT16 opcode)
{ {
m_delay = m_pc; m_delay = m_ea = m_pr;
m_pc = m_ea = m_pr;
m_sh4_icount--; m_sh4_icount--;
} }
@ -3075,7 +3065,6 @@ inline void sh34_base_device::op1111_0x13(UINT16 opcode)
void sh34_base_device::device_reset() void sh34_base_device::device_reset()
{ {
m_ppc = 0;
m_spc = 0; m_spc = 0;
m_pr = 0; m_pr = 0;
m_sr = 0; m_sr = 0;
@ -3153,6 +3142,7 @@ void sh34_base_device::device_reset()
m_rtc_timer->adjust(attotime::from_hz(128)); m_rtc_timer->adjust(attotime::from_hz(128));
m_pc = 0xa0000000; m_pc = 0xa0000000;
m_ppc = m_pc & AM;
m_r[15] = RL(4); m_r[15] = RL(4);
m_sr = 0x700000f0; m_sr = 0x700000f0;
m_fpscr = 0x00040001; m_fpscr = 0x00040001;
@ -3946,37 +3936,24 @@ void sh34_base_device::execute_run()
do do
{ {
m_ppc = m_pc & AM;
debugger_instruction_hook(this, m_pc & AM);
const UINT16 opcode = m_direct->read_word(m_pc & AM, WORD2_XOR_LE(0));
if (m_delay) if (m_delay)
{ {
const UINT16 opcode = m_direct->read_word((UINT32)(m_delay & AM), WORD2_XOR_LE(0)); m_pc = m_delay;
debugger_instruction_hook(this, (m_pc-2) & AM);
m_delay = 0; m_delay = 0;
m_ppc = m_pc;
execute_one(opcode);
if (m_test_irq && !m_delay)
{
sh4_check_pending_irq("mame_sh4_execute");
}
} }
else else
{
const UINT16 opcode = m_direct->read_word((UINT32)(m_pc & AM), WORD2_XOR_LE(0));
debugger_instruction_hook(this, m_pc & AM);
m_pc += 2; m_pc += 2;
m_ppc = m_pc;
execute_one(opcode); execute_one(opcode);
if (m_test_irq && !m_delay) if (m_test_irq && !m_delay)
{ {
sh4_check_pending_irq("mame_sh4_execute"); sh4_check_pending_irq("mame_sh4_execute");
}
} }
m_sh4_icount--; m_sh4_icount--;
@ -3993,40 +3970,24 @@ void sh3be_device::execute_run()
do do
{ {
m_ppc = m_pc & AM;
debugger_instruction_hook(this, m_pc & AM);
const UINT16 opcode = m_direct->read_word(m_pc & AM, WORD_XOR_LE(6));
if (m_delay) if (m_delay)
{ {
const UINT16 opcode = m_direct->read_word((UINT32)(m_delay & AM), WORD_XOR_LE(6)); m_pc = m_delay;
debugger_instruction_hook(this, m_delay & AM);
m_delay = 0; m_delay = 0;
m_ppc = m_pc;
execute_one(opcode);
if (m_test_irq && !m_delay)
{
sh4_check_pending_irq("mame_sh4_execute");
}
} }
else else
{
const UINT16 opcode = m_direct->read_word((UINT32)(m_pc & AM), WORD_XOR_LE(6));
debugger_instruction_hook(this, m_pc & AM);
m_pc += 2; m_pc += 2;
m_ppc = m_pc;
execute_one(opcode); execute_one(opcode);
if (m_test_irq && !m_delay) if (m_test_irq && !m_delay)
{ {
sh4_check_pending_irq("mame_sh4_execute"); sh4_check_pending_irq("mame_sh4_execute");
}
} }
m_sh4_icount--; m_sh4_icount--;
@ -4043,40 +4004,24 @@ void sh4be_device::execute_run()
do do
{ {
m_ppc = m_pc & AM;
debugger_instruction_hook(this, m_pc & AM);
const UINT16 opcode = m_direct->read_word(m_pc & AM, WORD_XOR_LE(6));
if (m_delay) if (m_delay)
{ {
const UINT16 opcode = m_direct->read_word((UINT32)(m_delay & AM), WORD_XOR_LE(6)); m_pc = m_delay;
debugger_instruction_hook(this, m_delay & AM);
m_delay = 0; m_delay = 0;
m_ppc = m_pc;
execute_one(opcode);
if (m_test_irq && !m_delay)
{
sh4_check_pending_irq("mame_sh4_execute");
}
} }
else else
{
const UINT16 opcode = m_direct->read_word((UINT32)(m_pc & AM), WORD_XOR_LE(6));
debugger_instruction_hook(this, m_pc & AM);
m_pc += 2; m_pc += 2;
m_ppc = m_pc;
execute_one(opcode); execute_one(opcode);
if (m_test_irq && !m_delay) if (m_test_irq && !m_delay)
{ {
sh4_check_pending_irq("mame_sh4_execute"); sh4_check_pending_irq("mame_sh4_execute");
}
} }
m_sh4_icount--; m_sh4_icount--;
@ -4277,7 +4222,7 @@ void sh34_base_device::device_start()
state_add(SH4_XF14, "XF14", m_debugger_temp).callimport().formatstr("%25s"); state_add(SH4_XF14, "XF14", m_debugger_temp).callimport().formatstr("%25s");
state_add(SH4_XF15, "XF15", m_debugger_temp).callimport().formatstr("%25s"); state_add(SH4_XF15, "XF15", m_debugger_temp).callimport().formatstr("%25s");
state_add(STATE_GENPC, "GENPC", m_debugger_temp).callimport().callexport().noshow(); state_add(STATE_GENPC, "GENPC", m_debugger_temp).callimport().noshow();
state_add(STATE_GENPCBASE, "CURPC", m_ppc).noshow(); state_add(STATE_GENPCBASE, "CURPC", m_ppc).noshow();
state_add(STATE_GENSP, "GENSP", m_r[15]).noshow(); state_add(STATE_GENSP, "GENSP", m_r[15]).noshow();
state_add(STATE_GENFLAGS, "GENFLAGS", m_sr).formatstr("%20s").noshow(); state_add(STATE_GENFLAGS, "GENFLAGS", m_sr).formatstr("%20s").noshow();
@ -4436,16 +4381,6 @@ void sh34_base_device::state_import(const device_state_entry &entry)
} }
} }
void sh34_base_device::state_export(const device_state_entry &entry)
{
switch (entry.index())
{
case STATE_GENPC:
m_debugger_temp = (m_delay) ? (m_delay & AM) : (m_pc & AM);
break;
}
}
void sh34_base_device::state_string_export(const device_state_entry &entry, std::string &str) const void sh34_base_device::state_string_export(const device_state_entry &entry, std::string &str) const
{ {
#ifdef LSB_FIRST #ifdef LSB_FIRST

1
src/devices/cpu/sh4/sh4.h
View File

@ -219,7 +219,6 @@ protected:
// device_state_interface overrides // device_state_interface overrides
virtual void state_import(const device_state_entry &entry) override; virtual void state_import(const device_state_entry &entry) override;
virtual void state_export(const device_state_entry &entry) override;
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override; virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides // device_disasm_interface overrides

4
src/emu/distate.cpp
View File

@ -77,9 +77,9 @@ device_state_entry::device_state_entry(int index, const char *symbol, void *data
// override well-known symbols // override well-known symbols
if (index == STATE_GENPC) if (index == STATE_GENPC)
m_symbol.assign("CURPC"); m_symbol.assign("GENPC");
else if (index == STATE_GENPCBASE) else if (index == STATE_GENPCBASE)
m_symbol.assign("CURPCBASE"); m_symbol.assign("CURPC");
else if (index == STATE_GENSP) else if (index == STATE_GENSP)
m_symbol.assign("CURSP"); m_symbol.assign("CURSP");
else if (index == STATE_GENFLAGS) else if (index == STATE_GENFLAGS)