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Refactored the COP400 CPU cores to use the new memory functions.
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@ -19,6 +19,10 @@ struct _cop400_state
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{
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const cop400_interface *intf;
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const address_space *program;
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const address_space *data;
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const address_space *io;
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/* registers */
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UINT10 pc; /* 11-bit ROM address program counter */
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UINT10 prevpc; /* previous value of program counter */
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@ -32,6 +36,8 @@ struct _cop400_state
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UINT4 sio; /* 4-bit shift register and counter */
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UINT1 skl; /* 1-bit latch for SK output */
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UINT8 si; /* serial input */
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UINT4 h; /* 4-bit general purpose I/O port (COP440 only) */
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UINT8 r; /* 8-bit general purpose I/O port (COP440 only) */
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/* counter */
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UINT8 t; /* 8-bit timer */
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@ -77,12 +83,11 @@ typedef struct {
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#define INSTRUCTION(mnemonic) INLINE void (mnemonic)(cop400_state *cop400, UINT8 opcode)
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#define ROM(addr) program_decrypted_read_byte(addr)
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#define RAM_W(addr, value) (data_write_byte_8le(addr, value))
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#define RAM_R(addr) (data_read_byte_8le(addr))
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#define IN(addr) io_read_byte_8le(addr)
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#define OUT(addr, value) io_write_byte_8le(addr, value)
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#define ROM(a) memory_decrypted_read_byte(cop400->program, a)
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#define RAM_R(a) memory_read_byte_8le(cop400->data, a)
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#define RAM_W(a, v) memory_write_byte_8le(cop400->data, a, v)
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#define IN(a) memory_read_byte_8le(cop400->io, a)
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#define OUT(a, v) memory_write_byte_8le(cop400->io, a, v)
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#define A cop400->a
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#define B cop400->b
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@ -14,13 +14,18 @@
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#ifndef __COP400__
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#define __COP400__
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#define COP400_PORT_L 0x100
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#define COP400_PORT_G 0x101
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#define COP400_PORT_D 0x102
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#define COP400_PORT_IN 0x103
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#define COP400_PORT_SK 0x104
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#define COP400_PORT_SIO 0x105
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#define COP400_PORT_CKO 0x106
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enum
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{
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COP400_PORT_L = 0x100,
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COP400_PORT_G,
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COP400_PORT_D,
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COP400_PORT_H,
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COP400_PORT_R,
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COP400_PORT_IN,
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COP400_PORT_SK,
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COP400_PORT_SIO,
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COP400_PORT_CKO
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};
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enum
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{
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@ -29,6 +34,8 @@ enum
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COP400_B,
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COP400_C,
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COP400_G,
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COP400_H,
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COP400_R,
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COP400_EN,
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COP400_Q,
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COP400_SA,
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@ -21,6 +21,8 @@
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*/
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#define NO_LEGACY_MEMORY_HANDLERS 1
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#include "driver.h"
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#include "cpuintrf.h"
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#include "debugger.h"
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@ -182,6 +184,12 @@ static CPU_INIT( cop410 )
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cop400->device = device;
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cop400->intf = (cop400_interface *) device->static_config;
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/* get address spaces */
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cop400->program = cpu_get_address_space(device, ADDRESS_SPACE_PROGRAM);
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cop400->data = cpu_get_address_space(device, ADDRESS_SPACE_DATA);
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cop400->io = cpu_get_address_space(device, ADDRESS_SPACE_IO);
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/* set output pin masks */
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cop400->g_mask = 0x0f;
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@ -23,6 +23,8 @@
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*/
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#define NO_LEGACY_MEMORY_HANDLERS 1
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#include "driver.h"
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#include "cpuintrf.h"
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#include "debugger.h"
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@ -184,6 +186,12 @@ static CPU_INIT( cop420 )
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cop400->device = device;
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cop400->intf = (cop400_interface *) device->static_config;
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/* get address spaces */
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cop400->program = cpu_get_address_space(device, ADDRESS_SPACE_PROGRAM);
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cop400->data = cpu_get_address_space(device, ADDRESS_SPACE_DATA);
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cop400->io = cpu_get_address_space(device, ADDRESS_SPACE_IO);
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/* set output pin masks */
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cop400->g_mask = 0x0f; // G0-G3 available
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@ -13,7 +13,8 @@
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TODO:
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- COP441
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- rename this file to cop444.c
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- COP440/COP441/COP442 (new registers: 4-bit H, 8-bit R; some new opcodes, 2Kx8 ROM, 160x4 RAM)
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- COP404 emulation configuration inputs
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- RAM bus width
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- get rid of LBIOps/InstLen
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@ -26,6 +27,8 @@
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*/
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#define NO_LEGACY_MEMORY_HANDLERS 1
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#include "driver.h"
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#include "cpuintrf.h"
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#include "debugger.h"
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@ -195,6 +198,12 @@ static CPU_INIT( cop444 )
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cop400->device = device;
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cop400->intf = (cop400_interface *) device->static_config;
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/* get address spaces */
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cop400->program = cpu_get_address_space(device, ADDRESS_SPACE_PROGRAM);
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cop400->data = cpu_get_address_space(device, ADDRESS_SPACE_DATA);
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cop400->io = cpu_get_address_space(device, ADDRESS_SPACE_IO);
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/* set output pin masks */
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cop400->g_mask = 0x0f; // G0-G3 available
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