diff --git a/src/devices/cpu/hmcs40/hmcs40.h b/src/devices/cpu/hmcs40/hmcs40.h
index a4e39a74e71..1b573e4a9e3 100644
--- a/src/devices/cpu/hmcs40/hmcs40.h
+++ b/src/devices/cpu/hmcs40/hmcs40.h
@@ -407,7 +407,6 @@ public:
 };
 
 
-
 DECLARE_DEVICE_TYPE(HD38750, hd38750_device)
 DECLARE_DEVICE_TYPE(HD38755, hd38755_device)
 DECLARE_DEVICE_TYPE(HD44750, hd44750_device)
diff --git a/src/devices/cpu/hmcs40/hmcs40d.cpp b/src/devices/cpu/hmcs40/hmcs40d.cpp
index 8617054db32..e16ff7a2bf9 100644
--- a/src/devices/cpu/hmcs40/hmcs40d.cpp
+++ b/src/devices/cpu/hmcs40/hmcs40d.cpp
@@ -235,11 +235,7 @@ offs_t hmcs40_disassembler::disassemble(std::ostream &stream, offs_t pc, const d
 			}
 
 			param &= ((1 << bits) - 1);
-
-			if (bits > 5)
-				util::stream_format(stream, "$%02X", param);
-			else
-				util::stream_format(stream, "%d", param);
+			util::stream_format(stream, (bits > 4) ? "$%02X" : (param < 10) ? "%d" : "$%X", param);
 		}
 	}
 
diff --git a/src/devices/cpu/hmcs400/hmcs400.cpp b/src/devices/cpu/hmcs400/hmcs400.cpp
index 40f32275166..4070a0b3830 100644
--- a/src/devices/cpu/hmcs400/hmcs400.cpp
+++ b/src/devices/cpu/hmcs400/hmcs400.cpp
@@ -5,6 +5,9 @@
 Hitachi HMCS400 MCU family cores
 
 TODO:
+- do the LAW/LWA opcodes not work on early revisions of HMCS400? the 1988 user
+  manual warns that the W register is write-only, and that there is no efficient
+  way to save this register when using interrupts
 - what happens when accessing ROM/RAM out of address range? Hitachi documentation
   says 'unused', but maybe it's mirrored?
 
@@ -24,22 +27,31 @@ TODO:
 // AC = high-speed
 
 // HMCS408, HMCS414, HMCS424 have a mask option for the system clock divider
-// HMCS408 and newer MCUs add 2 opcodes: LAW and LWA
+// rev 2 apparently added LAW/LWA opcodes
 
 // HMCS402C/CL/AC, 64 pins DP-64S or FP-64, 2Kx10 ROM, 160x4 RAM
-DEFINE_DEVICE_TYPE(HD614022, hd614022_device, "hd614022", "Hitachi HD614022") // C
-DEFINE_DEVICE_TYPE(HD614025, hd614025_device, "hd614025", "Hitachi HD614025") // CL
-DEFINE_DEVICE_TYPE(HD614028, hd614028_device, "hd614028", "Hitachi HD614028") // AC
+DEFINE_DEVICE_TYPE(HD614022, hd614022_device, "hd614022", "Hitachi HD614022") // C, rev 2
+DEFINE_DEVICE_TYPE(HD614023, hd614023_device, "hd614023", "Hitachi HD614023") // C, rev 1
+DEFINE_DEVICE_TYPE(HD614025, hd614025_device, "hd614025", "Hitachi HD614025") // CL, rev 2
+DEFINE_DEVICE_TYPE(HD614026, hd614026_device, "hd614026", "Hitachi HD614026") // CL, rev 1
+DEFINE_DEVICE_TYPE(HD614028, hd614028_device, "hd614028", "Hitachi HD614028") // AC, rev 2
+DEFINE_DEVICE_TYPE(HD614029, hd614029_device, "hd614029", "Hitachi HD614029") // AC, rev 1
 
 // HMCS404C/CL/AC, 64 pins DP-64S or FP-64, 4Kx10 ROM, 256x4 RAM
-DEFINE_DEVICE_TYPE(HD614042, hd614042_device, "hd614042", "Hitachi HD614042") // C
-DEFINE_DEVICE_TYPE(HD614045, hd614045_device, "hd614045", "Hitachi HD614045") // CL
-DEFINE_DEVICE_TYPE(HD614048, hd614048_device, "hd614048", "Hitachi HD614048") // AC
+DEFINE_DEVICE_TYPE(HD614042, hd614042_device, "hd614042", "Hitachi HD614042") // C, rev 2
+DEFINE_DEVICE_TYPE(HD614043, hd614043_device, "hd614043", "Hitachi HD614043") // C, rev 1
+DEFINE_DEVICE_TYPE(HD614045, hd614045_device, "hd614045", "Hitachi HD614045") // CL, rev 2
+DEFINE_DEVICE_TYPE(HD614046, hd614046_device, "hd614046", "Hitachi HD614046") // CL, rev 1
+DEFINE_DEVICE_TYPE(HD614048, hd614048_device, "hd614048", "Hitachi HD614048") // AC, rev 2
+DEFINE_DEVICE_TYPE(HD614049, hd614049_device, "hd614049", "Hitachi HD614049") // AC, rev 1
 
 // HMCS408C/CL/AC, 64 pins DP-64S or FP-64, 8Kx10 ROM, 512x4 RAM
-DEFINE_DEVICE_TYPE(HD614080, hd614080_device, "hd614080", "Hitachi HD614080") // C
-DEFINE_DEVICE_TYPE(HD614085, hd614085_device, "hd614085", "Hitachi HD614085") // CL
-DEFINE_DEVICE_TYPE(HD614088, hd614088_device, "hd614088", "Hitachi HD614088") // AC
+DEFINE_DEVICE_TYPE(HD614080, hd614080_device, "hd614080", "Hitachi HD614080") // C, rev 2
+DEFINE_DEVICE_TYPE(HD614081, hd614081_device, "hd614081", "Hitachi HD614081") // C, rev 1
+DEFINE_DEVICE_TYPE(HD614085, hd614085_device, "hd614085", "Hitachi HD614085") // CL, rev 2
+DEFINE_DEVICE_TYPE(HD614086, hd614086_device, "hd614086", "Hitachi HD614086") // CL, rev 1
+DEFINE_DEVICE_TYPE(HD614088, hd614088_device, "hd614088", "Hitachi HD614088") // AC, rev 2
+DEFINE_DEVICE_TYPE(HD614089, hd614089_device, "hd614089", "Hitachi HD614089") // AC, rev 1
 
 
 //-------------------------------------------------
@@ -53,7 +65,6 @@ hmcs400_cpu_device::hmcs400_cpu_device(const machine_config &mconfig, device_typ
 	m_rom_size(rom_size),
 	m_ram_size(ram_size),
 	m_has_div(false),
-	m_has_law(false),
 	m_divider(8)
 { }
 
@@ -67,12 +78,21 @@ hmcs402_cpu_device::hmcs402_cpu_device(const machine_config &mconfig, device_typ
 hd614022_device::hd614022_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
 	hmcs402_cpu_device(mconfig, HD614022, tag, owner, clock)
 { }
+hd614023_device::hd614023_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
+	hmcs402_cpu_device(mconfig, HD614023, tag, owner, clock)
+{ }
 hd614025_device::hd614025_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
 	hmcs402_cpu_device(mconfig, HD614025, tag, owner, clock)
 { }
+hd614026_device::hd614026_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
+	hmcs402_cpu_device(mconfig, HD614026, tag, owner, clock)
+{ }
 hd614028_device::hd614028_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
 	hmcs402_cpu_device(mconfig, HD614028, tag, owner, clock)
 { }
+hd614029_device::hd614029_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
+	hmcs402_cpu_device(mconfig, HD614029, tag, owner, clock)
+{ }
 
 
 hmcs404_cpu_device::hmcs404_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock) :
@@ -82,30 +102,47 @@ hmcs404_cpu_device::hmcs404_cpu_device(const machine_config &mconfig, device_typ
 hd614042_device::hd614042_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
 	hmcs404_cpu_device(mconfig, HD614042, tag, owner, clock)
 { }
+hd614043_device::hd614043_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
+	hmcs404_cpu_device(mconfig, HD614043, tag, owner, clock)
+{ }
 hd614045_device::hd614045_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
 	hmcs404_cpu_device(mconfig, HD614045, tag, owner, clock)
 { }
+hd614046_device::hd614046_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
+	hmcs404_cpu_device(mconfig, HD614046, tag, owner, clock)
+{ }
 hd614048_device::hd614048_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
 	hmcs404_cpu_device(mconfig, HD614048, tag, owner, clock)
 { }
+hd614049_device::hd614049_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
+	hmcs404_cpu_device(mconfig, HD614049, tag, owner, clock)
+{ }
 
 
 hmcs408_cpu_device::hmcs408_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock) :
 	hmcs400_cpu_device(mconfig, type, tag, owner, clock, 0x2000, 448)
 {
 	m_has_div = true;
-	m_has_law = true;
 }
 
 hd614080_device::hd614080_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
 	hmcs408_cpu_device(mconfig, HD614080, tag, owner, clock)
 { }
+hd614081_device::hd614081_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
+	hmcs408_cpu_device(mconfig, HD614081, tag, owner, clock)
+{ }
 hd614085_device::hd614085_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
 	hmcs408_cpu_device(mconfig, HD614085, tag, owner, clock)
 { }
+hd614086_device::hd614086_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
+	hmcs408_cpu_device(mconfig, HD614086, tag, owner, clock)
+{ }
 hd614088_device::hd614088_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
 	hmcs408_cpu_device(mconfig, HD614088, tag, owner, clock)
 { }
+hd614089_device::hd614089_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
+	hmcs408_cpu_device(mconfig, HD614089, tag, owner, clock)
+{ }
 
 
 //-------------------------------------------------
@@ -121,11 +158,13 @@ void hmcs400_cpu_device::device_start()
 	m_pc = 0;
 	m_prev_pc = 0;
 	m_op = 0;
+	m_param = 0;
 
 	// register for savestates
 	save_item(NAME(m_pc));
 	save_item(NAME(m_prev_pc));
 	save_item(NAME(m_op));
+	save_item(NAME(m_param));
 
 	// register state for debugger
 	state_add(STATE_GENPC, "GENPC", m_pc).formatstr("%04X").noshow();
@@ -177,6 +216,15 @@ device_memory_interface::space_config_vector hmcs400_cpu_device::memory_space_co
 //  execute
 //-------------------------------------------------
 
+u16 hmcs400_cpu_device::fetch()
+{
+	u16 data = m_program->read_word(m_pc) & 0x3ff;
+	m_pc = (m_pc + 1) & 0x3fff;
+	m_icount--;
+
+	return data;
+}
+
 void hmcs400_cpu_device::execute_run()
 {
 	while (m_icount > 0)
@@ -184,10 +232,11 @@ void hmcs400_cpu_device::execute_run()
 		// fetch next opcode
 		m_prev_pc = m_pc;
 		debugger_instruction_hook(m_pc);
-		m_op = m_program->read_word(m_pc) & 0x3ff;
-		m_pc = (m_pc + 1) & 0x3fff;
+		m_op = fetch();
 
-		m_icount--;
+		// 2-byte opcodes
+		if ((m_op >= 0x100 && m_op < 0x140) || (m_op >= 0x150 && m_op < 0x1b0))
+			m_param = fetch();
 
 		op_illegal();
 	}
diff --git a/src/devices/cpu/hmcs400/hmcs400.h b/src/devices/cpu/hmcs400/hmcs400.h
index d29e4f92092..a5fdd662241 100644
--- a/src/devices/cpu/hmcs400/hmcs400.h
+++ b/src/devices/cpu/hmcs400/hmcs400.h
@@ -35,7 +35,7 @@ protected:
 	virtual u64 execute_clocks_to_cycles(u64 clocks) const noexcept override { return (clocks + m_divider - 1) / m_divider; }
 	virtual u64 execute_cycles_to_clocks(u64 cycles) const noexcept override { return (cycles * m_divider); }
 	virtual u32 execute_min_cycles() const noexcept override { return 1; }
-	virtual u32 execute_max_cycles() const noexcept override { return 2+2; } // max 2 + interrupt
+	virtual u32 execute_max_cycles() const noexcept override { return 3+2; } // max 3 + interrupt
 	virtual u32 execute_input_lines() const noexcept override { return 2; }
 	//virtual void execute_set_input(int line, int state) override;
 	virtual void execute_run() override;
@@ -58,15 +58,17 @@ protected:
 	const u32 m_rom_size; // ROM size in 16-bit words
 	const u32 m_ram_size; // RAM size minus the 64-byte stack
 	bool m_has_div;       // MCU supports divider mask option
-	bool m_has_law;       // MCU supports LAW/LWA opcodes
 	u8 m_divider;         // system clock divider
 
 	u16 m_pc;
 	u16 m_prev_pc;
 	u16 m_op;
+	u16 m_param;
 
 	int m_icount;
 
+	u16 fetch();
+
 	// opcode handlers
 	void op_illegal();
 };
@@ -84,18 +86,36 @@ public:
 	hd614022_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
 };
 
+class hd614023_device : public hmcs402_cpu_device
+{
+public:
+	hd614023_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
+};
+
 class hd614025_device : public hmcs402_cpu_device
 {
 public:
 	hd614025_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
 };
 
+class hd614026_device : public hmcs402_cpu_device
+{
+public:
+	hd614026_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
+};
+
 class hd614028_device : public hmcs402_cpu_device
 {
 public:
 	hd614028_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
 };
 
+class hd614029_device : public hmcs402_cpu_device
+{
+public:
+	hd614029_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
+};
+
 
 class hmcs404_cpu_device : public hmcs400_cpu_device
 {
@@ -109,18 +129,36 @@ public:
 	hd614042_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
 };
 
+class hd614043_device : public hmcs404_cpu_device
+{
+public:
+	hd614043_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
+};
+
 class hd614045_device : public hmcs404_cpu_device
 {
 public:
 	hd614045_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
 };
 
+class hd614046_device : public hmcs404_cpu_device
+{
+public:
+	hd614046_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
+};
+
 class hd614048_device : public hmcs404_cpu_device
 {
 public:
 	hd614048_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
 };
 
+class hd614049_device : public hmcs404_cpu_device
+{
+public:
+	hd614049_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
+};
+
 
 class hmcs408_cpu_device : public hmcs400_cpu_device
 {
@@ -134,29 +172,56 @@ public:
 	hd614080_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
 };
 
+class hd614081_device : public hmcs408_cpu_device
+{
+public:
+	hd614081_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
+};
+
 class hd614085_device : public hmcs408_cpu_device
 {
 public:
 	hd614085_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
 };
 
+class hd614086_device : public hmcs408_cpu_device
+{
+public:
+	hd614086_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
+};
+
 class hd614088_device : public hmcs408_cpu_device
 {
 public:
 	hd614088_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
 };
 
+class hd614089_device : public hmcs408_cpu_device
+{
+public:
+	hd614089_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
+};
+
 
 DECLARE_DEVICE_TYPE(HD614022, hd614022_device)
+DECLARE_DEVICE_TYPE(HD614023, hd614023_device)
 DECLARE_DEVICE_TYPE(HD614025, hd614025_device)
+DECLARE_DEVICE_TYPE(HD614026, hd614026_device)
 DECLARE_DEVICE_TYPE(HD614028, hd614028_device)
+DECLARE_DEVICE_TYPE(HD614029, hd614029_device)
 
 DECLARE_DEVICE_TYPE(HD614042, hd614042_device)
+DECLARE_DEVICE_TYPE(HD614043, hd614043_device)
 DECLARE_DEVICE_TYPE(HD614045, hd614045_device)
+DECLARE_DEVICE_TYPE(HD614046, hd614046_device)
 DECLARE_DEVICE_TYPE(HD614048, hd614048_device)
+DECLARE_DEVICE_TYPE(HD614049, hd614049_device)
 
 DECLARE_DEVICE_TYPE(HD614080, hd614080_device)
+DECLARE_DEVICE_TYPE(HD614081, hd614081_device)
 DECLARE_DEVICE_TYPE(HD614085, hd614085_device)
+DECLARE_DEVICE_TYPE(HD614086, hd614086_device)
 DECLARE_DEVICE_TYPE(HD614088, hd614088_device)
+DECLARE_DEVICE_TYPE(HD614089, hd614089_device)
 
 #endif // MAME_CPU_HMCS400_HMCS400_H
diff --git a/src/devices/cpu/hmcs400/hmcs400d.cpp b/src/devices/cpu/hmcs400/hmcs400d.cpp
index a90a324d339..526053f9169 100644
--- a/src/devices/cpu/hmcs400/hmcs400d.cpp
+++ b/src/devices/cpu/hmcs400/hmcs400d.cpp
@@ -24,114 +24,158 @@ hmcs400_disassembler::~hmcs400_disassembler()
 
 enum hmcs400_disassembler::e_mnemonics : unsigned
 {
-	mILL1
+	mILL1, mILL2,
+	mLAI, mLBI, mLMID, mLMIIY,
+	mLAB, mLBA, mLAW, mLAY, mLASPX, mLASPY, mLAMR, mXMRA,
+	mLWI, mLXI, mLYI, mLWA, mLXA, mLYA, mIY, mDY, mAYY, mSYY, mXSP,
+	mLAM, mLAMD, mLBM, mLMA, mLMAD, mLMAIY, mLMADY, mXMA, mXMAD, mXMB,
+	mAI, mIB, mDB, mDAA, mDAS, mNEGA, mCOMB, mROTR, mROTL, mSEC, mREC, mTC,
+	mAM, mAMD, mAMC, mAMCD, mSMC, mSMCD, mOR, mANM, mANMD, mORM, mORMD, mEORM, mEORMD,
+	mINEM, mINEMD, mANEM, mANEMD, mBNEM, mYNEI, mILEM, mILEMD, mALEM, mALEMD, mBLEM, mALEI,
+	mSEM, mSEMD, mREM, mREMD, mTM, mTMD,
+	mBR, mBRL, mJMPL, mCAL, mCALL, mTBR, mRTN, mRTNI,
+	mSED, mSEDD, mRED, mREDD, mTD, mTDD, mLAR, mLBR, mLRA, mLRB, mP,
+	mNOP, mSTS, mSBY, mSTOP
 };
 
 const char *const hmcs400_disassembler::s_mnemonics[] =
 {
-	"?"
+	"?", "?",
+	"LAI", "LBI", "LMID", "LMIIY",
+	"LAB", "LBA", "LAW", "LAY", "LASPX", "LASPY", "LAMR", "XMRA",
+	"LWI", "LXI", "LYI", "LWA", "LXA", "LYA", "IY", "DY", "AYY", "SYY", "XSP",
+	"LAM", "LAMD", "LBM", "LMA", "LMAD", "LMAIY", "LMADY", "XMA", "XMAD", "XMB",
+	"AI", "IB", "DB", "DAA", "DAS", "NEGA", "COMB", "ROTR", "ROTL", "SEC", "REC", "TC",
+	"AM", "AMD", "AMC", "AMCD", "SMC", "SMCD", "OR", "ANM", "ANMD", "ORM", "ORMD", "EORM", "EORMD",
+	"INEM", "INEMD", "ANEM", "ANEMD", "BNEM", "YNEI", "ILEM", "ILEMD", "ALEM", "ALEMD", "BLEM", "ALEI",
+	"SEM", "SEMD", "REM", "REMD", "TM", "TMD",
+	"BR", "BRL", "JMPL", "CAL", "CALL", "TBR", "RTN", "RTNI",
+	"SED", "SEDD", "RED", "REDD", "TD", "TDD", "LAR", "LBR", "LRA", "LRB", "P",
+	"NOP", "STS", "SBY", "STOP"
 };
 
-// number of bits per opcode parameter, 99 means (XY) parameter, negative means reversed bit-order
+// number of bits per opcode parameter, 99 means (XY) parameter
 const s8 hmcs400_disassembler::s_bits[] =
 {
-	0
+	0, 10,
+	4, 4, 14, 4,
+	0, 0, 10, 0, 0, 0, 4, 4,
+	2, 4, 4, 10, 0, 0, 0, 0, 0, 0, 99,
+	99, 10, 99, 99, 10, 99, 99, 99, 10, 99,
+	4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	0, 10, 0, 10, 0, 10, 0, 0, 10, 0, 10, 0, 10,
+	4, 14, 0, 10, 0, 4, 4, 14, 0, 10, 0, 4,
+	2, 12, 2, 12, 2, 12,
+	8, 14, 14, 6, 14, 4, 0, 0,
+	0, 4, 0, 4, 0, 4, 4, 4, 4, 4, 4,
+	0, 0, 0, 0
 };
 
 const u32 hmcs400_disassembler::s_flags[] =
 {
-	0
+	0, 0,
+	0, 0, 0, 0,
+	0, 0, 0, 0, 0, 0, 0, 0,
+	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	0, 0, 0, 0, 0, 0,
+	STEP_COND, STEP_COND, 0, STEP_OVER | STEP_COND, STEP_OVER | STEP_COND, 0, STEP_OUT, STEP_OUT,
+	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	0, 0, 0, 0
 };
 
 const u8 hmcs400_disassembler::hmcs400_mnemonic[0x400] =
 {
 //  0      1      2      3      4      5      6      7      8      9      A      B      C      D      E      F
 	// 0x000
-	0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,
-	0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,
-	0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,
-	0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,
+	mNOP,  mXSP,  mXSP,  mXSP,  mANEM, 0,     0,     0,     mAM,   0,     0,     0,     mORM,  0,     0,     0,
+	mRTN,  mRTNI, 0,     0,     mALEM, 0,     0,     0,     mAMC,  0,     0,     0,     mEORM, 0,     0,     0,
+	mINEM, mINEM, mINEM, mINEM, mINEM, mINEM, mINEM, mINEM, mINEM, mINEM, mINEM, mINEM, mINEM, mINEM, mINEM, mINEM,
+	mILEM, mILEM, mILEM, mILEM, mILEM, mILEM, mILEM, mILEM, mILEM, mILEM, mILEM, mILEM, mILEM, mILEM, mILEM, mILEM,
 	// 0x040
-	0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,
-	0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,
-	0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,
-	0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,
+	mLBM,  mLBM,  mLBM,  mLBM,  mBNEM, 0,     0,     0,     mLAB,  0,     0,     0,     mIB,   0,     0,     0,
+	mLMAIY,mLMAIY,0,     0,     mAYY,  0,     0,     0,     mLASPY,0,     0,     0,     mIY,   0,     0,     0,
+	mNEGA, 0,     0,     0,     mRED,  0,     0,     0,     mLASPX,0,     0,     0,     0,     0,     0,     mTC,
+	mYNEI, mYNEI, mYNEI, mYNEI, mYNEI, mYNEI, mYNEI, mYNEI, mYNEI, mYNEI, mYNEI, mYNEI, mYNEI, mYNEI, mYNEI, mYNEI,
 	// 0x080
-	0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,
-	0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,
-	0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,
-	0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,
+	mXMA,  mXMA,  mXMA,  mXMA,  mSEM,  mSEM,  mSEM,  mSEM,  mREM,  mREM,  mREM,  mREM,  mTM,   mTM,   mTM,   mTM,
+	mLAM,  mLAM,  mLAM,  mLAM,  mLMA,  mLMA,  mLMA,  mLMA,  mSMC,  0,     0,     0,     mANM,  0,     0,     0,
+	mROTR, mROTL, 0,     0,     0,     0,     mDAA,  0,     0,     0,     mDAS,  0,     0,     0,     0,     mLAY,
+	mTBR,  mTBR,  mTBR,  mTBR,  mTBR,  mTBR,  mTBR,  mTBR,  mTBR,  mTBR,  mTBR,  mTBR,  mTBR,  mTBR,  mTBR,  mTBR,
 	// 0x0c0
-	0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,
-	0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,
-	0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,
-	0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,
+	mXMB,  mXMB,  mXMB,  mXMB,  mBLEM, 0,     0,     0,     mLBA,  0,     0,     0,     0,     0,     0,     mDB,
+	mLMADY,mLMADY,0,     0,     mSYY,  0,     0,     0,     mLYA,  0,     0,     0,     0,     0,     0,     mDY,
+	mTD,   0,     0,     0,     mSED,  0,     0,     0,     mLXA,  0,     0,     0,     mREC,  0,     0,     mSEC,
+	mLWI,  mLWI,  mLWI,  mLWI,  0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,
 
 //  0      1      2      3      4      5      6      7      8      9      A      B      C      D      E      F
 	// 0x100
-	0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,
-	0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,
-	0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,
-	0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,
+	mLAW,  1,     1,     1,     mANEMD,1,     1,     1,     mAMD,  1,     1,     1,     mORMD, 1,     1,     1,
+	mLWA,  1,     1,     1,     mALEMD,1,     1,     1,     mAMCD, 1,     1,     1,     mEORMD,1,     1,     1,
+	mINEMD,mINEMD,mINEMD,mINEMD,mINEMD,mINEMD,mINEMD,mINEMD,mINEMD,mINEMD,mINEMD,mINEMD,mINEMD,mINEMD,mINEMD,mINEMD,
+	mILEMD,mILEMD,mILEMD,mILEMD,mILEMD,mILEMD,mILEMD,mILEMD,mILEMD,mILEMD,mILEMD,mILEMD,mILEMD,mILEMD,mILEMD,mILEMD,
 	// 0x140
-	0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,
-	0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,
-	0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,
-	0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,
+	mCOMB, 0,     0,     0,     mOR,   0,     0,     0,     mSTS,  0,     0,     0,     mSBY,  mSTOP, 0,     0,
+	mJMPL, mJMPL, mJMPL, mJMPL, mJMPL, mJMPL, mJMPL, mJMPL, mJMPL, mJMPL, mJMPL, mJMPL, mJMPL, mJMPL, mJMPL, mJMPL,
+	mCALL, mCALL, mCALL, mCALL, mCALL, mCALL, mCALL, mCALL, mCALL, mCALL, mCALL, mCALL, mCALL, mCALL, mCALL, mCALL,
+	mBRL,  mBRL,  mBRL,  mBRL,  mBRL,  mBRL,  mBRL,  mBRL,  mBRL,  mBRL,  mBRL,  mBRL,  mBRL,  mBRL,  mBRL,  mBRL,
 	// 0x180
-	0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,
-	0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,
-	0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,
-	0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,
+	mXMAD, 1,     1,     1,     mSEMD, mSEMD, mSEMD, mSEMD, mREMD, mREMD, mREMD, mREMD, mTMD,  mTMD,  mTMD,  mTMD,
+	mLAMD, 1,     1,     1,     mLMAD, 1,     1,     1,     mSMCD, 1,     1,     1,     mANMD, 1,     1,     1,
+	mLMID, mLMID, mLMID, mLMID, mLMID, mLMID, mLMID, mLMID, mLMID, mLMID, mLMID, mLMID, mLMID, mLMID, mLMID, mLMID,
+	mP,    mP,    mP,    mP,    mP,    mP,    mP,    mP,    mP,    mP,    mP,    mP,    mP,    mP,    mP,    mP,
 	// 0x1c0
-	0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,
-	0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,
-	0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,
-	0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,
+	mCAL,  mCAL,  mCAL,  mCAL,  mCAL,  mCAL,  mCAL,  mCAL,  mCAL,  mCAL,  mCAL,  mCAL,  mCAL,  mCAL,  mCAL,  mCAL,
+	mCAL,  mCAL,  mCAL,  mCAL,  mCAL,  mCAL,  mCAL,  mCAL,  mCAL,  mCAL,  mCAL,  mCAL,  mCAL,  mCAL,  mCAL,  mCAL,
+	mCAL,  mCAL,  mCAL,  mCAL,  mCAL,  mCAL,  mCAL,  mCAL,  mCAL,  mCAL,  mCAL,  mCAL,  mCAL,  mCAL,  mCAL,  mCAL,
+	mCAL,  mCAL,  mCAL,  mCAL,  mCAL,  mCAL,  mCAL,  mCAL,  mCAL,  mCAL,  mCAL,  mCAL,  mCAL,  mCAL,  mCAL,  mCAL,
 
 //  0      1      2      3      4      5      6      7      8      9      A      B      C      D      E      F
 	// 0x200
-	0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,
-	0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,
-	0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,
-	0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,
+	mLBI,  mLBI,  mLBI,  mLBI,  mLBI,  mLBI,  mLBI,  mLBI,  mLBI,  mLBI,  mLBI,  mLBI,  mLBI,  mLBI,  mLBI,  mLBI,
+	mLYI,  mLYI,  mLYI,  mLYI,  mLYI,  mLYI,  mLYI,  mLYI,  mLYI,  mLYI,  mLYI,  mLYI,  mLYI,  mLYI,  mLYI,  mLYI,
+	mLXI,  mLXI,  mLXI,  mLXI,  mLXI,  mLXI,  mLXI,  mLXI,  mLXI,  mLXI,  mLXI,  mLXI,  mLXI,  mLXI,  mLXI,  mLXI,
+	mLAI,  mLAI,  mLAI,  mLAI,  mLAI,  mLAI,  mLAI,  mLAI,  mLAI,  mLAI,  mLAI,  mLAI,  mLAI,  mLAI,  mLAI,  mLAI,
 	// 0x240
-	0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,
-	0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,
-	0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,
-	0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,
+	mLBR,  mLBR,  mLBR,  mLBR,  mLBR,  mLBR,  mLBR,  mLBR,  mLBR,  mLBR,  mLBR,  mLBR,  mLBR,  mLBR,  mLBR,  mLBR,
+	mLAR,  mLAR,  mLAR,  mLAR,  mLAR,  mLAR,  mLAR,  mLAR,  mLAR,  mLAR,  mLAR,  mLAR,  mLAR,  mLAR,  mLAR,  mLAR,
+	mREDD, mREDD, mREDD, mREDD, mREDD, mREDD, mREDD, mREDD, mREDD, mREDD, mREDD, mREDD, mREDD, mREDD, mREDD, mREDD,
+	mLAMR, mLAMR, mLAMR, mLAMR, mLAMR, mLAMR, mLAMR, mLAMR, mLAMR, mLAMR, mLAMR, mLAMR, mLAMR, mLAMR, mLAMR, mLAMR,
 	// 0x280
-	0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,
-	0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,
-	0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,
-	0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,
+	mAI,   mAI,   mAI,   mAI,   mAI,   mAI,   mAI,   mAI,   mAI,   mAI,   mAI,   mAI,   mAI,   mAI,   mAI,   mAI,
+	mLMIIY,mLMIIY,mLMIIY,mLMIIY,mLMIIY,mLMIIY,mLMIIY,mLMIIY,mLMIIY,mLMIIY,mLMIIY,mLMIIY,mLMIIY,mLMIIY,mLMIIY,mLMIIY,
+	mTDD,  mTDD,  mTDD,  mTDD,  mTDD,  mTDD,  mTDD,  mTDD,  mTDD,  mTDD,  mTDD,  mTDD,  mTDD,  mTDD,  mTDD,  mTDD,
+	mALEI, mALEI, mALEI, mALEI, mALEI, mALEI, mALEI, mALEI, mALEI, mALEI, mALEI, mALEI, mALEI, mALEI, mALEI, mALEI,
 	// 0x2c0
-	0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,
-	0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,
-	0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,
-	0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,
+	mLRB,  mLRB,  mLRB,  mLRB,  mLRB,  mLRB,  mLRB,  mLRB,  mLRB,  mLRB,  mLRB,  mLRB,  mLRB,  mLRB,  mLRB,  mLRB,
+	mLRA,  mLRA,  mLRA,  mLRA,  mLRA,  mLRA,  mLRA,  mLRA,  mLRA,  mLRA,  mLRA,  mLRA,  mLRA,  mLRA,  mLRA,  mLRA,
+	mSEDD, mSEDD, mSEDD, mSEDD, mSEDD, mSEDD, mSEDD, mSEDD, mSEDD, mSEDD, mSEDD, mSEDD, mSEDD, mSEDD, mSEDD, mSEDD,
+	mXMRA, mXMRA, mXMRA, mXMRA, mXMRA, mXMRA, mXMRA, mXMRA, mXMRA, mXMRA, mXMRA, mXMRA, mXMRA, mXMRA, mXMRA, mXMRA,
 
 //  0      1      2      3      4      5      6      7      8      9      A      B      C      D      E      F
 	// 0x300
-	0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,
-	0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,
-	0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,
-	0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,
+	mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,
+	mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,
+	mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,
+	mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,
 	// 0x340
-	0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,
-	0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,
-	0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,
-	0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,
+	mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,
+	mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,
+	mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,
+	mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,
 	// 0x380
-	0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,
-	0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,
-	0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,
-	0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,
+	mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,
+	mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,
+	mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,
+	mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,
 	// 0x3c0
-	0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,
-	0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,
-	0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,
-	0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0,     0
+	mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,
+	mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,
+	mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,
+	mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR,   mBR
 };
 
 
@@ -139,16 +183,55 @@ const u8 hmcs400_disassembler::hmcs400_mnemonic[0x400] =
 
 offs_t hmcs400_disassembler::disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer &params)
 {
-	u16 op = opcodes.r16(pc) & 0x3ff;
+	u16 op = opcodes.r16(pc++) & 0x3ff;
 	u8 instr = hmcs400_mnemonic[op];
-	s8 bits = s_bits[instr];
+	u8 bits = s_bits[instr];
+	int len = 1;
 
-	util::stream_format(stream, "%-8s", s_mnemonics[instr]);
-
-	// opcode parameter
-	if (bits != 0)
+	// special case for (XY) opcode
+	if (bits == 99)
 	{
+		util::stream_format(stream, "%s", s_mnemonics[instr]);
+
+		if (op & 1)
+			stream << "X";
+		if (op & 2)
+			stream << "Y";
+	}
+	else
+	{
+		util::stream_format(stream, "%-8s", s_mnemonics[instr]);
+
+		// opcode parameter
+		if (bits != 0)
+		{
+			u16 param1 = op & ((1 << (bits % 10)) - 1);
+			u16 param2 = 0;
+			if (bits >= 10)
+			{
+				len++;
+				param2 = params.r16(pc++) & 0x3ff;
+			}
+
+			if (instr >= mBR && instr <= mCALL)
+			{
+				if (instr == mBR)
+					param1 |= pc & 0x3f00;
+				else if (instr != mCAL)
+					param1 = param1 << 10 | param2;
+				util::stream_format(stream, "$%04X", param1); // ROM address
+			}
+			else if (instr != mILL2 && instr != mLAW && instr != mLWA)
+			{
+				if (bits != 10)
+					util::stream_format(stream, (param1 < 10) ? "%d" : "$%X", param1);
+				if (bits > 10)
+					stream << ",";
+				if (bits >= 10)
+					util::stream_format(stream, "$%03X", param2); // RAM address
+			}
+		}
 	}
 
-	return 1 | s_flags[instr] | SUPPORTED;
+	return len | s_flags[instr] | SUPPORTED;
 }
diff --git a/src/tools/unidasm.cpp b/src/tools/unidasm.cpp
index da562db857b..be30d8d159b 100644
--- a/src/tools/unidasm.cpp
+++ b/src/tools/unidasm.cpp
@@ -68,6 +68,7 @@ using util::BIT;
 #include "cpu/hcd62121/hcd62121d.h"
 #include "cpu/hd61700/hd61700d.h"
 #include "cpu/hmcs40/hmcs40d.h"
+#include "cpu/hmcs400/hmcs400d.h"
 #include "cpu/hp2100/hp2100d.h"
 #include "cpu/hpc/hpcdasm.h"
 #include "cpu/hphybrid/hphybrid_dasm.h"
@@ -474,6 +475,7 @@ static const dasm_table_entry dasm_table[] =
 	{ "hd6309",          be,  0, []() -> util::disasm_interface * { return new hd6309_disassembler; } },
 	{ "hd63701",         be,  0, []() -> util::disasm_interface * { return new m680x_disassembler(63701); } },
 	{ "hmcs40",          le, -1, []() -> util::disasm_interface * { return new hmcs40_disassembler; } },
+	{ "hmcs400",         le, -1, []() -> util::disasm_interface * { return new hmcs400_disassembler; } },
 	{ "hp2100",          be, -1, []() -> util::disasm_interface * { return new hp2100_disassembler; } },
 	{ "hp21mx",          be, -1, []() -> util::disasm_interface * { return new hp21mx_disassembler; } },
 	{ "hp_5061_3001",    be, -1, []() -> util::disasm_interface * { return new hp_5061_3001_disassembler; } },