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-netlist: Added 74166 Parallel-Load 8-Bit Shift Register device. [Ryan Holtz]

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This commit is contained in:
therealmogminer@gmail.com 2016-12-14 00:11:35 +01:00
parent e3e38025c3
commit 4a71e6bdcf
6 changed files with 179 additions and 0 deletions
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2
scripts/src/netlist.lua
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@ -119,6 +119,8 @@ project "netlist"
MAME_DIR .. "src/lib/netlist/devices/nld_74153.h",
MAME_DIR .. "src/lib/netlist/devices/nld_74161.cpp",
MAME_DIR .. "src/lib/netlist/devices/nld_74161.h",
MAME_DIR .. "src/lib/netlist/devices/nld_74166.cpp",
MAME_DIR .. "src/lib/netlist/devices/nld_74166.h",
MAME_DIR .. "src/lib/netlist/devices/nld_74174.cpp",
MAME_DIR .. "src/lib/netlist/devices/nld_74174.h",
MAME_DIR .. "src/lib/netlist/devices/nld_74175.cpp",

1
src/lib/netlist/build/makefile
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@ -80,6 +80,7 @@ NLOBJS := \
$(NLOBJ)/devices/nld_74123.o \
$(NLOBJ)/devices/nld_74153.o \
$(NLOBJ)/devices/nld_74161.o \
$(NLOBJ)/devices/nld_74166.o \
$(NLOBJ)/devices/nld_74174.o \
$(NLOBJ)/devices/nld_74175.o \
$(NLOBJ)/devices/nld_74192.o \

2
src/lib/netlist/devices/net_lib.cpp
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@ -120,6 +120,7 @@ static void initialize_factory(factory_list_t &factory)
ENTRYX(74123, TTL_74123, "-")
ENTRYX(74153, TTL_74153, "+C0,C1,C2,C3,A,B,G")
ENTRYX(74161, TTL_74161, "-")
ENTRYX(74166, TTL_74166, "-")
ENTRYX(74174, TTL_74174, "-")
ENTRYX(74175, TTL_74175, "-")
ENTRYX(74192, TTL_74192, "-")
@ -154,6 +155,7 @@ static void initialize_factory(factory_list_t &factory)
ENTRYX(74123_dip, TTL_74123_DIP, "-")
ENTRYX(74153_dip, TTL_74153_DIP, "-")
ENTRYX(74161_dip, TTL_74161_DIP, "-")
ENTRYX(74166_dip, TTL_74166_DIP, "-")
ENTRYX(74174_dip, TTL_74174_DIP, "-")
ENTRYX(74175_dip, TTL_74175_DIP, "-")
ENTRYX(74192_dip, TTL_74192_DIP, "-")

1
src/lib/netlist/devices/net_lib.h
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@ -28,6 +28,7 @@
#include "nld_74123.h"
#include "nld_74153.h"
#include "nld_74161.h"
#include "nld_74166.h"
#include "nld_74174.h"
#include "nld_74175.h"
#include "nld_74192.h"

136
src/lib/netlist/devices/nld_74166.cpp Normal file
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@ -0,0 +1,136 @@
// license:BSD-3-Clause
// copyright-holders:Ryan Holtz
/*
* nld_74166.c
*
*/
#include "nld_74166.h"
namespace netlist
{
namespace devices
{
NETLIB_OBJECT(74166)
{
NETLIB_CONSTRUCTOR(74166)
, m_DATA(*this, {{ "H", "G", "F", "E", "D", "C", "B", "A" }})
, m_SER(*this, "SER")
, m_CLRQ(*this, "CLRQ")
, m_SH_LDQ(*this, "SH_LDQ")
, m_CLK(*this, "CLK")
, m_CLKINH(*this, "CLKINH")
, m_QH(*this, "QH")
, m_shifter(*this, "m_shifter", 0)
, m_last_CLRQ(*this, "m_last_CLRQ", 0)
, m_last_CLK(*this, "m_last_CLK", 0)
{
}
NETLIB_RESETI();
NETLIB_UPDATEI();
protected:
object_array_t<logic_input_t, 8> m_DATA;
logic_input_t m_SER;
logic_input_t m_CLRQ;
logic_input_t m_SH_LDQ;
logic_input_t m_CLK;
logic_input_t m_CLKINH;
logic_output_t m_QH;
state_var<unsigned> m_shifter;
state_var<unsigned> m_last_CLRQ;
state_var<unsigned> m_last_CLK;
};
NETLIB_OBJECT_DERIVED(74166_dip, 74166)
{
NETLIB_CONSTRUCTOR_DERIVED(74166_dip, 74166)
{
register_subalias("1", m_SER);
register_subalias("2", m_DATA[7]);
register_subalias("3", m_DATA[6]);
register_subalias("4", m_DATA[5]);
register_subalias("5", m_DATA[4]);
register_subalias("6", m_CLKINH);
register_subalias("7", m_CLK);
register_subalias("9", m_CLRQ);
register_subalias("10", m_DATA[3]);
register_subalias("11", m_DATA[2]);
register_subalias("12", m_DATA[1]);
register_subalias("13", m_QH);
register_subalias("14", m_DATA[0]);
register_subalias("15", m_SH_LDQ);
}
};
NETLIB_RESET(74166)
{
m_shifter = 0;
m_last_CLRQ = 0;
m_last_CLK = 0;
}
// FIXME: Timing
static const netlist_time delay[4] =
{
NLTIME_FROM_NS(40),
NLTIME_FROM_NS(40),
NLTIME_FROM_NS(40),
NLTIME_FROM_NS(40)
};
NETLIB_UPDATE(74166)
{
netlist_sig_t old_qh = m_QH.net().Q();
netlist_sig_t qh = 0;
netlist_time delay = NLTIME_FROM_NS(26);
if (m_CLRQ())
{
bool clear_unset = !m_last_CLRQ();
if (clear_unset)
{
delay = NLTIME_FROM_NS(35);
}
if (!m_CLK() || m_CLKINH())
{
qh = old_qh;
}
else if (!m_last_CLK)
{
if (!m_SH_LDQ())
{
m_shifter = 0;
for (std::size_t i=0; i<8; i++)
m_shifter |= (m_DATA[i]() << i);
}
else
{
unsigned high_bit = m_SER() ? 0x80 : 0;
m_shifter = high_bit | (m_shifter >> 1);
}
qh = m_shifter & 1;
if (!qh && !clear_unset)
{
delay = NLTIME_FROM_NS(30);
}
}
}
m_last_CLRQ = m_CLRQ();
m_last_CLK = m_CLK();
m_QH.push(qh, delay); //FIXME
}
NETLIB_DEVICE_IMPL(74166)
NETLIB_DEVICE_IMPL(74166_dip)
} //namespace devices
} // namespace netlist

37
src/lib/netlist/devices/nld_74166.h Normal file
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@ -0,0 +1,37 @@
// license:BSD-3-Clause
// copyright-holders:Ryan 161
/*
* nld_74166.h
*
* 74166: Parallel-Load 8-Bit Shift Register
*
* +--------------+
* SER |1 ++ 16| VCC
* A |2 15| SH/LDQ
* B |3 14| H
* C |4 74166 13| QH
* D |5 12| G
* CLKINH |6 11| F
* CLK |7 10| E
* GND |8 9| CLRQ
* +--------------+
*
* SH/LDQ: Shift / !Load
* CLKINH: Clock Inhibit
*
* Naming convention attempts to follow Texas Instruments datasheet
*
*/
#ifndef NLD_74166_H_
#define NLD_74166_H_
#include "nl_setup.h"
#define TTL_74166(name) \
NET_REGISTER_DEV(TTL_74166, name)
#define TTL_74166_DIP(name) \
NET_REGISTER_DEV(TTL_74166_DIP, name)
#endif /* NLD_74166_H_ */