mirror of
https://github.com/holub/mame
synced 2025-05-22 21:58:57 +03:00
Another 32x bug-fix
This commit is contained in:
parent
8d4b357fa9
commit
4a74bdbf24
@ -638,7 +638,7 @@ static UINT16 vdp_get_word_from_68k_mem_default(running_machine *machine, UINT32
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{
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{
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source -= 2; // the SVP introduces some kind of DMA 'lag', which we have to compensate for, this is obvious even on gfx DMAd from ROM (the Speedometer)
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source -= 2; // the SVP introduces some kind of DMA 'lag', which we have to compensate for, this is obvious even on gfx DMAd from ROM (the Speedometer)
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}
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}
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return space68k->read_word(source);
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return space68k->read_word(source);
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}
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}
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else if (( source >= 0xe00000 ) && ( source <= 0xffffff ))
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else if (( source >= 0xe00000 ) && ( source <= 0xffffff ))
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@ -2368,7 +2368,7 @@ static WRITE16_HANDLER( _32x_68k_a15112_w )
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// incase we have a stalled DMA in progress, let the SH2 know there is data available
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// incase we have a stalled DMA in progress, let the SH2 know there is data available
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sh2_notify_dma_data_available(space->machine->device("32x_master_sh2"));
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sh2_notify_dma_data_available(space->machine->device("32x_master_sh2"));
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sh2_notify_dma_data_available(space->machine->device("32x_slave_sh2"));
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sh2_notify_dma_data_available(space->machine->device("32x_slave_sh2"));
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}
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}
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current_fifo_write_pos = 0;
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current_fifo_write_pos = 0;
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}
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}
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@ -2428,7 +2428,7 @@ static WRITE16_HANDLER( _32x_68k_a15106_w )
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if (a15106_reg & 0x1) /* NBA Jam TE relies on this */
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if (a15106_reg & 0x1) /* NBA Jam TE relies on this */
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{
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{
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// install the game rom in the normal 0x000000-0x03fffff space used by the genesis - this allows VDP DMA operations to work as they have to be from this area or RAM
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// install the game rom in the normal 0x000000-0x03fffff space used by the genesis - this allows VDP DMA operations to work as they have to be from this area or RAM
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// it should also UNMAP the banked rom area...
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// it should also UNMAP the banked rom area...
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memory_install_rom(space, 0x0000100, 0x03fffff, 0, 0, memory_region(space->machine, "gamecart") + 0x100);
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memory_install_rom(space, 0x0000100, 0x03fffff, 0, 0, memory_region(space->machine, "gamecart") + 0x100);
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@ -2436,12 +2436,12 @@ static WRITE16_HANDLER( _32x_68k_a15106_w )
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else
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else
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{
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{
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// we should be careful and map back any rom overlay (hint) and backup ram too I think...
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// we should be careful and map back any rom overlay (hint) and backup ram too I think...
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// this is actually blank / nop area
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// this is actually blank / nop area
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// we should also map the banked area back (we don't currently unmap it tho)
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// we should also map the banked area back (we don't currently unmap it tho)
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memory_install_rom(space, 0x0000100, 0x03fffff, 0, 0, memory_region(space->machine, "maincpu")+0x100);
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memory_install_rom(space, 0x0000100, 0x03fffff, 0, 0, memory_region(space->machine, "maincpu")+0x100);
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}
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}
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//printf("_32x_68k_a15106_w %04x\n", data);
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//printf("_32x_68k_a15106_w %04x\n", data);
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/*
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/*
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if (a15106_reg & 0x4)
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if (a15106_reg & 0x4)
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@ -2583,7 +2583,7 @@ static WRITE16_HANDLER( _32x_68k_a15100_w )
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memory_install_rom(space, 0x0880000, 0x08fffff, 0, 0, memory_region(space->machine, "gamecart")); // 'fixed' 512kb rom bank
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memory_install_rom(space, 0x0880000, 0x08fffff, 0, 0, memory_region(space->machine, "gamecart")); // 'fixed' 512kb rom bank
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memory_install_read_bank(space, 0x0900000, 0x09fffff, 0, 0, "bank12"); // 'bankable' 1024kb rom bank
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memory_install_read_bank(space, 0x0900000, 0x09fffff, 0, 0, "bank12"); // 'bankable' 1024kb rom bank
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memory_set_bankptr(space->machine, "bank12", memory_region(space->machine, "gamecart") );
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memory_set_bankptr(space->machine, "bank12", memory_region(space->machine, "gamecart")+((_32x_68k_a15104_reg&0x3)*0x100000) );
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memory_install_rom(space, 0x0000000, 0x03fffff, 0, 0, memory_region(space->machine, "32x_68k_bios"));
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memory_install_rom(space, 0x0000000, 0x03fffff, 0, 0, memory_region(space->machine, "32x_68k_bios"));
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@ -2778,12 +2778,12 @@ static READ16_HANDLER( _32x_common_vdp_regs_r )
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// printf("_32x_68k_a15180_r (a15180) %04x\n",mem_mask);
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// printf("_32x_68k_a15180_r (a15180) %04x\n",mem_mask);
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// read needs authorization too I think, undefined behavior otherwise
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// read needs authorization too I think, undefined behavior otherwise
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switch (offset)
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switch (offset)
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{
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{
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case 0x00:
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case 0x00:
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// the flag is inverted compared to the megadrive
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// the flag is inverted compared to the megadrive
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int ntsc;
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int ntsc;
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if (megadrive_region_pal) ntsc = 0;
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if (megadrive_region_pal) ntsc = 0;
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@ -2793,21 +2793,21 @@ static READ16_HANDLER( _32x_common_vdp_regs_r )
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(_32x_videopriority << 7 ) |
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(_32x_videopriority << 7 ) |
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( _32x_240mode << 6 ) |
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( _32x_240mode << 6 ) |
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( _32x_displaymode << 0 );
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( _32x_displaymode << 0 );
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case 0x02/2:
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case 0x02/2:
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return _32x_screenshift;
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return _32x_screenshift;
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case 0x04/2:
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case 0x04/2:
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return _32x_autofill_length;
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return _32x_autofill_length;
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case 0x06/2:
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case 0x06/2:
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return _32x_autofill_address;
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return _32x_autofill_address;
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case 0x08/2:
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case 0x08/2:
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return _32x_autofill_data;
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return _32x_autofill_data;
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case 0x0a/2:
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case 0x0a/2:
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UINT16 retdata = _32x_a1518a_reg;
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UINT16 retdata = _32x_a1518a_reg;
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UINT16 hpos = get_hposition();
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UINT16 hpos = get_hposition();
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@ -2826,7 +2826,7 @@ static READ16_HANDLER( _32x_common_vdp_regs_r )
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return retdata;
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return retdata;
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}
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}
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return 0x0000;
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return 0x0000;
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}
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}
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@ -2835,7 +2835,7 @@ static READ16_HANDLER( _32x_common_vdp_regs_r )
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static WRITE16_HANDLER( _32x_common_vdp_regs_w )
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static WRITE16_HANDLER( _32x_common_vdp_regs_w )
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{
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{
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// what happens if the z80 accesses it, what authorization do we use? which address space do we get?? the z80 *can* write here and to the framebuffer via the window
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// what happens if the z80 accesses it, what authorization do we use? which address space do we get?? the z80 *can* write here and to the framebuffer via the window
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address_space* _68kspace = cputag_get_address_space(space->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
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address_space* _68kspace = cputag_get_address_space(space->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
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if (space!= _68kspace)
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if (space!= _68kspace)
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@ -2849,14 +2849,14 @@ static WRITE16_HANDLER( _32x_common_vdp_regs_w )
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if (_32x_access_auth!=0)
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if (_32x_access_auth!=0)
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return;
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return;
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}
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}
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switch (offset)
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switch (offset)
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{
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{
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case 0x00:
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case 0x00:
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printf("_32x_68k_a15180_w (a15180) %04x %04x source _32x_access_auth %04x\n",data,mem_mask, _32x_access_auth);
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printf("_32x_68k_a15180_w (a15180) %04x %04x source _32x_access_auth %04x\n",data,mem_mask, _32x_access_auth);
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if (ACCESSING_BITS_0_7)
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if (ACCESSING_BITS_0_7)
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{
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{
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_32x_videopriority = (data & 0x80) >> 7;
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_32x_videopriority = (data & 0x80) >> 7;
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@ -2864,7 +2864,7 @@ static WRITE16_HANDLER( _32x_common_vdp_regs_w )
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_32x_displaymode = (data & 0x03) >> 0;
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_32x_displaymode = (data & 0x03) >> 0;
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}
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}
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break;
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break;
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case 0x02/2:
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case 0x02/2:
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if (ACCESSING_BITS_0_7)
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if (ACCESSING_BITS_0_7)
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{
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{
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@ -2875,7 +2875,7 @@ static WRITE16_HANDLER( _32x_common_vdp_regs_w )
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}
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}
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break;
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break;
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case 0x04/2:
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case 0x04/2:
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if (ACCESSING_BITS_0_7)
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if (ACCESSING_BITS_0_7)
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{
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{
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@ -2887,7 +2887,7 @@ static WRITE16_HANDLER( _32x_common_vdp_regs_w )
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}
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}
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break;
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break;
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case 0x06/2:
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case 0x06/2:
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if (ACCESSING_BITS_0_7)
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if (ACCESSING_BITS_0_7)
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{
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{
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@ -2899,7 +2899,7 @@ static WRITE16_HANDLER( _32x_common_vdp_regs_w )
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_32x_autofill_address = (_32x_autofill_address & 0x00ff) | (data & 0xff00);
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_32x_autofill_address = (_32x_autofill_address & 0x00ff) | (data & 0xff00);
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}
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}
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break;
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break;
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case 0x08/2:
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case 0x08/2:
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if (ACCESSING_BITS_0_7)
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if (ACCESSING_BITS_0_7)
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{
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{
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@ -2921,7 +2921,7 @@ static WRITE16_HANDLER( _32x_common_vdp_regs_w )
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}
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}
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}
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}
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break;
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break;
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case 0x0a/2:
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case 0x0a/2:
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// bit 0 is the framebuffer select;
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// bit 0 is the framebuffer select;
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_32x_a1518a_reg = (_32x_a1518a_reg & 0xfffe) | (data & 1);
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_32x_a1518a_reg = (_32x_a1518a_reg & 0xfffe) | (data & 1);
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@ -2937,11 +2937,11 @@ static WRITE16_HANDLER( _32x_common_vdp_regs_w )
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_32x_access_dram = _32x_dram1;
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_32x_access_dram = _32x_dram1;
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}
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}
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break;
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break;
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}
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}
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}
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}
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@ -2999,7 +2999,7 @@ static WRITE16_HANDLER( _32x_sh2_master_4000_w )
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if (sh2_master_hint_enable) printf("sh2_master_hint_enable enable!\n");
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if (sh2_master_hint_enable) printf("sh2_master_hint_enable enable!\n");
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//if (sh2_master_pwmint_enable) printf("sh2_master_pwn_enable enable!\n");
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//if (sh2_master_pwmint_enable) printf("sh2_master_pwn_enable enable!\n");
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_32x_check_irqs(space->machine);
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_32x_check_irqs(space->machine);
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}
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}
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}
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}
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@ -5354,11 +5354,11 @@ static void genesis_render_videobuffer_to_screenbuffer(running_machine *machine,
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{
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{
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lineptr[x] = _32x_linerender[x]&0x7fff;
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lineptr[x] = _32x_linerender[x]&0x7fff;
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drawn = 1;
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drawn = 1;
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}
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}
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}
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}
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}
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}
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if (drawn==0)
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if (drawn==0)
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{
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{
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if (dat&0x10000)
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if (dat&0x10000)
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@ -5366,14 +5366,14 @@ static void genesis_render_videobuffer_to_screenbuffer(running_machine *machine,
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else
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else
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lineptr[x] = megadrive_vdp_palette_lookup[(dat&0x0f) | segac2_bg_pal_lookup[(dat&0x30)>>4]];
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lineptr[x] = megadrive_vdp_palette_lookup[(dat&0x0f) | segac2_bg_pal_lookup[(dat&0x30)>>4]];
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}
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}
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}
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}
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}
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}
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else
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else
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{
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{
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for (x=0;x<320;x++)
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for (x=0;x<320;x++)
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{
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{
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UINT32 dat;
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UINT32 dat;
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@ -5398,11 +5398,11 @@ static void genesis_render_videobuffer_to_screenbuffer(running_machine *machine,
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{
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{
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lineptr[x] = _32x_linerender[x]&0x7fff;
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lineptr[x] = _32x_linerender[x]&0x7fff;
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drawn = 1;
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drawn = 1;
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}
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}
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}
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}
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}
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}
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if (drawn==0)
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if (drawn==0)
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{
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{
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/* Verify my handling.. I'm not sure all cases are correct */
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/* Verify my handling.. I'm not sure all cases are correct */
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@ -5442,9 +5442,9 @@ static void genesis_render_videobuffer_to_screenbuffer(running_machine *machine,
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break;
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break;
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}
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}
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}
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}
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}
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}
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}
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}
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@ -5790,7 +5790,7 @@ void _32x_check_irqs(running_machine* machine)
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else cpu_set_input_line(_32x_master_cpu,SH2_VINT_IRQ_LEVEL,CLEAR_LINE);
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else cpu_set_input_line(_32x_master_cpu,SH2_VINT_IRQ_LEVEL,CLEAR_LINE);
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if (sh2_slave_vint_enable && sh2_slave_vint_pending) cpu_set_input_line(_32x_slave_cpu,SH2_VINT_IRQ_LEVEL,ASSERT_LINE);
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if (sh2_slave_vint_enable && sh2_slave_vint_pending) cpu_set_input_line(_32x_slave_cpu,SH2_VINT_IRQ_LEVEL,ASSERT_LINE);
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else cpu_set_input_line(_32x_slave_cpu,SH2_VINT_IRQ_LEVEL,CLEAR_LINE);
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else cpu_set_input_line(_32x_slave_cpu,SH2_VINT_IRQ_LEVEL,CLEAR_LINE);
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}
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}
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@ -5825,9 +5825,9 @@ static TIMER_DEVICE_CALLBACK( scanline_timer_callback )
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// 32x interrupt!
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// 32x interrupt!
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if (_32x_is_connected)
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if (_32x_is_connected)
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{
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{
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sh2_master_vint_pending = 1;
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sh2_master_vint_pending = 1;
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sh2_slave_vint_pending = 1;
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sh2_slave_vint_pending = 1;
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_32x_check_irqs(timer.machine);
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_32x_check_irqs(timer.machine);
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}
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}
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}
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}
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