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https://github.com/holub/mame
synced 2025-05-27 16:21:34 +03:00
Start killing off non-diexec PULSE_LINE hacks (nw)
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@ -168,6 +168,9 @@ public:
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virtual void WW(offs_t A, uint16_t V) = 0;
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virtual void WL(offs_t A, uint32_t V) = 0;
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virtual void set_frt_input(int state) = 0;
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void pulse_frt_input() { set_frt_input(ASSERT_LINE); set_frt_input(CLEAR_LINE); }
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protected:
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// compilation boundaries -- how far back/forward does the analysis extend?
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enum : u32
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@ -82,7 +82,7 @@ public:
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DECLARE_READ32_MEMBER( sh7604_r );
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DECLARE_READ32_MEMBER(sh2_internal_a5);
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void sh2_set_frt_input(int state);
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virtual void set_frt_input(int state) override;
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void sh2_notify_dma_data_available();
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void func_fastirq();
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@ -722,15 +722,8 @@ READ32_MEMBER( sh2_device::sh7604_r )
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return m_m[offset];
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}
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void sh2_device::sh2_set_frt_input(int state)
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void sh2_device::set_frt_input(int state)
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{
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if(state == PULSE_LINE)
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{
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sh2_set_frt_input(ASSERT_LINE);
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sh2_set_frt_input(CLEAR_LINE);
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return;
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}
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if(m_frt_input == state) {
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return;
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}
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@ -216,7 +216,7 @@ public:
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TIMER_CALLBACK_MEMBER( sh4_timer_callback );
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TIMER_CALLBACK_MEMBER( sh4_dmac_callback );
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void sh4_set_frt_input(int state);
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virtual void set_frt_input(int state) override;
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void sh4_set_irln_input(int value);
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//void sh4_set_ftcsr_callback(sh4_ftcsr_callback callback);
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int sh4_dma_data(struct sh4_device_dma *s);
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@ -1066,18 +1066,11 @@ READ32_MEMBER( sh4_base_device::sh4_internal_r )
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return m_m[offset];
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}
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void sh34_base_device::sh4_set_frt_input(int state)
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void sh34_base_device::set_frt_input(int state)
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{
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if (m_cpu_type != CPU_TYPE_SH4)
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fatalerror("sh4_set_frt_input uses m_m[] with SH3\n");
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if(state == PULSE_LINE)
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{
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sh4_set_frt_input(ASSERT_LINE);
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sh4_set_frt_input(CLEAR_LINE);
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return;
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}
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if(m_sh2_state->m_frt_input == state) {
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return;
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}
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@ -826,9 +826,12 @@ MACHINE_RESET_MEMBER(bublbobl_state,common) // things common on both tokio and b
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m_soundnmi->in_w<0>(0); // clear sound NMI stuff
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m_soundnmi->in_w<1>(0);
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m_subcpu->set_input_line(INPUT_LINE_NMI, CLEAR_LINE); // if a subcpu nmi is active (extremely remote chance), it is cleared
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m_maincpu->set_input_line(INPUT_LINE_RESET, PULSE_LINE); // maincpu is reset
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m_subcpu->set_input_line(INPUT_LINE_RESET, PULSE_LINE); // subcpu is reset
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common_sreset(PULSE_LINE); // /SRESET is pulsed
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if (!m_sreset_old)
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{
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// /SRESET is pulsed
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common_sreset(ASSERT_LINE);
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common_sreset(CLEAR_LINE);
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}
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}
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@ -177,7 +177,10 @@ void namcoio_device::device_reset()
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elem = 0;
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if (m_reset != ASSERT_LINE)
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set_reset_line(PULSE_LINE);
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{
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set_reset_line(ASSERT_LINE);
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set_reset_line(CLEAR_LINE);
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}
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}
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/*****************************************************************************
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@ -79,7 +79,7 @@ WRITE32_MEMBER(saturn_state::minit_w)
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machine().scheduler().boost_interleave(m_minit_boost_timeslice, attotime::from_usec(m_minit_boost));
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machine().scheduler().trigger(1000);
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machine().scheduler().synchronize(); // force resync
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m_slave->sh2_set_frt_input(PULSE_LINE);
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m_slave->pulse_frt_input();
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}
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WRITE32_MEMBER(saturn_state::sinit_w)
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@ -87,7 +87,7 @@ WRITE32_MEMBER(saturn_state::sinit_w)
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//logerror("%s SINIT write = %08x\n", machine().describe_context(),data);
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machine().scheduler().boost_interleave(m_sinit_boost_timeslice, attotime::from_usec(m_sinit_boost));
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machine().scheduler().synchronize(); // force resync
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m_maincpu->sh2_set_frt_input(PULSE_LINE);
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m_maincpu->pulse_frt_input();
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}
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/*
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@ -120,7 +120,7 @@ WRITE32_MEMBER(saturn_state::saturn_minit_w)
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machine().scheduler().trigger(1000);
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}
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m_slave->sh2_set_frt_input(PULSE_LINE);
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m_slave->pulse_frt_input();
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}
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WRITE32_MEMBER(saturn_state::saturn_sinit_w)
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@ -131,7 +131,7 @@ WRITE32_MEMBER(saturn_state::saturn_sinit_w)
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else
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machine().scheduler().boost_interleave(m_sinit_boost_timeslice, attotime::from_usec(m_sinit_boost));
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m_maincpu->sh2_set_frt_input(PULSE_LINE);
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m_maincpu->pulse_frt_input();
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}
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