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XaviX - looking at more timers (nw) (#4299)
* XaviX - looking at more timers (nw) * fix crash with ekara -cart1 ec0015 song 1, confirms other indirect opcodes must bypass lowbus * (nw) * and this hack can go away now (nw)
This commit is contained in:
David Haywood
R. Belmont
parent
85e9231192
commit
4af89199f5
@ -2,19 +2,19 @@
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# copyright-holders:David Haywood
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# xavix - m6502 with custom opcodes
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brk_xav_imp ora_idx kil_non slo_idx nop_zpg ora_zpg asl_zpg slo_zpg php_imp ora_imm asl_acc anc_imm nop_aba ora_aba asl_aba slo_aba
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bpl_rel ora_idy kil_non slo_idy nop_zpx ora_zpx asl_zpx slo_zpx clc_imp ora_aby nop_imp slo_aby nop_abx ora_abx asl_abx slo_abx
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bpl_rel xavora_idy kil_non slo_idy nop_zpx ora_zpx asl_zpx slo_zpx clc_imp ora_aby nop_imp slo_aby nop_abx ora_abx asl_abx slo_abx
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jsr_adr and_idx callf_xa3 rla_idx bit_zpg and_zpg rol_zpg rla_zpg plp_imp and_imm rol_acc anc_imm bit_aba and_aba rol_aba rla_aba
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bmi_rel and_idy kil_non rla_idy nop_zpx and_zpx rol_zpx rla_zpx sec_imp and_aby nop_imp rla_aby nop_abx and_abx rol_abx rla_abx
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bmi_rel xavand_idy kil_non rla_idy nop_zpx and_zpx rol_zpx rla_zpx sec_imp and_aby nop_imp rla_aby nop_abx and_abx rol_abx rla_abx
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rti_xav_imp eor_idx kil_non sre_idx nop_zpg eor_zpg lsr_zpg sre_zpg pha_imp eor_imm lsr_acc asr_imm jmp_adr eor_aba lsr_aba sre_aba
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bvc_rel eor_idy kil_non sre_idy nop_zpx eor_zpx lsr_zpx sre_zpx cli_imp eor_aby nop_imp sre_aby nop_abx eor_abx lsr_abx sre_abx
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bvc_rel xaveor_idy kil_non sre_idy nop_zpx eor_zpx lsr_zpx sre_zpx cli_imp eor_aby nop_imp sre_aby nop_abx eor_abx lsr_abx sre_abx
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rts_imp adc_idx kil_non rra_idx nop_zpg adc_zpg ror_zpg rra_zpg pla_imp adc_imm ror_acc arr_imm jmp_ind adc_aba ror_aba rra_aba
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bvs_rel adc_idy kil_non rra_idy nop_zpx adc_zpx ror_zpx rra_zpx sei_imp adc_aby nop_imp rra_aby nop_abx adc_abx ror_abx rra_abx
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bvs_rel xavadc_idy kil_non rra_idy nop_zpx adc_zpx ror_zpx rra_zpx sei_imp adc_aby nop_imp rra_aby nop_abx adc_abx ror_abx rra_abx
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retf_imp sta_idx nop_imm sax_idx sty_zpg sta_zpg stx_zpg sax_zpg dey_imp nop_imm txa_imp ane_imm sty_aba sta_aba stx_aba sax_aba
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bcc_rel sta_idy kil_non sha_idy sty_zpx sta_zpx stx_zpy sax_zpy tya_imp sta_aby txs_imp shs_aby shy_abx sta_abx shx_aby sha_aby
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ldy_imm lda_idx ldx_imm lax_idx ldy_zpg lda_zpg ldx_zpg lax_zpg tay_imp lda_imm tax_imp lxa_imm ldy_aba lda_aba ldx_aba lax_aba
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bcs_rel xavlda_idy kil_non lax_idy ldy_zpx lda_zpx ldx_zpy lax_zpy clv_imp lda_aby tsx_imp las_aby ldy_abx lda_abx ldx_aby lax_aby
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cpy_imm cmp_idx nop_imm dcp_idx cpy_zpg cmp_zpg dec_zpg dcp_zpg iny_imp cmp_imm dex_imp sbx_imm cpy_aba cmp_aba dec_aba dcp_aba
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bne_rel cmp_idy kil_non dcp_idy nop_zpx cmp_zpx dec_zpx dcp_zpx cld_imp cmp_aby nop_imp dcp_aby nop_abx cmp_abx dec_abx dcp_abx
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bne_rel xavcmp_idy kil_non dcp_idy nop_zpx cmp_zpx dec_zpx dcp_zpx cld_imp cmp_aby nop_imp dcp_aby nop_abx cmp_abx dec_abx dcp_abx
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cpx_imm sbc_idx nop_imm isb_idx cpx_zpg sbc_zpg inc_zpg isb_zpg inx_imp sbc_imm nop_imp sbc_imm cpx_aba sbc_aba inc_aba isb_aba
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beq_rel sbc_idy kil_non isb_idy nop_zpx sbc_zpx inc_zpx isb_zpx sed_imp sbc_aby nop_imp isb_aby nop_abx sbc_abx inc_abx isb_abx
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beq_rel xavsbc_idy kil_non isb_idy nop_zpx sbc_zpx inc_zpx isb_zpx sed_imp sbc_aby nop_imp isb_aby nop_abx sbc_abx inc_abx isb_abx
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reset
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@ -2,19 +2,19 @@
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# copyright-holders:David Haywood
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# Super XaviX (SSD 2000) - m6502 with custom opcodes
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brk_xav_imp ora_idx cmc_imp oral0_acc asr_zpg ora_zpg asl_zpg oral1_acc php_imp ora_imm asl_acc oral2_acc asr_aba ora_aba asl_aba oral3_acc
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bpl_rel ora_idy phx_imp orapa_imp asr_zpx ora_zpx asl_zpx orapb_imp clc_imp ora_aby asr_acc spa0_acc asr_abx ora_abx asl_abx spb0_acc
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bpl_rel xavora_idy phx_imp orapa_imp asr_zpx ora_zpx asl_zpx orapb_imp clc_imp ora_aby asr_acc spa0_acc asr_abx ora_abx asl_abx spb0_acc
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jsr_adr and_idx callf_xa3 andl0_acc bit_zpg and_zpg rol_zpg andl1_acc plp_imp and_imm rol_acc andl2_acc bit_aba and_aba rol_aba andl3_acc
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bmi_rel and_idy plx_imp andpa_imp bit_zpx and_zpx rol_zpx andpb_imp sec_imp and_aby bit_imm lpa0_acc bit_abx and_abx rol_abx lpb0_acc
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bmi_rel xavand_idy plx_imp andpa_imp bit_zpx and_zpx rol_zpx andpb_imp sec_imp and_aby bit_imm lpa0_acc bit_abx and_abx rol_abx lpb0_acc
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rti_xav_imp eor_idx nop_imp eorl0_acc nop_imp eor_zpg lsr_zpg eorl1_acc pha_imp eor_imm lsr_acc eorl2_acc jmp_adr eor_aba lsr_aba eorl3_acc
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bvc_rel eor_idy phy_imp eorpa_imp nop_imp eor_zpx lsr_zpx eorpb_imp cli_imp eor_aby nop_imp spa1_acc callf_aba eor_abx lsr_abx spb1_acc
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bvc_rel xaveor_idy phy_imp eorpa_imp nop_imp eor_zpx lsr_zpx eorpb_imp cli_imp eor_aby nop_imp spa1_acc callf_aba eor_abx lsr_abx spb1_acc
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rts_imp adc_idx nop_imp adcl0_acc nop_imp adc_zpg ror_zpg adcl1_acc pla_imp adc_imm ror_acc adcl2_acc jmp_ind adc_aba ror_aba adcl3_acc
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bvs_rel adc_idy ply_imp adcpa_imp nop_imp adc_zpx ror_zpx adcpb_imp sei_imp adc_aby nop_imp lpa1_acc jmpf_ind adc_abx ror_abx lpb1_acc
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bvs_rel xavadc_idy ply_imp adcpa_imp nop_imp adc_zpx ror_zpx adcpb_imp sei_imp adc_aby nop_imp lpa1_acc jmpf_ind adc_abx ror_abx lpb1_acc
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retf_imp sta_idx stz_zpg stal0_acc sty_zpg sta_zpg stx_zpg stal1_acc dey_imp sev_imp txa_imp stal2_acc sty_aba sta_aba stx_aba stal3_acc
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bcc_rel sta_idy stz_aba stapa_imp sty_zpx sta_zpx stx_zpy stapb_imp tya_imp sta_aby txs_imp spa2_acc sty_abx sta_abx stx_aby spb2_acc
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ldy_imm lda_idx ldx_imm ldal0_acc ldy_zpg lda_zpg ldx_zpg ldal1_acc tay_imp lda_imm tax_imp ldal2_acc ldy_aba lda_aba ldx_aba ldal3_acc
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bcs_rel xavlda_idy clr_acc ldapa_imp ldy_zpx lda_zpx ldx_zpy ldapb_imp clv_imp lda_aby tsx_imp lpa2_acc ldy_abx lda_abx ldx_aby lpb2_acc
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cpy_imm cmp_idx dec_acc cmpl0_acc cpy_zpg cmp_zpg dec_zpg cmpl1_acc iny_imp cmp_imm dex_imp cmpl2_acc cpy_aba cmp_aba dec_aba cmpl3_acc
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bne_rel cmp_idy not_acc cmppa_imp nop_imp cmp_zpx dec_zpx cmppb_imp cld_imp cmp_aby nop_imp decpa_imp nop_imp cmp_abx dec_abx decpb_imp
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bne_rel xavcmp_idy not_acc cmppa_imp nop_imp cmp_zpx dec_zpx cmppb_imp cld_imp cmp_aby nop_imp decpa_imp nop_imp cmp_abx dec_abx decpb_imp
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cpx_imm sbc_idx inc_acc sbcl0_acc cpx_zpg sbc_zpg inc_zpg sbcl1_acc inx_imp sbc_imm nop_imp sbcl2_acc cpx_aba sbc_aba inc_aba sbcl3_acc
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beq_rel sbc_idy neg_acc sbcpa_imp nop_imp sbc_zpx inc_zpx sbcpb_imp sed_imp sbc_aby nop_imp incpa_imp nop_imp sbc_abx inc_abx incpb_imp
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beq_rel xavsbc_idy neg_acc sbcpa_imp nop_imp sbc_zpx inc_zpx sbcpb_imp sed_imp sbc_aby nop_imp incpa_imp nop_imp sbc_abx inc_abx incpb_imp
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reset
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@ -123,3 +123,67 @@ xavlda_idy
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A = read_special(TMP+Y);
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set_nz(A);
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prefetch();
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xavadc_idy
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TMP2 = read_pc();
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TMP = read(TMP2);
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TMP = set_h(TMP, read((TMP2+1) & 0xff));
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if(page_changing(TMP, Y)) {
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read(set_l(TMP, TMP+Y));
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}
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do_adc(read_special(TMP+Y));
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prefetch();
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xavcmp_idy
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TMP2 = read_pc();
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TMP = read(TMP2);
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TMP = set_h(TMP, read((TMP2+1) & 0xff));
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if(page_changing(TMP, Y)) {
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read(set_l(TMP, TMP+Y));
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}
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do_cmp(A, read_special(TMP+Y));
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prefetch();
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xavsbc_idy
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TMP2 = read_pc();
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TMP = read(TMP2);
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TMP = set_h(TMP, read((TMP2+1) & 0xff));
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if(page_changing(TMP, Y)) {
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read(set_l(TMP, TMP+Y));
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}
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do_sbc(read_special(TMP+Y));
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prefetch();
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xaveor_idy
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TMP2 = read_pc();
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TMP = read(TMP2);
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TMP = set_h(TMP, read((TMP2+1) & 0xff));
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if(page_changing(TMP, Y)) {
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read(set_l(TMP, TMP+Y));
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}
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A ^= read_special(TMP+Y);
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set_nz(A);
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prefetch();
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xavand_idy
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TMP2 = read_pc();
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TMP = read(TMP2);
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TMP = set_h(TMP, read((TMP2+1) & 0xff));
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if(page_changing(TMP, Y)) {
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read(set_l(TMP, TMP+Y));
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}
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A &= read_special(TMP+Y);
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set_nz(A);
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prefetch();
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xavora_idy
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TMP2 = read_pc();
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TMP = read(TMP2);
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TMP = set_h(TMP, read((TMP2+1) & 0xff));
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if(page_changing(TMP, Y)) {
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read(set_l(TMP, TMP+Y));
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}
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A |= read_special(TMP+Y);
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set_nz(A);
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prefetch();
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@ -138,9 +138,13 @@ inline uint8_t xavix_device::read_full_data(uint8_t databank, uint16_t adr)
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if (adr < 0x8000)
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{
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if (adr == 0xfe)
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{
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return m_codebank;
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}
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else if (adr == 0xff)
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{
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return databank;
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}
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return m_lowbus_space->read_byte(adr);
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}
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@ -154,9 +158,15 @@ inline uint8_t xavix_device::read_full_data(uint8_t databank, uint16_t adr)
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if (adr < 0x8000)
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{
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if (adr == 0xfe)
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{
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//logerror("%02x%04x returning codebank\n", m_codebank, PC);
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return m_codebank;
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}
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else if (adr == 0xff)
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{
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//logerror("%02x%04x returning databank\n", m_codebank, PC);
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return databank;
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}
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if ((adr & 0x7fff) >= 0x200)
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{
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@ -164,6 +174,7 @@ inline uint8_t xavix_device::read_full_data(uint8_t databank, uint16_t adr)
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}
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else
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{
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//logerror("%02x%04x returning lowbus %04x\n", m_codebank, PC, adr); // useful for debugging opcodes which must ignore lowbus (all indirect ones?)
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return m_lowbus_space->read_byte(adr);
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}
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}
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@ -32,7 +32,13 @@ public:
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O(brk_xav_imp);
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O(rti_xav_imp);
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O(xavora_idy);
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O(xavand_idy);
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O(xaveor_idy);
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O(xavadc_idy);
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O(xavlda_idy);
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O(xavcmp_idy);
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O(xavsbc_idy);
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typedef device_delegate<int16_t (int which, int half)> xavix_interrupt_vector_delegate;
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@ -435,7 +435,7 @@ READ8_MEMBER(xavix_state::sound_timer3_r)
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return m_sndtimer[3];
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}
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WRITE8_MEMBER(xavix_state::sound_timer3_w)
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WRITE8_MEMBER(xavix_state::sound_timer3_w) // this one is used by ekara (uk carts) , enabled with 08 in 75fe
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{
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m_sndtimer[3] = data;
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LOG("%s: sound_timer3_w %02x\n", machine().describe_context(), data);
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@ -446,23 +446,56 @@ WRITE8_MEMBER(xavix_state::sound_timer3_w)
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READ8_MEMBER(xavix_state::sound_irqstatus_r)
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{
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// rad_rh checks this after doing something that looks like an irq ack
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// rad_bass does the same, but returning the wrong status bits causes it to corrupt memory and crash in certain situations, see code around 0037D5
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if (m_sound_irqstatus & 0x08) // hack for rad_rh
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return 0xf0 | m_sound_irqstatus;
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return m_sound_irqstatus; // otherwise, keep rad_bass happy
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// the UK ekara sets check the upper bit to see if the interrupt is from the sound timer (rather than checking interrupt source register)
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// and decrease a counter that controls the tempo (the US / Japan sets don't enable the sound timer at all)
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return m_sound_irqstatus;
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}
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WRITE8_MEMBER(xavix_state::sound_irqstatus_w)
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{
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// these look like irq ack bits, 4 sources?
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// related to sound_timer0_w , sound_timer1_w, sound_timer2_w, sound_timer3_w ?
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if (data & 0xf0)
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for (int t = 0; t < 4; t++)
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{
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m_sound_irqstatus &= ~data & 0xf0;
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int bit = (1 << t) << 4;
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if (data & bit)
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{
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m_sound_irqstatus &= ~data & bit;
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}
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}
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m_sound_irqstatus = data & 0x0f; // look like IRQ enable flags - 4 sources? voices? timers?
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// check if all interrupts have been cleared to see if the line should be lowered
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if (m_sound_irqstatus & 0xf0)
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m_irqsource |= 0x80;
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else
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m_irqsource &= ~0x80;
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update_irqs();
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for (int t = 0; t < 4; t++)
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{
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int bit = 1 << t;
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if ((m_sound_irqstatus & bit) != (data & bit))
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{
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if (data & bit)
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{
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// period should be based on m_sndtimer[t] at least, maybe also some other regs?
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m_sound_timer[t]->adjust(attotime::from_usec(1000), t, attotime::from_usec(1000));
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}
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else
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{
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m_sound_timer[t]->adjust(attotime::never, t);
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}
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}
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}
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// see if we're enabling any timers (should probably check if they're already running so we don't end up restarting them)
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m_sound_irqstatus |= data & 0x0f; // look like IRQ enable flags - 4 sources? voices? timers?
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LOG("%s: sound_irqstatus_w %02x\n", machine().describe_context(), data);
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}
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@ -475,3 +508,18 @@ WRITE8_MEMBER(xavix_state::sound_75ff_w)
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LOG("%s: sound_75ff_w %02x\n", machine().describe_context(), data);
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}
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// used by ekara (UK cartridges), rad_bass, rad_crdn
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TIMER_CALLBACK_MEMBER(xavix_state::sound_timer_done)
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{
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// param = timer number 0,1,2 or 3
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int bit = (1 << param) << 4;
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m_sound_irqstatus |= bit;
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// if any of the sound timers are causing an interrupt...
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if (m_sound_irqstatus & 0xf0)
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m_irqsource |= 0x80;
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else
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m_irqsource &= ~0x80;
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update_irqs();
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}
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@ -814,7 +814,7 @@ MACHINE_CONFIG_START(xavix_state::xavix)
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MCFG_DEVICE_ADD("gfxdecode", GFXDECODE, "palette", gfx_xavix)
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MCFG_PALETTE_ADD("palette", 256)
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MCFG_PALETTE_ADD_INIT_BLACK("palette", 256)
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/* sound hardware */
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@ -866,7 +866,7 @@ MACHINE_CONFIG_START(xavix_state::xavix2000)
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MCFG_XAVIX_VECTOR_CALLBACK(xavix_state, get_vectors)
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MCFG_DEVICE_REMOVE("palette")
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MCFG_PALETTE_ADD("palette", 512)
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MCFG_PALETTE_ADD_INIT_BLACK("palette", 512)
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MACHINE_CONFIG_END
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@ -938,12 +938,6 @@ void xavix_state::init_xavix()
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m_rgn = memregion("bios")->base();
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}
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void xavix_state::init_bass()
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{
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init_xavix();
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m_hack_timer_disable = true;
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}
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/***************************************************************************
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Game driver(s)
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@ -1091,8 +1085,8 @@ CONS( 200?, rad_crdnp, rad_crdn, 0, xavixp, rad_crdnp,xavix_state, init_xavix
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|
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CONS( 2002, rad_bb2, 0, 0, xavix, rad_bb2, xavix_state, init_xavix, "Radica / SSD Company LTD", "Play TV Baseball 2", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_GRAPHICS | MACHINE_NO_SOUND ) // contains string "Radica RBB2 V1.0"
|
||||
|
||||
CONS( 2001, rad_bass, 0, 0, xavix, rad_bass, xavix_state, init_bass, "Radica / SSD Company LTD", "Play TV Bass Fishin' (NTSC)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_GRAPHICS | MACHINE_NO_SOUND)
|
||||
CONS( 2001, rad_bassp, rad_bass, 0, xavixp, rad_bassp,xavix_state, init_bass, "Radica / SSD Company LTD", "ConnecTV Bass Fishin' (PAL)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_GRAPHICS | MACHINE_NO_SOUND)
|
||||
CONS( 2001, rad_bass, 0, 0, xavix, rad_bass, xavix_state, init_xavix, "Radica / SSD Company LTD", "Play TV Bass Fishin' (NTSC)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_GRAPHICS | MACHINE_NO_SOUND)
|
||||
CONS( 2001, rad_bassp, rad_bass, 0, xavixp, rad_bassp,xavix_state, init_xavix, "Radica / SSD Company LTD", "ConnecTV Bass Fishin' (PAL)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_GRAPHICS | MACHINE_NO_SOUND)
|
||||
|
||||
// there is another 'Snowboarder' with a white coloured board, it appears to be a newer game closer to 'SSX Snowboarder' but without the SSX license.
|
||||
CONS( 2001, rad_snow, 0, 0, xavix, rad_snow, xavix_state, init_xavix, "Radica / SSD Company LTD", "Play TV Snowboarder (Blue) (NTSC)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_GRAPHICS | MACHINE_NO_SOUND)
|
||||
|
||||
@ -90,7 +90,6 @@ public:
|
||||
m_region(*this, "REGION"),
|
||||
m_gfxdecode(*this, "gfxdecode"),
|
||||
m_lowbus(*this, "lowbus"),
|
||||
m_hack_timer_disable(false),
|
||||
m_sound(*this, "xavix_sound")
|
||||
{ }
|
||||
|
||||
@ -99,7 +98,6 @@ public:
|
||||
void xavix2000(machine_config &config);
|
||||
|
||||
void init_xavix();
|
||||
void init_bass();
|
||||
|
||||
DECLARE_WRITE_LINE_MEMBER(ioevent_trg01);
|
||||
DECLARE_WRITE_LINE_MEMBER(ioevent_trg02);
|
||||
@ -325,6 +323,10 @@ private:
|
||||
uint8_t m_soundreg16_1[2];
|
||||
uint8_t m_sound_regbase;
|
||||
|
||||
TIMER_CALLBACK_MEMBER(sound_timer_done);
|
||||
emu_timer *m_sound_timer[4];
|
||||
|
||||
|
||||
DECLARE_READ8_MEMBER(timer_status_r);
|
||||
DECLARE_WRITE8_MEMBER(timer_control_w);
|
||||
DECLARE_READ8_MEMBER(timer_baseval_r);
|
||||
@ -500,8 +502,6 @@ private:
|
||||
int get_current_address_byte();
|
||||
required_device<address_map_bank_device> m_lowbus;
|
||||
|
||||
bool m_hack_timer_disable;
|
||||
|
||||
required_device<xavix_sound_device> m_sound;
|
||||
DECLARE_READ8_MEMBER(sound_regram_read_cb);
|
||||
};
|
||||
@ -569,9 +569,7 @@ public:
|
||||
m_extra0(*this, "EXTRA0"),
|
||||
m_extra1(*this, "EXTRA1"),
|
||||
m_extraioselect(0),
|
||||
m_extraiowrite(0),
|
||||
m_extrainlatch0(0),
|
||||
m_extrainlatch1(0)
|
||||
m_extraiowrite(0)
|
||||
{ }
|
||||
|
||||
void xavix_ekara(machine_config &config);
|
||||
@ -590,10 +588,6 @@ protected:
|
||||
|
||||
uint8_t m_extraioselect;
|
||||
uint8_t m_extraiowrite;
|
||||
|
||||
uint8_t m_extrainlatch0;
|
||||
uint8_t m_extrainlatch1;
|
||||
|
||||
};
|
||||
|
||||
#endif // MAME_INCLUDES_XAVIX_H
|
||||
|
||||
@ -423,10 +423,48 @@ void xavix_i2c_state::write_io1(uint8_t data, uint8_t direction)
|
||||
|
||||
uint8_t xavix_ekara_state::read_io1(uint8_t direction)
|
||||
{
|
||||
uint8_t extrainlatch0 = 0x00;
|
||||
uint8_t extrainlatch1 = 0x00;
|
||||
|
||||
switch (m_extraioselect & 0x7f)
|
||||
{
|
||||
case 0x01:
|
||||
extrainlatch0 = (m_extra0->read() & 0x01) >> 0;
|
||||
extrainlatch1 = (m_extra0->read() & 0x02) >> 1;
|
||||
break;
|
||||
case 0x02:
|
||||
extrainlatch0 = (m_extra0->read() & 0x04) >> 2;
|
||||
extrainlatch1 = (m_extra0->read() & 0x08) >> 3;
|
||||
break;
|
||||
case 0x04:
|
||||
extrainlatch0 = (m_extra0->read() & 0x10) >> 4;
|
||||
extrainlatch1 = (m_extra0->read() & 0x20) >> 5;
|
||||
break;
|
||||
case 0x08:
|
||||
extrainlatch0 = (m_extra0->read() & 0x40) >> 6;
|
||||
extrainlatch1 = (m_extra0->read() & 0x80) >> 7;
|
||||
break;
|
||||
case 0x10:
|
||||
extrainlatch0 = (m_extra1->read() & 0x01) >> 0;
|
||||
extrainlatch1 = (m_extra1->read() & 0x02) >> 1;
|
||||
break;
|
||||
case 0x20:
|
||||
extrainlatch0 = (m_extra1->read() & 0x04) >> 2;
|
||||
extrainlatch1 = (m_extra1->read() & 0x08) >> 3;
|
||||
break;
|
||||
case 0x40:
|
||||
extrainlatch0 = (m_extra1->read() & 0x10) >> 4;
|
||||
extrainlatch1 = (m_extra1->read() & 0x20) >> 5;
|
||||
break;
|
||||
default:
|
||||
LOG("latching inputs with invalid m_extraioselect value of %02x\n", m_extraioselect);
|
||||
break;
|
||||
}
|
||||
|
||||
uint8_t ret = m_in1->read();
|
||||
ret &= 0xfc;
|
||||
ret |= m_extrainlatch0 << 0;
|
||||
ret |= m_extrainlatch1 << 1;
|
||||
ret |= extrainlatch0 << 0;
|
||||
ret |= extrainlatch1 << 1;
|
||||
return ret;
|
||||
}
|
||||
|
||||
@ -439,51 +477,6 @@ void xavix_ekara_state::write_io0(uint8_t data, uint8_t direction)
|
||||
void xavix_ekara_state::write_io1(uint8_t data, uint8_t direction)
|
||||
{
|
||||
uint8_t extraiowrite = data & direction;
|
||||
|
||||
if ((extraiowrite & 0x80) != (m_extraiowrite & 0x80))
|
||||
{
|
||||
if (extraiowrite & 0x80)
|
||||
{
|
||||
// clock out bits 0x0c using m_extraioselect (TODO) (probably the 7segs?)
|
||||
// also latch in bits for reading later?
|
||||
|
||||
switch (m_extraioselect & 0x7f)
|
||||
{
|
||||
case 0x01:
|
||||
m_extrainlatch0 = (m_extra0->read() & 0x01) >> 0;
|
||||
m_extrainlatch1 = (m_extra0->read() & 0x02) >> 1;
|
||||
break;
|
||||
case 0x02:
|
||||
m_extrainlatch0 = (m_extra0->read() & 0x04) >> 2;
|
||||
m_extrainlatch1 = (m_extra0->read() & 0x08) >> 3;
|
||||
break;
|
||||
case 0x04:
|
||||
m_extrainlatch0 = (m_extra0->read() & 0x10) >> 4;
|
||||
m_extrainlatch1 = (m_extra0->read() & 0x20) >> 5;
|
||||
break;
|
||||
case 0x08:
|
||||
m_extrainlatch0 = (m_extra0->read() & 0x40) >> 6;
|
||||
m_extrainlatch1 = (m_extra0->read() & 0x80) >> 7;
|
||||
break;
|
||||
case 0x10:
|
||||
m_extrainlatch0 = (m_extra1->read() & 0x01) >> 0;
|
||||
m_extrainlatch1 = (m_extra1->read() & 0x02) >> 1;
|
||||
break;
|
||||
case 0x20:
|
||||
m_extrainlatch0 = (m_extra1->read() & 0x04) >> 2;
|
||||
m_extrainlatch1 = (m_extra1->read() & 0x08) >> 3;
|
||||
break;
|
||||
case 0x40:
|
||||
m_extrainlatch0 = (m_extra1->read() & 0x10) >> 4;
|
||||
m_extrainlatch1 = (m_extra1->read() & 0x20) >> 5;
|
||||
break;
|
||||
default:
|
||||
LOG("latching inputs with invalid m_extraioselect value of %02x\n", m_extraioselect);
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
m_extraiowrite = extraiowrite;
|
||||
}
|
||||
|
||||
@ -629,15 +622,12 @@ WRITE8_MEMBER(xavix_state::timer_control_w)
|
||||
// rad_fb / rad_madf don't set bit 0x40 (and doesn't seem to have a valid interrupt handler for timer, so probably means it generates no IRQ?)
|
||||
if (data & 0x01) // timer start?
|
||||
{
|
||||
// eka_bass will crash after a certain number of timer IRQs, needs investigation
|
||||
if (!m_hack_timer_disable)
|
||||
{
|
||||
// TODO: work out the proper calculation here
|
||||
// int divide = 1 << ((m_timer_freq&0x0f)+1);
|
||||
// uint32_t freq = m_maincpu->unscaled_clock()/2;
|
||||
// m_freq_timer->adjust(attotime::from_hz(freq / divide) * m_timer_baseval*20);
|
||||
m_freq_timer->adjust(attotime::from_usec(1000));
|
||||
}
|
||||
// TODO: work out the proper calculation here
|
||||
// int divide = 1 << ((m_timer_freq&0x0f)+1);
|
||||
// uint32_t freq = m_maincpu->unscaled_clock()/2;
|
||||
// m_freq_timer->adjust(attotime::from_hz(freq / divide) * m_timer_baseval*20);
|
||||
//m_freq_timer->adjust(attotime::from_usec(1000));
|
||||
m_freq_timer->adjust(attotime::from_usec(50));
|
||||
}
|
||||
else
|
||||
{
|
||||
@ -822,6 +812,10 @@ void xavix_state::machine_start()
|
||||
m_freq_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(xavix_state::freq_timer_done), this));
|
||||
m_adc_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(xavix_state::adc_timer_done), this));
|
||||
|
||||
for (int i = 0; i < 4; i++)
|
||||
{
|
||||
m_sound_timer[i] = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(xavix_state::sound_timer_done), this));
|
||||
}
|
||||
}
|
||||
|
||||
void xavix_state::machine_reset()
|
||||
|
||||
Loading…
Reference in New Issue
Block a user