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Cleanups and version bump

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This commit is contained in:
Miodrag Milanovic 2015-12-30 08:18:51 +01:00
parent 3b0d814b9b
commit 4afd75e2fd
161 changed files with 2892 additions and 2924 deletions
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2
hash/bbc_torch_flop.xml
View File

@ -89,7 +89,7 @@
</dataarea>
</part>
</software>
<software name="perfect" supported="no">
<description>Perfect Software Suite</description>
<year>1983</year>

10
hash/bbca_cass.xml
View File

@ -343,7 +343,7 @@
</dataarea>
</part>
</software>
<software name="zombies">
<description>Zombies</description>
<year>1982</year>
@ -356,7 +356,7 @@
</software>
<!-- Business -->
<software name="dskdiary">
<description>Desk Diary</description>
<year>1982</year>
@ -408,7 +408,7 @@
</software>
<!-- Languages -->
<software name="lisp">
<description>LISP</description>
<year>1982</year>
@ -422,7 +422,7 @@
</software>
<!-- Graphics and other -->
<software name="crgraph">
<description>Creative Graphics</description>
<year>1982</year>
@ -434,5 +434,5 @@
</dataarea>
</part>
</software>
</softwarelist>

4
hash/bbcb_cass.xml
View File

@ -1295,7 +1295,7 @@
</dataarea>
</part>
</software>
<software name="bcbill">
<description>BC Bill</description>
<year>1984</year>
@ -2334,7 +2334,7 @@
</dataarea>
</part>
</software>
<software name="chessmp">
<description>Chess (Micro Power)</description>
<year>198?</year>

10
hash/bbcb_de_cass.xml
View File

@ -138,7 +138,7 @@
</dataarea>
</part>
</software>
<software name="busgames">
<description>Managementspiele (Ger)</description>
<year>1982</year>
@ -150,7 +150,7 @@
</dataarea>
</part>
</software>
<software name="missigns">
<description>Fehlende Zeichen (Ger)</description>
<year>1983</year>
@ -162,7 +162,7 @@
</dataarea>
</part>
</software>
<software name="numberbg">
<description>Zahlenwaage (Ger)</description>
<year>198?</year>
@ -221,7 +221,7 @@
</dataarea>
</part>
</software>
<software name="wordseqg">
<description>Wortsalat (Ger)</description>
<year>1983</year>
@ -233,5 +233,5 @@
</dataarea>
</part>
</software>
</softwarelist>

2
hash/bbcm_flop.xml
View File

@ -37,7 +37,7 @@
</dataarea>
</part>
</software>
<software name="fsdd">
<description>FileStore Dealer Test Disc</description>
<year>1986</year>

2
hash/gmaster.xml
View File

@ -54,7 +54,7 @@ Undumped:
</part>
</software>
<software name="fussball" supported ="partial"> <!-- some gfx corruption -->
<software name="fussball" supported ="partial"> <!-- some gfx corruption -->
<description>3-on-3 Soccer (Fuss-ball)</description>
<year>1990</year>
<publisher>Hartung</publisher>

58
hash/h21.xml
View File

@ -4,21 +4,21 @@
<softwarelist name="h21" description="TRQ Video Computer H-21 cartridges">
<!--
TRQ distributed a total of 24 games for this system. The only exclusive title
appears to be "Come frutas", the rest of the games are copies of the respective
VC-4000 games.
TODO: Verify and add the rest of the games.
1 Millón electrónico
2 Guerra de tanques y aviones
3 Batalla aero-naval
4 Invasores
5 Guerra de las galaxias
6 Circo
-->
1 Millón electrónico
2 Guerra de tanques y aviones
3 Batalla aero-naval
4 Invasores
5 Guerra de las galaxias
6 Circo
-->
<software name="comefrut" supported="no">
<description>Come frutas</description>
@ -34,25 +34,25 @@
</software>
<!--
8 En busca del tesoro / Memoria
9 Caza
10 Othello
11 Super-Sport 60
12 Fútbol
13 Carrera de caballos
14 Las 4 en raya
15 Master-Mind (Código Secreto)
16 Carreras de coches
17 Laberinto
18 Boxeo
19 Juego de cartas / Black Jack
20 Órgano musical / Simon
21 Golf
22 Matemáticas I
23 Matemáticas II
24 Crazy Spider. La araña loca
8 En busca del tesoro / Memoria
9 Caza
10 Othello
11 Super-Sport 60
12 Fútbol
13 Carrera de caballos
14 Las 4 en raya
15 Master-Mind (Código Secreto)
16 Carreras de coches
17 Laberinto
18 Boxeo
19 Juego de cartas / Black Jack
20 Órgano musical / Simon
21 Golf
22 Matemáticas I
23 Matemáticas II
24 Crazy Spider. La araña loca
-->
</softwarelist>

16
hash/pico.xml
View File

@ -1813,18 +1813,18 @@ Published by Others (T-yyy*** serial codes, for yyy depending on the publisher)
</part>
</software>
<software name="heiseiky">
<software name="heiseiky">
<description>Heisei Kyouiku Iinkai Jr. Mezase Yuutousei (Jpn)</description>
<year>1995</year>
<publisher>Imagineer</publisher>
<part name="cart" interface="pico_cart">
<feature name="pcb" value="171-6882A" />
<feature name="pcb" value="171-6882A" />
<dataarea name="rom" size="524288">
<rom name="mpr-18565-t.ic1" size="524288" crc="8ba23bbe" sha1="85e6ed98f5e7bfa04c1b099bba79ddd34ccdd40e" offset="000000" loadflag="load16_word_swap" />
</dataarea>
</part>
</software>
</software>
<software name="hellokcs">
<description>Hello Kitty no Castelo (Bra)</description>
<year>19??</year>
@ -4628,7 +4628,7 @@ But how do later protos fit with this theory? Maybe the later protos were from t
</part>
</software>
<software name="tomicarp">
<software name="tomicarp">
<description>Tomica Pico Rescue Parking ~Shokai-Tomica Fuzoku~ (Jpn)</description>
<year>2002</year>
<publisher>Sega Toys</publisher>
@ -4637,8 +4637,8 @@ But how do later protos fit with this theory? Maybe the later protos were from t
<rom name="9v1-0014ar2" size="2097152" crc="3e53c515" sha1="fff0d70882c10adab3065bebe4ce07aee690f674" offset="000000" loadflag="load16_word_swap" />
</dataarea>
</part>
</software>
</software>
<software name="hamtnaka">
<description>Tottoko Hamtaro - Haru-Natsu-Aki-Fuyu - Tottoko Nakayoshi! Ham Chance! (Jpn)</description>
<year>2001</year>
@ -5102,7 +5102,7 @@ But how do later protos fit with this theory? Maybe the later protos were from t
</dataarea>
</part>
</software>
<software name="hucklowlp" cloneof="hucklowl">
<description>Huckle and Lowly's Busiest Day Ever (Prototype, 19941004)</description>
<year>1994</year>

2
hash/pv1000.xml
View File

@ -115,7 +115,7 @@ Undumped carts:
</dataarea>
</part>
</software>
<software name="fightbug" supported="no">
<description>Fighting Bug</description>
<year>1982</year>

22
hash/r9751.xml
View File

@ -1,20 +1,20 @@
<?xml version="1.0"?>
<!DOCTYPE softwarelist SYSTEM "softwarelist.dtd">
<!--
ROLM 9751 CBX Software
ROLM 9751 CBX Software
Releases known: 9004, 9005
Releases known: 9004, 9005
9005.6.84 - Last software release (1998)
Install disks (7)
Disktool
Mini Patch Volume MPV4-84
Additional fixes up to year 2000
RPDN Loadware
9005.6.84 - Last software release (1998)
Install disks (7)
Disktool
Mini Patch Volume MPV4-84
Additional fixes up to year 2000
RPDN Loadware
9005.6.82 (1995)
9005.6.82 (1995)
-->
<softwarelist name="r9751" description="ROLM CBX 9751 floppy disk images">
<software name="cbxr5684">
@ -37,7 +37,7 @@
<feature name="part_id" value="Disk 3" />
<dataarea name="flop" size="1474560">
<rom name="Siemens.9751.CBX.Release.9005.6.84.Disk3.img" size="1474560" crc="2c0226e2" sha1="08fca05de78e6325881deb3f062235a7bcc4ea10" offset="0" />
</dataarea>
</dataarea>
</part>
<part name="flop4" interface="floppy_3_5">
<feature name="part_id" value="Disk 4" />

6
hash/saturn.xml
View File

@ -38970,9 +38970,9 @@ Olympic Soccer (Fra) T-7904H-09
</part>
</software>
<!-- input / output cue/bin verified identical as of CHDMAN change made around 28th Dec 2015, except for
the 'ISRC 904002100272' metadata line after 'TRACK 24 AUDIO' being ommitted from the cuesheet, we don't
store that information -->
<!-- input / output cue/bin verified identical as of CHDMAN change made around 28th Dec 2015, except for
the 'ISRC 904002100272' metadata line after 'TRACK 24 AUDIO' being ommitted from the cuesheet, we don't
store that information -->
<software name="raymanp" supported="no"> <!-- the header lists 19950424, but elsewhere there are date stamps of 19950720 -->
<description>Rayman (Prototype 19950720)</description>
<year>1995</year>

10
hash/supracan.xml
View File

@ -1,10 +1,10 @@
<?xml version="1.0"?>
<!DOCTYPE softwarelist SYSTEM "softwarelist.dtd">
<softwarelist name="supracan" description="Funtech Super A'Can cartridges">
<!-- appears to work, but gameplay logic is broken, attack pieces don't drop down, game can get stuck, can sometimes rotate pieces through other pieces too! -->
<software name="formduel" supported="no"> <!-- F001 - 福爾摩沙大對決 (Formosa Da Dui Jue) - aka Formosa Duel -->
<!-- appears to work, but gameplay logic is broken, attack pieces don't drop down, game can get stuck, can sometimes rotate pieces through other pieces too! -->
<software name="formduel" supported="no"> <!-- F001 - 福爾摩沙大對決 (Formosa Da Dui Jue) - aka Formosa Duel -->
<description>Formosa Duel</description>
<year>1995</year>
<publisher>AV Artisan Corp.</publisher>
@ -15,7 +15,7 @@
</dataarea>
</part>
</software>
<software name="sangofgt">
<description>Sango Fighter ~ Wu Jiang Zheng Ba - San Guo Zhi</description>
<year>1995</year>

14
hash/tutor.xml
View File

@ -88,11 +88,11 @@ Battlefighter (Original) (Unreleased - Prototype Stage)
<info name="serial" value="021E"/>
<part name="cart" interface="tutor_cart">
<dataarea name="rom" size="0x4000">
<rom name="Yonnin Majan.bin" size="0x4000" crc="1c2eb2f0" sha1="4e9a0ce55f479c4b1a5fee9320561ce93765c4d7" offset="0" /> <!-- needs splitting into 2 files? there are 2 roms, marked 1 and 2 in the cart?? -->
<rom name="Yonnin Majan.bin" size="0x4000" crc="1c2eb2f0" sha1="4e9a0ce55f479c4b1a5fee9320561ce93765c4d7" offset="0" /> <!-- needs splitting into 2 files? there are 2 roms, marked 1 and 2 in the cart?? -->
</dataarea>
</part>
</software>
<software name="baseball">
<description>Baseball (Jpn)</description>
<year>1984</year>
@ -105,7 +105,7 @@ Battlefighter (Original) (Unreleased - Prototype Stage)
</dataarea>
</part>
</software>
<software name="bombman">
<description>Bombman (Jpn)</description>
<year>1982</year>
@ -131,7 +131,7 @@ Battlefighter (Original) (Unreleased - Prototype Stage)
</part>
</software>
<!-- Crawlers and Maze Patrol are confirmed as using the exact same ROM data -->
<!-- Crawlers and Maze Patrol are confirmed as using the exact same ROM data -->
<software name="crawlers">
<!-- Stock No: 8100, Clone of Maze Patrol (Japanese 017E)-->
<description>Cave Crawlers (USA) / Maze Patrol (Jpn)</description>
@ -145,7 +145,7 @@ Battlefighter (Original) (Unreleased - Prototype Stage)
</dataarea>
</part>
</software>
<software name="deepsix" cloneof="marinadv">
<description>Deep Six (USA)</description>
<year>1983</year>
@ -375,7 +375,7 @@ Battlefighter (Original) (Unreleased - Prototype Stage)
</part>
</software>
<!-- Torpedo and Bermuda Triangle are confirmed as using the exact same ROM data -->
<!-- Torpedo and Bermuda Triangle are confirmed as using the exact same ROM data -->
<software name="torpedo">
<!-- Stock No: 8101, Clone of Bermuda Triangle (Japanese 020E)-->
<description>Torpedo Terror (USA) / Bermuda Triangle (Jpn)</description>
@ -389,7 +389,7 @@ Battlefighter (Original) (Unreleased - Prototype Stage)
</dataarea>
</part>
</software>
<software name="trafjam">
<!-- Stock No: 8103, (Japanese 010E)-->
<description>Traffic Jam (Jpn)</description>

2
src/devices/bus/cbm2/hrg.h
View File

@ -28,7 +28,7 @@ class cbm2_graphic_cartridge_device : public device_t,
public:
// construction/destruction
cbm2_graphic_cartridge_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source);
// optional information overrides
virtual const rom_entry *device_rom_region() const override;

2
src/devices/bus/centronics/epson_ex800.h
View File

@ -30,7 +30,7 @@ class epson_ex800_t : public device_t,
public:
// construction/destruction
epson_ex800_t(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
// optional information overrides
virtual const rom_entry *device_rom_region() const override;
virtual machine_config_constructor device_mconfig_additions() const override;

2
src/devices/bus/gameboy/rom.h
View File

@ -44,7 +44,7 @@ public:
virtual DECLARE_READ8_MEMBER(read_rom) override;
virtual DECLARE_READ8_MEMBER(read_ram) override;
virtual DECLARE_WRITE8_MEMBER(write_ram) override;
UINT16 m_tama5_data, m_tama5_addr, m_tama5_cmd;
UINT8 m_regs[32];
UINT8 m_rtc_reg;

2
src/devices/bus/pet/hsg.h
View File

@ -28,7 +28,7 @@ class cbm8000_hsg_t : public device_t,
public:
// construction/destruction
cbm8000_hsg_t(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source);
// optional information overrides
virtual const rom_entry *device_rom_region() const override;

2
src/devices/bus/ql/cst_q_plus4.h
View File

@ -28,7 +28,7 @@ class cst_q_plus4_t : public device_t,
public:
// construction/destruction
cst_q_plus4_t(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
// optional information overrides
virtual const rom_entry *device_rom_region() const override;
virtual machine_config_constructor device_mconfig_additions() const override;

2
src/devices/bus/ql/cst_qdisc.h
View File

@ -27,7 +27,7 @@ class cst_ql_disc_interface_t : public device_t,
public:
// construction/destruction
cst_ql_disc_interface_t(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
// optional information overrides
virtual const rom_entry *device_rom_region() const override;

2
src/devices/bus/ql/cumana_fdi.h
View File

@ -27,7 +27,7 @@ class cumana_floppy_disk_interface_t : public device_t,
public:
// construction/destruction
cumana_floppy_disk_interface_t(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
// optional information overrides
virtual const rom_entry *device_rom_region() const override;

2
src/devices/bus/ql/kempston_di.h
View File

@ -27,7 +27,7 @@ class kempston_disk_interface_t : public device_t,
public:
// construction/destruction
kempston_disk_interface_t(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
// optional information overrides
virtual const rom_entry *device_rom_region() const override;

2
src/devices/bus/ql/miracle_gold_card.h
View File

@ -27,7 +27,7 @@ class miracle_gold_card_t : public device_t,
public:
// construction/destruction
miracle_gold_card_t(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
// optional information overrides
virtual const rom_entry *device_rom_region() const override;

2
src/devices/bus/ql/miracle_hd.h
View File

@ -27,7 +27,7 @@ class miracle_hard_disk_t : public device_t,
public:
// construction/destruction
miracle_hard_disk_t(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
// optional information overrides
virtual const rom_entry *device_rom_region() const override;

2
src/devices/bus/ql/mp_fdi.h
View File

@ -27,7 +27,7 @@ class micro_peripherals_floppy_disk_interface_t : public device_t,
public:
// construction/destruction
micro_peripherals_floppy_disk_interface_t(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
// optional information overrides
virtual const rom_entry *device_rom_region() const override;

2
src/devices/bus/ql/opd_basic_master.h
View File

@ -27,7 +27,7 @@ class opd_basic_master_t : public device_t,
public:
// construction/destruction
opd_basic_master_t(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
// optional information overrides
virtual const rom_entry *device_rom_region() const override;

2
src/devices/bus/ql/pcml_qdisk.h
View File

@ -27,7 +27,7 @@ class pcml_q_disk_interface_t : public device_t,
public:
// construction/destruction
pcml_q_disk_interface_t(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
// optional information overrides
virtual const rom_entry *device_rom_region() const override;

2
src/devices/bus/ql/qubide.h
View File

@ -28,7 +28,7 @@ class qubide_t : public device_t,
public:
// construction/destruction
qubide_t(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
// optional information overrides
virtual const rom_entry *device_rom_region() const override;
virtual machine_config_constructor device_mconfig_additions() const override;

4
src/devices/cpu/avr8/avr8.cpp
View File

@ -1316,7 +1316,7 @@ void avr8_device::timer1_tick()
//UINT8 compare_mode[2] = { (m_r[AVR8_REGIDX_TCCR1A] & AVR8_TCCR1A_COM1A_MASK) >> AVR8_TCCR1A_COM1A_SHIFT,
//(m_r[AVR8_REGIDX_TCCR1A] & AVR8_TCCR1A_COM1B_MASK) >> AVR8_TCCR1A_COM1B_SHIFT };
UINT16 ocr1[2] = { static_cast<UINT16>((m_r[AVR8_REGIDX_OCR1AH] << 8) | m_r[AVR8_REGIDX_OCR1AL]),
static_cast<UINT16>((m_r[AVR8_REGIDX_OCR1BH] << 8) | m_r[AVR8_REGIDX_OCR1BL]) };
static_cast<UINT16>((m_r[AVR8_REGIDX_OCR1BH] << 8) | m_r[AVR8_REGIDX_OCR1BL]) };
UINT8 ocf1[2] = { (1 << AVR8_TIFR1_OCF1A_SHIFT), (1 << AVR8_TIFR1_OCF1B_SHIFT) };
UINT8 int1[2] = { AVR8_INTIDX_OCF1A, AVR8_INTIDX_OCF1B };
INT32 increment = m_timer_increment[1];
@ -1712,7 +1712,7 @@ void avr8_device::timer4_tick()
//UINT8 compare_mode[2] = { (m_r[AVR8_REGIDX_TCCR1A] & AVR8_TCCR1A_COM1A_MASK) >> AVR8_TCCR1A_COM1A_SHIFT,
//(m_r[AVR8_REGIDX_TCCR1A] & AVR8_TCCR1A_COM1B_MASK) >> AVR8_TCCR1A_COM1B_SHIFT };
UINT16 ocr4[2] = { static_cast<UINT16>((m_r[AVR8_REGIDX_OCR4AH] << 8) | m_r[AVR8_REGIDX_OCR4AL]),
static_cast<UINT16>((m_r[AVR8_REGIDX_OCR4BH] << 8) | m_r[AVR8_REGIDX_OCR4BL]) };
static_cast<UINT16>((m_r[AVR8_REGIDX_OCR4BH] << 8) | m_r[AVR8_REGIDX_OCR4BL]) };
//TODO UINT8 ocf4[2] = { (1 << AVR8_TIFR4_OCF4A_SHIFT), (1 << AVR8_TIFR4_OCF4B_SHIFT) };
//TODO UINT8 int4[2] = { AVR8_INTIDX_OCF4A, AVR8_INTIDX_OCF4B };
INT32 increment = m_timer_increment[4];

2
src/devices/cpu/drcuml.cpp
View File

@ -126,7 +126,7 @@ drcuml_state::drcuml_state(device_t &device, drc_cache &cache, UINT32 flags, int
std::unique_ptr<drcbe_interface>{ std::make_unique<drcbe_native>(*this, device, cache, flags, modes, addrbits, ignorebits) }),
m_beintf(*m_drcbe_interface.get()),
m_umllog(nullptr)
{
{
// if we're to log, create the logfile
if (device.machine().options().drc_log_uml())
{

1223
src/devices/cpu/hphybrid/hphybrid.cpp
View File

File diff suppressed because it is too large Load Diff

224
src/devices/cpu/hphybrid/hphybrid.h
View File

@ -77,166 +77,166 @@
// PA changed callback
#define MCFG_HPHYBRID_PA_CHANGED(_devcb) \
hp_hybrid_cpu_device::set_pa_changed_func(*device , DEVCB_##_devcb);
hp_hybrid_cpu_device::set_pa_changed_func(*device , DEVCB_##_devcb);
class hp_hybrid_cpu_device : public cpu_device
{
public:
DECLARE_WRITE_LINE_MEMBER(dmar_w);
DECLARE_WRITE_LINE_MEMBER(halt_w);
DECLARE_WRITE_LINE_MEMBER(status_w);
DECLARE_WRITE_LINE_MEMBER(flag_w);
DECLARE_WRITE_LINE_MEMBER(dmar_w);
DECLARE_WRITE_LINE_MEMBER(halt_w);
DECLARE_WRITE_LINE_MEMBER(status_w);
DECLARE_WRITE_LINE_MEMBER(flag_w);
template<class _Object> static devcb_base &set_pa_changed_func(device_t &device, _Object object) { return downcast<hp_hybrid_cpu_device &>(device).m_pa_changed_func.set_callback(object); }
template<class _Object> static devcb_base &set_pa_changed_func(device_t &device, _Object object) { return downcast<hp_hybrid_cpu_device &>(device).m_pa_changed_func.set_callback(object); }
protected:
hp_hybrid_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname , UINT8 addrwidth);
hp_hybrid_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname , UINT8 addrwidth);
// device-level overrides
virtual void device_start() override;
virtual void device_reset() override;
// device-level overrides
virtual void device_start() override;
virtual void device_reset() override;
// device_execute_interface overrides
virtual UINT32 execute_min_cycles() const override { return 6; }
virtual UINT32 execute_input_lines() const override { return 2; }
virtual UINT32 execute_default_irq_vector() const override { return 0xffff; }
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
// device_execute_interface overrides
virtual UINT32 execute_min_cycles() const override { return 6; }
virtual UINT32 execute_input_lines() const override { return 2; }
virtual UINT32 execute_default_irq_vector() const override { return 0xffff; }
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
UINT16 execute_one(UINT16 opcode);
UINT16 execute_one_sub(UINT16 opcode);
// Execute an instruction that doesn't belong to either BPC or IOC
virtual UINT16 execute_no_bpc_ioc(UINT16 opcode) = 0;
UINT16 execute_one(UINT16 opcode);
UINT16 execute_one_sub(UINT16 opcode);
// Execute an instruction that doesn't belong to either BPC or IOC
virtual UINT16 execute_no_bpc_ioc(UINT16 opcode) = 0;
// device_memory_interface overrides
virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const override { return (spacenum == AS_PROGRAM) ? &m_program_config : ( (spacenum == AS_IO) ? &m_io_config : NULL ); }
// device_memory_interface overrides
virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const override { return (spacenum == AS_PROGRAM) ? &m_program_config : ( (spacenum == AS_IO) ? &m_io_config : NULL ); }
// device_state_interface overrides
void state_string_export(const device_state_entry &entry, std::string &str) override;
// device_state_interface overrides
void state_string_export(const device_state_entry &entry, std::string &str) override;
// device_disasm_interface overrides
virtual UINT32 disasm_min_opcode_bytes() const override { return 2; }
virtual UINT32 disasm_max_opcode_bytes() const override { return 2; }
virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
// device_disasm_interface overrides
virtual UINT32 disasm_min_opcode_bytes() const override { return 2; }
virtual UINT32 disasm_max_opcode_bytes() const override { return 2; }
virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
// Different cases of memory access
// See patent @ pg 361
typedef enum {
AEC_CASE_A, // Instr. fetches, non-base page fetches of link pointers, BPC direct non-base page accesses
AEC_CASE_B, // Base page fetches of link pointers, BPC direct base page accesses
AEC_CASE_C, // IOC, EMC & BPC indirect final destination accesses
AEC_CASE_D // DMA accesses
} aec_cases_t;
// Different cases of memory access
// See patent @ pg 361
typedef enum {
AEC_CASE_A, // Instr. fetches, non-base page fetches of link pointers, BPC direct non-base page accesses
AEC_CASE_B, // Base page fetches of link pointers, BPC direct base page accesses
AEC_CASE_C, // IOC, EMC & BPC indirect final destination accesses
AEC_CASE_D // DMA accesses
} aec_cases_t;
// do memory address extension
virtual UINT32 add_mae(aec_cases_t aec_case , UINT16 addr) = 0;
// do memory address extension
virtual UINT32 add_mae(aec_cases_t aec_case , UINT16 addr) = 0;
UINT16 remove_mae(UINT32 addr);
UINT16 remove_mae(UINT32 addr);
UINT16 RM(aec_cases_t aec_case , UINT16 addr);
UINT16 RM(UINT32 addr);
virtual UINT16 read_non_common_reg(UINT16 addr) = 0;
UINT16 RM(aec_cases_t aec_case , UINT16 addr);
UINT16 RM(UINT32 addr);
virtual UINT16 read_non_common_reg(UINT16 addr) = 0;
void WM(aec_cases_t aec_case , UINT16 addr , UINT16 v);
void WM(UINT32 addr , UINT16 v);
virtual void write_non_common_reg(UINT16 addr , UINT16 v) = 0;
void WM(aec_cases_t aec_case , UINT16 addr , UINT16 v);
void WM(UINT32 addr , UINT16 v);
virtual void write_non_common_reg(UINT16 addr , UINT16 v) = 0;
UINT16 fetch(void);
UINT16 get_skip_addr(UINT16 opcode , bool condition) const;
UINT16 fetch(void);
devcb_write8 m_pa_changed_func;
UINT16 get_skip_addr(UINT16 opcode , bool condition) const;
int m_icount;
bool m_forced_bsc_25;
devcb_write8 m_pa_changed_func;
// State of processor
UINT16 m_reg_A; // Register A
UINT16 m_reg_B; // Register B
UINT16 m_reg_P; // Register P
UINT16 m_reg_R; // Register R
UINT16 m_reg_C; // Register C
UINT16 m_reg_D; // Register D
UINT16 m_reg_IV; // Register IV
UINT16 m_reg_W; // Register W
UINT8 m_reg_PA[ HPHYBRID_INT_LVLS + 1 ]; // Stack of register PA (4 bit-long)
UINT16 m_flags; // Flags
UINT8 m_dmapa; // DMA peripheral address (4 bits)
UINT16 m_dmama; // DMA address
UINT16 m_dmac; // DMA counter
UINT16 m_reg_I; // Instruction register
UINT32 m_genpc; // Full PC
int m_icount;
bool m_forced_bsc_25;
// State of processor
UINT16 m_reg_A; // Register A
UINT16 m_reg_B; // Register B
UINT16 m_reg_P; // Register P
UINT16 m_reg_R; // Register R
UINT16 m_reg_C; // Register C
UINT16 m_reg_D; // Register D
UINT16 m_reg_IV; // Register IV
UINT16 m_reg_W; // Register W
UINT8 m_reg_PA[ HPHYBRID_INT_LVLS + 1 ]; // Stack of register PA (4 bit-long)
UINT16 m_flags; // Flags
UINT8 m_dmapa; // DMA peripheral address (4 bits)
UINT16 m_dmama; // DMA address
UINT16 m_dmac; // DMA counter
UINT16 m_reg_I; // Instruction register
UINT32 m_genpc; // Full PC
private:
address_space_config m_program_config;
address_space_config m_io_config;
address_space_config m_program_config;
address_space_config m_io_config;
address_space *m_program;
direct_read_data *m_direct;
address_space *m_io;
address_space *m_program;
direct_read_data *m_direct;
address_space *m_io;
UINT32 get_ea(UINT16 opcode);
void do_add(UINT16& addend1 , UINT16 addend2);
UINT16 get_skip_addr_sc(UINT16 opcode , UINT16& v , unsigned n);
void do_pw(UINT16 opcode);
void check_for_interrupts(void);
void handle_dma(void);
UINT32 get_ea(UINT16 opcode);
void do_add(UINT16& addend1 , UINT16 addend2);
UINT16 get_skip_addr_sc(UINT16 opcode , UINT16& v , unsigned n);
void do_pw(UINT16 opcode);
void check_for_interrupts(void);
void handle_dma(void);
UINT16 RIO(UINT8 pa , UINT8 ic);
void WIO(UINT8 pa , UINT8 ic , UINT16 v);
UINT16 RIO(UINT8 pa , UINT8 ic);
void WIO(UINT8 pa , UINT8 ic , UINT16 v);
};
class hp_5061_3001_cpu_device : public hp_hybrid_cpu_device
{
public:
hp_5061_3001_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
hp_5061_3001_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
static void set_boot_mode_static(device_t &device, bool mode) { downcast<hp_5061_3001_cpu_device &>(device).m_boot_mode = mode; }
protected:
virtual void device_start() override;
virtual void device_reset() override;
virtual UINT32 execute_max_cycles() const override { return 237; } // FMP 15
virtual void device_start() override;
virtual void device_reset() override;
virtual UINT32 execute_max_cycles() const override { return 237; } // FMP 15
static UINT8 do_dec_shift_r(UINT8 d1 , UINT64& mantissa);
static UINT8 do_dec_shift_l(UINT8 d12 , UINT64& mantissa);
UINT64 get_ar1(void);
void set_ar1(UINT64 v);
UINT64 get_ar2(void) const;
void set_ar2(UINT64 v);
UINT64 do_mrxy(UINT64 ar);
bool do_dec_add(bool carry_in , UINT64& a , UINT64 b);
void do_mpy(void);
static UINT8 do_dec_shift_r(UINT8 d1 , UINT64& mantissa);
static UINT8 do_dec_shift_l(UINT8 d12 , UINT64& mantissa);
UINT64 get_ar1(void);
void set_ar1(UINT64 v);
UINT64 get_ar2(void) const;
void set_ar2(UINT64 v);
UINT64 do_mrxy(UINT64 ar);
bool do_dec_add(bool carry_in , UINT64& a , UINT64 b);
void do_mpy(void);
virtual UINT16 execute_no_bpc_ioc(UINT16 opcode) override;
virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
virtual UINT32 add_mae(aec_cases_t aec_case , UINT16 addr) override;
virtual UINT16 read_non_common_reg(UINT16 addr) override;
virtual void write_non_common_reg(UINT16 addr , UINT16 v) override;
virtual UINT16 execute_no_bpc_ioc(UINT16 opcode) override;
virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
virtual UINT32 add_mae(aec_cases_t aec_case , UINT16 addr) override;
virtual UINT16 read_non_common_reg(UINT16 addr) override;
virtual void write_non_common_reg(UINT16 addr , UINT16 v) override;
private:
bool m_boot_mode;
bool m_boot_mode;
// Additional state of processor
UINT16 m_reg_ar2[ 4 ]; // AR2 register
UINT16 m_reg_se; // SE register (4 bits)
UINT16 m_reg_r25; // R25 register
UINT16 m_reg_r26; // R26 register
UINT16 m_reg_r27; // R27 register
UINT16 m_reg_aec[ HP_REG_R37_ADDR - HP_REG_R32_ADDR + 1 ]; // AEC registers R32-R37
// Additional state of processor
UINT16 m_reg_ar2[ 4 ]; // AR2 register
UINT16 m_reg_se; // SE register (4 bits)
UINT16 m_reg_r25; // R25 register
UINT16 m_reg_r26; // R26 register
UINT16 m_reg_r27; // R27 register
UINT16 m_reg_aec[ HP_REG_R37_ADDR - HP_REG_R32_ADDR + 1 ]; // AEC registers R32-R37
};
class hp_5061_3011_cpu_device : public hp_hybrid_cpu_device
{
public:
hp_5061_3011_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
hp_5061_3011_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
protected:
virtual UINT32 execute_max_cycles() const override { return 25; }
virtual UINT16 execute_no_bpc_ioc(UINT16 opcode) override;
virtual UINT32 add_mae(aec_cases_t aec_case , UINT16 addr) override;
virtual UINT16 read_non_common_reg(UINT16 addr) override;
virtual void write_non_common_reg(UINT16 addr , UINT16 v) override;
virtual UINT32 execute_max_cycles() const override { return 25; }
virtual UINT16 execute_no_bpc_ioc(UINT16 opcode) override;
virtual UINT32 add_mae(aec_cases_t aec_case , UINT16 addr) override;
virtual UINT16 read_non_common_reg(UINT16 addr) override;
virtual void write_non_common_reg(UINT16 addr , UINT16 v) override;
};

323
src/devices/cpu/hphybrid/hphybrid_dasm.cpp
View File

@ -20,151 +20,151 @@ typedef struct {
static void addr_2_str(char *buffer , UINT16 addr , bool indirect , bool is_3001)
{
char *s = buffer + strlen(buffer);
char *s = buffer + strlen(buffer);
s += sprintf(s , "$%04x" , addr);
s += sprintf(s , "$%04x" , addr);
if (is_3001) {
switch (addr) {
case HP_REG_AR1_ADDR:
strcpy(s , "(Ar1)");
break;
if (is_3001) {
switch (addr) {
case HP_REG_AR1_ADDR:
strcpy(s , "(Ar1)");
break;
case HP_REG_AR1_ADDR + 1:
strcpy(s , "(Ar1_2)");
break;
case HP_REG_AR1_ADDR + 1:
strcpy(s , "(Ar1_2)");
break;
case HP_REG_AR1_ADDR + 2:
strcpy(s , "(Ar1_3)");
break;
case HP_REG_AR1_ADDR + 2:
strcpy(s , "(Ar1_3)");
break;
case HP_REG_AR1_ADDR + 3:
strcpy(s , "(Ar1_4)");
break;
case HP_REG_AR1_ADDR + 3:
strcpy(s , "(Ar1_4)");
break;
case HP_REG_AR2_ADDR:
strcpy(s , "(Ar2)");
break;
case HP_REG_AR2_ADDR:
strcpy(s , "(Ar2)");
break;
case HP_REG_AR2_ADDR + 1:
strcpy(s , "(Ar2_2)");
break;
case HP_REG_AR2_ADDR + 1:
strcpy(s , "(Ar2_2)");
break;
case HP_REG_AR2_ADDR + 2:
strcpy(s , "(Ar2_3)");
break;
case HP_REG_AR2_ADDR + 2:
strcpy(s , "(Ar2_3)");
break;
case HP_REG_AR2_ADDR + 3:
strcpy(s , "(Ar2_4)");
break;
case HP_REG_AR2_ADDR + 3:
strcpy(s , "(Ar2_4)");
break;
case HP_REG_SE_ADDR:
strcpy(s , "(SE)");
break;
case HP_REG_SE_ADDR:
strcpy(s , "(SE)");
break;
case HP_REG_R25_ADDR:
strcpy(s , "(R25)");
break;
case HP_REG_R25_ADDR:
strcpy(s , "(R25)");
break;
case HP_REG_R26_ADDR:
strcpy(s , "(R26)");
break;
case HP_REG_R26_ADDR:
strcpy(s , "(R26)");
break;
case HP_REG_R27_ADDR:
strcpy(s , "(R27)");
break;
case HP_REG_R27_ADDR:
strcpy(s , "(R27)");
break;
case HP_REG_R32_ADDR:
strcpy(s , "(R32)");
break;
case HP_REG_R32_ADDR:
strcpy(s , "(R32)");
break;
case HP_REG_R33_ADDR:
strcpy(s , "(R33)");
break;
case HP_REG_R33_ADDR:
strcpy(s , "(R33)");
break;
case HP_REG_R34_ADDR:
strcpy(s , "(R34)");
break;
case HP_REG_R34_ADDR:
strcpy(s , "(R34)");
break;
case HP_REG_R35_ADDR:
strcpy(s , "(R35)");
break;
case HP_REG_R35_ADDR:
strcpy(s , "(R35)");
break;
case HP_REG_R36_ADDR:
strcpy(s , "(R36)");
break;
case HP_REG_R36_ADDR:
strcpy(s , "(R36)");
break;
case HP_REG_R37_ADDR:
strcpy(s , "(R37)");
break;
}
}
case HP_REG_R37_ADDR:
strcpy(s , "(R37)");
break;
}
}
switch (addr) {
case HP_REG_A_ADDR:
strcpy(s , "(A)");
break;
switch (addr) {
case HP_REG_A_ADDR:
strcpy(s , "(A)");
break;
case HP_REG_B_ADDR:
strcpy(s , "(B)");
break;
case HP_REG_B_ADDR:
strcpy(s , "(B)");
break;
case HP_REG_P_ADDR:
strcpy(s , "(P)");
break;
case HP_REG_P_ADDR:
strcpy(s , "(P)");
break;
case HP_REG_R_ADDR:
strcpy(s , "(R)");
break;
case HP_REG_R_ADDR:
strcpy(s , "(R)");
break;
case HP_REG_R4_ADDR:
strcpy(s , "(R4)");
break;
case HP_REG_R4_ADDR:
strcpy(s , "(R4)");
break;
case HP_REG_R5_ADDR:
strcpy(s , "(R5)");
break;
case HP_REG_R5_ADDR:
strcpy(s , "(R5)");
break;
case HP_REG_R6_ADDR:
strcpy(s , "(R6)");
break;
case HP_REG_R6_ADDR:
strcpy(s , "(R6)");
break;
case HP_REG_R7_ADDR:
strcpy(s , "(R7)");
break;
case HP_REG_R7_ADDR:
strcpy(s , "(R7)");
break;
case HP_REG_IV_ADDR:
strcpy(s , "(IV)");
break;
case HP_REG_IV_ADDR:
strcpy(s , "(IV)");
break;
case HP_REG_PA_ADDR:
strcpy(s , "(PA)");
break;
case HP_REG_PA_ADDR:
strcpy(s , "(PA)");
break;
case HP_REG_DMAPA_ADDR:
strcpy(s , "(DMAPA)");
break;
case HP_REG_DMAPA_ADDR:
strcpy(s , "(DMAPA)");
break;
case HP_REG_DMAMA_ADDR:
strcpy(s , "(DMAMA)");
break;
case HP_REG_DMAMA_ADDR:
strcpy(s , "(DMAMA)");
break;
case HP_REG_DMAC_ADDR:
strcpy(s , "(DMAC)");
break;
case HP_REG_DMAC_ADDR:
strcpy(s , "(DMAC)");
break;
case HP_REG_C_ADDR:
strcpy(s , "(C)");
break;
case HP_REG_C_ADDR:
strcpy(s , "(C)");
break;
case HP_REG_D_ADDR:
strcpy(s , "(D)");
break;
}
case HP_REG_D_ADDR:
strcpy(s , "(D)");
break;
}
if (indirect) {
strcat(s , ",I");
}
if (indirect) {
strcat(s , ",I");
}
}
static void param_none(char *buffer , offs_t pc , UINT16 opcode , bool is_3001)
@ -337,77 +337,76 @@ static const dis_entry_t dis_table[] = {
};
static const dis_entry_t dis_table_emc[] = {
// *** EMC Instructions ***
{0xffff , 0x7200 , "MWA" , param_none , 0 },
{0xffff , 0x7220 , "CMY" , param_none , 0 },
{0xffff , 0x7260 , "CMX" , param_none , 0 },
{0xffff , 0x7280 , "FXA" , param_none , 0 },
{0xfff0 , 0x7300 , "XFR" , param_n16 , 0 },
{0xffff , 0x7340 , "NRM" , param_none , 0 },
{0xfff0 , 0x7380 , "CLR" , param_n16 , 0 },
{0xffff , 0x73c0 , "CDC" , param_none , 0 },
{0xffc0 , 0x74c0 , "SDS" , param_skip , 0 },
{0xffc0 , 0x75c0 , "SDC" , param_skip , 0 },
{0xffff , 0x7a00 , "FMP" , param_none , 0 },
{0xffff , 0x7a21 , "FDV" , param_none , 0 },
{0xffff , 0x7b00 , "MRX" , param_none , 0 },
{0xffff , 0x7b21 , "DRS" , param_none , 0 },
{0xffff , 0x7b40 , "MRY" , param_none , 0 },
{0xffff , 0x7b61 , "MLY" , param_none , 0 },
{0xffff , 0x7b8f , "MPY" , param_none , 0 },
// *** END ***
{0 , 0 , nullptr , nullptr , 0 }
// *** EMC Instructions ***
{0xffff , 0x7200 , "MWA" , param_none , 0 },
{0xffff , 0x7220 , "CMY" , param_none , 0 },
{0xffff , 0x7260 , "CMX" , param_none , 0 },
{0xffff , 0x7280 , "FXA" , param_none , 0 },
{0xfff0 , 0x7300 , "XFR" , param_n16 , 0 },
{0xffff , 0x7340 , "NRM" , param_none , 0 },
{0xfff0 , 0x7380 , "CLR" , param_n16 , 0 },
{0xffff , 0x73c0 , "CDC" , param_none , 0 },
{0xffc0 , 0x74c0 , "SDS" , param_skip , 0 },
{0xffc0 , 0x75c0 , "SDC" , param_skip , 0 },
{0xffff , 0x7a00 , "FMP" , param_none , 0 },
{0xffff , 0x7a21 , "FDV" , param_none , 0 },
{0xffff , 0x7b00 , "MRX" , param_none , 0 },
{0xffff , 0x7b21 , "DRS" , param_none , 0 },
{0xffff , 0x7b40 , "MRY" , param_none , 0 },
{0xffff , 0x7b61 , "MLY" , param_none , 0 },
{0xffff , 0x7b8f , "MPY" , param_none , 0 },
// *** END ***
{0 , 0 , nullptr , nullptr , 0 }
};
static offs_t disassemble_table(UINT16 opcode , offs_t pc , const dis_entry_t *table , bool is_3001 , char *buffer)
{
const dis_entry_t *p;
const dis_entry_t *p;
for (p = table; p->m_op_mask; p++) {
if ((opcode & p->m_op_mask) == p->m_opcode) {
strcpy(buffer , p->m_mnemonic);
strcat(buffer , " ");
p->m_param_fn(buffer , pc , opcode , is_3001);
return 1 | p->m_dasm_flags | DASMFLAG_SUPPORTED;
}
}
for (p = table; p->m_op_mask; p++) {
if ((opcode & p->m_op_mask) == p->m_opcode) {
strcpy(buffer , p->m_mnemonic);
strcat(buffer , " ");
p->m_param_fn(buffer , pc , opcode , is_3001);
return 1 | p->m_dasm_flags | DASMFLAG_SUPPORTED;
}
}
return 0;
return 0;
}
CPU_DISASSEMBLE(hp_hybrid)
{
UINT16 opcode = ((UINT16)oprom[ 0 ] << 8) | oprom[ 1 ];
offs_t res;
UINT16 opcode = ((UINT16)oprom[ 0 ] << 8) | oprom[ 1 ];
offs_t res;
res = disassemble_table(opcode , pc , dis_table , false , buffer);
res = disassemble_table(opcode , pc , dis_table , false , buffer);
if (res == 0) {
// Unknown opcode
strcpy(buffer , "???");
res = 1 | DASMFLAG_SUPPORTED;
}
if (res == 0) {
// Unknown opcode
strcpy(buffer , "???");
res = 1 | DASMFLAG_SUPPORTED;
}
return res;
return res;
}
CPU_DISASSEMBLE(hp_5061_3001)
{
UINT16 opcode = ((UINT16)oprom[ 0 ] << 8) | oprom[ 1 ];
offs_t res;
UINT16 opcode = ((UINT16)oprom[ 0 ] << 8) | oprom[ 1 ];
offs_t res;
res = disassemble_table(opcode , pc , dis_table_emc , true , buffer);
res = disassemble_table(opcode , pc , dis_table_emc , true , buffer);
if (res == 0) {
res = disassemble_table(opcode , pc , dis_table , true , buffer);
}
if (res == 0) {
res = disassemble_table(opcode , pc , dis_table , true , buffer);
}
if (res == 0) {
// Unknown opcode
strcpy(buffer , "???");
res = 1 | DASMFLAG_SUPPORTED;
}
if (res == 0) {
// Unknown opcode
strcpy(buffer , "???");
res = 1 | DASMFLAG_SUPPORTED;
}
return res;
return res;
}

2
src/devices/cpu/m68000/m68kfpu.inc
View File

@ -1681,7 +1681,7 @@ static void fmove_fpcr(m68000_base_device *m68k, UINT16 w2)
int rnd = (REG_FPCR(m68k) >> 4) & 3;
int prec = (REG_FPCR(m68k) >> 6) & 3;
// m68k->logerror("m68k_fpsp:fmove_fpcr fpcr=%04x prec=%d rnd=%d\n", REG_FPCR(m68k), prec, rnd);
// m68k->logerror("m68k_fpsp:fmove_fpcr fpcr=%04x prec=%d rnd=%d\n", REG_FPCR(m68k), prec, rnd);
#ifdef FLOATX80
switch (prec)

2
src/devices/cpu/m6805/m6805.h
View File

@ -119,7 +119,7 @@ protected:
void rorx();
void asrx();
void aslx();
// void lslx();
// void lslx();
void rolx();
void decx();
void incx();

893
src/devices/cpu/patinhofeio/patinho_feio.cpp
View File

@ -28,14 +28,14 @@
#define INCREMENT_PC_4K (PC = (PC+1) & ADDRESS_MASK_4K)
unsigned int patinho_feio_cpu_device::compute_effective_address(unsigned int addr){
unsigned int retval = addr;
if (m_indirect_addressing){
retval = READ_WORD_PATINHO(addr);
if (retval & 0x1000)
return compute_effective_address(retval & 0xFFF);
}
unsigned int retval = addr;
if (m_indirect_addressing){
retval = READ_WORD_PATINHO(addr);
if (retval & 0x1000)
return compute_effective_address(retval & 0xFFF);
}
return retval;
return retval;
}
const device_type PATINHO_FEIO = &device_creator<patinho_feio_cpu_device>;
@ -43,494 +43,493 @@ const device_type PATINHO_FEIO = &device_creator<patinho_feio_cpu_device>;
//Internal 4kbytes of RAM
static ADDRESS_MAP_START(prog_8bit, AS_PROGRAM, 8, patinho_feio_cpu_device)
AM_RANGE(0x0000, 0x0fff) AM_RAM AM_SHARE("internalram")
AM_RANGE(0x0000, 0x0fff) AM_RAM AM_SHARE("internalram")
ADDRESS_MAP_END
patinho_feio_cpu_device::patinho_feio_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: cpu_device(mconfig, PATINHO_FEIO, "PATINHO FEIO", tag, owner, clock, "patinho_feio_cpu", __FILE__),
m_program_config("program", ENDIANNESS_LITTLE, 8, 12, 0, ADDRESS_MAP_NAME(prog_8bit)),
m_icount(0),
m_rc_read_cb(*this)
: cpu_device(mconfig, PATINHO_FEIO, "PATINHO FEIO", tag, owner, clock, "patinho_feio_cpu", __FILE__),
m_program_config("program", ENDIANNESS_LITTLE, 8, 12, 0, ADDRESS_MAP_NAME(prog_8bit)),
m_icount(0),
m_rc_read_cb(*this)
{
}
UINT16 patinho_feio_cpu_device::read_panel_keys_register(){
if (!m_rc_read_cb.isnull())
m_rc = m_rc_read_cb(0);
else
m_rc = 0;
if (!m_rc_read_cb.isnull())
m_rc = m_rc_read_cb(0);
else
m_rc = 0;
return m_rc;
return m_rc;
}
void patinho_feio_cpu_device::device_start()
{
m_program = &space(AS_PROGRAM);
m_program = &space(AS_PROGRAM);
save_item(NAME(m_pc));
save_item(NAME(m_acc));
save_item(NAME(m_rc));
save_item(NAME(m_idx));
save_item(NAME(m_flags));
save_item(NAME(m_pc));
save_item(NAME(m_acc));
save_item(NAME(m_rc));
save_item(NAME(m_idx));
save_item(NAME(m_flags));
// Register state for debugger
state_add( PATINHO_FEIO_CI, "CI", m_pc ).mask(0xFFF);
state_add( PATINHO_FEIO_RC, "RC", m_rc ).mask(0xFFF);
state_add( PATINHO_FEIO_ACC, "ACC", m_acc ).mask(0xFF);
state_add( PATINHO_FEIO_IDX, "IDX", m_idx ).mask(0xFF);
state_add(STATE_GENPC, "GENPC", m_pc).formatstr("0%06O").noshow();
state_add(STATE_GENFLAGS, "GENFLAGS", m_flags).noshow().formatstr("%8s");
// Register state for debugger
state_add( PATINHO_FEIO_CI, "CI", m_pc ).mask(0xFFF);
state_add( PATINHO_FEIO_RC, "RC", m_rc ).mask(0xFFF);
state_add( PATINHO_FEIO_ACC, "ACC", m_acc ).mask(0xFF);
state_add( PATINHO_FEIO_IDX, "IDX", m_idx ).mask(0xFF);
state_add(STATE_GENPC, "GENPC", m_pc).formatstr("0%06O").noshow();
state_add(STATE_GENFLAGS, "GENFLAGS", m_flags).noshow().formatstr("%8s");
if (m_rc_read_cb.isnull()){
fatalerror("Panel keys register not found!");
} else {
m_rc_read_cb.resolve();
}
if (m_rc_read_cb.isnull()){
fatalerror("Panel keys register not found!");
} else {
m_rc_read_cb.resolve();
}
m_icountptr = &m_icount;
m_icountptr = &m_icount;
}
void patinho_feio_cpu_device::device_reset()
{
m_pc = 0x006;
m_acc = 0;
m_rc = 0;
m_idx = READ_INDEX_REG();
m_flags = 0;
m_run = true;
m_scheduled_IND_bit_reset = false;
m_indirect_addressing = false;
m_pc = 0x006;
m_acc = 0;
m_rc = 0;
m_idx = READ_INDEX_REG();
m_flags = 0;
m_run = true;
m_scheduled_IND_bit_reset = false;
m_indirect_addressing = false;
}
/* execute instructions on this CPU until icount expires */
void patinho_feio_cpu_device::execute_run()
{
do
{
if ((! m_run)){
m_icount = 0; /* if processor is stopped, just burn cycles */
} else {
m_idx = READ_INDEX_REG();
read_panel_keys_register();
execute_instruction();
m_icount --;
}
}
while (m_icount > 0);
do
{
if ((! m_run)){
m_icount = 0; /* if processor is stopped, just burn cycles */
} else {
m_idx = READ_INDEX_REG();
read_panel_keys_register();
execute_instruction();
m_icount --;
}
}
while (m_icount > 0);
}
/* execute one instruction */
void patinho_feio_cpu_device::execute_instruction()
{
debugger_instruction_hook(this, PC);
offs_t addr;
bool skip;
unsigned int tmp;
unsigned char value, channel, function;
unsigned char opcode = READ_BYTE_PATINHO(PC);
INCREMENT_PC_4K;
debugger_instruction_hook(this, PC);
offs_t addr;
bool skip;
unsigned int tmp;
unsigned char value, channel, function;
unsigned char opcode = READ_BYTE_PATINHO(PC);
INCREMENT_PC_4K;
if (m_scheduled_IND_bit_reset)
m_indirect_addressing = false;
if (m_scheduled_IND_bit_reset)
m_indirect_addressing = false;
if (m_indirect_addressing)
m_scheduled_IND_bit_reset = true;
if (m_indirect_addressing)
m_scheduled_IND_bit_reset = true;
switch (opcode){
case 0xD2:
//XOR: Computes the bitwise XOR of an immediate into the accumulator
ACC ^= READ_BYTE_PATINHO(PC);
INCREMENT_PC_4K;
//TODO: update T and V flags
return;
case 0xD4:
//NAND: Computes the bitwise XOR of an immediate into the accumulator
ACC = ~(ACC & READ_BYTE_PATINHO(PC));
INCREMENT_PC_4K;
//TODO: update T and V flags
return;
case 0xD8:
//SOMI="Soma Imediato":
// Add an immediate into the accumulator
ACC += READ_BYTE_PATINHO(PC);
INCREMENT_PC_4K;
//TODO: update T and V flags
return;
case 0xDA:
//CARI="Carrega Imediato":
// Load an immediate into the accumulator
ACC = READ_BYTE_PATINHO(PC);
INCREMENT_PC_4K;
return;
case 0x80:
//LIMPO:
// Clear accumulator and flags
ACC = 0;
FLAGS = 0;
return;
case 0x81:
//UM="One":
// Load 1 into accumulator
// and clear the flags
ACC = 1;
FLAGS = 0;
return;
case 0x82:
//CMP1:
// Compute One's complement of the accumulator
// and clear the flags
ACC = ~ACC;
FLAGS = 0;
return;
case 0x83:
//CMP2:
// Compute Two's complement of the accumulator
// and updates flags according to the result of the operation
ACC = ~ACC + 1;
FLAGS = 0; //TODO: fix-me (I'm not sure yet how to compute the flags here)
return;
case 0x84:
//LIM="Limpa":
// Clear flags
FLAGS = 0;
return;
case 0x85:
//INC:
// Increment accumulator
ACC++;
FLAGS = 0; //TODO: fix-me (I'm not sure yet how to compute the flags here)
return;
case 0x86:
//UNEG="Um Negativo":
// Load -1 into accumulator and clear flags
ACC = -1;
FLAGS = 0;
return;
case 0x87:
//LIMP1:
// Clear accumulator, reset T and set V
ACC = 0;
FLAGS = V;
return;
case 0x88:
//PNL 0:
ACC = (RC & 0xFF);
FLAGS = 0;
return;
case 0x89:
//PNL 1:
ACC = (RC & 0xFF) + 1;
//TODO: FLAGS = ?;
return;
case 0x8A:
//PNL 2:
ACC = (RC & 0xFF) - ACC - 1;
//TODO: FLAGS = ?;
return;
case 0x8B:
//PNL 3:
ACC = (RC & 0xFF) - ACC;
//TODO: FLAGS = ?;
return;
case 0x8C:
//PNL 4:
ACC = (RC & 0xFF) + ACC;
//TODO: FLAGS = ?;
return;
case 0x8D:
//PNL 5:
ACC = (RC & 0xFF) + ACC + 1;
//TODO: FLAGS = ?;
return;
case 0x8E:
//PNL 6:
ACC = (RC & 0xFF) - 1;
//TODO: FLAGS = ?;
return;
case 0x8F:
//PNL 7:
ACC = (RC & 0xFF);
FLAGS = V;
return;
case 0x9A:
//INIB="Inibe"
// disables interrupts
m_interrupts_enabled = false;
return;
case 0x9B:
//PERM="Permite"
// enables interrupts
m_interrupts_enabled = true;
return;
case 0x9C:
//ESP="Espera":
// Holds execution and waits for an interrupt to occur.
m_run = false;
m_wait_for_interrupt = true;
return;
case 0x9D:
//PARE="Pare":
// Holds execution. This can only be recovered by
// manually triggering execution again by
// pressing the "Partida" (start) button in the panel
m_run = false;
m_wait_for_interrupt = false;
return;
case 0x9E:
//TRI="Troca com Indexador":
// Exchange the value of the accumulator with the index register
value = ACC;
ACC = READ_INDEX_REG();
WRITE_INDEX_REG(value);
return;
case 0x9F:
//IND="Enderecamento indireto":
// Sets memory addressing for the next instruction to be indirect.
m_indirect_addressing = true;
m_scheduled_IND_bit_reset = false; //the next instruction execution will schedule it.
return;
case 0xD1:
//Bit-Shift/Bit-Rotate instructions
value = READ_BYTE_PATINHO(PC);
INCREMENT_PC_4K;
for (int i=0; i<4; i++){
if (value & (1<<i)){
/* The number of shifts or rotations is determined by the
ammount of 1 bits in the lower 4 bits of 'value' */
switch(value & 0xF0)
{
case 0x00:
//DD="Deslocamento para a Direita"
// Shift right
FLAGS &= ~V;
if (ACC & 1)
FLAGS |= V;
switch (opcode){
case 0xD2:
//XOR: Computes the bitwise XOR of an immediate into the accumulator
ACC ^= READ_BYTE_PATINHO(PC);
INCREMENT_PC_4K;
//TODO: update T and V flags
return;
case 0xD4:
//NAND: Computes the bitwise XOR of an immediate into the accumulator
ACC = ~(ACC & READ_BYTE_PATINHO(PC));
INCREMENT_PC_4K;
//TODO: update T and V flags
return;
case 0xD8:
//SOMI="Soma Imediato":
// Add an immediate into the accumulator
ACC += READ_BYTE_PATINHO(PC);
INCREMENT_PC_4K;
//TODO: update T and V flags
return;
case 0xDA:
//CARI="Carrega Imediato":
// Load an immediate into the accumulator
ACC = READ_BYTE_PATINHO(PC);
INCREMENT_PC_4K;
return;
case 0x80:
//LIMPO:
// Clear accumulator and flags
ACC = 0;
FLAGS = 0;
return;
case 0x81:
//UM="One":
// Load 1 into accumulator
// and clear the flags
ACC = 1;
FLAGS = 0;
return;
case 0x82:
//CMP1:
// Compute One's complement of the accumulator
// and clear the flags
ACC = ~ACC;
FLAGS = 0;
return;
case 0x83:
//CMP2:
// Compute Two's complement of the accumulator
// and updates flags according to the result of the operation
ACC = ~ACC + 1;
FLAGS = 0; //TODO: fix-me (I'm not sure yet how to compute the flags here)
return;
case 0x84:
//LIM="Limpa":
// Clear flags
FLAGS = 0;
return;
case 0x85:
//INC:
// Increment accumulator
ACC++;
FLAGS = 0; //TODO: fix-me (I'm not sure yet how to compute the flags here)
return;
case 0x86:
//UNEG="Um Negativo":
// Load -1 into accumulator and clear flags
ACC = -1;
FLAGS = 0;
return;
case 0x87:
//LIMP1:
// Clear accumulator, reset T and set V
ACC = 0;
FLAGS = V;
return;
case 0x88:
//PNL 0:
ACC = (RC & 0xFF);
FLAGS = 0;
return;
case 0x89:
//PNL 1:
ACC = (RC & 0xFF) + 1;
//TODO: FLAGS = ?;
return;
case 0x8A:
//PNL 2:
ACC = (RC & 0xFF) - ACC - 1;
//TODO: FLAGS = ?;
return;
case 0x8B:
//PNL 3:
ACC = (RC & 0xFF) - ACC;
//TODO: FLAGS = ?;
return;
case 0x8C:
//PNL 4:
ACC = (RC & 0xFF) + ACC;
//TODO: FLAGS = ?;
return;
case 0x8D:
//PNL 5:
ACC = (RC & 0xFF) + ACC + 1;
//TODO: FLAGS = ?;
return;
case 0x8E:
//PNL 6:
ACC = (RC & 0xFF) - 1;
//TODO: FLAGS = ?;
return;
case 0x8F:
//PNL 7:
ACC = (RC & 0xFF);
FLAGS = V;
return;
case 0x9A:
//INIB="Inibe"
// disables interrupts
m_interrupts_enabled = false;
return;
case 0x9B:
//PERM="Permite"
// enables interrupts
m_interrupts_enabled = true;
return;
case 0x9C:
//ESP="Espera":
// Holds execution and waits for an interrupt to occur.
m_run = false;
m_wait_for_interrupt = true;
return;
case 0x9D:
//PARE="Pare":
// Holds execution. This can only be recovered by
// manually triggering execution again by
// pressing the "Partida" (start) button in the panel
m_run = false;
m_wait_for_interrupt = false;
return;
case 0x9E:
//TRI="Troca com Indexador":
// Exchange the value of the accumulator with the index register
value = ACC;
ACC = READ_INDEX_REG();
WRITE_INDEX_REG(value);
return;
case 0x9F:
//IND="Enderecamento indireto":
// Sets memory addressing for the next instruction to be indirect.
m_indirect_addressing = true;
m_scheduled_IND_bit_reset = false; //the next instruction execution will schedule it.
return;
case 0xD1:
//Bit-Shift/Bit-Rotate instructions
value = READ_BYTE_PATINHO(PC);
INCREMENT_PC_4K;
for (int i=0; i<4; i++){
if (value & (1<<i)){
/* The number of shifts or rotations is determined by the
ammount of 1 bits in the lower 4 bits of 'value' */
switch(value & 0xF0)
{
case 0x00:
//DD="Deslocamento para a Direita"
// Shift right
FLAGS &= ~V;
if (ACC & 1)
FLAGS |= V;
ACC >>= 1;
break;
case 0x20:
//GD="Giro para a Direita"
// Rotate right
FLAGS &= ~V;
if (ACC & 1)
FLAGS |= V;
ACC >>= 1;
break;
case 0x20:
//GD="Giro para a Direita"
// Rotate right
FLAGS &= ~V;
if (ACC & 1)
FLAGS |= V;
ACC = ((ACC & 1) << 7) | (ACC >> 1);
break;
case 0x10: //DDV="Deslocamento para a Direita com Vai-um"
// Shift right with Carry
case 0x30: //GDV="Giro para a Direita com Vai-um"
// Rotate right with Carry
ACC = ((ACC & 1) << 7) | (ACC >> 1);
break;
case 0x10: //DDV="Deslocamento para a Direita com Vai-um"
// Shift right with Carry
case 0x30: //GDV="Giro para a Direita com Vai-um"
// Rotate right with Carry
//both instructions are equivalent
if (FLAGS & V)
tmp = 0x100 | ACC;
else
tmp = ACC;
//both instructions are equivalent
if (FLAGS & V)
tmp = 0x100 | ACC;
else
tmp = ACC;
FLAGS &= ~V;
if (ACC & 1)
FLAGS |= V;
FLAGS &= ~V;
if (ACC & 1)
FLAGS |= V;
ACC = tmp >> 1;
break;
case 0x40: //DE="Deslocamento para a Esquerda"
// Shift left
FLAGS &= ~V;
if (ACC & (1<<7))
FLAGS |= V;
ACC = tmp >> 1;
break;
case 0x40: //DE="Deslocamento para a Esquerda"
// Shift left
FLAGS &= ~V;
if (ACC & (1<<7))
FLAGS |= V;
ACC <<= 1;
break;
case 0x60: //GE="Giro para a Esquerda"
// Rotate left
FLAGS &= ~V;
if (ACC & (1<<7))
FLAGS |= V;
ACC <<= 1;
break;
case 0x60: //GE="Giro para a Esquerda"
// Rotate left
FLAGS &= ~V;
if (ACC & (1<<7))
FLAGS |= V;
ACC = (ACC << 1) | ((ACC >> 7) & 1);
break;
case 0x50: //DEV="Deslocamento para a Esquerda com Vai-um"
// Shift left with Carry
case 0x70: //GEV="Giro para a Esquerda com Vai-um"
// Rotate left with Carry
ACC = (ACC << 1) | ((ACC >> 7) & 1);
break;
case 0x50: //DEV="Deslocamento para a Esquerda com Vai-um"
// Shift left with Carry
case 0x70: //GEV="Giro para a Esquerda com Vai-um"
// Rotate left with Carry
//both instructions are equivalent
if (FLAGS & V)
tmp = (ACC << 1) | 1;
else
tmp = (ACC << 1);
//both instructions are equivalent
if (FLAGS & V)
tmp = (ACC << 1) | 1;
else
tmp = (ACC << 1);
FLAGS &= ~V;
if (tmp & (1<<8))
FLAGS |= V;
FLAGS &= ~V;
if (tmp & (1<<8))
FLAGS |= V;
ACC = tmp & 0xFF;
break;
case 0x80: //DDS="Deslocamento para a Direita com duplicacao de Sinal"
// Rotate right with signal duplication
FLAGS &= ~V;
if (ACC & 1)
FLAGS |= V;
ACC = tmp & 0xFF;
break;
case 0x80: //DDS="Deslocamento para a Direita com duplicacao de Sinal"
// Rotate right with signal duplication
FLAGS &= ~V;
if (ACC & 1)
FLAGS |= V;
ACC = (ACC & (1 << 7)) | ACC >> 1;
break;
default:
printf("Illegal instruction: %02X %02X\n", opcode, value);
return;
}
}
}
return;
}
ACC = (ACC & (1 << 7)) | ACC >> 1;
break;
default:
printf("Illegal instruction: %02X %02X\n", opcode, value);
return;
}
}
}
return;
}
switch (opcode & 0xF0){
case 0x00:
//PLA = "Pula": Jump to address
addr = compute_effective_address((opcode & 0x0F) << 8 | READ_BYTE_PATINHO(PC));
INCREMENT_PC_4K;
PC = addr;
return;
case 0x10:
//PLAX = "Pula indexado": Jump to indexed address
tmp = (opcode & 0x0F) << 8 | READ_BYTE_PATINHO(PC);
INCREMENT_PC_4K;
m_idx = READ_INDEX_REG();
PC = compute_effective_address(m_idx + tmp);
return;
case 0x20:
//ARM = "Armazena": Store the value of the accumulator into a given memory position
addr = compute_effective_address((opcode & 0x0F) << 8 | READ_BYTE_PATINHO(PC));
INCREMENT_PC_4K;
WRITE_BYTE_PATINHO(addr, ACC);
return;
case 0x30:
//ARMX = "Armazena indexado": Store the value of the accumulator into a given indexed memory position
tmp = (opcode & 0x0F) << 8 | READ_BYTE_PATINHO(PC);
INCREMENT_PC_4K;
m_idx = READ_INDEX_REG();
addr = compute_effective_address(m_idx + tmp);
WRITE_BYTE_PATINHO(addr, ACC);
return;
case 0x40:
//CAR = "Carrega": Load a value from a given memory position into the accumulator
addr = compute_effective_address((opcode & 0x0F) << 8 | READ_BYTE_PATINHO(PC));
INCREMENT_PC_4K;
ACC = READ_BYTE_PATINHO(addr);
return;
case 0x50:
//CARX = "Carga indexada": Load a value from a given indexed memory position into the accumulator
tmp = (opcode & 0x0F) << 8 | READ_BYTE_PATINHO(PC);
INCREMENT_PC_4K;
m_idx = READ_INDEX_REG();
addr = compute_effective_address(m_idx + tmp);
ACC = READ_BYTE_PATINHO(addr);
return;
case 0x60:
//SOM = "Soma": Add a value from a given memory position into the accumulator
addr = compute_effective_address((opcode & 0x0F) << 8 | READ_BYTE_PATINHO(PC));
INCREMENT_PC_4K;
ACC += READ_BYTE_PATINHO(addr);
//TODO: update V and T flags
return;
case 0x70:
//SOMX = "Soma indexada": Add a value from a given indexed memory position into the accumulator
tmp = (opcode & 0x0F) << 8 | READ_BYTE_PATINHO(PC);
INCREMENT_PC_4K;
m_idx = READ_INDEX_REG();
addr = compute_effective_address(m_idx + tmp);
ACC += READ_BYTE_PATINHO(addr);
//TODO: update V and T flags
return;
case 0xA0:
//PLAN = "Pula se ACC negativo": Jump to a given address if ACC is negative
addr = compute_effective_address((opcode & 0x0F) << 8 | READ_BYTE_PATINHO(PC));
INCREMENT_PC_4K;
if ((signed char) ACC < 0)
PC = addr;
return;
case 0xB0:
//PLAZ = "Pula se ACC for zero": Jump to a given address if ACC is zero
addr = compute_effective_address((opcode & 0x0F) << 8 | READ_BYTE_PATINHO(PC));
INCREMENT_PC_4K;
if (ACC == 0)
PC = addr;
return;
case 0xC0:
//Executes I/O functions
//TODO: Implement-me!
value = READ_BYTE_PATINHO(PC);
INCREMENT_PC_4K;
channel = opcode & 0x0F;
function = value & 0x0F;
switch(value & 0xF0){
case 0x10:
printf("Unimplemented FNC /%X%X instruction\n", channel, function);
break;
case 0x20:
//SAL="Salta"
// Skips a couple bytes if a condition is met
skip = false;
switch(function)
{
case 1:
if (m_peripherals[channel].io_status == DEVICE_READY)
skip = true;
break;
case 2:
if (m_peripherals[channel].device_is_ok)
skip = true;
break;
case 4:
if (m_peripherals[channel].IRQ_request == true)
skip = true;
break;
}
switch (opcode & 0xF0){
case 0x00:
//PLA = "Pula": Jump to address
addr = compute_effective_address((opcode & 0x0F) << 8 | READ_BYTE_PATINHO(PC));
INCREMENT_PC_4K;
PC = addr;
return;
case 0x10:
//PLAX = "Pula indexado": Jump to indexed address
tmp = (opcode & 0x0F) << 8 | READ_BYTE_PATINHO(PC);
INCREMENT_PC_4K;
m_idx = READ_INDEX_REG();
PC = compute_effective_address(m_idx + tmp);
return;
case 0x20:
//ARM = "Armazena": Store the value of the accumulator into a given memory position
addr = compute_effective_address((opcode & 0x0F) << 8 | READ_BYTE_PATINHO(PC));
INCREMENT_PC_4K;
WRITE_BYTE_PATINHO(addr, ACC);
return;
case 0x30:
//ARMX = "Armazena indexado": Store the value of the accumulator into a given indexed memory position
tmp = (opcode & 0x0F) << 8 | READ_BYTE_PATINHO(PC);
INCREMENT_PC_4K;
m_idx = READ_INDEX_REG();
addr = compute_effective_address(m_idx + tmp);
WRITE_BYTE_PATINHO(addr, ACC);
return;
case 0x40:
//CAR = "Carrega": Load a value from a given memory position into the accumulator
addr = compute_effective_address((opcode & 0x0F) << 8 | READ_BYTE_PATINHO(PC));
INCREMENT_PC_4K;
ACC = READ_BYTE_PATINHO(addr);
return;
case 0x50:
//CARX = "Carga indexada": Load a value from a given indexed memory position into the accumulator
tmp = (opcode & 0x0F) << 8 | READ_BYTE_PATINHO(PC);
INCREMENT_PC_4K;
m_idx = READ_INDEX_REG();
addr = compute_effective_address(m_idx + tmp);
ACC = READ_BYTE_PATINHO(addr);
return;
case 0x60:
//SOM = "Soma": Add a value from a given memory position into the accumulator
addr = compute_effective_address((opcode & 0x0F) << 8 | READ_BYTE_PATINHO(PC));
INCREMENT_PC_4K;
ACC += READ_BYTE_PATINHO(addr);
//TODO: update V and T flags
return;
case 0x70:
//SOMX = "Soma indexada": Add a value from a given indexed memory position into the accumulator
tmp = (opcode & 0x0F) << 8 | READ_BYTE_PATINHO(PC);
INCREMENT_PC_4K;
m_idx = READ_INDEX_REG();
addr = compute_effective_address(m_idx + tmp);
ACC += READ_BYTE_PATINHO(addr);
//TODO: update V and T flags
return;
case 0xA0:
//PLAN = "Pula se ACC negativo": Jump to a given address if ACC is negative
addr = compute_effective_address((opcode & 0x0F) << 8 | READ_BYTE_PATINHO(PC));
INCREMENT_PC_4K;
if ((signed char) ACC < 0)
PC = addr;
return;
case 0xB0:
//PLAZ = "Pula se ACC for zero": Jump to a given address if ACC is zero
addr = compute_effective_address((opcode & 0x0F) << 8 | READ_BYTE_PATINHO(PC));
INCREMENT_PC_4K;
if (ACC == 0)
PC = addr;
return;
case 0xC0:
//Executes I/O functions
//TODO: Implement-me!
value = READ_BYTE_PATINHO(PC);
INCREMENT_PC_4K;
channel = opcode & 0x0F;
function = value & 0x0F;
switch(value & 0xF0){
case 0x10:
printf("Unimplemented FNC /%X%X instruction\n", channel, function);
break;
case 0x20:
//SAL="Salta"
// Skips a couple bytes if a condition is met
skip = false;
switch(function)
{
case 1:
if (m_peripherals[channel].io_status == DEVICE_READY)
skip = true;
break;
case 2:
if (m_peripherals[channel].device_is_ok)
skip = true;
break;
case 4:
if (m_peripherals[channel].IRQ_request == true)
skip = true;
break;
}
if (skip){
INCREMENT_PC_4K;
INCREMENT_PC_4K;
}
break;
case 0x40:
printf("Unimplemented ENTR /%X0 instruction\n", channel);
break;
case 0x80:
printf("Unimplemented SAI /%X0 instruction (ACC = 0x%02X '%c')\n", channel, ACC, ACC);
break;
}
return;
case 0xE0:
//SUS = "Subtrai um ou Salta": Subtract one from the data in the given address
// or, if the data is zero, then simply skip a couple bytes.
addr = compute_effective_address((opcode & 0x0F) << 8 | READ_BYTE_PATINHO(PC));
INCREMENT_PC_4K;
value = READ_BYTE_PATINHO(addr);
if (value > 0){
WRITE_BYTE_PATINHO(addr, value-1);
} else {
INCREMENT_PC_4K;
INCREMENT_PC_4K;
}
return;
case 0xF0:
//PUG = "Pula e guarda": Jump and store.
// It stores the return address to addr and addr+1
// And then jumps to addr+2
addr = compute_effective_address((opcode & 0x0F) << 8 | READ_BYTE_PATINHO(PC));
INCREMENT_PC_4K;
WRITE_BYTE_PATINHO(addr, (PC >> 8) & 0x0F);
WRITE_BYTE_PATINHO(addr+1, PC & 0xFF);
PC = addr+2;
return;
}
printf("unimplemented opcode: 0x%02X\n", opcode);
if (skip){
INCREMENT_PC_4K;
INCREMENT_PC_4K;
}
break;
case 0x40:
printf("Unimplemented ENTR /%X0 instruction\n", channel);
break;
case 0x80:
printf("Unimplemented SAI /%X0 instruction (ACC = 0x%02X '%c')\n", channel, ACC, ACC);
break;
}
return;
case 0xE0:
//SUS = "Subtrai um ou Salta": Subtract one from the data in the given address
// or, if the data is zero, then simply skip a couple bytes.
addr = compute_effective_address((opcode & 0x0F) << 8 | READ_BYTE_PATINHO(PC));
INCREMENT_PC_4K;
value = READ_BYTE_PATINHO(addr);
if (value > 0){
WRITE_BYTE_PATINHO(addr, value-1);
} else {
INCREMENT_PC_4K;
INCREMENT_PC_4K;
}
return;
case 0xF0:
//PUG = "Pula e guarda": Jump and store.
// It stores the return address to addr and addr+1
// And then jumps to addr+2
addr = compute_effective_address((opcode & 0x0F) << 8 | READ_BYTE_PATINHO(PC));
INCREMENT_PC_4K;
WRITE_BYTE_PATINHO(addr, (PC >> 8) & 0x0F);
WRITE_BYTE_PATINHO(addr+1, PC & 0xFF);
PC = addr+2;
return;
}
printf("unimplemented opcode: 0x%02X\n", opcode);
}
offs_t patinho_feio_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
{
extern CPU_DISASSEMBLE( patinho_feio );
return CPU_DISASSEMBLE_NAME(patinho_feio)(this, buffer, pc, oprom, opram, options);
extern CPU_DISASSEMBLE( patinho_feio );
return CPU_DISASSEMBLE_NAME(patinho_feio)(this, buffer, pc, oprom, opram, options);
}

106
src/devices/cpu/patinhofeio/patinho_feio.h
View File

@ -6,99 +6,99 @@
#define __PATINHOFEIO_H__
#define MCFG_PATINHO_RC_READ_CB(_devcb) \
devcb = &patinho_feio_cpu_device::set_rc_read_callback(*device, DEVCB_##_devcb);
devcb = &patinho_feio_cpu_device::set_rc_read_callback(*device, DEVCB_##_devcb);
/* register IDs */
enum
{
PATINHO_FEIO_CI=1, PATINHO_FEIO_ACC, PATINHO_FEIO_IDX, PATINHO_FEIO_RC
PATINHO_FEIO_CI=1, PATINHO_FEIO_ACC, PATINHO_FEIO_IDX, PATINHO_FEIO_RC
};
enum {
DEVICE_BUSY=0,
DEVICE_READY=1
DEVICE_BUSY=0,
DEVICE_READY=1
};
class patinho_feio_peripheral
{
public:
patinho_feio_peripheral()
: io_status(DEVICE_READY)
, device_is_ok(true)
, IRQ_request(false)
{ };
patinho_feio_peripheral()
: io_status(DEVICE_READY)
, device_is_ok(true)
, IRQ_request(false)
{ };
int io_status;
bool device_is_ok;
bool IRQ_request;
int io_status;
bool device_is_ok;
bool IRQ_request;
};
class patinho_feio_cpu_device : public cpu_device
{
public:
// construction/destruction
patinho_feio_cpu_device(const machine_config &mconfig, const char *_tag, device_t *_owner, UINT32 _clock);
// construction/destruction
patinho_feio_cpu_device(const machine_config &mconfig, const char *_tag, device_t *_owner, UINT32 _clock);
template<class _Object> static devcb_base &set_rc_read_callback(device_t &device, _Object object) { return downcast<patinho_feio_cpu_device &>(device).m_rc_read_cb.set_callback(object); }
template<class _Object> static devcb_base &set_rc_read_callback(device_t &device, _Object object) { return downcast<patinho_feio_cpu_device &>(device).m_rc_read_cb.set_callback(object); }
protected:
virtual void execute_run() override;
virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
address_space_config m_program_config;
virtual void execute_run() override;
virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
/* processor registers */
unsigned char m_acc; /* accumulator (8 bits) */
unsigned int m_pc; /* program counter (12 bits)
address_space_config m_program_config;
/* processor registers */
unsigned char m_acc; /* accumulator (8 bits) */
unsigned int m_pc; /* program counter (12 bits)
* Actual register name is CI, which
* stands for "Contador de Instrucao"
* or "instructions counter".
*/
unsigned int m_rc; /* RC = "Registrador de Chaves" (Keys Register)
unsigned int m_rc; /* RC = "Registrador de Chaves" (Keys Register)
* It represents the 12 bits of input data
* from toggle switches in the computer panel
*/
unsigned char m_idx;
unsigned char m_idx;
/* processor state flip-flops */
bool m_run; /* processor is running */
bool m_wait_for_interrupt;
bool m_interrupts_enabled;
bool m_scheduled_IND_bit_reset;
bool m_indirect_addressing;
/* processor state flip-flops */
bool m_run; /* processor is running */
bool m_wait_for_interrupt;
bool m_interrupts_enabled;
bool m_scheduled_IND_bit_reset;
bool m_indirect_addressing;
int m_flags;
// V = "Vai um" (Carry flag)
// T = "Transbordo" (Overflow flag)
patinho_feio_peripheral m_peripherals[16];
int m_flags;
// V = "Vai um" (Carry flag)
// T = "Transbordo" (Overflow flag)
int m_address_mask; /* address mask */
int m_icount;
patinho_feio_peripheral m_peripherals[16];
address_space *m_program;
int m_address_mask; /* address mask */
int m_icount;
// device-level overrides
virtual void device_start() override;
virtual void device_reset() override;
address_space *m_program;
// device_execute_interface overrides
virtual UINT32 execute_min_cycles() const override { return 1; }
virtual UINT32 execute_max_cycles() const override { return 2; }
// device-level overrides
virtual void device_start() override;
virtual void device_reset() override;
// device_memory_interface overrides
virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const override { return (spacenum == AS_PROGRAM) ? &m_program_config : NULL; }
// device_execute_interface overrides
virtual UINT32 execute_min_cycles() const override { return 1; }
virtual UINT32 execute_max_cycles() const override { return 2; }
// device_disasm_interface overrides
virtual UINT32 disasm_min_opcode_bytes() const override { return 1; }
virtual UINT32 disasm_max_opcode_bytes() const override { return 2; }
// device_memory_interface overrides
virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const override { return (spacenum == AS_PROGRAM) ? &m_program_config : NULL; }
// device_disasm_interface overrides
virtual UINT32 disasm_min_opcode_bytes() const override { return 1; }
virtual UINT32 disasm_max_opcode_bytes() const override { return 2; }
private:
void execute_instruction();
unsigned int compute_effective_address(unsigned int addr);
UINT16 read_panel_keys_register();
devcb_read16 m_rc_read_cb;
void execute_instruction();
unsigned int compute_effective_address(unsigned int addr);
UINT16 read_panel_keys_register();
devcb_read16 m_rc_read_cb;
};

308
src/devices/cpu/patinhofeio/patinho_feio_dasm.cpp
View File

@ -5,161 +5,161 @@
CPU_DISASSEMBLE( patinho_feio )
{
int addr, value, n, f;
int addr, value, n, f;
switch (oprom[0] & 0xF0)
{
case 0x00:
//PLA = "Pula": Unconditionally JUMP to effective address
addr = (oprom[0] & 0x0F) << 8 | oprom[1];
sprintf (buffer, "PLA /%03X", addr);
return 2;
case 0x10:
//PLAX = "Pulo indexado": Unconditionally JUMP to indexed address
addr = (oprom[0] & 0x0F) << 8 | oprom[1];
sprintf (buffer, "PLAX (IDX) + /%03X", addr);
return 2;
case 0x20:
//ARM = "Armazena": Stores the contents of the
// accumulator in the given 12bit address
addr = (oprom[0] & 0x0F) << 8 | oprom[1];
if (addr==0){
sprintf (buffer, "ARM (IDX)");
}else{
sprintf (buffer, "ARM /%03X", addr);
}
return 2;
case 0x30:
//ARMX = "Armazenamento indexado": Stores the contents of the accumulator in the
// given 12bit address (indexed by IDX)
addr = (oprom[0] & 0x0F) << 8 | oprom[1];
sprintf (buffer, "ARMX (IDX) + /%03X", addr);
return 2;
case 0x40:
//CAR = "Carrega": Loads the contents of the given 12bit address
// into the accumulator
addr = (oprom[0] & 0x0F) << 8 | oprom[1];
if (addr==0){
sprintf (buffer, "CAR (IDX)");
}else{
sprintf (buffer, "CAR /%03X", addr);
}
return 2;
case 0x50:
//CARX = "Carga indexada": Loads the contents of the given 12bit address
// (indexed by IDX) into the accumulator
addr = (oprom[0] & 0x0F) << 8 | oprom[1];
sprintf (buffer, "CARX (IDX) + /%03X", addr);
return 2;
case 0x60:
//SOM = "Soma": Adds the contents of the given 12bit address
// into the accumulator
addr = (oprom[0] & 0x0F) << 8 | oprom[1];
sprintf (buffer, "SOM /%03X", addr);
return 2;
case 0x70:
//SOMX = "Soma indexada": Adds the contents of the given 12bit address
// (indexed by IDX) into the accumulator
addr = (oprom[0] & 0x0F) << 8 | oprom[1];
sprintf (buffer, "SOMX (IDX) + /%03X", addr);
return 2;
case 0xA0:
//PLAN = "Pula se ACC for negativo": Jumps to the 12bit address
// if the accumulator is negative
addr = (oprom[0] & 0x0F) << 8 | oprom[1];
sprintf (buffer, "PLAN /%03X", addr);
return 2;
case 0xB0:
//PLAZ = "Pula se ACC for zero": Jumps to the 12bit address
// if the accumulator is zero
addr = (oprom[0] & 0x0F) << 8 | oprom[1];
sprintf (buffer, "PLAZ /%03X", addr);
return 2;
case 0xC0:
n = (oprom[0] & 0x0F);
f = (oprom[1] & 0x0F);
n+= (n < 10) ? '0' : 'A'-10;
f+= (f < 10) ? '0' : 'A'-10;
switch(oprom[1] & 0xF0)
{
case 0x10: sprintf (buffer, "FNC /%c%c", n, f); return 2;
case 0x20: sprintf (buffer, "SAL /%c%c", n, f); return 2;
case 0x40: sprintf (buffer, "ENTR /%c0", n); return 2;
case 0x80: sprintf (buffer, "SAI /%c0", n); return 2;
}
break;
case 0xD0:
value = oprom[1] & 0x0F;
switch (oprom[0] & 0x0F)
{
case 0x01:
switch (oprom[1] & 0xF0)
{
case 0x00: sprintf (buffer, "DD /%01X", value); return 2; //DD = "Deslocamento para a direita": Shift right
case 0x10: sprintf (buffer, "DDV /%01X", value); return 2; //DDV = "Deslocamento para a direita c/ V": Shift right with carry
case 0x20: sprintf (buffer, "GD /%01X", value); return 2; //GD = "Giro para a direita": Rotate right
case 0x30: sprintf (buffer, "GDV /%01X", value); return 2; //GDV = "Giro para a direita c/ V": Rotate right with carry
case 0x40: sprintf (buffer, "DE /%01X", value); return 2; //DE = "Deslocamento para a esquerda": Shift right
case 0x50: sprintf (buffer, "DEV /%01X", value); return 2; //DEV = "Deslocamento para a esquerda c/ V": Shift right with carry
case 0x60: sprintf (buffer, "GE /%01X", value); return 2; //GE = "Giro para a esquerda": Rotate right
case 0x70: sprintf (buffer, "GEV /%01X", value); return 2; //GEV = "Giro para a esquerda c/ V": Rotate right with carry
case 0x80: sprintf (buffer, "DDS /%01X", value); return 2; //DDS = "Deslocamento para a direita com duplicacao de sinal": Shift right with sign duplication
}
break;
case 0x02: sprintf (buffer, "XOR /%02X", oprom[1]); return 2; //Logical XOR
case 0x04: sprintf (buffer, "NAND /%02X", oprom[1]); return 2; //Logical NAND
case 0x08: sprintf (buffer, "SOMI /%02X", oprom[1]); return 2; //SOMI = "Soma imediata": Add immediate value into accumulator
case 0x0A: sprintf (buffer, "CARI /%02X", oprom[1]); return 2; //CARI = "Carrega imediato": Loads an immediate value into the accumulator
}
break;
case 0xE0:
//SUS = "Subtrai um ou salta"
addr = (oprom[0] & 0x0F) << 8 | oprom[1];
sprintf (buffer, "SUS /%03X", addr);
return 2;
case 0xF0:
//PUG = "Pula e guarda"
addr = (oprom[0] & 0x0F) << 8 | oprom[1];
sprintf (buffer, "PUG /%03X", addr);
return 2;
}
switch (oprom[0] & 0xF0)
{
case 0x00:
//PLA = "Pula": Unconditionally JUMP to effective address
addr = (oprom[0] & 0x0F) << 8 | oprom[1];
sprintf (buffer, "PLA /%03X", addr);
return 2;
case 0x10:
//PLAX = "Pulo indexado": Unconditionally JUMP to indexed address
addr = (oprom[0] & 0x0F) << 8 | oprom[1];
sprintf (buffer, "PLAX (IDX) + /%03X", addr);
return 2;
case 0x20:
//ARM = "Armazena": Stores the contents of the
// accumulator in the given 12bit address
addr = (oprom[0] & 0x0F) << 8 | oprom[1];
if (addr==0){
sprintf (buffer, "ARM (IDX)");
}else{
sprintf (buffer, "ARM /%03X", addr);
}
return 2;
case 0x30:
//ARMX = "Armazenamento indexado": Stores the contents of the accumulator in the
// given 12bit address (indexed by IDX)
addr = (oprom[0] & 0x0F) << 8 | oprom[1];
sprintf (buffer, "ARMX (IDX) + /%03X", addr);
return 2;
case 0x40:
//CAR = "Carrega": Loads the contents of the given 12bit address
// into the accumulator
addr = (oprom[0] & 0x0F) << 8 | oprom[1];
if (addr==0){
sprintf (buffer, "CAR (IDX)");
}else{
sprintf (buffer, "CAR /%03X", addr);
}
return 2;
case 0x50:
//CARX = "Carga indexada": Loads the contents of the given 12bit address
// (indexed by IDX) into the accumulator
addr = (oprom[0] & 0x0F) << 8 | oprom[1];
sprintf (buffer, "CARX (IDX) + /%03X", addr);
return 2;
case 0x60:
//SOM = "Soma": Adds the contents of the given 12bit address
// into the accumulator
addr = (oprom[0] & 0x0F) << 8 | oprom[1];
sprintf (buffer, "SOM /%03X", addr);
return 2;
case 0x70:
//SOMX = "Soma indexada": Adds the contents of the given 12bit address
// (indexed by IDX) into the accumulator
addr = (oprom[0] & 0x0F) << 8 | oprom[1];
sprintf (buffer, "SOMX (IDX) + /%03X", addr);
return 2;
case 0xA0:
//PLAN = "Pula se ACC for negativo": Jumps to the 12bit address
// if the accumulator is negative
addr = (oprom[0] & 0x0F) << 8 | oprom[1];
sprintf (buffer, "PLAN /%03X", addr);
return 2;
case 0xB0:
//PLAZ = "Pula se ACC for zero": Jumps to the 12bit address
// if the accumulator is zero
addr = (oprom[0] & 0x0F) << 8 | oprom[1];
sprintf (buffer, "PLAZ /%03X", addr);
return 2;
case 0xC0:
n = (oprom[0] & 0x0F);
f = (oprom[1] & 0x0F);
n+= (n < 10) ? '0' : 'A'-10;
f+= (f < 10) ? '0' : 'A'-10;
switch(oprom[1] & 0xF0)
{
case 0x10: sprintf (buffer, "FNC /%c%c", n, f); return 2;
case 0x20: sprintf (buffer, "SAL /%c%c", n, f); return 2;
case 0x40: sprintf (buffer, "ENTR /%c0", n); return 2;
case 0x80: sprintf (buffer, "SAI /%c0", n); return 2;
}
break;
case 0xD0:
value = oprom[1] & 0x0F;
switch (oprom[0] & 0x0F)
{
case 0x01:
switch (oprom[1] & 0xF0)
{
case 0x00: sprintf (buffer, "DD /%01X", value); return 2; //DD = "Deslocamento para a direita": Shift right
case 0x10: sprintf (buffer, "DDV /%01X", value); return 2; //DDV = "Deslocamento para a direita c/ V": Shift right with carry
case 0x20: sprintf (buffer, "GD /%01X", value); return 2; //GD = "Giro para a direita": Rotate right
case 0x30: sprintf (buffer, "GDV /%01X", value); return 2; //GDV = "Giro para a direita c/ V": Rotate right with carry
case 0x40: sprintf (buffer, "DE /%01X", value); return 2; //DE = "Deslocamento para a esquerda": Shift right
case 0x50: sprintf (buffer, "DEV /%01X", value); return 2; //DEV = "Deslocamento para a esquerda c/ V": Shift right with carry
case 0x60: sprintf (buffer, "GE /%01X", value); return 2; //GE = "Giro para a esquerda": Rotate right
case 0x70: sprintf (buffer, "GEV /%01X", value); return 2; //GEV = "Giro para a esquerda c/ V": Rotate right with carry
case 0x80: sprintf (buffer, "DDS /%01X", value); return 2; //DDS = "Deslocamento para a direita com duplicacao de sinal": Shift right with sign duplication
}
break;
case 0x02: sprintf (buffer, "XOR /%02X", oprom[1]); return 2; //Logical XOR
case 0x04: sprintf (buffer, "NAND /%02X", oprom[1]); return 2; //Logical NAND
case 0x08: sprintf (buffer, "SOMI /%02X", oprom[1]); return 2; //SOMI = "Soma imediata": Add immediate value into accumulator
case 0x0A: sprintf (buffer, "CARI /%02X", oprom[1]); return 2; //CARI = "Carrega imediato": Loads an immediate value into the accumulator
}
break;
case 0xE0:
//SUS = "Subtrai um ou salta"
addr = (oprom[0] & 0x0F) << 8 | oprom[1];
sprintf (buffer, "SUS /%03X", addr);
return 2;
case 0xF0:
//PUG = "Pula e guarda"
addr = (oprom[0] & 0x0F) << 8 | oprom[1];
sprintf (buffer, "PUG /%03X", addr);
return 2;
}
switch (oprom[0])
{
case 0x80: sprintf (buffer, "LIMPO"); return 1;
case 0x81: sprintf (buffer, "UM"); return 1;
case 0x82: sprintf (buffer, "CMP1"); return 1;
case 0x83: sprintf (buffer, "CMP2"); return 1;
case 0x84: sprintf (buffer, "LIN"); return 1;
case 0x85: sprintf (buffer, "INC"); return 1;
case 0x86: sprintf (buffer, "UNEG"); return 1;
case 0x87: sprintf (buffer, "LIMP1"); return 1;
case 0x88: sprintf (buffer, "PNL 0"); return 1;
case 0x89: sprintf (buffer, "PNL 1"); return 1;
case 0x8A: sprintf (buffer, "PNL 2"); return 1;
case 0x8B: sprintf (buffer, "PNL 3"); return 1;
case 0x8C: sprintf (buffer, "PNL 4"); return 1;
case 0x8D: sprintf (buffer, "PNL 5"); return 1;
case 0x8E: sprintf (buffer, "PNL 6"); return 1;
case 0x8F: sprintf (buffer, "PNL 7"); return 1;
case 0x90: sprintf (buffer, "ST 0"); return 1;
case 0x91: sprintf (buffer, "STM 0"); return 1;
case 0x92: sprintf (buffer, "ST 1"); return 1;
case 0x93: sprintf (buffer, "STM 1"); return 1;
case 0x94: sprintf (buffer, "SV 0"); return 1;
case 0x95: sprintf (buffer, "SVM 0"); return 1;
case 0x96: sprintf (buffer, "SV 1"); return 1;
case 0x97: sprintf (buffer, "SVM 1"); return 1;
case 0x98: sprintf (buffer, "PUL"); return 1;
case 0x99: sprintf (buffer, "TRE"); return 1;
case 0x9A: sprintf (buffer, "INIB"); return 1;
case 0x9B: sprintf (buffer, "PERM"); return 1;
case 0x9C: sprintf (buffer, "ESP"); return 1;
case 0x9D: sprintf (buffer, "PARE"); return 1;
case 0x9E: sprintf (buffer, "TRI"); return 1;
case 0x9F: sprintf (buffer, "IND"); return 1;
}
switch (oprom[0])
{
case 0x80: sprintf (buffer, "LIMPO"); return 1;
case 0x81: sprintf (buffer, "UM"); return 1;
case 0x82: sprintf (buffer, "CMP1"); return 1;
case 0x83: sprintf (buffer, "CMP2"); return 1;
case 0x84: sprintf (buffer, "LIN"); return 1;
case 0x85: sprintf (buffer, "INC"); return 1;
case 0x86: sprintf (buffer, "UNEG"); return 1;
case 0x87: sprintf (buffer, "LIMP1"); return 1;
case 0x88: sprintf (buffer, "PNL 0"); return 1;
case 0x89: sprintf (buffer, "PNL 1"); return 1;
case 0x8A: sprintf (buffer, "PNL 2"); return 1;
case 0x8B: sprintf (buffer, "PNL 3"); return 1;
case 0x8C: sprintf (buffer, "PNL 4"); return 1;
case 0x8D: sprintf (buffer, "PNL 5"); return 1;
case 0x8E: sprintf (buffer, "PNL 6"); return 1;
case 0x8F: sprintf (buffer, "PNL 7"); return 1;
case 0x90: sprintf (buffer, "ST 0"); return 1;
case 0x91: sprintf (buffer, "STM 0"); return 1;
case 0x92: sprintf (buffer, "ST 1"); return 1;
case 0x93: sprintf (buffer, "STM 1"); return 1;
case 0x94: sprintf (buffer, "SV 0"); return 1;
case 0x95: sprintf (buffer, "SVM 0"); return 1;
case 0x96: sprintf (buffer, "SV 1"); return 1;
case 0x97: sprintf (buffer, "SVM 1"); return 1;
case 0x98: sprintf (buffer, "PUL"); return 1;
case 0x99: sprintf (buffer, "TRE"); return 1;
case 0x9A: sprintf (buffer, "INIB"); return 1;
case 0x9B: sprintf (buffer, "PERM"); return 1;
case 0x9C: sprintf (buffer, "ESP"); return 1;
case 0x9D: sprintf (buffer, "PARE"); return 1;
case 0x9E: sprintf (buffer, "TRI"); return 1;
case 0x9F: sprintf (buffer, "IND"); return 1;
}
sprintf (buffer, "illegal instruction");
return 1;
sprintf (buffer, "illegal instruction");
return 1;
}

4
src/devices/cpu/tms32051/32051ops.inc
View File

@ -388,7 +388,7 @@ void tms32051_device::op_and_mem()
{
UINT16 ea = GET_ADDRESS();
UINT16 data = DM_READ16(ea);
m_acc &= (UINT32)(data);
CYCLES(1);
@ -1359,7 +1359,7 @@ void tms32051_device::op_out()
{
UINT16 port = ROPCODE();
UINT16 ea = GET_ADDRESS();
UINT16 data = DM_READ16(ea);
m_io->write_word(port << 1, data);

10
src/devices/cpu/tms32051/tms32051.cpp
View File

@ -387,7 +387,7 @@ void tms32051_device::execute_run()
{
CHANGE_PC(m_pasr);
}
m_brcr--;
if (m_brcr <= 0)
{
@ -492,10 +492,10 @@ READ16_MEMBER( tms32051_device::cpuregs_r )
case 0x28: // PDWSR
return 0;
case 0x37: // ABU BKR
case 0x37: // ABU BKR
return 0;
case 0x50: // Memory-mapped I/O ports
case 0x50: // Memory-mapped I/O ports
case 0x51:
case 0x52:
case 0x53:
@ -606,7 +606,7 @@ WRITE16_MEMBER( tms32051_device::cpuregs_w )
case 0x2a: // CWSR
break;
case 0x50: // Memory-mapped I/O ports
case 0x50: // Memory-mapped I/O ports
case 0x51:
case 0x52:
case 0x53:
@ -684,4 +684,4 @@ void tms32053_device::device_config_complete()
{
m_program_config = address_space_config("program", ENDIANNESS_LITTLE, 16, 16, -1, ADDRESS_MAP_NAME(tms32053_internal_pgm));
m_data_config = address_space_config("data", ENDIANNESS_LITTLE, 16, 16, -1, ADDRESS_MAP_NAME(tms32053_internal_data));
}
}

4
src/devices/cpu/tms32082/dis_mp.cpp
View File

@ -231,14 +231,14 @@ static offs_t tms32082_disasm_mp(char *buffer, offs_t pc, const UINT8 *oprom)
case 0x00: print("illop0 "); break;
case 0x01: print("trap %d", UIMM15(uimm15)); break;
case 0x02: print("cmnd 0x%04X", UIMM15(uimm15)); break;
case 0x04:
if (op == 0x00020000)
print("nop ");
else
print("rdcr %s, R%d", get_creg_name(UIMM15(uimm15)), rd);
break;
case 0x05: print("swcr R%d, %s, R%d", rd, get_creg_name(UIMM15(uimm15)), rs); break;
case 0x06: print("brcr %s", get_creg_name(UIMM15(uimm15))); break;
case 0x08: print("shift%s.dz %d, %d, R%d, R%d", (op & (1 << 10)) ? "r" : "l", rotate, endmask, rs, rd); break;

96
src/devices/cpu/x86log.h
View File

@ -35,34 +35,34 @@ constexpr int COMMENT_POOL_SIZE{MAX_COMMENTS * 40};
/* code logging info */
struct log_comment
{
x86code* base;
const char* string;
x86code* base;
const char* string;
};
/* data ranges */
struct data_range_t
{
x86code* base;
x86code* end;
int size;
x86code* base;
x86code* end;
int size;
};
/* the code logging context */
struct x86log_context
{
std::string filename; /* name of the file */
FILE* file; /* file we are logging to */
std::string filename; /* name of the file */
FILE* file; /* file we are logging to */
data_range_t data_range[MAX_DATA_RANGES]; /* list of data ranges */
int data_range_count; /* number of data ranges */
data_range_t data_range[MAX_DATA_RANGES]; /* list of data ranges */
int data_range_count; /* number of data ranges */
log_comment comment_list[MAX_COMMENTS]; /* list of comments */
int comment_count; /* number of live comments */
log_comment comment_list[MAX_COMMENTS]; /* list of comments */
int comment_count; /* number of live comments */
char comment_pool[COMMENT_POOL_SIZE]; /* string pool to hold comments */
char* comment_pool_next; /* pointer to next string pool location */
char comment_pool[COMMENT_POOL_SIZE]; /* string pool to hold comments */
char* comment_pool_next; /* pointer to next string pool location */
};
@ -80,15 +80,15 @@ void x86log_free_context(x86log_context* log) noexcept;
/* add a comment associated with a given code pointer */
template <typename... Ts>
inline void x86log_add_comment(
x86log_context* log, x86code* base, const char* format, Ts&&... xs);
x86log_context* log, x86code* base, const char* format, Ts&&... xs);
/* mark a given range as data for logging purposes */
void x86log_mark_as_data(
x86log_context* log, x86code* base, x86code* end, int size) noexcept;
x86log_context* log, x86code* base, x86code* end, int size) noexcept;
/* disassemble a range of code and reset accumulated information */
void x86log_disasm_code_range(
x86log_context* log, const char* label, x86code* start, x86code* stop);
x86log_context* log, const char* label, x86code* start, x86code* stop);
/* manually printf information to the log file */
template <typename... Ts>
@ -102,33 +102,33 @@ inline void x86log_printf(x86log_context* log, const char* format, Ts&&... xs);
template <typename... Ts>
inline void x86log_add_comment(
x86log_context* log, x86code* base, const char* format, Ts&&... xs)
x86log_context* log, x86code* base, const char* format, Ts&&... xs)
{
char* string = log->comment_pool_next;
log_comment* comment;
char* string = log->comment_pool_next;
log_comment* comment;
assert(log->comment_count < MAX_COMMENTS);
assert(log->comment_pool_next + strlen(format) + 256 <
log->comment_pool + COMMENT_POOL_SIZE);
assert(log->comment_count < MAX_COMMENTS);
assert(log->comment_pool_next + strlen(format) + 256 <
log->comment_pool + COMMENT_POOL_SIZE);
/* we assume comments are registered in order; enforce this */
assert(log->comment_count == 0 ||
base >= log->comment_list[log->comment_count - 1].base);
/* we assume comments are registered in order; enforce this */
assert(log->comment_count == 0 ||
base >= log->comment_list[log->comment_count - 1].base);
/* if we exceed the maxima, skip it */
if(log->comment_count >= MAX_COMMENTS) return;
if(log->comment_pool_next + strlen(format) + 256 >=
log->comment_pool + COMMENT_POOL_SIZE)
return;
/* if we exceed the maxima, skip it */
if(log->comment_count >= MAX_COMMENTS) return;
if(log->comment_pool_next + strlen(format) + 256 >=
log->comment_pool + COMMENT_POOL_SIZE)
return;
/* do the printf to the string pool */
log->comment_pool_next +=
sprintf(log->comment_pool_next, format, std::forward<Ts>(xs)...) + 1;
/* do the printf to the string pool */
log->comment_pool_next +=
sprintf(log->comment_pool_next, format, std::forward<Ts>(xs)...) + 1;
/* fill in the new comment */
comment = &log->comment_list[log->comment_count++];
comment->base = base;
comment->string = string;
/* fill in the new comment */
comment = &log->comment_list[log->comment_count++];
comment->base = base;
comment->string = string;
}
@ -140,21 +140,21 @@ inline void x86log_add_comment(
template <typename... Ts>
inline void x86log_printf(x86log_context* log, const char* format, Ts&&... xs)
{
/* open the file, creating it if necessary */
if(log->file == nullptr)
{
log->file = fopen(log->filename.c_str(), "w");
/* open the file, creating it if necessary */
if(log->file == nullptr)
{
log->file = fopen(log->filename.c_str(), "w");
if(log->file == nullptr) return;
}
if(log->file == nullptr) return;
}
assert(log->file != nullptr);
assert(log->file != nullptr);
/* do the printf */
fprintf(log->file, format, std::forward<Ts>(xs)...);
/* do the printf */
fprintf(log->file, format, std::forward<Ts>(xs)...);
/* flush the file */
fflush(log->file);
/* flush the file */
fflush(log->file);
}
#endif /* __X86LOG_H__ */

1
src/devices/machine/i8271.cpp
View File

@ -1541,7 +1541,6 @@ void i8271_device::device_timer(emu_timer &timer, device_timer_id id, int param,
void i8271_device::index_callback(floppy_image_device *floppy, int state)
{
for(auto & fi : flopi) {
if(fi.dev != floppy)
continue;

12
src/devices/machine/k053252.cpp
View File

@ -123,7 +123,7 @@ void k053252_device::device_reset()
m_regs[i] = 0;
m_regs[0x08] = 1; // Xexex apparently does a wrong assignment for VC (sets up the INT enable register instead)
reset_internal_state();
}
@ -173,14 +173,14 @@ void k053252_device::res_change()
//(HC+1) - HFP - HBP - 8*(HSW+1)
//VC - VFP - VBP - (VSW+1)
attoseconds_t refresh = HZ_TO_ATTOSECONDS(clock()) * (m_hc) * m_vc;
visarea.min_x = m_offsx;
visarea.min_y = m_offsy;
visarea.max_x = m_offsx + m_hc - m_hfp - m_hbp - 8*(m_hsw) - 1;
visarea.max_y = m_offsy + m_vc - m_vfp - m_vbp - (m_vsw) - 1;
m_screen->configure(m_hc, m_vc, visarea, refresh);
if (m_slave_screen)
m_slave_screen->configure(m_hc, m_vc, visarea, refresh);
@ -189,7 +189,7 @@ void k053252_device::res_change()
printf("H %d HFP %d HSW %d HBP %d\n",m_hc,m_hfp,m_hsw*8,m_hbp);
printf("V %d VFP %d VSW %d VBP %d\n",m_vc,m_vfp,m_vsw,m_vbp);
// L stands for Legacy ...
printf("L %d %d\n",m_offsx,m_offsy);
printf("L %d %d\n",m_offsx,m_offsy);
printf("Screen params: Clock: %u V-Sync %.2f H-Sync %.f\n",clock(),ATTOSECONDS_TO_HZ(refresh),ATTOSECONDS_TO_HZ(hsync));
printf("visible screen area: %d x %d\n\n",(visarea.max_x - visarea.min_x) + 1,(visarea.max_y - visarea.min_y) + 1);
#endif
@ -251,7 +251,7 @@ WRITE8_MEMBER( k053252_device::write )
logerror("%02x VSW / %02x HSW set\n",m_vsw,m_hsw);
res_change();
break;
//case 0x0d: m_int_time(data); break;
case 0x0e: m_int1_ack_cb(1); break;
case 0x0f: m_int2_ack_cb(1); break;

10
src/devices/machine/k053252.h
View File

@ -48,18 +48,18 @@ public:
DECLARE_WRITE8_MEMBER( write );
void res_change();
static void static_set_slave_screen(device_t &device, const char *tag);
protected:
// device-level overrides
virtual void device_start() override;
virtual void device_reset() override;
virtual void device_reset() override;
virtual void device_clock_changed() override { reset_internal_state(); }
void reset_internal_state();
private:
// internal state
UINT8 m_regs[16];
@ -75,7 +75,7 @@ protected:
int m_offsx;
int m_offsy;
const char * m_slave_screen_tag;
const char * m_slave_screen_tag;
screen_device * m_slave_screen;
};

2
src/devices/machine/laserdsc.cpp
View File

@ -805,7 +805,7 @@ void laserdisc_device::init_video()
for (auto & frame : m_frame)
{
// first allocate a YUY16 bitmap at 2x the height
frame.m_bitmap.allocate(m_width, m_height * 2);
frame.m_bitmap.set_palette(m_videopalette);
fillbitmap_yuy16(frame.m_bitmap, 40, 109, 240);

182
src/devices/machine/pdc.cpp
View File

@ -7,87 +7,87 @@
**********************************************************************/
/*
Device PDCN
Board Copyright - IBM Corp 1989 Made in USA
Device PDCN
Board Copyright - IBM Corp 1989 Made in USA
Labels:
* 96D1975
MN 90594C
Labels:
* 96D1975
MN 90594C
* EC# A6466SP
MFG 85575
* EC# A6466SP
MFG 85575
Hardware:
* CPU - Zilog Z0840006PSC Z80 @ 5MHz - U19
* FDC - NEC D765AC-2 9002P7004 - U35
* HDC - HDC9224 SMC E8838 8/90 - U59
* DMA - P8237A-5 L1041330 - U34
* Channel 0 - FDC
* Channel 1 - Main system ram
* Memory - HM6264ALP-12 SRAM 8KB - U16
* Memory - HM6116P-2 SRAM 2KB - U33
Logic:
* U1 - PLS105AN Label: 59D9101
* U11 - ?? Label: 59D10001
* U27 - ?? Label: 96D1978
* U28 - ?? Label: 97D8750
* U31 - TIBPAL20L8-25CNT Label: 96D1987
* U32 - ?? Label: 59D1001
* U37 - PLS100N Label: 72D2701
* U38 - PLS100N Label: 58D9201
* U39 - ?? Label: 96D1981
* U40 - ?? Label: 96D1984
* U68 - ?? Label: 91D4301
* U69 - ?? Label: 59D1001
* U70 - ?? Label: 59D1001
Hardware:
* CPU - Zilog Z0840006PSC Z80 @ 5MHz - U19
* FDC - NEC D765AC-2 9002P7004 - U35
* HDC - HDC9224 SMC E8838 8/90 - U59
* DMA - P8237A-5 L1041330 - U34
* Channel 0 - FDC
* Channel 1 - Main system ram
* Memory - HM6264ALP-12 SRAM 8KB - U16
* Memory - HM6116P-2 SRAM 2KB - U33
Logic:
* U1 - PLS105AN Label: 59D9101
* U11 - ?? Label: 59D10001
* U27 - ?? Label: 96D1978
* U28 - ?? Label: 97D8750
* U31 - TIBPAL20L8-25CNT Label: 96D1987
* U32 - ?? Label: 59D1001
* U37 - PLS100N Label: 72D2701
* U38 - PLS100N Label: 58D9201
* U39 - ?? Label: 96D1981
* U40 - ?? Label: 96D1984
* U68 - ?? Label: 91D4301
* U69 - ?? Label: 59D1001
* U70 - ?? Label: 59D1001
Switches:
* S1 - Hard drive format configuration (Default all off)
* S2 - Floppy drive format configuration (Default 1-7 off, 8 on)
Switches:
* S1 - Hard drive format configuration (Default all off)
* S2 - Floppy drive format configuration (Default 1-7 off, 8 on)
Program Memory:
* 0x0000 - 0x3FFF : ROM 27128 Label: 97D9988
* 0x8000 - 0x9FFF : SRAM HM6264ALP-12 8KB
* 0xC000 - 0xC7FF : SRAM HM6116P-2 2KB
Program Memory:
* 0x0000 - 0x3FFF : ROM 27128 Label: 97D9988
* 0x8000 - 0x9FFF : SRAM HM6264ALP-12 8KB
* 0xC000 - 0xC7FF : SRAM HM6116P-2 2KB
IO Memory:
* 0x00 - 0x01 : Old style command [0x5FF041B0]
* 0x02 - 0x03 : FDC command address [0x5FF0C0B0][0x5FF0C1B0]
* 0x04 - 0x05 : FDC command completion status [0x5FF030B0]
* 0x06 - 0x07 : FDC data address [0x5FF080B0]
* 0x10 - 0x18 : HDC registers (unknown)
* 0x21 - 0x21 : FDC unknown, resets bit 1 on 0x38
* 0x22 - 0x22 : FDC unknown
* 0x23 - 0x24 : FDC Active DMA host address (auto increments)
* 0x25 - 0x25 : FDC unknown
* 0x26 - 0x26 : DREQ1 on
* 0x27 - 0x27 : FDC unknown
* 0x28 - 0x2A : Possibly LED lights
* 0x2C - 0x2C : DREQ1 off
* 0x2D - 0x2D : Unknown
* 0x2E - 0x2E : Transfer direction 0x80 = PDC -> Host (read data)
0x00 = Host -> PDC (Commands, write data)
* 0x2F - 0x2F : Unknown
* 0x38 - 0x38 : FDC command request
Bit 1: Debug?
Bit 2: Command complete
Bit 3: Unknown
Bit 5: Unknown
Bit 6-7: Error conditions
* 0x39 - 0x39 : Interrupt status
Bit 0: HDC9224 interrupt
Bit 1: Incoming command
Bit 3: FDD related, maybe uPD interrupt pin?
* 0x3C - 0x3D : Dipswitch 2 and 1
* 0x40 - 0x40 : HDC9224 DATA register
* 0x41 - 0x41 : HDC9224 COMMAND register
* 0x42 - 0x42 : uPD765 STATUS register
* 0x43 - 0x43 : uPD765 DATA register
* 0x50 - 0x51 : Unknown - reset latch maybe?
* 0x52 - 0x52 : FDD Master motor control
* 0x53 - 0x53 : Unknown
* 0x54 - 0x57 : FDD motor control (Units 1-4)
* 0x60 - 0x6F : P8237A DMA controller register set
IO Memory:
* 0x00 - 0x01 : Old style command [0x5FF041B0]
* 0x02 - 0x03 : FDC command address [0x5FF0C0B0][0x5FF0C1B0]
* 0x04 - 0x05 : FDC command completion status [0x5FF030B0]
* 0x06 - 0x07 : FDC data address [0x5FF080B0]
* 0x10 - 0x18 : HDC registers (unknown)
* 0x21 - 0x21 : FDC unknown, resets bit 1 on 0x38
* 0x22 - 0x22 : FDC unknown
* 0x23 - 0x24 : FDC Active DMA host address (auto increments)
* 0x25 - 0x25 : FDC unknown
* 0x26 - 0x26 : DREQ1 on
* 0x27 - 0x27 : FDC unknown
* 0x28 - 0x2A : Possibly LED lights
* 0x2C - 0x2C : DREQ1 off
* 0x2D - 0x2D : Unknown
* 0x2E - 0x2E : Transfer direction 0x80 = PDC -> Host (read data)
0x00 = Host -> PDC (Commands, write data)
* 0x2F - 0x2F : Unknown
* 0x38 - 0x38 : FDC command request
Bit 1: Debug?
Bit 2: Command complete
Bit 3: Unknown
Bit 5: Unknown
Bit 6-7: Error conditions
* 0x39 - 0x39 : Interrupt status
Bit 0: HDC9224 interrupt
Bit 1: Incoming command
Bit 3: FDD related, maybe uPD interrupt pin?
* 0x3C - 0x3D : Dipswitch 2 and 1
* 0x40 - 0x40 : HDC9224 DATA register
* 0x41 - 0x41 : HDC9224 COMMAND register
* 0x42 - 0x42 : uPD765 STATUS register
* 0x43 - 0x43 : uPD765 DATA register
* 0x50 - 0x51 : Unknown - reset latch maybe?
* 0x52 - 0x52 : FDD Master motor control
* 0x53 - 0x53 : Unknown
* 0x54 - 0x57 : FDD motor control (Units 1-4)
* 0x60 - 0x6F : P8237A DMA controller register set
*/
@ -98,10 +98,10 @@
// MACROS / CONSTANTS
//**************************************************************************
#define Z80_TAG "pdc_z80" // U19
#define Z80_TAG "pdc_z80" // U19
#define FDC_TAG "fdc"
#define HDC_TAG "hdc"
#define FDCDMA_TAG "i8237dma"
#define HDC_TAG "hdc"
#define FDCDMA_TAG "i8237dma"
#define TRACE_PDC_FDC 0
#define TRACE_PDC_HDC 0
@ -119,8 +119,8 @@ const device_type PDC = &device_creator<pdc_device>;
//-------------------------------------------------
ROM_START( pdc )
ROM_REGION( 0x4000, "rom", 0 )
ROM_LOAD( "97d9988.27128.pdc.u17", 0x0000, 0x4000, CRC(d96ccaa6) SHA1(e1a465c2274a63e81dba7a71fc8b30f10c03baf0) ) // Label: "97D9988" 27128 @U17
ROM_REGION( 0x4000, "rom", 0 )
ROM_LOAD( "97d9988.27128.pdc.u17", 0x0000, 0x4000, CRC(d96ccaa6) SHA1(e1a465c2274a63e81dba7a71fc8b30f10c03baf0) ) // Label: "97D9988" 27128 @U17
ROM_END
//-------------------------------------------------
@ -129,7 +129,7 @@ ROM_END
const rom_entry *pdc_device::device_rom_region() const
{
return ROM_NAME( pdc );
return ROM_NAME( pdc );
}
//-------------------------------------------------
@ -232,10 +232,10 @@ SLOT_INTERFACE_END
//-------------------------------------------------
static SLOT_INTERFACE_START( pdc_harddisks )
SLOT_INTERFACE( "generic", MFMHD_GENERIC ) // Generic hard disk (self-adapting to image)
SLOT_INTERFACE( "st213", MFMHD_ST213 ) // Seagate ST-213 (10 MB)
SLOT_INTERFACE( "st225", MFMHD_ST225 ) // Seagate ST-225 (20 MB)
SLOT_INTERFACE( "st251", MFMHD_ST251 ) // Seagate ST-251 (40 MB)
SLOT_INTERFACE( "generic", MFMHD_GENERIC ) // Generic hard disk (self-adapting to image)
SLOT_INTERFACE( "st213", MFMHD_ST213 ) // Seagate ST-213 (10 MB)
SLOT_INTERFACE( "st225", MFMHD_ST225 ) // Seagate ST-225 (20 MB)
SLOT_INTERFACE( "st251", MFMHD_ST251 ) // Seagate ST-251 (40 MB)
SLOT_INTERFACE_END
//-------------------------------------------------
@ -243,7 +243,7 @@ SLOT_INTERFACE_END
//-------------------------------------------------
FLOPPY_FORMATS_MEMBER( pdc_device::floppy_formats )
FLOPPY_PC_FORMAT
FLOPPY_PC_FORMAT
FLOPPY_FORMATS_END
//-------------------------------------------------
@ -252,8 +252,8 @@ FLOPPY_FORMATS_END
static MACHINE_CONFIG_FRAGMENT( pdc )
/* CPU - Zilog Z0840006PSC */
MCFG_CPU_ADD(Z80_TAG, Z80, XTAL_10MHz / 2)
MCFG_CPU_PROGRAM_MAP(pdc_mem)
MCFG_CPU_ADD(Z80_TAG, Z80, XTAL_10MHz / 2)
MCFG_CPU_PROGRAM_MAP(pdc_mem)
MCFG_CPU_IO_MAP(pdc_io)
//MCFG_QUANTUM_PERFECT_CPU(M6502_TAG)
@ -290,7 +290,7 @@ MACHINE_CONFIG_END
machine_config_constructor pdc_device::device_mconfig_additions() const
{
return MACHINE_CONFIG_NAME( pdc );
return MACHINE_CONFIG_NAME( pdc );
}
ioport_constructor pdc_device::device_input_ports() const
@ -308,7 +308,7 @@ ioport_constructor pdc_device::device_input_ports() const
pdc_device::pdc_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
device_t(mconfig, PDC, "ROLM PDC", tag, owner, clock, "pdc", __FILE__),
m_pdccpu(*this, Z80_TAG),
m_pdccpu(*this, Z80_TAG),
m_dma8237(*this, FDCDMA_TAG),
m_fdc(*this, FDC_TAG),
m_hdc9224(*this, HDC_TAG),
@ -338,7 +338,7 @@ void pdc_device::device_reset()
//reg_p38 |= 0x20; // no idea at all - bit 5 (32)
/* Reset CPU */
m_pdccpu->reset();
m_pdccpu->reset();
/* Resolve callbacks */
m_m68k_r_cb.resolve_safe(0);

20
src/devices/machine/pdc.h
View File

@ -34,11 +34,11 @@
class pdc_device : public device_t
{
public:
/* Constructor and Destructor */
/* Constructor and Destructor */
pdc_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
/* Optional information overrides */
virtual machine_config_constructor device_mconfig_additions() const override;
/* Optional information overrides */
virtual machine_config_constructor device_mconfig_additions() const override;
virtual ioport_constructor device_input_ports() const override;
virtual const rom_entry *device_rom_region() const override;
@ -69,7 +69,7 @@ public:
DECLARE_WRITE8_MEMBER(m68k_dma_w);
DECLARE_WRITE_LINE_MEMBER(fdc_irq);
DECLARE_FLOPPY_FORMATS( floppy_formats );
DECLARE_FLOPPY_FORMATS( floppy_formats );
/* Main CPU accessible registers */
UINT8 reg_p0;
@ -84,16 +84,16 @@ public:
UINT8 reg_p38;
UINT32 fdd_68k_dma_address; /* FDD <-> m68k DMA read/write address */
protected:
/* Device-level overrides */
virtual void device_start() override;
virtual void device_reset() override;
/* Device-level overrides */
virtual void device_start() override;
virtual void device_reset() override;
/* Protected variables */
//UINT32 fdd_68k_dma_address;
bool b_fdc_irq;
/* Attached devices */
required_device<cpu_device> m_pdccpu;
required_device<cpu_device> m_pdccpu;
required_device<am9517a_device> m_dma8237;
required_device<upd765a_device> m_fdc;
//required_device<floppy_connector> m_floppy;
@ -103,8 +103,8 @@ protected:
required_shared_ptr<UINT8> m_pdc_ram;
/* Callbacks */
devcb_read8 m_m68k_r_cb;
devcb_write8 m_m68k_w_cb;
devcb_read8 m_m68k_r_cb;
devcb_write8 m_m68k_w_cb;
};
/* Device type */

2
src/devices/machine/pla.cpp
View File

@ -148,8 +148,6 @@ UINT32 pla_device::read(UINT32 input)
for (auto cache2_entry : m_cache2)
{
if ((UINT32)cache2_entry == input)
{
// cache2 hit

2
src/devices/machine/tms6100.cpp
View File

@ -206,7 +206,7 @@ WRITE_LINE_MEMBER(tms6100_device::romclock_w)
UINT8 word = m_rom[m_address >> 3];
if (m_reverse_bits)
word = BITSWAP8(word,0,1,2,3,4,5,6,7);
if (m_4bit_read)
{
m_data = word >> (m_address & 4) & 0xf;

1
src/devices/machine/upd765.cpp
View File

@ -2247,7 +2247,6 @@ void upd765_family_device::run_drive_ready_polling()
void upd765_family_device::index_callback(floppy_image_device *floppy, int state)
{
for(auto & fi : flopi) {
if(fi.dev != floppy)
continue;

2
src/devices/machine/z80ctc.cpp
View File

@ -185,8 +185,6 @@ int z80ctc_device::z80daisy_irq_state()
int state = 0;
for (auto & channel : m_channel)
{
// if we're servicing a request, don't indicate more interrupts
if (channel.m_int_state & Z80_DAISY_IEO)
{

2
src/devices/machine/z80scc.h
View File

@ -137,7 +137,7 @@ public:
UINT8 do_sccreg_rr5();
UINT8 do_sccreg_rr6();
UINT8 do_sccreg_rr7();
// UINT8 do_sccreg_rr8();
// UINT8 do_sccreg_rr8();
UINT8 do_sccreg_rr9();
UINT8 do_sccreg_rr10();
UINT8 do_sccreg_rr11();

1
src/devices/sound/k053260.cpp
View File

@ -274,7 +274,6 @@ void k053260_device::sound_stream_update(sound_stream &stream, stream_sample_t *
for (auto & voice : m_voice)
{
if (voice.playing())
voice.play(buffer);
}

2
src/devices/sound/qs1000.cpp
View File

@ -488,8 +488,6 @@ void qs1000_device::sound_stream_update(sound_stream &stream, stream_sample_t **
// Iterate over voices and accumulate sample data
for (auto & chan : m_channels)
{
UINT8 lvol = chan.m_regs[6];
UINT8 rvol = chan.m_regs[7];
UINT8 vol = chan.m_regs[8];

2
src/devices/video/315_5313.h
View File

@ -294,7 +294,7 @@ private:
int m_vdp_pal;
int m_use_cram; // c2 uses it's own palette ram, so it sets this to 0
int m_dma_delay; // SVP and SegaCD have some 'lag' in DMA transfers
std::unique_ptr<UINT16[]> m_regs;
std::unique_ptr<UINT16[]> m_vram;
std::unique_ptr<UINT16[]> m_cram;

139
src/devices/video/ef9365.cpp
View File

@ -1,67 +1,67 @@
// license:BSD-3-Clause
// copyright-holders:Jean-François DEL NERO
// copyright-holders:Jean-Francois DEL NERO
/*********************************************************************
ef9365.c
ef9365.c
Thomson EF9365/EF9366 video controller emulator code
Thomson EF9365/EF9366 video controller emulator code
The EF9365/EF9366 is a video controller driving a frame buffer
and having built-in vectors and characters drawing engines.
This is natively a "black and white" chip (1 bitplane),
but it is possible to add more bitplanes to have colors with a
hardware trick. The system don't have direct access to the video
memory, but indirect access is possible through the 0x0F command
and some hardware glue logics.
The current implementation emulate the main functions :
The EF9365/EF9366 is a video controller driving a frame buffer
and having built-in vectors and characters drawing engines.
This is natively a "black and white" chip (1 bitplane),
but it is possible to add more bitplanes to have colors with a
hardware trick. The system don't have direct access to the video
memory, but indirect access is possible through the 0x0F command
and some hardware glue logics.
The current implementation emulate the main functions :
Video modes supported (Hardware implementation dependent):
- 256 x 256 (EF9365 with 4 bits shifters per bitplane and FMAT to VSS)
- 512 x 512 interlaced (EF9365 with 8 bits shifters per bitplane and FMAT to VCC)
- 512 x 256 non interlaced (EF9366 with 8 bits shifters per bitplane)
- 128 x 128 (EF9365 with 2 bits shifters per bitplane and FMAT to VSS)
- 64 x 64 (EF9365 with FMAT to VSS)
Video modes supported (Hardware implementation dependent):
- 256 x 256 (EF9365 with 4 bits shifters per bitplane and FMAT to VSS)
- 512 x 512 interlaced (EF9365 with 8 bits shifters per bitplane and FMAT to VCC)
- 512 x 256 non interlaced (EF9366 with 8 bits shifters per bitplane)
- 128 x 128 (EF9365 with 2 bits shifters per bitplane and FMAT to VSS)
- 64 x 64 (EF9365 with FMAT to VSS)
- 1 bitplane up to 8 bitplanes hardware configuration.
- 2 up to 256 colors fixed palette.
- 1 bitplane up to 8 bitplanes hardware configuration.
- 2 up to 256 colors fixed palette.
Character & block drawing :
- Normal / Titled mode
- Horizontal / Vertical orientation
- P & Q Zoom factors (1 up to 16)
Character & block drawing :
- Normal / Titled mode
- Horizontal / Vertical orientation
- P & Q Zoom factors (1 up to 16)
Vector drawing :
- Normal / Dotted / Dashed / Dotted-Dashed mode
- All directions and size supported.
Vector drawing :
- Normal / Dotted / Dashed / Dotted-Dashed mode
- All directions and size supported.
General :
- Clear Screen
- Fill Screen
- Clear X & Y registers
- Video RAM readback supported (Command 0x0F)
General :
- Clear Screen
- Fill Screen
- Clear X & Y registers
- Video RAM readback supported (Command 0x0F)
What is NOT yet currently implemented:
- Light pen support
(To be done when i will find a software using the lightpen)
What is NOT yet currently implemented:
- Light pen support
(To be done when i will find a software using the lightpen)
What is implemented but not really tested:
- Interrupts output.
My target system (Squale Apollo 7) doesn't use the interruption
for this chip. So i add the interrupt line support, but
bug(s) is possible.
What is implemented but not really tested:
- Interrupts output.
My target system (Squale Apollo 7) doesn't use the interruption
for this chip. So i add the interrupt line support, but
bug(s) is possible.
The needed charset file charset_ef9365.rom (CRC 8d3053be) is available
there : http://hxc2001.free.fr/Squale/rom/charset_ef9365.zip
This ROM charset is into the EF9365/EF9366.
The needed charset file charset_ef9365.rom (CRC 8d3053be) is available
there : http://hxc2001.free.fr/Squale/rom/charset_ef9365.zip
This ROM charset is into the EF9365/EF9366.
To see how to use this driver, have a look to the Squale machine
driver (squale.cpp).
If you have any question, don't hesitate to contact me at the email
present on this website : http://hxc2001.free.fr/
To see how to use this driver, have a look to the Squale machine
driver (squale.cpp).
If you have any question, don't hesitate to contact me at the email
present on this website : http://hxc2001.free.fr/
12/29/2015
Jean-François DEL NERO
12/29/2015
Jean-Francois DEL NERO
*********************************************************************/
#include "emu.h"
@ -343,8 +343,8 @@ void ef9365_device::device_reset()
void ef9365_device::update_interrupts()
{
int new_state = ( m_irq_vb && (m_registers[EF936X_REG_CTRL1] & 0x20) )
|| ( m_irq_rdy && (m_registers[EF936X_REG_CTRL1] & 0x40) )
|| ( m_irq_lb && (m_registers[EF936X_REG_CTRL1] & 0x10) );
|| ( m_irq_rdy && (m_registers[EF936X_REG_CTRL1] & 0x40) )
|| ( m_irq_lb && (m_registers[EF936X_REG_CTRL1] & 0x10) );
if (new_state != m_irq_state)
{
@ -471,7 +471,6 @@ UINT8 ef9365_device::get_last_readback_word(int bitplane_number, int * pixel_off
void ef9365_device::draw_border(UINT16 line)
{
}
//-------------------------------------------------
@ -792,7 +791,7 @@ int ef9365_device::draw_character( unsigned char c, int block, int smallblock )
for(p = 0; p < p_factor; p++)
{
if( !(m_registers[EF936X_REG_CTRL2] & 0x08) )
{ // Titled - Horizontal orientation
{ // Titled - Horizontal orientation
plot(
x + ( (y_char*q_factor) + q ) + ( (x_char*p_factor) + p ),
y + ( (y_char*q_factor) + q )
@ -816,14 +815,14 @@ int ef9365_device::draw_character( unsigned char c, int block, int smallblock )
for(p = 0; p < p_factor; p++)
{
if( !(m_registers[EF936X_REG_CTRL2] & 0x08) )
{ // Normal - Horizontal orientation
{ // Normal - Horizontal orientation
plot(
x + ( (x_char*p_factor) + p ),
y + ( (y_char*q_factor) + q )
);
}
else
{ // Normal - Vertical orientation
{ // Normal - Vertical orientation
plot(
x - ( (y_char*q_factor) + q ),
y + ( (x_char*p_factor) + p )
@ -1046,29 +1045,29 @@ void ef9365_device::ef9365_exec(UINT8 cmd)
switch ( cmd & 0x7 ) // Direction code
{
case 0x1:
busy_cycles = draw_vector ( get_x_reg(), get_y_reg(), get_x_reg() + tmp_delta_x, get_y_reg() + tmp_delta_y);
busy_cycles = draw_vector ( get_x_reg(), get_y_reg(), get_x_reg() + tmp_delta_x, get_y_reg() + tmp_delta_y);
break;
case 0x3:
busy_cycles = draw_vector ( get_x_reg(), get_y_reg(), get_x_reg() - tmp_delta_x, get_y_reg() + tmp_delta_y);
busy_cycles = draw_vector ( get_x_reg(), get_y_reg(), get_x_reg() - tmp_delta_x, get_y_reg() + tmp_delta_y);
break;
case 0x5:
busy_cycles = draw_vector ( get_x_reg(), get_y_reg(), get_x_reg() + tmp_delta_x, get_y_reg() - tmp_delta_y);
busy_cycles = draw_vector ( get_x_reg(), get_y_reg(), get_x_reg() + tmp_delta_x, get_y_reg() - tmp_delta_y);
break;
case 0x7:
busy_cycles = draw_vector ( get_x_reg(), get_y_reg(), get_x_reg() - tmp_delta_x, get_y_reg() - tmp_delta_y);
busy_cycles = draw_vector ( get_x_reg(), get_y_reg(), get_x_reg() - tmp_delta_x, get_y_reg() - tmp_delta_y);
break;
case 0x0:
busy_cycles = draw_vector ( get_x_reg(), get_y_reg(), get_x_reg() + tmp_delta_x, get_y_reg() );
busy_cycles = draw_vector ( get_x_reg(), get_y_reg(), get_x_reg() + tmp_delta_x, get_y_reg() );
break;
case 0x2:
busy_cycles = draw_vector ( get_x_reg(), get_y_reg(), get_x_reg(), get_y_reg() + tmp_delta_y);
busy_cycles = draw_vector ( get_x_reg(), get_y_reg(), get_x_reg(), get_y_reg() + tmp_delta_y);
break;
case 0x4:
busy_cycles = draw_vector ( get_x_reg(), get_y_reg(), get_x_reg(), get_y_reg() - tmp_delta_y);
busy_cycles = draw_vector ( get_x_reg(), get_y_reg(), get_x_reg(), get_y_reg() - tmp_delta_y);
break;
case 0x6:
busy_cycles = draw_vector ( get_x_reg(), get_y_reg(), get_x_reg() - tmp_delta_x, get_y_reg() );
busy_cycles = draw_vector ( get_x_reg(), get_y_reg(), get_x_reg() - tmp_delta_x, get_y_reg() );
break;
}
set_busy_flag( cycles_to_us( busy_cycles ) );
@ -1088,29 +1087,29 @@ void ef9365_device::ef9365_exec(UINT8 cmd)
switch ( cmd & 0x7 ) // Direction code
{
case 0x1:
busy_cycles = draw_vector ( get_x_reg(), get_y_reg(), get_x_reg() + tmp_delta_x, get_y_reg() + tmp_delta_y);
busy_cycles = draw_vector ( get_x_reg(), get_y_reg(), get_x_reg() + tmp_delta_x, get_y_reg() + tmp_delta_y);
break;
case 0x3:
busy_cycles = draw_vector ( get_x_reg(), get_y_reg(), get_x_reg() - tmp_delta_x, get_y_reg() + tmp_delta_y);
busy_cycles = draw_vector ( get_x_reg(), get_y_reg(), get_x_reg() - tmp_delta_x, get_y_reg() + tmp_delta_y);
break;
case 0x5:
busy_cycles = draw_vector ( get_x_reg(), get_y_reg(), get_x_reg() + tmp_delta_x, get_y_reg() - tmp_delta_y);
busy_cycles = draw_vector ( get_x_reg(), get_y_reg(), get_x_reg() + tmp_delta_x, get_y_reg() - tmp_delta_y);
break;
case 0x7:
busy_cycles = draw_vector ( get_x_reg(), get_y_reg(), get_x_reg() - tmp_delta_x, get_y_reg() - tmp_delta_y);
busy_cycles = draw_vector ( get_x_reg(), get_y_reg(), get_x_reg() - tmp_delta_x, get_y_reg() - tmp_delta_y);
break;
case 0x0:
busy_cycles = draw_vector ( get_x_reg(), get_y_reg(), get_x_reg() + tmp_delta_x, get_y_reg() );
busy_cycles = draw_vector ( get_x_reg(), get_y_reg(), get_x_reg() + tmp_delta_x, get_y_reg() );
break;
case 0x2:
busy_cycles = draw_vector ( get_x_reg(), get_y_reg(), get_x_reg(), get_y_reg() + tmp_delta_y);
busy_cycles = draw_vector ( get_x_reg(), get_y_reg(), get_x_reg(), get_y_reg() + tmp_delta_y);
break;
case 0x4:
busy_cycles = draw_vector ( get_x_reg(), get_y_reg(), get_x_reg(), get_y_reg() - tmp_delta_y);
busy_cycles = draw_vector ( get_x_reg(), get_y_reg(), get_x_reg(), get_y_reg() - tmp_delta_y);
break;
case 0x6:
busy_cycles = draw_vector ( get_x_reg(), get_y_reg(), get_x_reg() - tmp_delta_x, get_y_reg() );
busy_cycles = draw_vector ( get_x_reg(), get_y_reg(), get_x_reg() - tmp_delta_x, get_y_reg() );
break;
}

4
src/devices/video/ef9365.h
View File

@ -1,5 +1,5 @@
// license:BSD-3-Clause
// copyright-holders:Jean-François DEL NERO
// copyright-holders:Jean-Francois DEL NERO
/*********************************************************************
ef9365.h
@ -88,7 +88,7 @@ private:
void set_video_mode(void);
void draw_border(UINT16 line);
void ef9365_exec(UINT8 cmd);
int cycles_to_us(int cycles);
int cycles_to_us(int cycles);
void dump_bitplanes_word();
void update_interrupts();

2
src/emu/clifront.cpp
View File

@ -597,8 +597,6 @@ void cli_frontend::listdevices(const char *gamename)
// dump the results
for (auto device : device_list)
{
// extract the tag, stripping the leading colon
const char *tag = device->tag();
if (*tag == ':')

2
src/emu/debug/dvmemory.cpp
View File

@ -315,7 +315,7 @@ void debug_view_memory::view_update()
UINT64 chunkdata = 0;
floatx80 chunkdata80 = { 0, 0 };
bool ismapped;
if (m_data_format != 11)
ismapped = read(m_bytes_per_chunk, addrbyte + chunknum * m_bytes_per_chunk, chunkdata);
else

4
src/emu/debug/dvmemory.h
View File

@ -103,11 +103,11 @@ private:
debug_view_expression m_expression; // expression describing the start address
UINT32 m_chunks_per_row; // number of chunks displayed per line
UINT8 m_bytes_per_chunk; // bytes per chunk
int m_data_format; // 1-8 current values 9 32bit floating point
int m_data_format; // 1-8 current values 9 32bit floating point
bool m_reverse_view; // reverse-endian view?
bool m_ascii_view; // display ASCII characters?
bool m_no_translation; // don't run addresses through the cpu translation hook
bool m_edit_enabled; // can modify contents ?
bool m_edit_enabled; // can modify contents ?
offs_t m_maxaddr; // (derived) maximum address to display
UINT32 m_bytes_per_row; // (derived) number of bytes displayed per line
UINT32 m_byte_offset; // (derived) offset of starting visible byte

2
src/emu/drivenum.h
View File

@ -120,7 +120,7 @@ private:
void release_current() const;
static const int CONFIG_CACHE_COUNT = 100;
// internal state
int m_current;
int m_filtered_count;

2
src/emu/input.cpp
View File

@ -676,7 +676,7 @@ bool input_seq::is_valid() const
for (auto code : m_code)
{
// invalid codes are never permitted
if (code == INPUT_CODE_INVALID)
return false;

2
src/emu/ioport.cpp
View File

@ -1344,7 +1344,7 @@ std::string natural_keyboard::dump()
for (auto & code : m_keycode_map)
{
// describe the character code
strcatprintf(buffer,"%08X (%s) ", code.ch, unicode_to_string(tempstr, code.ch));
// pad with spaces

2
src/emu/render.cpp
View File

@ -1423,8 +1423,6 @@ void render_target::invalidate_all(void *refptr)
// iterate through all our primitive lists
for (auto & list : m_primlist)
{
// if we have a reference to this object, release our list
list.acquire_lock();
if (list.has_reference(refptr))

4
src/emu/sound.cpp
View File

@ -404,7 +404,6 @@ void sound_stream::update_with_accounting(bool second_tick)
if (output_bufindex > 0)
for (auto & output : m_output)
{
memmove(&output.m_buffer[0], &output.m_buffer[samples_to_lose], sizeof(output.m_buffer[0]) * (output_bufindex - samples_to_lose));
}
@ -459,7 +458,6 @@ void sound_stream::recompute_sample_rate_data()
// When synchronous, pick the sample rate for the inputs, if any
for (auto & input : m_input)
{
if (input.m_source != nullptr)
{
if (!m_sample_rate)
@ -486,7 +484,7 @@ void sound_stream::recompute_sample_rate_data()
for (auto & input : m_input)
{
// if we have a source, see if its sample rate changed
if (input.m_source != nullptr)
{
// okay, we have a new sample rate; recompute the latency to be the maximum

2
src/lib/formats/ipf_dsk.cpp
View File

@ -5,7 +5,7 @@
const floppy_format_type FLOPPY_IPF_FORMAT = &floppy_image_format_creator<ipf_format>;
ipf_format::ipf_format(): tinfos(nullptr), tcount(0), type(0), release(0), revision(0), encoder_type(0),
ipf_format::ipf_format(): tinfos(nullptr), tcount(0), type(0), release(0), revision(0), encoder_type(0),
encoder_revision(0), origin(0), min_cylinder(0), max_cylinder(0), min_head(0), max_head(0), credit_day(0), credit_time(0)
{
}

44
src/mame/arcade.lst
View File

@ -314,7 +314,7 @@ amidars // GX337 (c) 1982 Konami
triplep // (c) 1982 KKI / made by Sanritsu?
triplepa // (c) 1982 KKI / made by Sanritsu?
knockout // (c) 1982 KKK
knockoutb // bootleg
knockoutb // bootleg
mariner // (c) 1981 Amenip
800fath // (c) 1981 Amenip + U.S. Billiards license
mars // (c) 1981 Artic
@ -360,7 +360,7 @@ calipso // (c) 1982 Tago
anteater // (c) 1982 Tago
anteaterg // (c) 1983 TV-Tuning (F.E.G. license)
anteateruk // (c) 1983 Free Enterprise Games
anteatergg // bootleg
anteatergg // bootleg
rescue // (c) 1982 Stern
rescueb // (c) Videl Games (Rescue bootleg)
aponow // bootleg
@ -1437,7 +1437,7 @@ pss64 // 199? Nintendo / Hudson Soft
// SNES-based hacks
kinstb // bootleg
mk3snes // bootleg
mk3snes // bootleg
ffight2b // bootleg
sblast2b // bootleg
iron // bootleg
@ -1536,7 +1536,7 @@ schasera // RT Taito
schaserb // RT Taito
schaserc // RT Taito
schasercv // RT Taito
schaserm // Model Racing
schaserm // Model Racing
lupin3 // LP (c) 1980 Taito
lupin3a // LP (c) 1980 Taito
intruder // (c) 1980 GamePlan (Taito)
@ -2119,7 +2119,7 @@ knightb // bootleg
kicknrun // A87 (c) 1986 Taito Corporation
kicknrunu // A87 (c) 1986 Taito Corporation
mexico86 // bootleg (Micro Research)
mexico86a // bootleg
mexico86a // bootleg
darius // A96 (c) 1986 Taito Corporation Japan (World)
dariusu // A96 (c) 1986 Taito America Corporation (US)
dariusj // A96 (c) 1986 Taito Corporation (Japan)
@ -2501,7 +2501,7 @@ gseeker // 1992.?? D40 (c) 1992 Taito Corporation Japan (World)
gseekerj // 1992.12 D40 (c) 1992 Taito Corporation (Japan)
gseekeru // 1992.?? D40 (c) 1992 Taito America Corporation (US)
hthero93 // 1993.03 D49 (c) 1992 Taito Corporation (Japan)
hthero93u // 1993.04 D49 (c) 1992 Taito America Corporation (US)
hthero93u // 1993.04 D49 (c) 1992 Taito America Corporation (US)
cupfinal // 1993.?? D49 (c) 1993 Taito Corporation Japan (World)
trstar // 1993.?? D53 (c) 1993 Taito Corporation Japan (World)
trstarj // 1993.07 D53 (c) 1993 Taito Corporation (Japan)
@ -3255,7 +3255,7 @@ sf2v004 // hack
sf2acc // hack
sf2acca // hack
sf2ceblp // hack
sf2cebltw // hack
sf2cebltw // hack
sf2accp2 // hack
sf2amf // bootleg
sf2amf2 // bootleg
@ -3368,7 +3368,7 @@ ddtodh // 12/04/1994 (c) 1993 (Hispanic)
ddtodhr1 // 25/01/1994 (c) 1993 (Hispanic)
ddtodhr2 // 13/01/1994 (c) 1993 (Hispanic)
ssf2t // 23/02/1994 (c) 1994 (World)
ssf2th // 23/02/1994 (c) 1994 (Hispanic)
ssf2th // 23/02/1994 (c) 1994 (Hispanic)
ssf2tu // 23/03/1994 (c) 1994 (USA)
ssf2tur1 // 23/02/1994 (c) 1994 (USA)
ssf2ta // 23/02/1994 (c) 1994 (Asia)
@ -3390,7 +3390,7 @@ vampja // 05/07/1994 (c) 1994 (Japan)
vampjr1 // 30/06/1994 (c) 1994 (Japan)
ringdest // 02/09/1994 (c) 1994 (Euro)
ringdesta // 31/08/1994 (c) 1994 (Asia)
ringdesth // 02/09/1994 (c) 1994 (Hispanic)
ringdesth // 02/09/1994 (c) 1994 (Hispanic)
smbomb // 31/08/1994 (c) 1994 (Japan)
smbombr1 // 08/08/1994 (c) 1994 (Japan)
armwar // 24/10/1994 (c) 1994 (Euro)
@ -3740,7 +3740,7 @@ doapp // Dead Or Alive ++ (JAPAN)
cbaj // Cool Boaders Arcade Jam
shngmtkb // Shanghai Matekibuyuu
tondemo // Tondemo Crisis (JAPAN)
glpracr3 // Gallop Racer 3 (Export)
glpracr3 // Gallop Racer 3 (Export)
glpracr3j // Gallop Racer 3 (JAPAN)
flamegun // Flame Gunner (USA)
flamegunj // Flame Gunner (JAPAN)
@ -4137,7 +4137,7 @@ tsurugij // 2001
wcombat // 2002
wcombatk // 2002
wcombatj // 2002
wcombatu // 2002
wcombatu // 2002
xtrial // 2002
mfightc // 2002
mfightcc // 2002
@ -6176,7 +6176,7 @@ hbarrelw // (c) 1987 Data East Corporation (World)
baddudes // EI (c) 1988 Data East USA (US)
drgninja // EG (c) 1988 Data East Corporation (Japan)
drgninjab // bootleg
drgninjab2 // bootleg
drgninjab2 // bootleg
birdtry // (c) 1988 Data East Corporation (Japan)
robocop // EP? (c) 1988 Data East Corporation (World)
robocopw // EP? (c) 1988 Data East Corporation (World)
@ -6780,7 +6780,7 @@ xmen2pj // GX065 (c) 1992 (Japan)
xmen6p // GX065 (c) 1992 (World)
xmen6pu // GX065 (c) 1992 (US)
xexex // GX067 (c) 1991 (World)
orius // GX067 (c) 1991 (USA)
orius // GX067 (c) 1991 (USA)
xexexa // GX067 (c) 1991 (Asia)
xexexj // GX067 (c) 1991 (Japan)
asterix // GX068 (c) 1992 (World)
@ -7539,7 +7539,7 @@ badlandsb // bootleg
badlandsb2 // bootleg set 2
klax // 136075 (c) 1989
klax2 // 136075 (c) 1989
klax2bl // bootleg
klax2bl // bootleg
klax3 // 136075 (c) 1989
klaxj // 136075 (c) 1989 (Japan)
klaxd // 136075 (c) 1989 (Germany)
@ -8112,7 +8112,7 @@ kuniokunb // bootleg
xsleena // TA-0019 (c) 1986 + Taito license
xsleenaj // TA-0019 (c) 1986
xsleenab // bootleg
xsleenaba // bootleg
xsleenaba // bootleg
solrwarr // TA-0019 (c) 1986 + Taito / Memetron license
battlane // -0215, -0216 (Data East part number) (c) 1986 + Taito license
battlane2 // -0215, -0216 (Data East part number) (c) 1986 + Taito license
@ -8147,7 +8147,7 @@ vball2pjb // bootleg (of Japan set)
ddragon2 // TA-0026 (c) 1988 (World)
ddragon2u // TA-0026 (c) 1988 (US)
ddragon2j // TA-0026 (c) 1988 (Japan)
ddragon2b // bootleg
ddragon2b // bootleg
toffy // (c) 1993 Midas
stoffy // (c) 1994 Midas
stoffyu // (c) 1994 Midas + Unico
@ -8242,7 +8242,7 @@ xxmissio // UPL-86001 [1986]
ninjakd2 // UPL-????? (c) 1987
ninjakd2a // UPL-????? (c) 1987
ninjakd2b // UPL-????? (c) 1987
ninjakd2c // UPL-????? (c) 1987
ninjakd2c // UPL-????? (c) 1987
rdaction // UPL-87003?(c) 1987 + World Games license
jt104 // hack?
mnight // UPL-????? (c) 1987 distributed by Kawakus
@ -9152,7 +9152,7 @@ wrallyb // (c) 1993 - Ref 930217
glass // (c) 1993 - Ref 931021
glass10 // (c) 1993 - Ref 931021
glass10a // (c) 1993 - Ref 931021 shows "Break Edition" on a real PCB
glasskr // (c) 1994 - Ref 931021 shows 1994 version, Anime girls, unprotected
glasskr // (c) 1994 - Ref 931021 shows 1994 version, Anime girls, unprotected
targeth // (c) 1994 - Ref 940531
targetha // (c) 1994 - Ref 940531
thoop2 // (c) 1994 - Ref ???
@ -9550,7 +9550,7 @@ sparkman // (c) 1989 SunA
sparkmana // (c) 1989 SunA
starfigh // (c) 1990 SunA
hardhea2 // (c) 1991 SunA
hardhea2b // bootleg
hardhea2b // bootleg
brickzn // (c) 1992 SunA
brickznv5 // (c) 1992 SunA
brickznv4 // (c) 1992 SunA
@ -9638,7 +9638,7 @@ galhustl // (c) 1997 ACE International
// Playmark games
sslam // (c) 1993 - hack of Namco's Super World Court
sslama // ^
sslamb // ^
sslamb // ^
powerbal // (c) 1994
powerbals // (c) 1994
magicstk // (c) 1995
@ -10677,7 +10677,7 @@ driblingbr // bootleg
ace // [1976 Allied Leisure]
clayshoo // [1979 Allied Leisure]
pirates // (c) 1994 NIX
piratesb // bootleg?
piratesb // bootleg?
genix // (c) 199? NIX
fitfight // bootleg of Art of Fighting
histryma // bootleg of Fighter's History
@ -12050,7 +12050,7 @@ ichiban // (c) 199? Excel
3x3puzzla // (c) 199? Ace
gambl186 // unknown
gambl186a // unknown
gambl186b // unknown
gambl186b // unknown
// InterFlip / Recreativos Franco
videopkr // (c) 1984 InterFlip

11
src/mame/drivers/age_candy.cpp
View File

@ -20,13 +20,13 @@ class age_candy_state : public driver_device
public:
age_candy_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag)
// ,m_maincpu(*this, "maincpu")
// ,m_maincpu(*this, "maincpu")
{ }
virtual void machine_start() override;
virtual void machine_reset() override;
// required_device<mcs51_cpu_device> m_maincpu;
// required_device<mcs51_cpu_device> m_maincpu;
};
static INPUT_PORTS_START( age_candy )
@ -46,9 +46,9 @@ void age_candy_state::machine_reset()
static MACHINE_CONFIG_START( age_candy, age_candy_state )
/* basic machine hardware */
// MCFG_CPU_ADD("maincpu", ??, 8000000) // unknown (vectors at end? 6xxx ?)
// MCFG_CPU_PROGRAM_MAP(age_candy_map)
// MCFG_CPU_IO_MAP(age_candy_io)
// MCFG_CPU_ADD("maincpu", ??, 8000000) // unknown (vectors at end? 6xxx ?)
// MCFG_CPU_PROGRAM_MAP(age_candy_map)
// MCFG_CPU_IO_MAP(age_candy_io)
/* sound hardware */
MCFG_SPEAKER_STANDARD_MONO("mono")
@ -62,4 +62,3 @@ ROM_START( age_cand )
ROM_END
GAME( 19??, age_cand, 0, age_candy, age_candy, driver_device, 0, ROT0, "Advanced Game Engineering", "Candy Crane (AGE)", MACHINE_IS_SKELETON_MECHANICAL )

11
src/mame/drivers/amerihok.cpp
View File

@ -24,13 +24,13 @@ class amerihok_state : public driver_device
public:
amerihok_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag)
// ,m_maincpu(*this, "maincpu")
// ,m_maincpu(*this, "maincpu")
{ }
virtual void machine_start() override;
virtual void machine_reset() override;
// required_device<mcs51_cpu_device> m_maincpu;
// required_device<mcs51_cpu_device> m_maincpu;
};
static INPUT_PORTS_START( amerihok )
@ -50,9 +50,9 @@ void amerihok_state::machine_reset()
static MACHINE_CONFIG_START( amerihok, amerihok_state )
/* basic machine hardware */
// MCFG_CPU_ADD("maincpu", ??, 8000000) // unknown
// MCFG_CPU_PROGRAM_MAP(amerihok_map)
// MCFG_CPU_IO_MAP(amerihok_io)
// MCFG_CPU_ADD("maincpu", ??, 8000000) // unknown
// MCFG_CPU_PROGRAM_MAP(amerihok_map)
// MCFG_CPU_IO_MAP(amerihok_io)
// MCFG_CPU_VBLANK_INT_DRIVER("screen", amerihok_state, irq0_line_hold)
/* sound hardware */
@ -75,4 +75,3 @@ ROM_START( amerihok )
ROM_END
GAME( 19??, amerihok, 0, amerihok, amerihok, driver_device, 0, ROT0, "<unknown>", "Ameri-Hockey", MACHINE_IS_SKELETON_MECHANICAL )

8
src/mame/drivers/aquarium.cpp
View File

@ -26,7 +26,7 @@ Notes:
- A bug in the program code causes the OKI to be reset on the very
first coin inserted.
// Sound banking + video references
// Sound banking + video references
// https://www.youtube.com/watch?v=nyAQPrkt_a4
// https://www.youtube.com/watch?v=0gn2Kj2M46Q
@ -74,7 +74,7 @@ WRITE8_MEMBER(aquarium_state::aquarium_z80_bank_w)
// aquarium bank 0006 00ff - correct (select) 110
// aquarium bank 0005 00ff - level 1 (correct)
// (all music seems correct w/regards the reference video)
membank("bank1")->set_entry(data & 0x7);
}
@ -349,7 +349,7 @@ ROM_START( aquarium )
ROM_LOAD16_WORD_SWAP( "aquar3.bin", 0x000000, 0x080000, CRC(f197991e) SHA1(0a217d735e2643605dbfd6ee20f98f46b37d4838) )
ROM_REGION( 0x40000, "audiocpu", 0 ) /* z80 (sound) code */
ROM_LOAD( "aquar5", 0x000000, 0x40000, CRC(fa555be1) SHA1(07236f2b2ba67e92984b9ddf4a8154221d535245) )
ROM_LOAD( "aquar5", 0x000000, 0x40000, CRC(fa555be1) SHA1(07236f2b2ba67e92984b9ddf4a8154221d535245) )
ROM_REGION( 0x100000, "gfx1", 0 ) /* BG Tiles */
ROM_LOAD( "aquar1", 0x000000, 0x080000, CRC(575df6ac) SHA1(071394273e512666fe124facdd8591a767ad0819) ) // 4bpp
@ -378,7 +378,7 @@ ROM_START( aquariumj )
ROM_LOAD16_WORD_SWAP( "aquar3", 0x000000, 0x080000, CRC(344509a1) SHA1(9deb610732dee5066b3225cd7b1929b767579235) )
ROM_REGION( 0x40000, "audiocpu", 0 ) /* z80 (sound) code */
ROM_LOAD( "aquar5", 0x000000, 0x40000, CRC(fa555be1) SHA1(07236f2b2ba67e92984b9ddf4a8154221d535245) )
ROM_LOAD( "aquar5", 0x000000, 0x40000, CRC(fa555be1) SHA1(07236f2b2ba67e92984b9ddf4a8154221d535245) )
ROM_REGION( 0x100000, "gfx1", 0 ) /* BG Tiles */
ROM_LOAD( "aquar1", 0x000000, 0x080000, CRC(575df6ac) SHA1(071394273e512666fe124facdd8591a767ad0819) ) // 4bpp

2
src/mame/drivers/aristmk6.cpp
View File

@ -152,7 +152,7 @@ READ8_MEMBER(aristmk6_state::test_r)
default:
logerror("Unmapped read %08x\n", 0x13800000 + offset);
}
return 0;
}

10
src/mame/drivers/battlera.cpp
View File

@ -7,12 +7,12 @@
Emulation by Bryan McPhail, mish@tendril.co.uk
This board is based on the Hudson HuC6280 and Huc6270 IC's used in
This board is based on the Hudson HuC6280 and Huc6270 IC's used in
the NEC PC-Engine.
Differences from PC-Engine console:
Input ports are different (2 dips, 2 joysticks, 1 coin port)
_Interface_ to palette is different (Huc6260 isn't present),
_Interface_ to palette is different (Huc6260 isn't present),
palette data is the same.
Extra sound chips (YM2203 & Oki M5205), and extra HuC6280 processor to drive them.
Twice as much VRAM (128kb).
@ -20,7 +20,7 @@
Todo:
- There seems to be a bug with a stuck note from the YM2203 FM channel
at the start of scene 3 and near the ending when your characters are
flying over a forest in a helicopter.
flying over a forest in a helicopter.
This is verified to NOT happen on real hardware - Guru
**********************************************************************
@ -64,7 +64,7 @@ Notes:
DEC-01 - Hudson HuC6280 6502-based CPU with in-built Programmable Sound Generator
used as the main CPU. Clock input is 21.4772MHz and is divided internally
by 3 for the CPU (7.15906MHz) and by 6 for the PSG (3.579533MHz), although
in this case the PSG isn't used. The Hudson markings have been scratch off
in this case the PSG isn't used. The Hudson markings have been scratch off
and the IC is labelled 'DEC-01'
45 - Hudson HuC6280 6502-based CPU with in-built PSG used as the sound CPU
Clock input is 21.4772MHz and is divided internally by 3 for the CPU

12
src/mame/drivers/cdi.cpp
View File

@ -107,15 +107,15 @@ static ADDRESS_MAP_START( cdi910_mem, AS_PROGRAM, 16, cdi_state )
#if ENABLE_UART_PRINTING
AM_RANGE(0x00301400, 0x00301403) AM_DEVREAD("scc68070", cdi68070_device, uart_loopback_enable)
#endif
// AM_RANGE(0x00300000, 0x00303bff) AM_DEVREADWRITE("cdic", cdicdic_device, ram_r, ram_w)
// AM_RANGE(0x00303c00, 0x00303fff) AM_DEVREADWRITE("cdic", cdicdic_device, regs_r, regs_w)
// AM_RANGE(0x00310000, 0x00317fff) AM_DEVREADWRITE("slave_hle", cdislave_device, slave_r, slave_w)
// AM_RANGE(0x00318000, 0x0031ffff) AM_NOP
// AM_RANGE(0x00300000, 0x00303bff) AM_DEVREADWRITE("cdic", cdicdic_device, ram_r, ram_w)
// AM_RANGE(0x00303c00, 0x00303fff) AM_DEVREADWRITE("cdic", cdicdic_device, regs_r, regs_w)
// AM_RANGE(0x00310000, 0x00317fff) AM_DEVREADWRITE("slave_hle", cdislave_device, slave_r, slave_w)
// AM_RANGE(0x00318000, 0x0031ffff) AM_NOP
AM_RANGE(0x00320000, 0x00323fff) AM_DEVREADWRITE8("mk48t08", timekeeper_device, read, write, 0xff00) /* nvram (only low bytes used) */
AM_RANGE(0x004fffe0, 0x004fffff) AM_DEVREADWRITE("mcd212", mcd212_device, regs_r, regs_w)
// AM_RANGE(0x00500000, 0x0057ffff) AM_RAM
// AM_RANGE(0x00500000, 0x0057ffff) AM_RAM
AM_RANGE(0x00500000, 0x00ffffff) AM_NOP
// AM_RANGE(0x00e00000, 0x00efffff) AM_RAM // DVC
// AM_RANGE(0x00e00000, 0x00efffff) AM_RAM // DVC
AM_RANGE(0x80000000, 0x8000807f) AM_DEVREADWRITE("scc68070", cdi68070_device, periphs_r, periphs_w)
ADDRESS_MAP_END

68
src/mame/drivers/cischeat.cpp
View File

@ -525,13 +525,13 @@ WRITE16_MEMBER(cischeat_state::captflag_leds_w)
COMBINE_DATA( &m_captflag_leds );
if (ACCESSING_BITS_8_15)
{
coin_counter_w(machine(), 1, data & 0x0100); // coin 2
set_led_status(machine(), 0, data & 0x0200); // decide
coin_counter_w(machine(), 0, data & 0x0400); // coin 1
set_led_status(machine(), 1, data & 0x2000); // select
coin_counter_w(machine(), 1, data & 0x0100); // coin 2
set_led_status(machine(), 0, data & 0x0200); // decide
coin_counter_w(machine(), 0, data & 0x0400); // coin 1
set_led_status(machine(), 1, data & 0x2000); // select
int power = (data & 0x1000);
m_captflag_hopper->write(space, 0, power ? 0x80 : 0x00); // prize motor
m_captflag_hopper->write(space, 0, power ? 0x80 : 0x00); // prize motor
if (!power)
m_captflag_hopper->reset();
}
@ -554,7 +554,7 @@ WRITE16_MEMBER(cischeat_state::captflag_motor_command_right_w)
// e09a up
// 80b9 - (when not busy)
// 0088 - (when busy)
// e0ba down
// e0ba down
data = COMBINE_DATA( &m_captflag_motor_command[RIGHT] );
captflag_motor_move(RIGHT, data);
}
@ -564,7 +564,7 @@ WRITE16_MEMBER(cischeat_state::captflag_motor_command_left_w)
// e0ba up
// 8099 - (when not busy)
// 0088 - (when busy)
// e09a down
// e09a down
data = COMBINE_DATA( &m_captflag_motor_command[LEFT] );
captflag_motor_move(LEFT, data);
}
@ -575,7 +575,7 @@ void cischeat_state::captflag_motor_move(int side, UINT16 data)
timer_device & dev = ((side == RIGHT) ? m_captflag_motor_right : m_captflag_motor_left);
// bool busy = !(dev.time_left() == attotime::never);
// bool busy = !(dev.time_left() == attotime::never);
bool busy = false;
if (data & 0x0010)
@ -587,10 +587,10 @@ void cischeat_state::captflag_motor_move(int side, UINT16 data)
int inc;
switch (data >> 8)
{
case 0xf5: inc = +2; break; // -5 -6
case 0xf8: inc = +1; break; // -5 -3
case 0xfe: inc = -1; break; // -5 +3
case 0x01: inc = -2; break; // -5 +6
case 0xf5: inc = +2; break; // -5 -6
case 0xf8: inc = +1; break; // -5 -3
case 0xfe: inc = -1; break; // -5 +3
case 0x01: inc = -2; break; // -5 +6
default:
if ((data >> 8) + 5 >= 0x100)
inc = -1;
@ -632,8 +632,8 @@ CUSTOM_INPUT_MEMBER(cischeat_state::captflag_motor_pos_r)
CUSTOM_INPUT_MEMBER(cischeat_state::captflag_motor_busy_r)
{
// timer_device & dev = ((side == RIGHT) ? m_captflag_motor_right : m_captflag_motor_left);
// return (dev.time_left() == attotime::never) ? 0 : 1;
// timer_device & dev = ((side == RIGHT) ? m_captflag_motor_right : m_captflag_motor_left);
// return (dev.time_left() == attotime::never) ? 0 : 1;
return 0;
}
@ -1492,11 +1492,11 @@ static INPUT_PORTS_START( captflag )
PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_COIN2 ) PORT_IMPULSE(1) // coin 2
PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_BUTTON1 ) // decide
PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(1) // coin 1
PORT_BIT( 0x0800, IP_ACTIVE_LOW, IPT_SERVICE1 ) // service
PORT_BIT( 0x1000, IP_ACTIVE_LOW, IPT_SERVICE ) // test
PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_COIN2 ) PORT_IMPULSE(1) // coin 2
PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_BUTTON1 ) // decide
PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(1) // coin 1
PORT_BIT( 0x0800, IP_ACTIVE_LOW, IPT_SERVICE1 ) // service
PORT_BIT( 0x1000, IP_ACTIVE_LOW, IPT_SERVICE ) // test
PORT_BIT( 0x2000, IP_ACTIVE_LOW, IPT_BUTTON2 ) // select
PORT_BIT( 0x4000, IP_ACTIVE_HIGH,IPT_OUTPUT ) PORT_READ_LINE_DEVICE_MEMBER("hopper", ticket_dispenser_device, line_r) // prize sensor
PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_UNKNOWN ) // potery on schems?
@ -1951,7 +1951,7 @@ TIMER_DEVICE_CALLBACK_MEMBER(cischeat_state::captflag_scanline)
{
int scanline = param;
if(scanline == 240) // vblank: draw screen
if(scanline == 240) // vblank: draw screen
m_maincpu->set_input_line(2, HOLD_LINE);
if(scanline == 50)
@ -1961,7 +1961,7 @@ TIMER_DEVICE_CALLBACK_MEMBER(cischeat_state::captflag_scanline)
static MACHINE_CONFIG_START( captflag, cischeat_state )
/* basic machine hardware */
MCFG_CPU_ADD("maincpu",M68000, XTAL_24MHz / 2) // TMP68000P-12
MCFG_CPU_ADD("maincpu",M68000, XTAL_24MHz / 2) // TMP68000P-12
MCFG_CPU_PROGRAM_MAP(captflag_map)
MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", cischeat_state, captflag_scanline, "screen", 0, 1)
@ -1969,9 +1969,9 @@ static MACHINE_CONFIG_START( captflag, cischeat_state )
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)
// MCFG_SCREEN_VIDEO_ATTRIBUTES(VIDEO_UPDATE_AFTER_VBLANK)
// MCFG_SCREEN_VIDEO_ATTRIBUTES(VIDEO_UPDATE_AFTER_VBLANK)
MCFG_SCREEN_REFRESH_RATE(30) //TODO: wrong!
// MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500 * 3) /* not accurate */)
// MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500 * 3) /* not accurate */)
MCFG_SCREEN_SIZE(256, 256)
MCFG_SCREEN_VISIBLE_AREA(0, 256-1, 0 +16, 256-1 -16)
MCFG_SCREEN_UPDATE_DRIVER(cischeat_state, screen_update_scudhamm)
@ -3248,13 +3248,13 @@ ROM_START( captflag )
ROM_LOAD16_BYTE( "cf-92128_4_ver1.4.ic46", 0x000001, 0x020000, CRC(e773f87f) SHA1(cf9d72b0df256b69b96f1cd6b5f86282801873e3) )
ROM_REGION( 0x80000, "gfx1", 0 ) /* Scroll 0 */
ROM_LOAD( "mr92027-11_w89.ic54", 0x000000, 0x080000, CRC(d34cae3c) SHA1(622ad4645df12d34e55bbfb7194508957bb2198b) ) // 5 on the PCB
ROM_LOAD( "mr92027-11_w89.ic54", 0x000000, 0x080000, CRC(d34cae3c) SHA1(622ad4645df12d34e55bbfb7194508957bb2198b) ) // 5 on the PCB
// ROM_REGION( 0x080000, "gfx2", 0 ) /* Scroll 1 */
// UNUSED
ROM_REGION( 0x20000, "gfx3", 0 ) /* Scroll 2 */
ROM_LOAD( "cf-92128_6.ic55", 0x000000, 0x020000, CRC(12debfc2) SHA1(f28d3f63a3c8965fcd838eedad4ef3682a28da0d) ) // 6 on the PCB
ROM_LOAD( "cf-92128_6.ic55", 0x000000, 0x020000, CRC(12debfc2) SHA1(f28d3f63a3c8965fcd838eedad4ef3682a28da0d) ) // 6 on the PCB
ROM_REGION( 0x400000, "gfx4", 0 ) /* Sprites */
ROM_LOAD16_BYTE( "gp-9189_1.ic1", 0x000000, 0x080000, CRC(03d69f0f) SHA1(97a0552d94ca1e9c76896903c02c3f005752e5db) )
@ -3267,28 +3267,28 @@ ROM_START( captflag )
ROM_LOAD16_BYTE( "mr92027-08_w88.ic16", 0x300001, 0x080000, CRC(fb080dd6) SHA1(49eceba8cdce76dec3f6a85327135125bb0910f0) )
ROM_REGION( 0x80000, "user2", 0 ) /* ? Unused ROMs ? */
ROM_LOAD( "pr91042.ic86", 0x000000, 0x000100, CRC(e71de4aa) SHA1(d06e5a35ad2127df2d6328cce153073380ee7819) ) // FIXED BITS (00000xxx0000xxxx)
ROM_LOAD( "pr88004q.ic88", 0x000000, 0x000200, CRC(9327dc37) SHA1(cfe7b144cdcd76170d47f1c4e0f72b6d4fca0c8d) ) // FIXED BITS (1xxxxxxx1111x1xx)
ROM_LOAD( "pr92027a.ic16", 0x000000, 0x000020, CRC(bee7adc6) SHA1(cd11a3dae0317d06a69b5707a653b8997c1eb97f) ) // FIXED BITS (0000000000000xxx), 1xxx0 = 0x00
ROM_LOAD( "pr92027a.ic17", 0x000000, 0x000020, CRC(bee7adc6) SHA1(cd11a3dae0317d06a69b5707a653b8997c1eb97f) ) // ""
ROM_LOAD( "pr91042.ic86", 0x000000, 0x000100, CRC(e71de4aa) SHA1(d06e5a35ad2127df2d6328cce153073380ee7819) ) // FIXED BITS (00000xxx0000xxxx)
ROM_LOAD( "pr88004q.ic88", 0x000000, 0x000200, CRC(9327dc37) SHA1(cfe7b144cdcd76170d47f1c4e0f72b6d4fca0c8d) ) // FIXED BITS (1xxxxxxx1111x1xx)
ROM_LOAD( "pr92027a.ic16", 0x000000, 0x000020, CRC(bee7adc6) SHA1(cd11a3dae0317d06a69b5707a653b8997c1eb97f) ) // FIXED BITS (0000000000000xxx), 1xxx0 = 0x00
ROM_LOAD( "pr92027a.ic17", 0x000000, 0x000020, CRC(bee7adc6) SHA1(cd11a3dae0317d06a69b5707a653b8997c1eb97f) ) // ""
ROM_LOAD( "pr92027b.ic32.bin", 0x000000, 0x000113, CRC(483f4fb5) SHA1(84bb0300a106261634c921a37858482d3233c05a) )
ROM_LOAD( "pr92027b.ic32.jedec", 0x000000, 0x000bd0, CRC(f0ed1845) SHA1(203438fdee05810b2265624e1a1fdd55d360f833) )
ROM_LOAD( "pr92027b.ic36.bin", 0x000000, 0x000113, CRC(483f4fb5) SHA1(84bb0300a106261634c921a37858482d3233c05a) )
ROM_LOAD( "pr92027b.ic36.jedec", 0x000000, 0x000bd0, CRC(f0ed1845) SHA1(203438fdee05810b2265624e1a1fdd55d360f833) )
ROM_LOAD( "ch9072_4.ic39", 0x000000, 0x002000, CRC(b45b4dc0) SHA1(b9fae0c9ac2d40f0a202c538d866d5f2941ba8dd) ) // FIXED BITS (0000000x), 1ST AND 2ND HALF IDENTICAL
ROM_LOAD( "ch9072_5.ic33", 0x000000, 0x001000, CRC(a8025dc1) SHA1(c9bb7ea59bba3041c687b449ff1560d7d1ce2ec9) ) // FIXED BITS (xxxx0xxx)
ROM_LOAD( "ch9072_4.ic39", 0x000000, 0x002000, CRC(b45b4dc0) SHA1(b9fae0c9ac2d40f0a202c538d866d5f2941ba8dd) ) // FIXED BITS (0000000x), 1ST AND 2ND HALF IDENTICAL
ROM_LOAD( "ch9072_5.ic33", 0x000000, 0x001000, CRC(a8025dc1) SHA1(c9bb7ea59bba3041c687b449ff1560d7d1ce2ec9) ) // FIXED BITS (xxxx0xxx)
ROM_LOAD( "ch9072_6.ic35", 0x000000, 0x001000, CRC(5cc9c561) SHA1(10866fd0707498fe4d4415bf755c07b55af4ae18) )
ROM_LOAD( "ch9072_8.ic59", 0x000000, 0x001000, CRC(6c99523b) SHA1(cc00b326b69a97b5bd2e2d741ab41692a14eae35) ) // FIXED BITS (0xxx0xxx)
ROM_LOAD( "ch9072_8.ic59", 0x000000, 0x001000, CRC(6c99523b) SHA1(cc00b326b69a97b5bd2e2d741ab41692a14eae35) ) // FIXED BITS (0xxx0xxx)
ROM_LOAD( "mr90015-35_w33.ic54", 0x000000, 0x080000, CRC(9d428fb7) SHA1(02f72938d73db932bd217620a175a05215f6016a) ) // not dumped yet (taken from the other games)
ROM_LOAD( "mr90015-35_w33.ic67", 0x000000, 0x080000, CRC(9d428fb7) SHA1(02f72938d73db932bd217620a175a05215f6016a) ) // ""
ROM_REGION( 0x100000, "oki1", 0 ) /* Samples (8x20000) */
ROM_LOAD( "mr92027-10_w27.ic19", 0x000000, 0x100000, CRC(04bd729e) SHA1(92bcedf16554f33cc3d0dbdd8807b0e2fafe5d7c) ) // 2 on the PCB
ROM_LOAD( "mr92027-10_w27.ic19", 0x000000, 0x100000, CRC(04bd729e) SHA1(92bcedf16554f33cc3d0dbdd8807b0e2fafe5d7c) ) // 2 on the PCB
ROM_REGION( 0x100000, "oki2", 0 ) /* Samples (8x20000) */
ROM_LOAD( "mr92027-09_w26.ic18", 0x000000, 0x100000, CRC(3aaa332a) SHA1(6c19364069e0b077a07ac4f9c4b0cf0c0985a42a) ) // 1 on the PCB
ROM_LOAD( "mr92027-09_w26.ic18", 0x000000, 0x100000, CRC(3aaa332a) SHA1(6c19364069e0b077a07ac4f9c4b0cf0c0985a42a) ) // 1 on the PCB
ROM_END
DRIVER_INIT_MEMBER(cischeat_state, captflag)

11
src/mame/drivers/clowndwn.cpp
View File

@ -17,13 +17,13 @@ class clowndwn_state : public driver_device
public:
clowndwn_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag)
// ,m_maincpu(*this, "maincpu")
// ,m_maincpu(*this, "maincpu")
{ }
virtual void machine_start() override;
virtual void machine_reset() override;
// required_device<mcs51_cpu_device> m_maincpu;
// required_device<mcs51_cpu_device> m_maincpu;
};
static INPUT_PORTS_START( clowndwn )
@ -43,9 +43,9 @@ void clowndwn_state::machine_reset()
static MACHINE_CONFIG_START( clowndwn, clowndwn_state )
/* basic machine hardware */
// MCFG_CPU_ADD("maincpu", ??, 8000000) // unknown (vectors at end? 6xxx ?)
// MCFG_CPU_PROGRAM_MAP(clowndwn_map)
// MCFG_CPU_IO_MAP(clowndwn_io)
// MCFG_CPU_ADD("maincpu", ??, 8000000) // unknown (vectors at end? 6xxx ?)
// MCFG_CPU_PROGRAM_MAP(clowndwn_map)
// MCFG_CPU_IO_MAP(clowndwn_io)
/* sound hardware */
MCFG_SPEAKER_STANDARD_MONO("mono")
@ -63,4 +63,3 @@ ROM_START( clowndwn )
ROM_END
GAME( 1987, clowndwn, 0, clowndwn, clowndwn, driver_device, 0, ROT0, "Elwood Electronics", "Clown Roll Down (Elwood)", MACHINE_IS_SKELETON_MECHANICAL )

2
src/mame/drivers/cps1.cpp
View File

@ -9015,7 +9015,7 @@ ROM_START( sf2cebltw )
ROM_LOAD16_BYTE( "30.11f", 0x0c0001, 0x20000, CRC(d0580ff2) SHA1(1b2e4c4abbe90a68283c86e7cb5328b242be5683) )
ROM_LOAD16_WORD_SWAP( "s92_21a.5f", 0x100000, 0x80000, CRC(925a7877) SHA1(1960dca35f0ca6f2b399a9fccfbc0132ac6425d1) )
ROM_REGION( 0x40000, "pal", 0 )
ROM_REGION( 0x40000, "pal", 0 )
ROM_LOAD( "bruteforce.palce16v8h-25.11d", 0x00000, 0x40000, CRC(430f722d) SHA1(b0c0570057c782b1114819fae907f45a01c55065) )
ROM_REGION( 0x600000, "gfx", 0 )

2
src/mame/drivers/cps2.cpp
View File

@ -910,7 +910,7 @@ READ16_MEMBER(cps_state::joy_or_paddle_ecofghtr_r)
else if ((dial1 & 0x800) < (m_ecofghtr_dial_last1 & 0x800)) // value gone from 0xfff to 0x000
{
m_ecofghtr_dial_direction1 = 1;
}
}
m_ecofghtr_dial_last0 = dial0;
m_ecofghtr_dial_last1 = dial1;

4
src/mame/drivers/ddragon.cpp
View File

@ -1728,7 +1728,7 @@ ROM_START( ddragon2u )
ROM_LOAD( "26ad-0.bin", 0x00000, 0x8000, CRC(75e36cd6) SHA1(f24805f4f6925b3ac508e66a6fc25c275b05f3b9) )
ROM_REGION( 0x10000, "gfx1", 0 )
ROM_LOAD( "26a8-0.bin", 0x00000, 0x10000, CRC(3ad1049c) SHA1(11d9544a56f8e6a84beb307a5c8a9ff8afc55c66) ) /* chars */
ROM_LOAD( "26a8-0.bin", 0x00000, 0x10000, CRC(3ad1049c) SHA1(11d9544a56f8e6a84beb307a5c8a9ff8afc55c66) ) /* chars */
ROM_REGION( 0xc0000, "gfx2", 0 )
ROM_LOAD( "26j0-0.bin", 0x00000, 0x20000, CRC(db309c84) SHA1(ee095e4a3bc86737539784945decb1f63da47b9b) ) /* sprites */
@ -1785,7 +1785,7 @@ ROM_START( ddragon2b )
ROM_LOAD( "13", 0x10000, 0x10000, CRC(7c21be72) SHA1(9935c983d0f7613ee192758ddcd8d8592e8bf78a) )
ROM_LOAD( "14", 0x20000, 0x10000, CRC(e92f91f4) SHA1(4351b2b117c1104dcdb6f48531ddad385691c945) )
ROM_LOAD( "12", 0x30000, 0x10000, CRC(6896e2f7) SHA1(d230d2406ae451f59d1d0783b1d670a0d3e28d8c) )
ROM_REGION( 0x40000, "oki", 0 ) /* adpcm samples */
ROM_LOAD( "7", 0x00000, 0x10000, CRC(6d9e3f0f) SHA1(5c3e7fb2e46939dd3c540b9e1af9591dbfd15b19) )
ROM_LOAD( "9", 0x10000, 0x10000, CRC(0c15dec9) SHA1(b0a6bb13216f4321b5fc01a649ea84d2d1d51088) )

62
src/mame/drivers/dec0.cpp
View File

@ -1892,43 +1892,43 @@ ROM_END
/*
CPUs
QTY Type clock position function
1x SCN68000CAN64 main PCB 9h 16/32-bit Microprocessor - main
1x UM6502 main PCB 7d 8-bit Microprocessor - sound
1x MC3403 main PCB 14e Quad Operational Amplifier - sound
1x GL358 main PCB 13b Dual Operational Amplifier - sound
1x YM2203C main PCB 12a FM Operator Type-M (OPM) - sound
2x YM3014B main PCB 13d, 13e D/A Converter (DAC) - sound
1x YM3812 main PCB 9b FM Operator Type-L II (OPL II) - sound
1x MC68705R3P ROMs PCB 1l 8-bit EPROM Microcomputer Unit - main (not dumped)
1x M5205 ROMs PCB 12c ADPCM Speech Syntesis IC - sound
1x oscillator 24.000MHz main PCB 2a
1x oscillator 16.0000 main PCB 12n
1x blu resonator CSB-400P ROMs PCB 12b
QTY Type clock position function
1x SCN68000CAN64 main PCB 9h 16/32-bit Microprocessor - main
1x UM6502 main PCB 7d 8-bit Microprocessor - sound
1x MC3403 main PCB 14e Quad Operational Amplifier - sound
1x GL358 main PCB 13b Dual Operational Amplifier - sound
1x YM2203C main PCB 12a FM Operator Type-M (OPM) - sound
2x YM3014B main PCB 13d, 13e D/A Converter (DAC) - sound
1x YM3812 main PCB 9b FM Operator Type-L II (OPL II) - sound
1x MC68705R3P ROMs PCB 1l 8-bit EPROM Microcomputer Unit - main (not dumped)
1x M5205 ROMs PCB 12c ADPCM Speech Syntesis IC - sound
1x oscillator 24.000MHz main PCB 2a
1x oscillator 16.0000 main PCB 12n
1x blu resonator CSB-400P ROMs PCB 12b
ROMs
QTY Type position status
4x 27256 main PCB 1-4 dumped
4x 27512 main PCB 5-8 dumped
7x 27256 ROMs PCB 15,20-23,28,29 dumped
9x 27512 ROMs PCB 9-14,27-30 dumped
2x N82S129AN main PCB 2q,3p not dumped yet
1x N82S131N main PCB 5q not dumped yet
1x N82S137N main PCB 8u not dumped yet
1x N82S129AN ROMs PCB 12c not dumped yet
QTY Type position status
4x 27256 main PCB 1-4 dumped
4x 27512 main PCB 5-8 dumped
7x 27256 ROMs PCB 15,20-23,28,29 dumped
9x 27512 ROMs PCB 9-14,27-30 dumped
2x N82S129AN main PCB 2q,3p not dumped yet
1x N82S131N main PCB 5q not dumped yet
1x N82S137N main PCB 8u not dumped yet
1x N82S129AN ROMs PCB 12c not dumped yet
RAMs
QTY Type position
2x HY6264 main PCB 12c,12d
14x TMM2018 main PCB 1e,2e,5k,5l,5m,5n,5o,5p,7m,7n,8b,11s,11t,11u
2x TMM2064 ROMs PCB 8n,8o
4x TMM2018 ROMs PCB 8f,8g,8j,8k
QTY Type position
2x HY6264 main PCB 12c,12d
14x TMM2018 main PCB 1e,2e,5k,5l,5m,5n,5o,5p,7m,7n,8b,11s,11t,11u
2x TMM2064 ROMs PCB 8n,8o
4x TMM2018 ROMs PCB 8f,8g,8j,8k
PLDs
QTY Type position status
QTY Type position status
Others
1x 28x2 edge connector
3x 50 pins flat cable connector from main board to roms board
1x trimmer (volume)
1x 8x2 switches DIP
1x 8x2 switches DIP
*/
@ -1937,7 +1937,7 @@ ROM_START( drgninjab2 )
ROM_LOAD16_BYTE( "a14.3e", 0x00000, 0x10000, CRC(c4b9f4e7) SHA1(4a8176cce8c7909aace8ece4f97b1a199617938e) ) // 99.978638%
ROM_LOAD16_BYTE( "a11.3b", 0x00001, 0x10000, CRC(e4cc7c60) SHA1(63aeab4e20420f28a947438f2d7079c92a43d2df) ) // 99.978638%
ROM_LOAD16_BYTE( "a12.2e", 0x40000, 0x10000, CRC(2b81faf7) SHA1(6d10c29f5ee06856843d83e77ba24c2b6e00a9cb) )
ROM_LOAD16_BYTE( "a9.2b", 0x40001, 0x10000, CRC(c52c2e9d) SHA1(399f2b7df9d558c8f33bf1a7c8048c62e0f54cec) )
ROM_LOAD16_BYTE( "a9.2b", 0x40001, 0x10000, CRC(c52c2e9d) SHA1(399f2b7df9d558c8f33bf1a7c8048c62e0f54cec) )
ROM_REGION( 0x10000, "audiocpu", 0 ) /* Sound CPU */
ROM_LOAD( "a15.7b", 0x8000, 0x8000, CRC(82007af2) SHA1(f0db1b1dab199df402a7590e56d4d5ab4baca803) ) // 99.612427%
@ -1982,7 +1982,7 @@ ROM_START( drgninjab2 )
ROM_LOAD( "n82s137n.8u", 0x0000, 0x400, CRC(a5cda23e) SHA1(d6c8534ae3c95b47a0701047fef67f15dd71f3fe) )
ROM_END
ROM_START( birdtry )
ROM_REGION( 0x60000, "maincpu", 0 ) /* 6*64k for 68000 code */

2
src/mame/drivers/dooyong.cpp
View File

@ -564,7 +564,7 @@ static INPUT_PORTS_START( flytiger )
PORT_DIPSETTING( 0x40, DEF_STR( On ) )
PORT_MODIFY("SYSTEM")
// PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_CUSTOM ) PORT_VBLANK("screen") // allows title screen + ending screen colours to cycle (but I'm not sure they're meant to, reference shots suggest not, maybe a debug port?)
// PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_CUSTOM ) PORT_VBLANK("screen") // allows title screen + ending screen colours to cycle (but I'm not sure they're meant to, reference shots suggest not, maybe a debug port?)
INPUT_PORTS_END
static INPUT_PORTS_START( sadari )

5
src/mame/drivers/fastinvaders.cpp
View File

@ -90,8 +90,8 @@ static MACHINE_CONFIG_START( fastinvaders, fastinvaders_state )
/* basic machine hardware */
MCFG_CPU_ADD("maincpu", I8085A, 10000000 ) // guess
MCFG_CPU_PROGRAM_MAP(fastinvaders_map)
// MCFG_CPU_IO_MAP(fastinvaders_io_map)
// MCFG_CPU_VBLANK_INT_DRIVER("screen", fastinvaders_state, irq0_line_hold) // where is irqack?
// MCFG_CPU_IO_MAP(fastinvaders_io_map)
// MCFG_CPU_VBLANK_INT_DRIVER("screen", fastinvaders_state, irq0_line_hold) // where is irqack?
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)
@ -172,4 +172,3 @@ ROM_END
GAME( 1979, fi6845, 0, fastinvaders, fastinvaders, driver_device, 0, ROT0, "Fiberglass", "Fast Invaders (6845 version)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND )
GAME( 1979, fi8275, fi6845, fastinvaders, fastinvaders, driver_device, 0, ROT0, "Fiberglass", "Fast Invaders (8275 version)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND )

18
src/mame/drivers/galaxian.cpp
View File

@ -1750,10 +1750,10 @@ static ADDRESS_MAP_START( spactrai_map, AS_PROGRAM, 8, galaxian_state )
AM_RANGE(0x1600, 0x4fff) AM_ROM
// cleared on startup
// AM_RANGE(0x6000, 0x60ff) AM_RAM
// AM_RANGE(0x6800, 0x68ff) AM_RAM
// AM_RANGE(0x7000, 0x70ff) AM_RAM
// AM_RANGE(0x6000, 0x60ff) AM_RAM
// AM_RANGE(0x6800, 0x68ff) AM_RAM
// AM_RANGE(0x7000, 0x70ff) AM_RAM
// standard galaxian mapping?
AM_RANGE(0x6004, 0x6007) AM_MIRROR(0x07f8) AM_DEVWRITE("cust", galaxian_sound_device, lfo_freq_w)
AM_RANGE(0x6800, 0x6807) AM_MIRROR(0x07f8) AM_DEVWRITE("cust", galaxian_sound_device, sound_w)
@ -1801,11 +1801,11 @@ static ADDRESS_MAP_START( anteatergg_map, AS_PROGRAM, 8, galaxian_state )
AM_RANGE(0x4000, 0x4fff) AM_RAM
AM_RANGE(0x5000, 0x53ff) AM_RAM AM_RAM_WRITE(galaxian_videoram_w) AM_SHARE("videoram")
AM_RANGE(0x5800, 0x58ff) AM_RAM AM_RAM_WRITE(galaxian_objram_w) AM_SHARE("spriteram")
// AM_RANGE(0x4000, 0x43ff) AM_MIRROR(0x0400) AM_RAM
// AM_RANGE(0x4000, 0x43ff) AM_MIRROR(0x0400) AM_RAM
AM_RANGE(0x6000, 0x6000) AM_MIRROR(0x07ff) AM_READ_PORT("IN0")
// AM_RANGE(0x6000, 0x6001) AM_MIRROR(0x07f8) AM_WRITE(start_lamp_w)
// AM_RANGE(0x6002, 0x6002) AM_MIRROR(0x07f8) AM_WRITE(coin_lock_w)
// AM_RANGE(0x6003, 0x6003) AM_MIRROR(0x07f8) AM_WRITE(coin_count_0_w)
// AM_RANGE(0x6000, 0x6001) AM_MIRROR(0x07f8) AM_WRITE(start_lamp_w)
// AM_RANGE(0x6002, 0x6002) AM_MIRROR(0x07f8) AM_WRITE(coin_lock_w)
// AM_RANGE(0x6003, 0x6003) AM_MIRROR(0x07f8) AM_WRITE(coin_count_0_w)
AM_RANGE(0x6800, 0x6800) AM_MIRROR(0x07ff) AM_READ_PORT("IN1")
AM_RANGE(0x7000, 0x7000) AM_MIRROR(0x07ff) AM_READ_PORT("IN2")
AM_RANGE(0x7001, 0x7001) AM_MIRROR(0x07f8) AM_WRITE(irq_enable_w)
@ -7728,7 +7728,7 @@ ROM_START( spactrai )
ROM_REGION( 0x1000, "gfx1", 0 )
ROM_LOAD( "6cen.bin", 0x0000, 0x0800, CRC(a59a9f3f) SHA1(9564f1d013d566dc0b19762aec66119e2ece0b49) ) // MK2716J
ROM_LOAD( "7cen.bin", 0x0800, 0x0800, CRC(9b75b40a) SHA1(4ad94db3f1d6b45a3de1ed9b51d361f20c6706e4) ) // marked MM2758Q (which is meant to be a 1Kx8 EPROM, but in reality is a 2Kx8 EPROM ?!)
ROM_REGION( 0x0020, "proms", 0 )
ROM_LOAD( "stk.bin", 0x0000, 0x0020, CRC(6a0c7d87) SHA1(140335d85c67c75b65689d4e76d29863c209cf32) )
ROM_END

40
src/mame/drivers/gameking.cpp
View File

@ -3,14 +3,14 @@
/* TimeTop - GameKing */
/*
PeT mess@utanet.at 2015
Thanks to Deathadder, Judge, Porchy, Klaus Sommer, James Brolly & Brian Provinciano
hopefully my work (reverse engineerung, cartridge+bios backup, emulation) will be honored in future
and my name will not be removed entirely, especially by simple code rewrites of working emulation
flashcard, handheld, programmer, assembler ready to do some test on real hardware
todo:
!back up gameking3 bios so emulation of gameking3 gets possible; my gameking bios backup solution should work
search for rockwell r65c02 variant (cb:wai instruction) and several more exceptions, and implement it
@ -18,7 +18,7 @@
work out bankswitching and exceptions
(improove emulation)
(add audio)
use gameking3 cartridge to get illegal cartridge scroller
This system appears to be based on the GeneralPlus GPL133 system-on-chip or a close relative.
@ -59,13 +59,13 @@ public:
DECLARE_DEVICE_IMAGE_LOAD_MEMBER(gameking_cart);
struct Gkio {
UINT8 input, input2;
UINT8 timer;
UINT8 res3[0x2f];
UINT8 bank4000_address; // 32
UINT8 bank4000_cart; //33 bit 0 only?
UINT8 bank8000_cart; //34 bit 7; bits 0,1,.. a15,a16,..
UINT8 res2[0x4c];
UINT8 input, input2;
UINT8 timer;
UINT8 res3[0x2f];
UINT8 bank4000_address; // 32
UINT8 bank4000_cart; //33 bit 0 only?
UINT8 bank8000_cart; //34 bit 7; bits 0,1,.. a15,a16,..
UINT8 res2[0x4c];
};
protected:
required_device<cpu_device> m_maincpu;
@ -125,7 +125,7 @@ READ8_MEMBER(gameking_state::io_r)
if (offset != offsetof(Gkio, bank8000_cart))
logerror("%.6f io r %x %x\n", machine().time().as_double(), offset, data);
return data;
}
@ -149,9 +149,9 @@ static ADDRESS_MAP_START( gameking_mem , AS_PROGRAM, 8, gameking_state )
AM_RANGE(0x0600, 0x077f) AM_READWRITE(lcd_r, lcd_w)
AM_RANGE(0x0d00, 0x0fff) AM_RAM // d00, e00, f00 prooved on handheld
// AM_RANGE(0x1000, 0x1fff) AM_RAM // sthero writes to $19xx
// AM_RANGE(0x1000, 0x1fff) AM_RAM // sthero writes to $19xx
// AM_RANGE(0x3000, 0x3fff) AM_ROMBANK("bank3000")
// AM_RANGE(0x3000, 0x3fff) AM_ROMBANK("bank3000")
AM_RANGE(0x4000, 0x7fff) AM_ROMBANK("bank4000")
AM_RANGE(0x8000, 0xffaf) AM_ROMBANK("bank8000")
AM_RANGE(0xffb0, 0xffff) AM_ROMBANK("bankboot") // cpu seems to read from 8000 bank, and for exceptions ignore bank
@ -191,7 +191,7 @@ UINT32 gameking_state::screen_update_gameking(screen_device &screen, bitmap_ind1
{
for (int x=0, j=0;j<48/4;x+=4, j++)
{
memory_region *maincpu_rom = memregion("maincpu");
memory_region *maincpu_rom = memregion("maincpu");
UINT8 data=maincpu_rom->base()[0x600+j+i*12];
bitmap.pix16(y, x+3)=data&3;
bitmap.pix16(y, x+2)=(data>>2)&3;
@ -245,8 +245,8 @@ DEVICE_IMAGE_LOAD_MEMBER( gameking_state, gameking_cart )
void gameking_state::machine_start()
{
std::string region_tag;
m_cart_rom = memregion(region_tag.assign(m_cart->tag()).append(GENERIC_ROM_REGION_TAG).c_str());
std::string region_tag;
m_cart_rom = memregion(region_tag.assign(m_cart->tag()).append(GENERIC_ROM_REGION_TAG).c_str());
m_bank4000 = membank("bank4000");
m_bank8000 = membank("bank8000");
@ -298,18 +298,18 @@ static MACHINE_CONFIG_START( gameking, gameking_state )
MACHINE_CONFIG_END
static MACHINE_CONFIG_DERIVED( gameking1, gameking )
MCFG_SOFTWARE_LIST_ADD("cart_list", "gameking")
MCFG_SOFTWARE_LIST_ADD("cart_list", "gameking")
MACHINE_CONFIG_END
static MACHINE_CONFIG_DERIVED( gameking3, gameking )
MCFG_SOFTWARE_LIST_ADD("cart_list", "gameking")
MCFG_SOFTWARE_LIST_ADD("cart_list", "gameking")
MCFG_SOFTWARE_LIST_ADD("cart_list_3", "gameking3")
MACHINE_CONFIG_END
ROM_START(gameking)
ROM_REGION(0x10000+0x80000, "maincpu", ROMREGION_ERASE00)
// ROM_LOAD("gm218.bin", 0x10000, 0x80000, CRC(8f52a928) SHA1(2e791fc7b642440d36820d2c53e1bb732375eb6e) ) // a14 inversed
// ROM_LOAD("gm218.bin", 0x10000, 0x80000, CRC(8f52a928) SHA1(2e791fc7b642440d36820d2c53e1bb732375eb6e) ) // a14 inversed
ROM_LOAD("gm218.bin", 0x10000, 0x80000, CRC(5a1ade3d) SHA1(e0d056f8ebfdf52ef6796d0375eba7fcc4a6a9d3) )
ROM_END

16
src/mame/drivers/goldnpkr.cpp
View File

@ -4547,7 +4547,7 @@ ROM_START( potnpkrh )
ROM_LOAD( "unk_2716.8a", 0x1000, 0x0800, CRC(a138afa6) SHA1(80c6d11086f78e36dfc01c15b23e70667fcf17fc) ) /* char ROM */
/* Backplane at 5a has two bits different against the common cards gfx
Offsets 0x380 and 0x400, bit0 is set to 0 */
Offsets 0x380 and 0x400, bit0 is set to 0 */
ROM_REGION( 0x1800, "gfx2", 0 )
ROM_LOAD( "unk_2716.4a", 0x0000, 0x0800, CRC(f2f94661) SHA1(f37f7c0dff680fd02897dae64e13e297d0fdb3e7) ) /* cards deck gfx, bitplane1 */
ROM_LOAD( "unk_2716.5a", 0x0800, 0x0800, CRC(daf38d03) SHA1(6b518494688756ad7b753fdec46b6392c4a9ebbe) ) /* cards deck gfx, bitplane2 */
@ -10149,7 +10149,7 @@ ROM_END
---------------------------------------------------------------------------
* First game program:
NMI vector is OK ($29FD).
RES & IRQ/BRK vectors are pointing to 0x2EE3 and $3065 (JMP $2EE3)
$2EE3 --> JMP $FBBB (where is in middle of a routine. Not the real start)
@ -10159,22 +10159,22 @@ ROM_END
* Second game program:
Expects the string '#2D' placed in offset FAh-FCh (NVRAM)
fill FAh = 0x23
FBh = 0x32
FCh = 0x44
#2D
#2D
...to pass the checks at $638c: JSR $6760
Another odd thing:
bp 6394
639f: lda #$20
63a1: sta $a0
63a3: lda $a0 \
63a3: lda $a0 \
63a5: bne $63a3 / ---> loop waiting for register $a0 cleared!
-------------------------------------------------------------------------*/
@ -10215,7 +10215,7 @@ ROM_START( animpkra )
ROM_END
/*********************************************
* Driver Init *
*********************************************/

2
src/mame/drivers/hh_tms1k.cpp
View File

@ -2691,7 +2691,7 @@ READ8_MEMBER(mdndclab_state::read_k)
8 buttons on the left, top-to-bottom: (lower 6 are just for sound-preview)
[Switch Key] [Next Turn / Level 1/2] [Dragon Flying / Defeat Tune] [Dragon Attacks / Dragon Wakes]
[Wall / Door] [Illegal Move / Warrior Moves] [Warrior 1 / Winner] [Warrior 2 / Treasure]
8*8 buttons to the right of that, making the gameboard
*/

558
src/mame/drivers/hp9845.cpp
View File

@ -71,9 +71,9 @@ class hp9845b_state : public driver_device
public:
hp9845b_state(const machine_config &mconfig, device_type type, const char *tag) :
driver_device(mconfig, type, tag),
m_lpu(*this , "lpu"),
m_ppu(*this , "ppu"),
m_palette(*this , "palette"),
m_lpu(*this , "lpu"),
m_ppu(*this , "ppu"),
m_palette(*this , "palette"),
m_io_key0(*this , "KEY0"),
m_io_key1(*this , "KEY1"),
m_io_key2(*this , "KEY2"),
@ -82,14 +82,14 @@ public:
UINT32 screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
virtual void machine_start() override;
virtual void machine_reset() override;
virtual void machine_start() override;
virtual void machine_reset() override;
TIMER_DEVICE_CALLBACK_MEMBER(scanline_timer);
TIMER_DEVICE_CALLBACK_MEMBER(scanline_timer);
void vblank_w(screen_device &screen, bool state);
void vblank_w(screen_device &screen, bool state);
IRQ_CALLBACK_MEMBER(irq_callback);
IRQ_CALLBACK_MEMBER(irq_callback);
void update_irl(void);
TIMER_DEVICE_CALLBACK_MEMBER(kb_scan);
@ -97,55 +97,55 @@ public:
DECLARE_READ16_MEMBER(kb_status_r);
DECLARE_WRITE16_MEMBER(kb_irq_clear_w);
DECLARE_WRITE8_MEMBER(pa_w);
DECLARE_WRITE8_MEMBER(pa_w);
private:
required_device<hp_5061_3001_cpu_device> m_lpu;
required_device<hp_5061_3001_cpu_device> m_ppu;
required_device<hp_5061_3001_cpu_device> m_lpu;
required_device<hp_5061_3001_cpu_device> m_ppu;
required_device<palette_device> m_palette;
required_ioport m_io_key0;
required_ioport m_io_key1;
required_ioport m_io_key2;
required_ioport m_io_key3;
void set_video_mar(UINT16 mar);
void video_fill_buff(bool buff_idx);
void video_render_buff(unsigned line_in_row, bool buff_idx);
void set_video_mar(UINT16 mar);
void video_fill_buff(bool buff_idx);
void video_render_buff(unsigned line_in_row, bool buff_idx);
// Character generator
const UINT8 *m_chargen;
// Text mode video I/F
typedef struct {
UINT8 chars[ 80 ];
UINT8 attrs[ 80 ];
bool full;
} video_buffer_t;
// Text mode video I/F
typedef struct {
UINT8 chars[ 80 ];
UINT8 attrs[ 80 ];
bool full;
} video_buffer_t;
bitmap_rgb32 m_bitmap;
unsigned m_video_scanline;
offs_t m_video_mar;
UINT16 m_video_word;
bool m_video_load_mar;
bool m_video_byte_idx;
UINT8 m_video_attr;
bool m_video_buff_idx;
bool m_video_blanked;
UINT8 m_video_frame;
video_buffer_t m_video_buff[ 2 ];
unsigned m_video_scanline;
offs_t m_video_mar;
UINT16 m_video_word;
bool m_video_load_mar;
bool m_video_byte_idx;
UINT8 m_video_attr;
bool m_video_buff_idx;
bool m_video_blanked;
UINT8 m_video_frame;
video_buffer_t m_video_buff[ 2 ];
// Interrupt handling
UINT8 m_irl_pending;
// Interrupt handling
UINT8 m_irl_pending;
// State of keyboard
ioport_value m_kb_state[ 4 ];
UINT8 m_kb_scancode;
UINT16 m_kb_status;
// State of keyboard
ioport_value m_kb_state[ 4 ];
UINT8 m_kb_scancode;
UINT16 m_kb_status;
};
static INPUT_PORTS_START(hp9845b)
// Keyboard is arranged in a 8 x 16 matrix. Of the 128 possible positions, 118 are used.
// Keyboard is arranged in a 8 x 16 matrix. Of the 128 possible positions, 118 are used.
// Keys are mapped on bit b of KEYn
// where b = (row & 1) << 4 + column, n = row >> 1
// column = [0..15]
@ -261,7 +261,7 @@ static INPUT_PORTS_START(hp9845b)
PORT_BIT(BIT_MASK(5) , IP_ACTIVE_HIGH , IPT_UNUSED) // K12
PORT_BIT(BIT_MASK(6) , IP_ACTIVE_HIGH , IPT_UNUSED) // K11
PORT_BIT(BIT_MASK(7) , IP_ACTIVE_HIGH , IPT_UNUSED) // K10
PORT_BIT(BIT_MASK(8) , IP_ACTIVE_HIGH , IPT_UNUSED) // K9
PORT_BIT(BIT_MASK(8) , IP_ACTIVE_HIGH , IPT_UNUSED) // K9
PORT_BIT(BIT_MASK(9) , IP_ACTIVE_HIGH , IPT_UNUSED) // K8
PORT_BIT(BIT_MASK(10) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_0) PORT_CHAR('0') // 0
PORT_BIT(BIT_MASK(11) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_8) PORT_CHAR('8') PORT_CHAR('(') // 8
@ -274,8 +274,8 @@ static INPUT_PORTS_START(hp9845b)
PORT_BIT(BIT_MASK(18) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_F7) PORT_NAME("K7") // K7
PORT_BIT(BIT_MASK(19) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_F6) PORT_NAME("K6") // K6
PORT_BIT(BIT_MASK(20) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_F5) PORT_NAME("K5") // K5
PORT_BIT(BIT_MASK(21) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_F4) PORT_NAME("K4") // K4
PORT_BIT(BIT_MASK(22) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_F3) PORT_NAME("K3") // K3
PORT_BIT(BIT_MASK(21) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_F4) PORT_NAME("K4") // K4
PORT_BIT(BIT_MASK(22) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_F3) PORT_NAME("K3") // K3
PORT_BIT(BIT_MASK(23) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_F2) PORT_NAME("K2") // K2
PORT_BIT(BIT_MASK(24) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_F1) PORT_NAME("K1") // K1
PORT_BIT(BIT_MASK(25) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_ESC) PORT_NAME("K0") // K0
@ -304,290 +304,290 @@ void hp9845b_state::machine_start()
{
machine().first_screen()->register_screen_bitmap(m_bitmap);
m_chargen = memregion("chargen")->base();
m_chargen = memregion("chargen")->base();
}
void hp9845b_state::machine_reset()
{
m_lpu->halt_w(1);
m_ppu->halt_w(0);
m_lpu->halt_w(1);
m_ppu->halt_w(0);
// Some sensible defaults
m_video_mar = VIDEO_BUFFER_BASE;
m_video_load_mar = false;
m_video_byte_idx = false;
m_video_attr = 0;
m_video_buff_idx = false;
m_video_blanked = false;
m_video_frame = 0;
// Some sensible defaults
m_video_mar = VIDEO_BUFFER_BASE;
m_video_load_mar = false;
m_video_byte_idx = false;
m_video_attr = 0;
m_video_buff_idx = false;
m_video_blanked = false;
m_video_frame = 0;
m_irl_pending = 0;
m_irl_pending = 0;
memset(&m_kb_state[ 0 ] , 0 , sizeof(m_kb_state));
m_kb_scancode = 0x7f;
m_kb_status = 0;
memset(&m_kb_state[ 0 ] , 0 , sizeof(m_kb_state));
m_kb_scancode = 0x7f;
m_kb_status = 0;
}
void hp9845b_state::set_video_mar(UINT16 mar)
{
m_video_mar = (mar & 0xfff) | VIDEO_BUFFER_BASE;
m_video_mar = (mar & 0xfff) | VIDEO_BUFFER_BASE;
}
void hp9845b_state::video_fill_buff(bool buff_idx)
{
unsigned char_idx = 0;
unsigned iters = 0;
UINT8 byte;
address_space& prog_space = m_ppu->space(AS_PROGRAM);
unsigned char_idx = 0;
unsigned iters = 0;
UINT8 byte;
address_space& prog_space = m_ppu->space(AS_PROGRAM);
m_video_buff[ buff_idx ].full = false;
m_video_buff[ buff_idx ].full = false;
while (1) {
if (!m_video_byte_idx) {
if (iters++ >= MAX_WORD_PER_ROW) {
// Limit on accesses per row reached
break;
}
m_video_word = prog_space.read_word(m_video_mar << 1);
if (m_video_load_mar) {
// Load new address into MAR after start of a new frame or NWA instruction
// TODO: decode graphic/alpha mode bit
set_video_mar(~m_video_word);
m_video_load_mar = false;
continue;
} else {
// Read normal word from frame buffer, start parsing at MSB
set_video_mar(m_video_mar + 1);
byte = (UINT8)(m_video_word >> 8);
m_video_byte_idx = true;
}
} else {
// Parse LSB
byte = (UINT8)(m_video_word & 0xff);
m_video_byte_idx = false;
}
if ((byte & 0xc0) == 0x80) {
// Attribute command
m_video_attr = byte & 0x1f;
} else if ((byte & 0xc1) == 0xc0) {
// New Word Address (NWA)
m_video_load_mar = true;
m_video_byte_idx = false;
} else if ((byte & 0xc1) == 0xc1) {
// End of line (EOL)
// Fill rest of buffer with spaces
memset(&m_video_buff[ buff_idx ].chars[ char_idx ] , 0x20 , 80 - char_idx);
memset(&m_video_buff[ buff_idx ].attrs[ char_idx ] , m_video_attr , 80 - char_idx);
m_video_buff[ buff_idx ].full = true;
break;
} else {
// Normal character
m_video_buff[ buff_idx ].chars[ char_idx ] = byte;
m_video_buff[ buff_idx ].attrs[ char_idx ] = m_video_attr;
char_idx++;
if (char_idx == 80) {
m_video_buff[ buff_idx ].full = true;
break;
}
}
}
while (1) {
if (!m_video_byte_idx) {
if (iters++ >= MAX_WORD_PER_ROW) {
// Limit on accesses per row reached
break;
}
m_video_word = prog_space.read_word(m_video_mar << 1);
if (m_video_load_mar) {
// Load new address into MAR after start of a new frame or NWA instruction
// TODO: decode graphic/alpha mode bit
set_video_mar(~m_video_word);
m_video_load_mar = false;
continue;
} else {
// Read normal word from frame buffer, start parsing at MSB
set_video_mar(m_video_mar + 1);
byte = (UINT8)(m_video_word >> 8);
m_video_byte_idx = true;
}
} else {
// Parse LSB
byte = (UINT8)(m_video_word & 0xff);
m_video_byte_idx = false;
}
if ((byte & 0xc0) == 0x80) {
// Attribute command
m_video_attr = byte & 0x1f;
} else if ((byte & 0xc1) == 0xc0) {
// New Word Address (NWA)
m_video_load_mar = true;
m_video_byte_idx = false;
} else if ((byte & 0xc1) == 0xc1) {
// End of line (EOL)
// Fill rest of buffer with spaces
memset(&m_video_buff[ buff_idx ].chars[ char_idx ] , 0x20 , 80 - char_idx);
memset(&m_video_buff[ buff_idx ].attrs[ char_idx ] , m_video_attr , 80 - char_idx);
m_video_buff[ buff_idx ].full = true;
break;
} else {
// Normal character
m_video_buff[ buff_idx ].chars[ char_idx ] = byte;
m_video_buff[ buff_idx ].attrs[ char_idx ] = m_video_attr;
char_idx++;
if (char_idx == 80) {
m_video_buff[ buff_idx ].full = true;
break;
}
}
}
}
void hp9845b_state::video_render_buff(unsigned line_in_row, bool buff_idx)
{
if (!m_video_buff[ buff_idx ].full) {
m_video_blanked = true;
}
if (!m_video_buff[ buff_idx ].full) {
m_video_blanked = true;
}
if (m_video_blanked) {
// TODO: blank scanline
} else {
if (m_video_blanked) {
// TODO: blank scanline
} else {
const rgb_t *palette = m_palette->palette()->entry_list_raw();
bool cursor_line = line_in_row == 12;
bool ul_line = line_in_row == 14;
bool cursor_blink = BIT(m_video_frame , 3);
bool char_blink = BIT(m_video_frame , 4);
bool cursor_line = line_in_row == 12;
bool ul_line = line_in_row == 14;
bool cursor_blink = BIT(m_video_frame , 3);
bool char_blink = BIT(m_video_frame , 4);
for (unsigned i = 0; i < 80; i++) {
UINT8 charcode = m_video_buff[ buff_idx ].chars[ i ];
UINT8 attrs = m_video_buff[ buff_idx ].attrs[ i ];
UINT8 chargen_byte = m_chargen[ line_in_row | ((unsigned)charcode << 4) ];
UINT16 pixels;
for (unsigned i = 0; i < 80; i++) {
UINT8 charcode = m_video_buff[ buff_idx ].chars[ i ];
UINT8 attrs = m_video_buff[ buff_idx ].attrs[ i ];
UINT8 chargen_byte = m_chargen[ line_in_row | ((unsigned)charcode << 4) ];
UINT16 pixels;
// TODO: Handle selection of 2nd chargen
// TODO: Check if order of bits in "pixels" is ok
// TODO: Handle selection of 2nd chargen
// TODO: Check if order of bits in "pixels" is ok
if ((ul_line && BIT(attrs , 3)) ||
(cursor_line && cursor_blink && BIT(attrs , 0))) {
pixels = ~0;
} else if (char_blink && BIT(attrs , 2)) {
pixels = 0;
} else {
pixels = (UINT16)(chargen_byte & 0x7f) << 2;
}
if ((ul_line && BIT(attrs , 3)) ||
(cursor_line && cursor_blink && BIT(attrs , 0))) {
pixels = ~0;
} else if (char_blink && BIT(attrs , 2)) {
pixels = 0;
} else {
pixels = (UINT16)(chargen_byte & 0x7f) << 2;
}
if (BIT(attrs , 1)) {
pixels = ~pixels;
}
if (BIT(attrs , 1)) {
pixels = ~pixels;
}
for (unsigned j = 0; j < 9; j++) {
bool pixel = (pixels & (1U << (8 - j))) != 0;
for (unsigned j = 0; j < 9; j++) {
bool pixel = (pixels & (1U << (8 - j))) != 0;
m_bitmap.pix32(m_video_scanline , i * 9 + j) = palette[ pixel ? 1 : 0 ];
}
}
}
m_bitmap.pix32(m_video_scanline , i * 9 + j) = palette[ pixel ? 1 : 0 ];
}
}
}
}
TIMER_DEVICE_CALLBACK_MEMBER(hp9845b_state::scanline_timer)
{
m_video_scanline = param;
m_video_scanline = param;
if (m_video_scanline < VIDEO_ACTIVE_SCANLINES) {
unsigned row = m_video_scanline / 15;
unsigned line_in_row = m_video_scanline - row * 15;
if (m_video_scanline < VIDEO_ACTIVE_SCANLINES) {
unsigned row = m_video_scanline / 15;
unsigned line_in_row = m_video_scanline - row * 15;
if (line_in_row == 0) {
// Start of new row, swap buffers
m_video_buff_idx = !m_video_buff_idx;
video_fill_buff(!m_video_buff_idx);
}
if (line_in_row == 0) {
// Start of new row, swap buffers
m_video_buff_idx = !m_video_buff_idx;
video_fill_buff(!m_video_buff_idx);
}
video_render_buff(line_in_row , m_video_buff_idx);
}
video_render_buff(line_in_row , m_video_buff_idx);
}
}
void hp9845b_state::vblank_w(screen_device &screen, bool state)
{
// VBlank signal is fed into HALT flag of PPU
m_ppu->halt_w(state);
// VBlank signal is fed into HALT flag of PPU
m_ppu->halt_w(state);
if (state) {
// Start of V blank
set_video_mar(0);
m_video_load_mar = true;
m_video_byte_idx = false;
m_video_blanked = false;
m_video_frame++;
m_video_buff_idx = !m_video_buff_idx;
video_fill_buff(!m_video_buff_idx);
}
if (state) {
// Start of V blank
set_video_mar(0);
m_video_load_mar = true;
m_video_byte_idx = false;
m_video_blanked = false;
m_video_frame++;
m_video_buff_idx = !m_video_buff_idx;
video_fill_buff(!m_video_buff_idx);
}
}
IRQ_CALLBACK_MEMBER(hp9845b_state::irq_callback)
{
if (irqline == HPHYBRID_IRL) {
return m_irl_pending;
} else {
return 0;
}
if (irqline == HPHYBRID_IRL) {
return m_irl_pending;
} else {
return 0;
}
}
void hp9845b_state::update_irl(void)
{
m_ppu->set_input_line(HPHYBRID_IRL , m_irl_pending != 0);
m_ppu->set_input_line(HPHYBRID_IRL , m_irl_pending != 0);
}
TIMER_DEVICE_CALLBACK_MEMBER(hp9845b_state::kb_scan)
{
ioport_value input[ 4 ];
input[ 0 ] = m_io_key0->read();
input[ 1 ] = m_io_key1->read();
input[ 2 ] = m_io_key2->read();
input[ 3 ] = m_io_key3->read();
ioport_value input[ 4 ];
input[ 0 ] = m_io_key0->read();
input[ 1 ] = m_io_key1->read();
input[ 2 ] = m_io_key2->read();
input[ 3 ] = m_io_key3->read();
// Set status bits for "shift", "control", "auto start" & "print all" keys
// ** Print all **
// (R,C) = (0,1)
// Bit 12 in kb status
if (BIT(input[ 0 ] , 1)) {
BIT_SET(m_kb_status , 12);
BIT_CLR(input[ 0 ] , 1);
} else {
BIT_CLR(m_kb_status, 12);
}
// ** Auto start **
// (R,C) = (1,1)
// Bit 13 in kb status
if (BIT(input[ 0 ] , 17)) {
BIT_SET(m_kb_status , 13);
BIT_CLR(input[ 0 ] , 17);
} else {
BIT_CLR(m_kb_status, 13);
}
// ** Control **
// (R,C) = (4,15)
// Bit 14 in kb status
if (BIT(input[ 2 ] , 15)) {
BIT_SET(m_kb_status , 14);
BIT_CLR(input[ 2 ] , 15);
} else {
BIT_CLR(m_kb_status, 14);
}
// ** Shift **
// (R,C) = (0,15)
// Bit 15 in kb status
if (BIT(input[ 0 ] , 15)) {
BIT_SET(m_kb_status , 15);
BIT_CLR(input[ 0 ] , 15);
} else {
BIT_CLR(m_kb_status, 15);
}
// Set status bits for "shift", "control", "auto start" & "print all" keys
// ** Print all **
// (R,C) = (0,1)
// Bit 12 in kb status
if (BIT(input[ 0 ] , 1)) {
BIT_SET(m_kb_status , 12);
BIT_CLR(input[ 0 ] , 1);
} else {
BIT_CLR(m_kb_status, 12);
}
// ** Auto start **
// (R,C) = (1,1)
// Bit 13 in kb status
if (BIT(input[ 0 ] , 17)) {
BIT_SET(m_kb_status , 13);
BIT_CLR(input[ 0 ] , 17);
} else {
BIT_CLR(m_kb_status, 13);
}
// ** Control **
// (R,C) = (4,15)
// Bit 14 in kb status
if (BIT(input[ 2 ] , 15)) {
BIT_SET(m_kb_status , 14);
BIT_CLR(input[ 2 ] , 15);
} else {
BIT_CLR(m_kb_status, 14);
}
// ** Shift **
// (R,C) = (0,15)
// Bit 15 in kb status
if (BIT(input[ 0 ] , 15)) {
BIT_SET(m_kb_status , 15);
BIT_CLR(input[ 0 ] , 15);
} else {
BIT_CLR(m_kb_status, 15);
}
// TODO: handle repeat key
// TODO: handle ctrl+stop
// TODO: handle repeat key
// TODO: handle ctrl+stop
for (unsigned i = 0; i < 128; i++) {
ioport_value mask = BIT_MASK(i & 0x1f);
unsigned idx = i >> 5;
for (unsigned i = 0; i < 128; i++) {
ioport_value mask = BIT_MASK(i & 0x1f);
unsigned idx = i >> 5;
if ((input[ idx ] & ~m_kb_state[ idx ]) & mask) {
// Key pressed, store scancode & generate IRL
m_kb_scancode = i;
BIT_SET(m_irl_pending , 0);
BIT_SET(m_kb_status, 0);
update_irl();
if ((input[ idx ] & ~m_kb_state[ idx ]) & mask) {
// Key pressed, store scancode & generate IRL
m_kb_scancode = i;
BIT_SET(m_irl_pending , 0);
BIT_SET(m_kb_status, 0);
update_irl();
// Special case: pressing stop key sets LPU "status" flag
if (i == 0x47) {
m_lpu->status_w(1);
}
}
}
// Special case: pressing stop key sets LPU "status" flag
if (i == 0x47) {
m_lpu->status_w(1);
}
}
}
memcpy(&m_kb_state[ 0 ] , &input[ 0 ] , sizeof(m_kb_state));
memcpy(&m_kb_state[ 0 ] , &input[ 0 ] , sizeof(m_kb_state));
}
READ16_MEMBER(hp9845b_state::kb_scancode_r)
{
return ~m_kb_scancode & 0x7f;
return ~m_kb_scancode & 0x7f;
}
READ16_MEMBER(hp9845b_state::kb_status_r)
{
return m_kb_status;
return m_kb_status;
}
WRITE16_MEMBER(hp9845b_state::kb_irq_clear_w)
{
BIT_CLR(m_irl_pending , 0);
BIT_CLR(m_kb_status, 0);
update_irl();
m_lpu->status_w(0);
// TODO: beeper start
BIT_CLR(m_irl_pending , 0);
BIT_CLR(m_kb_status, 0);
update_irl();
m_lpu->status_w(0);
// TODO: beeper start
}
WRITE8_MEMBER(hp9845b_state::pa_w)
{
// TODO: handle sts & flg
if (data == 0xf) {
// RHS tape drive (T15)
m_ppu->status_w(1);
m_ppu->flag_w(1);
} else {
m_ppu->status_w(0);
m_ppu->flag_w(0);
}
// TODO: handle sts & flg
if (data == 0xf) {
// RHS tape drive (T15)
m_ppu->status_w(1);
m_ppu->flag_w(1);
} else {
m_ppu->status_w(0);
m_ppu->flag_w(0);
}
}
static MACHINE_CONFIG_START( hp9845a, hp9845_state )
@ -621,41 +621,41 @@ static MACHINE_CONFIG_START( hp9835a, hp9845_state )
MACHINE_CONFIG_END
static ADDRESS_MAP_START(global_mem_map , AS_PROGRAM , 16 , hp9845b_state)
ADDRESS_MAP_GLOBAL_MASK(0x3f7fff)
ADDRESS_MAP_UNMAP_LOW
AM_RANGE(0x000000 , 0x007fff) AM_RAM AM_SHARE("lpu_ram")
AM_RANGE(0x014000 , 0x017fff) AM_RAM AM_SHARE("ppu_ram")
AM_RANGE(0x030000 , 0x037fff) AM_ROM AM_REGION("lpu" , 0)
AM_RANGE(0x050000 , 0x057fff) AM_ROM AM_REGION("ppu" , 0)
//AM_RANGE(0x250000 , 0x251fff) AM_ROM AM_REGION("test_rom" , 0)
ADDRESS_MAP_GLOBAL_MASK(0x3f7fff)
ADDRESS_MAP_UNMAP_LOW
AM_RANGE(0x000000 , 0x007fff) AM_RAM AM_SHARE("lpu_ram")
AM_RANGE(0x014000 , 0x017fff) AM_RAM AM_SHARE("ppu_ram")
AM_RANGE(0x030000 , 0x037fff) AM_ROM AM_REGION("lpu" , 0)
AM_RANGE(0x050000 , 0x057fff) AM_ROM AM_REGION("ppu" , 0)
//AM_RANGE(0x250000 , 0x251fff) AM_ROM AM_REGION("test_rom" , 0)
ADDRESS_MAP_END
static ADDRESS_MAP_START(ppu_io_map , AS_IO , 16 , hp9845b_state)
ADDRESS_MAP_UNMAP_LOW
// PA = 0, IC = 2
// Keyboard scancode input
AM_RANGE(HP_MAKE_IOADDR(0 , 2) , HP_MAKE_IOADDR(0 , 2)) AM_READ(kb_scancode_r)
// PA = 0, IC = 3
// Keyboard status input & keyboard interrupt clear
AM_RANGE(HP_MAKE_IOADDR(0 , 3) , HP_MAKE_IOADDR(0 , 3)) AM_READWRITE(kb_status_r , kb_irq_clear_w)
ADDRESS_MAP_UNMAP_LOW
// PA = 0, IC = 2
// Keyboard scancode input
AM_RANGE(HP_MAKE_IOADDR(0 , 2) , HP_MAKE_IOADDR(0 , 2)) AM_READ(kb_scancode_r)
// PA = 0, IC = 3
// Keyboard status input & keyboard interrupt clear
AM_RANGE(HP_MAKE_IOADDR(0 , 3) , HP_MAKE_IOADDR(0 , 3)) AM_READWRITE(kb_status_r , kb_irq_clear_w)
ADDRESS_MAP_END
static MACHINE_CONFIG_START( hp9845b, hp9845b_state )
MCFG_CPU_ADD("lpu", HP_5061_3001, 5700000)
MCFG_CPU_PROGRAM_MAP(global_mem_map)
MCFG_HPHYBRID_SET_9845_BOOT(true)
MCFG_CPU_PROGRAM_MAP(global_mem_map)
MCFG_HPHYBRID_SET_9845_BOOT(true)
MCFG_CPU_ADD("ppu", HP_5061_3001, 5700000)
MCFG_CPU_PROGRAM_MAP(global_mem_map)
MCFG_CPU_PROGRAM_MAP(global_mem_map)
MCFG_CPU_IO_MAP(ppu_io_map)
MCFG_HPHYBRID_SET_9845_BOOT(true)
MCFG_HPHYBRID_SET_9845_BOOT(true)
MCFG_CPU_IRQ_ACKNOWLEDGE_DRIVER(hp9845b_state , irq_callback)
MCFG_HPHYBRID_PA_CHANGED(WRITE8(hp9845b_state , pa_w))
MCFG_HPHYBRID_PA_CHANGED(WRITE8(hp9845b_state , pa_w))
// video hardware
MCFG_SCREEN_ADD("screen", RASTER)
MCFG_SCREEN_UPDATE_DRIVER(hp9845b_state, screen_update)
MCFG_SCREEN_RAW_PARAMS(20849400 , 99 * 9 , 0 , 80 * 9 , 26 * 15 , 0 , 25 * 15)
MCFG_SCREEN_VBLANK_DRIVER(hp9845b_state, vblank_w)
MCFG_SCREEN_RAW_PARAMS(20849400 , 99 * 9 , 0 , 80 * 9 , 26 * 15 , 0 , 25 * 15)
MCFG_SCREEN_VBLANK_DRIVER(hp9845b_state, vblank_w)
MCFG_PALETTE_ADD_MONOCHROME_GREEN("palette")
MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", hp9845b_state, scanline_timer, "screen", 0, 1)
@ -663,7 +663,7 @@ static MACHINE_CONFIG_START( hp9845b, hp9845b_state )
// Actual keyboard refresh rate should be KEY_SCAN_OSCILLATOR / 128 (2560 Hz)
MCFG_TIMER_DRIVER_ADD_PERIODIC("kb_timer" , hp9845b_state , kb_scan , attotime::from_hz(100))
MCFG_SOFTWARE_LIST_ADD("optrom_list", "hp9845b_rom")
MCFG_SOFTWARE_LIST_ADD("optrom_list", "hp9845b_rom")
MACHINE_CONFIG_END
ROM_START( hp9845a )
@ -699,19 +699,19 @@ ROM_END
#define rom_hp9835b rom_hp9835a
ROM_START( hp9845b )
ROM_REGION(0x4000 , "test_rom" , ROMREGION_16BIT | ROMREGION_BE)
ROM_LOAD("09845-66520-45_00-Test_ROM.bin" , 0x0000 , 0x2000 , CRC(95a5b299))
ROM_LOAD("09845-66520-45_10-Test_ROM.bin" , 0x2000 , 0x2000 , CRC(257e4c66))
ROM_REGION(0x4000 , "test_rom" , ROMREGION_16BIT | ROMREGION_BE)
ROM_LOAD("09845-66520-45_00-Test_ROM.bin" , 0x0000 , 0x2000 , CRC(95a5b299))
ROM_LOAD("09845-66520-45_10-Test_ROM.bin" , 0x2000 , 0x2000 , CRC(257e4c66))
ROM_REGION(0x800 , "chargen" , 0)
// Don't have the real character generator from HP9845, use the one from HP64000 for now
// Don't have the real character generator from HP9845, use the one from HP64000 for now
ROM_LOAD("1818_2668.bin" , 0 , 0x800 , BAD_DUMP CRC(32a52664) SHA1(8b2a49a32510103ff424e8481d5ed9887f609f2f))
ROM_REGION(0x10000, "lpu", ROMREGION_16BIT | ROMREGION_BE)
ROM_LOAD("9845-LPU-Standard-Processor.bin", 0, 0x10000, CRC(dc266c1b) SHA1(1cf3267f13872fbbfc035b70f8b4ec6b5923f182))
ROM_REGION(0x10000, "lpu", ROMREGION_16BIT | ROMREGION_BE)
ROM_LOAD("9845-LPU-Standard-Processor.bin", 0, 0x10000, CRC(dc266c1b) SHA1(1cf3267f13872fbbfc035b70f8b4ec6b5923f182))
ROM_REGION(0x10000, "ppu", ROMREGION_16BIT | ROMREGION_BE)
ROM_LOAD("9845-PPU-Standard-Graphics.bin", 0, 0x10000, CRC(f866510f) SHA1(3e22cd2072e3a5f3603a1eb8477b6b4a198d184d))
ROM_REGION(0x10000, "ppu", ROMREGION_16BIT | ROMREGION_BE)
ROM_LOAD("9845-PPU-Standard-Graphics.bin", 0, 0x10000, CRC(f866510f) SHA1(3e22cd2072e3a5f3603a1eb8477b6b4a198d184d))
#if 0
ROM_REGION( 0200000, "lpu", ROMREGION_16BIT | ROMREGION_BE )

11
src/mame/drivers/ice_bozopail.cpp
View File

@ -24,13 +24,13 @@ class ice_bozopail : public driver_device
public:
ice_bozopail(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag)
// ,m_maincpu(*this, "maincpu")
// ,m_maincpu(*this, "maincpu")
{ }
virtual void machine_start() override;
virtual void machine_reset() override;
// required_device<mcs51_cpu_device> m_maincpu;
// required_device<mcs51_cpu_device> m_maincpu;
};
static INPUT_PORTS_START( ice_bozoice_bozo )
@ -50,9 +50,9 @@ void ice_bozopail::machine_reset()
static MACHINE_CONFIG_START( ice_bozoice_bozo, ice_bozopail )
/* basic machine hardware */
// MCFG_CPU_ADD("maincpu", ??, 8000000) // unknown
// MCFG_CPU_PROGRAM_MAP(ice_bozoice_bozo_map)
// MCFG_CPU_IO_MAP(ice_bozoice_bozo_io)
// MCFG_CPU_ADD("maincpu", ??, 8000000) // unknown
// MCFG_CPU_PROGRAM_MAP(ice_bozoice_bozo_map)
// MCFG_CPU_IO_MAP(ice_bozoice_bozo_io)
/* sound hardware */
MCFG_SPEAKER_STANDARD_MONO("mono")
@ -67,4 +67,3 @@ ROM_START( ice_bozo )
ROM_END
GAME( 1997?, ice_bozo, 0, ice_bozoice_bozo, ice_bozoice_bozo, driver_device, 0, ROT0, "Innovative Creations in Entertainment", "Bozo's Pail Toss (v2.07)", MACHINE_IS_SKELETON_MECHANICAL )

4
src/mame/drivers/indigo.cpp
View File

@ -639,5 +639,5 @@ ROM_START( indigo4k )
ROM_END
/* YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME */
COMP( 1991, indigo3k, 0, 0, indigo3k, indigo, driver_device, 0, "Silicon Graphics Inc", "IRIS Indigo (R3000, 33MHz)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND )
COMP( 1993, indigo4k, 0, 0, indigo4k, indigo, driver_device, 0, "Silicon Graphics Inc", "IRIS Indigo (R4400, 150MHz, Ver. 4.0.5D Rev A)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND )
COMP( 1991, indigo3k, 0, 0, indigo3k, indigo, driver_device, 0, "Silicon Graphics Inc", "IRIS Indigo (R3000, 33MHz)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND )
COMP( 1993, indigo4k, 0, 0, indigo4k, indigo, driver_device, 0, "Silicon Graphics Inc", "IRIS Indigo (R4400, 150MHz, Ver. 4.0.5D Rev A)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND )

2
src/mame/drivers/jalmah.cpp
View File

@ -37,7 +37,7 @@ TODO:
a match in particular circumstances because there's a write in the 94000-9bfff region;
-Massive clean-ups needed for the MCU snippet programs and the input-ports, also check if
the programs are actually into the m68k program itself (like hachamf/tdragon/ddealer);
-Video code could be optimized too (for example by calling the priority function only when
-Video code could be optimized too (for example by calling the priority function only when
priority number is updated), might also need a merging with Jaleco Mega System 1/NMK16 drivers;
Notes (1st MCU ver.):

10
src/mame/drivers/klax.cpp
View File

@ -98,7 +98,7 @@ static ADDRESS_MAP_START( klax2bl_map, AS_PROGRAM, 16, klax_state )
AM_RANGE(0x1f0000, 0x1fffff) AM_DEVWRITE("eeprom", atari_eeprom_device, unlock_write)
AM_RANGE(0x260000, 0x260001) AM_READ_PORT("P1") AM_WRITE(klax_latch_w)
AM_RANGE(0x260002, 0x260003) AM_READ_PORT("P2")
// AM_RANGE(0x270000, 0x270001) AM_DEVREADWRITE8("oki", okim6295_device, read, write, 0x00ff) // no OKI here
// AM_RANGE(0x270000, 0x270001) AM_DEVREADWRITE8("oki", okim6295_device, read, write, 0x00ff) // no OKI here
AM_RANGE(0x2e0000, 0x2e0001) AM_WRITE(watchdog_reset16_w)
AM_RANGE(0x360000, 0x360001) AM_WRITE(interrupt_ack_w)
AM_RANGE(0x3e0000, 0x3e07ff) AM_DEVREADWRITE8("palette", palette_device, read, write, 0xff00) AM_SHARE("palette")
@ -237,14 +237,14 @@ static MACHINE_CONFIG_DERIVED( klax2bl, klax )
MCFG_CPU_ADD("audiocpu", Z80, 6000000) /* ? */
MCFG_CPU_PROGRAM_MAP(bootleg_sound_map)
MCFG_GFXDECODE_MODIFY("gfxdecode", klax2bl)
// guess, probably something like this
MCFG_SOUND_ADD("msm", MSM5205, 375000) /* ? */
// MCFG_MSM5205_VCLK_CB(WRITELINE(klax_state, m5205_int1)) /* interrupt function */
// MCFG_MSM5205_PRESCALER_SELECTOR(MSM5205_S96_4B) /* 4KHz 4-bit */
// MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.25)
// MCFG_MSM5205_VCLK_CB(WRITELINE(klax_state, m5205_int1)) /* interrupt function */
// MCFG_MSM5205_PRESCALER_SELECTOR(MSM5205_S96_4B) /* 4KHz 4-bit */
// MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.25)
MACHINE_CONFIG_END

36
src/mame/drivers/konamigx.cpp
View File

@ -108,7 +108,7 @@
// TODO: check on PCB
#define MASTER_CLOCK XTAL_24MHz
#define SUB_CLOCK XTAL_16MHz
#define SUB_CLOCK XTAL_16MHz
/**********************************************************************************/
/*
@ -221,7 +221,7 @@ void konamigx_state::generate_sprites(address_space &space, UINT32 src, UINT32 s
UINT16 color_set = 0x0000;
UINT16 color_rotate = 0x0000;
UINT16 v;
v = space.read_word(adr+24);
if(v & 0x8000) {
color_mask = 0xf3ff;
@ -250,7 +250,7 @@ void konamigx_state::generate_sprites(address_space &space, UINT32 src, UINT32 s
zoom_x = 0x40;
if(!zoom_y)
zoom_y = 0x40;
if(set >= 0x200000 && set < 0xd00000)
{
UINT16 count2 = space.read_word(set);
@ -262,7 +262,7 @@ void konamigx_state::generate_sprites(address_space &space, UINT32 src, UINT32 s
UINT16 col = space.read_word(set+4);
short y = space.read_word(set+6);
short x = space.read_word(set+8);
if(idx == 0xffff) {
set = (flip<<16) | col;
if(set >= 0x200000 && set < 0xd00000)
@ -504,11 +504,11 @@ WRITE32_MEMBER(konamigx_state::eeprom_w)
}
WRITE32_MEMBER(konamigx_state::control_w)
{
{
// TODO: derive from reported PCB XTALs
const UINT32 pixclock[4] = { XTAL_6MHz, XTAL_8MHz, XTAL_12MHz, XTAL_16MHz};
//logerror("write %x to control register (mask=%x)\n", data, mem_mask);
// known controls:
// bit 23 = reset graphics chips
// bit 22 = 0 to halt 68000, 1 to let it run (SOUNDRESET)
@ -545,7 +545,7 @@ WRITE32_MEMBER(konamigx_state::control_w)
m_k055673->k053246_set_objcha_line((data&0x100000) ? ASSERT_LINE : CLEAR_LINE);
m_gx_wrport2 = (data>>16)&0xff;
if(m_prev_pixel_clock != (m_gx_wrport2 & 3))
{
m_k053252->set_unscaled_clock(pixclock[m_gx_wrport2 & 3]);
@ -598,7 +598,7 @@ TIMER_CALLBACK_MEMBER(konamigx_state::dmaend_callback)
void konamigx_state::dmastart_callback(int data)
{
int sprite_timing;
// raise the DMA busy flag
// TODO: is it supposed to raise even if DMA is disabled?
m_gx_rdport1_3 |= 2;
@ -648,7 +648,7 @@ INTERRUPT_GEN_MEMBER(konamigx_state::konamigx_type2_vblank_irq)
TIMER_DEVICE_CALLBACK_MEMBER(konamigx_state::konamigx_type2_scanline)
{
int scanline = param;
if(scanline == 48)
{
if (m_gx_syncen & 0x40)
@ -1725,7 +1725,7 @@ static MACHINE_CONFIG_DERIVED( dragoonj, konamigx )
MCFG_DEVICE_MODIFY("k053252")
MCFG_K053252_OFFSETS(24+16, 16)
MCFG_DEVICE_MODIFY("k056832")
MCFG_K056832_CONFIG("gfx1", 0, K056832_BPP_5, 1, 0, "none")
@ -1791,7 +1791,7 @@ static MACHINE_CONFIG_DERIVED( racinfrc, konamigx )
MCFG_DEVICE_MODIFY("k053252")
MCFG_K053252_OFFSETS(24-8+16, 0)
MCFG_DEVICE_MODIFY("k056832")
MCFG_K056832_CONFIG("gfx1", 0, K056832_BPP_6, 0, 0, "none")
@ -1814,7 +1814,7 @@ static MACHINE_CONFIG_DERIVED( gxtype3, konamigx )
MCFG_DEFAULT_LAYOUT(layout_dualhsxs)
MCFG_VIDEO_START_OVERRIDE(konamigx_state, konamigx_type3)
MCFG_DEVICE_MODIFY("k053252")
MCFG_K053252_OFFSETS(0, 16)
MCFG_K053252_SET_SLAVE_SCREEN("screen2")
@ -1879,7 +1879,7 @@ static MACHINE_CONFIG_DERIVED( gxtype4, konamigx )
MCFG_K053252_OFFSETS(0, 16)
MCFG_K053252_SET_SLAVE_SCREEN("screen2")
MCFG_DEVICE_MODIFY("k056832")
MCFG_K056832_CONFIG("gfx1", 0, K056832_BPP_8, 0, 0, "none")
@ -1896,8 +1896,8 @@ static MACHINE_CONFIG_DERIVED( gxtype4_vsn, gxtype4 )
MCFG_DEVICE_MODIFY("k053252")
MCFG_K053252_OFFSETS(0, 16)
MCFG_SCREEN_MODIFY("screen2")
MCFG_SCREEN_SIZE(1024, 1024)
MCFG_SCREEN_VISIBLE_AREA(0, 576-1, 16, 32*8-1-16)
@ -1924,7 +1924,7 @@ static MACHINE_CONFIG_DERIVED( winspike, konamigx )
MCFG_DEVICE_MODIFY("k053252")
MCFG_K053252_OFFSETS(24+15, 16)
MCFG_DEVICE_MODIFY("k056832")
MCFG_K056832_CB(konamigx_state, alpha_tile_callback)
MCFG_K056832_CONFIG("gfx1", 0, K056832_BPP_8, 0, 2, "none")
@ -3724,7 +3724,7 @@ MACHINE_RESET_MEMBER(konamigx_state,konamigx)
m_gx_syncen = 0;
m_suspension_active = 0;
m_prev_pixel_clock = 0xff;
// Hold sound CPUs in reset
m_soundcpu->set_input_line(INPUT_LINE_HALT, ASSERT_LINE);
m_soundcpu->set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
@ -3928,7 +3928,7 @@ DRIVER_INIT_MEMBER(konamigx_state,posthack)
/* year ROM parent machine inp init */
/* dummy parent for the BIOS */
GAME( 1994, konamigx, 0, konamigx_bios, konamigx, konamigx_state, konamigx, ROT0, "Konami", "System GX", MACHINE_IS_BIOS_ROOT )
GAME( 1994, konamigx, 0, konamigx_bios, konamigx, konamigx_state, konamigx, ROT0, "Konami", "System GX", MACHINE_IS_BIOS_ROOT )
/* --------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/
/* Type 1: standard with an add-on 53936 on the ROM board, analog inputs, */

15
src/mame/drivers/laz_aftrshok.cpp
View File

@ -11,9 +11,9 @@ devices are 27c512
--------------------------
file Aftrshk.upd is the updated eprom for an update version.
The update version uses a small (appx 2" x 4" ) pcb to turn on
The update version uses a small (appx 2" x 4" ) pcb to turn on
the playfield motor. If you don't have this small pcb, then don't use
this .upd version software. The small pcb is numbered
this .upd version software. The small pcb is numbered
"pcb100067"
"Lazer Tron driver pcb V.02"
@ -38,13 +38,13 @@ class aftrshok_state : public driver_device
public:
aftrshok_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag)
// ,m_maincpu(*this, "maincpu")
// ,m_maincpu(*this, "maincpu")
{ }
virtual void machine_start() override;
virtual void machine_reset() override;
// required_device<mcs51_cpu_device> m_maincpu;
// required_device<mcs51_cpu_device> m_maincpu;
};
static INPUT_PORTS_START( aftrshok )
@ -64,9 +64,9 @@ void aftrshok_state::machine_reset()
static MACHINE_CONFIG_START( aftrshok, aftrshok_state )
/* basic machine hardware */
// MCFG_CPU_ADD("maincpu", ??, 8000000) // unknown
// MCFG_CPU_PROGRAM_MAP(aftrshok_map)
// MCFG_CPU_IO_MAP(aftrshok_io)
// MCFG_CPU_ADD("maincpu", ??, 8000000) // unknown
// MCFG_CPU_PROGRAM_MAP(aftrshok_map)
// MCFG_CPU_IO_MAP(aftrshok_io)
// MCFG_CPU_VBLANK_INT_DRIVER("screen", aftrshok_state, irq0_line_hold)
/* sound hardware */
@ -101,4 +101,3 @@ ROM_END
GAME( 19??, aftrshok, 0, aftrshok, aftrshok, driver_device, 0, ROT0, "Lazer-tron", "After Shock (Lazer-tron, set 1)", MACHINE_IS_SKELETON_MECHANICAL )
GAME( 19??, aftrshoka, aftrshok, aftrshok, aftrshok, driver_device, 0, ROT0, "Lazer-tron", "After Shock (Lazer-tron, set 2)", MACHINE_IS_SKELETON_MECHANICAL )

13
src/mame/drivers/laz_awetoss.cpp
View File

@ -18,13 +18,13 @@ class awetoss_state : public driver_device
public:
awetoss_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag)
// ,m_maincpu(*this, "maincpu")
// ,m_maincpu(*this, "maincpu")
{ }
virtual void machine_start() override;
virtual void machine_reset() override;
// required_device<mcs51_cpu_device> m_maincpu;
// required_device<mcs51_cpu_device> m_maincpu;
};
static INPUT_PORTS_START( awetoss )
@ -44,9 +44,9 @@ void awetoss_state::machine_reset()
static MACHINE_CONFIG_START( awetoss, awetoss_state )
/* basic machine hardware */
// MCFG_CPU_ADD("maincpu", ??, 8000000) // unknown
// MCFG_CPU_PROGRAM_MAP(awetoss_map)
// MCFG_CPU_IO_MAP(awetoss_io)
// MCFG_CPU_ADD("maincpu", ??, 8000000) // unknown
// MCFG_CPU_PROGRAM_MAP(awetoss_map)
// MCFG_CPU_IO_MAP(awetoss_io)
// MCFG_CPU_VBLANK_INT_DRIVER("screen", awetoss_state, irq0_line_hold)
/* sound hardware */
@ -77,8 +77,7 @@ ROM_START( awetoss )
ROM_LOAD( "AWSMTOSS.U14", 0x00000, 0x10000, CRC(6217daaf) SHA1(3036e7f941f787374ef130d3ae6d57813d9e9aac) )
ROM_LOAD( "AWSMTOSS.U13", 0x10000, 0x10000, CRC(4ed3c827) SHA1(761d2796d4f40deeb2caa61c4a9c56ced156084b) )
ROM_LOAD( "AWSMTOSS.U12", 0x20000, 0x10000, CRC(9ddf6dd9) SHA1(c115828ab261ae6d83cb500057313c3a5570b4b0) )
ROM_LOAD( "AWSMTOSS.U11", 0x30000, 0x10000, CRC(8ae9d4f0) SHA1(58d1d8972c8e4c9a7c63e9d63e267ea81515d22a) )
ROM_LOAD( "AWSMTOSS.U11", 0x30000, 0x10000, CRC(8ae9d4f0) SHA1(58d1d8972c8e4c9a7c63e9d63e267ea81515d22a) )
ROM_END
GAME( 19??, awetoss, 0, awetoss, awetoss, driver_device, 0, ROT0, "Lazer-tron", "Awesome Toss'em (Lazer-tron)", MACHINE_IS_SKELETON_MECHANICAL )

11
src/mame/drivers/laz_ribrac.cpp
View File

@ -22,13 +22,13 @@ class laz_ribrac_state : public driver_device
public:
laz_ribrac_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag)
// ,m_maincpu(*this, "maincpu")
// ,m_maincpu(*this, "maincpu")
{ }
virtual void machine_start() override;
virtual void machine_reset() override;
// required_device<mcs51_cpu_device> m_maincpu;
// required_device<mcs51_cpu_device> m_maincpu;
};
static INPUT_PORTS_START( laz_ribrac )
@ -48,9 +48,9 @@ void laz_ribrac_state::machine_reset()
static MACHINE_CONFIG_START( laz_ribrac, laz_ribrac_state )
/* basic machine hardware */
// MCFG_CPU_ADD("maincpu", ??, 8000000) // unknown
// MCFG_CPU_PROGRAM_MAP(laz_ribrac_map)
// MCFG_CPU_IO_MAP(laz_ribrac_io)
// MCFG_CPU_ADD("maincpu", ??, 8000000) // unknown
// MCFG_CPU_PROGRAM_MAP(laz_ribrac_map)
// MCFG_CPU_IO_MAP(laz_ribrac_io)
/* sound hardware */
MCFG_SPEAKER_STANDARD_MONO("mono")
@ -79,4 +79,3 @@ ROM_START( ribrac )
ROM_END
GAME( 1993, ribrac, 0, laz_ribrac, laz_ribrac, driver_device, 0, ROT0, "Lazer-tron", "Ribbit Racing (Lazer-tron)", MACHINE_IS_SKELETON_MECHANICAL )

2
src/mame/drivers/lethal.cpp
View File

@ -731,7 +731,7 @@ ROM_START( lethalenj ) // Japan version JAD
ROM_LOAD( "lethalenj.nv", 0x0000, 0x0080, CRC(20b28f2f) SHA1(53d212f2c006729a01dfdb49cb36b67b9425172e) )
ROM_END
ROM_START( lethaleneaa ) // Euro ver. EAA
ROM_START( lethaleneaa ) // Euro ver. EAA
ROM_REGION( 0x40000, "maincpu", 0 ) /* main program */
ROM_LOAD( "191_a01.u4", 0x00000, 0x40000, CRC(c6f4d712) SHA1(92938b823f057b5185a2ada7878efa4bf7e6c682) ) // handwritten label

8
src/mame/drivers/mac.cpp
View File

@ -2305,10 +2305,10 @@ ROM_END
ROM_START( maciici )
ROM_REGION32_BE(0x80000, "bootrom", 0)
ROM_LOAD32_BYTE( "341-0736.um12", 0x000000, 0x020000, CRC(7a1906e6) SHA1(3e39c80b52f40798502fcbdfc97b315545c4c4d3) )
ROM_LOAD32_BYTE( "341-0735.um11", 0x000001, 0x020000, CRC(a8942189) SHA1(be9f653cab04c304d7ee8d4ec312c23ff5d47efc) )
ROM_LOAD32_BYTE( "342-0734.um10", 0x000002, 0x020000, CRC(07f56402) SHA1(e11ca97181faf26cd0d05bd639d65998805c7822) )
ROM_LOAD32_BYTE( "342-0733.um9", 0x000003, 0x020000, CRC(20c28451) SHA1(fecf849c9ac9717c18c13184e24a471888028e46) )
ROM_LOAD32_BYTE( "341-0736.um12", 0x000000, 0x020000, CRC(7a1906e6) SHA1(3e39c80b52f40798502fcbdfc97b315545c4c4d3) )
ROM_LOAD32_BYTE( "341-0735.um11", 0x000001, 0x020000, CRC(a8942189) SHA1(be9f653cab04c304d7ee8d4ec312c23ff5d47efc) )
ROM_LOAD32_BYTE( "342-0734.um10", 0x000002, 0x020000, CRC(07f56402) SHA1(e11ca97181faf26cd0d05bd639d65998805c7822) )
ROM_LOAD32_BYTE( "342-0733.um9", 0x000003, 0x020000, CRC(20c28451) SHA1(fecf849c9ac9717c18c13184e24a471888028e46) )
ROM_END
ROM_START( maciisi )

4
src/mame/drivers/megadriv.cpp
View File

@ -280,7 +280,7 @@ void md_cons_state::install_cartslot()
m_maincpu->space(AS_PROGRAM).install_readwrite_handler(0x000000, 0x7fffff, read16_delegate(FUNC(base_md_cart_slot_device::read),(base_md_cart_slot_device*)m_cart), write16_delegate(FUNC(base_md_cart_slot_device::write),(base_md_cart_slot_device*)m_cart));
m_maincpu->space(AS_PROGRAM).install_readwrite_handler(0xa13000, 0xa130ff, read16_delegate(FUNC(base_md_cart_slot_device::read_a13),(base_md_cart_slot_device*)m_cart), write16_delegate(FUNC(base_md_cart_slot_device::write_a13),(base_md_cart_slot_device*)m_cart));
m_maincpu->space(AS_PROGRAM).install_readwrite_handler(0xa15000, 0xa150ff, read16_delegate(FUNC(base_md_cart_slot_device::read_a15),(base_md_cart_slot_device*)m_cart), write16_delegate(FUNC(base_md_cart_slot_device::write_a15),(base_md_cart_slot_device*)m_cart));
// m_maincpu->space(AS_PROGRAM).install_write_handler(0xa14000, 0xa14003, write16_delegate(FUNC(base_md_cart_slot_device::write_tmss_bank),(base_md_cart_slot_device*)m_cart));
// m_maincpu->space(AS_PROGRAM).install_write_handler(0xa14000, 0xa14003, write16_delegate(FUNC(base_md_cart_slot_device::write_tmss_bank),(base_md_cart_slot_device*)m_cart));
}
READ16_MEMBER( md_cons_state::tmss_r )
@ -330,7 +330,7 @@ MACHINE_START_MEMBER(md_cons_state, ms_megadriv)
{
install_cartslot();
}
}

6
src/mame/drivers/megasys1.cpp
View File

@ -172,7 +172,7 @@ TIMER_DEVICE_CALLBACK_MEMBER(megasys1_state::megasys1A_scanline)
{
int scanline = param;
// stdragon: irq 1 is raster irq ("press start" behaviour), happens at around scanline 90(-16), 2 vblank, 3 is RTE.
// stdragon: irq 1 is raster irq ("press start" behaviour), happens at around scanline 90(-16), 2 vblank, 3 is RTE.
// p47: irq 2 valid, others RTE
// kickoff: irq 3 valid, others RTE
// tshingen: irq 3 RTE, irq 1 reads inputs, irq 2 sets vregs values (pending further investigation ...)
@ -183,7 +183,7 @@ TIMER_DEVICE_CALLBACK_MEMBER(megasys1_state::megasys1A_scanline)
// plusalph: irq 1 & 3 RTE, irq 2 valid
// rodland: irq 1 & 3 RTE, irq 2 valid (sets palette, vregs ...)
// soldam: irq 1 & 3 RTE, irq 2 valid
if(scanline == 240) // vblank-out irq
m_maincpu->set_input_line(2, HOLD_LINE);
@ -306,7 +306,7 @@ WRITE16_MEMBER(megasys1_state::ms1_ram_w )
// 64th Street and Chimera Beast rely on this for attract inputs
m_ram[offset] = data;
// if (mem_mask != 0xffff) printf("byte write to RAM %04x %04x %04x\n", offset, data, mem_mask);
// if (mem_mask != 0xffff) printf("byte write to RAM %04x %04x %04x\n", offset, data, mem_mask);
}

6
src/mame/drivers/namcops2.cpp
View File

@ -1372,7 +1372,7 @@ ROM_START( rrvac )
ROM_REGION(0xc000, "jvsio", 0) // Namco "FCA" JVS I/O board PIC16F84 code (see namcos23.c for FCA details)
ROM_LOAD( "fcap11.ic2", 0x000000, 0x004010, CRC(1b2592ce) SHA1(a1a487361053af564f6ec67e545413e370a3b38c) )
// Fujitsu MB90F574 code, partial dumps, only last 48KB of 256KB flash was extracted
ROM_LOAD( "fcaf11.ic4", 0x000000, 0x00c000, BAD_DUMP CRC(9794f16b) SHA1(94e1c036a6d23d39b2ad69dd1ad2cfa6163287e0) ) // almost good dump, all JVS related code and data is in place
ROM_LOAD( "fcaf11.ic4", 0x000000, 0x00c000, BAD_DUMP CRC(9794f16b) SHA1(94e1c036a6d23d39b2ad69dd1ad2cfa6163287e0) ) // almost good dump, all JVS related code and data is in place
ROM_LOAD( "fcb1_io-0b.ic4", 0x000000, 0x00c000, BAD_DUMP CRC(5e25b73f) SHA1(fa805a422ff8793989b0ce901cc868ec1a87c7ac) ) // most JVS handling code is in undumped area
ROM_REGION(0x80000, "steering", 0) // Steering I/O board MB90242A code (see namcos23.c for steering board details)
@ -1393,7 +1393,7 @@ ROM_START( rrvac2 )
ROM_REGION(0xc000, "jvsio", 0) // Namco "FCA" JVS I/O board PIC16F84 code (see namcos23.c for FCA details)
ROM_LOAD( "fcap11.ic2", 0x000000, 0x004010, CRC(1b2592ce) SHA1(a1a487361053af564f6ec67e545413e370a3b38c) )
// Fujitsu MB90F574 code, partial dumps, only last 48KB of 256KB flash was extracted
ROM_LOAD( "fcaf11.ic4", 0x000000, 0x00c000, BAD_DUMP CRC(9794f16b) SHA1(94e1c036a6d23d39b2ad69dd1ad2cfa6163287e0) ) // almost good dump, all JVS related code and data is in place
ROM_LOAD( "fcaf11.ic4", 0x000000, 0x00c000, BAD_DUMP CRC(9794f16b) SHA1(94e1c036a6d23d39b2ad69dd1ad2cfa6163287e0) ) // almost good dump, all JVS related code and data is in place
ROM_LOAD( "fcb1_io-0b.ic4", 0x000000, 0x00c000, BAD_DUMP CRC(5e25b73f) SHA1(fa805a422ff8793989b0ce901cc868ec1a87c7ac) ) // most JVS handling code is in undumped area
ROM_REGION(0x80000, "steering", 0) // Steering I/O board MB90242A code (see namcos23.c for steering board details)
@ -1415,7 +1415,7 @@ ROM_START( rrvac1 )
ROM_REGION(0xc000, "jvsio", 0) // Namco "FCA" JVS I/O board PIC16F84 code (see namcos23.c for FCA details)
ROM_LOAD( "fcap11.ic2", 0x000000, 0x004010, CRC(1b2592ce) SHA1(a1a487361053af564f6ec67e545413e370a3b38c) )
// Fujitsu MB90F574 code, partial dumps, only last 48KB of 256KB flash was extracted
ROM_LOAD( "fcaf11.ic4", 0x000000, 0x00c000, BAD_DUMP CRC(9794f16b) SHA1(94e1c036a6d23d39b2ad69dd1ad2cfa6163287e0) ) // almost good dump, all JVS related code and data is in place
ROM_LOAD( "fcaf11.ic4", 0x000000, 0x00c000, BAD_DUMP CRC(9794f16b) SHA1(94e1c036a6d23d39b2ad69dd1ad2cfa6163287e0) ) // almost good dump, all JVS related code and data is in place
ROM_LOAD( "fcb1_io-0b.ic4", 0x000000, 0x00c000, BAD_DUMP CRC(5e25b73f) SHA1(fa805a422ff8793989b0ce901cc868ec1a87c7ac) ) // most JVS handling code is in undumped area
ROM_REGION(0x80000, "steering", 0) // Steering I/O board MB90242A code (see namcos23.c for steering board details)

8
src/mame/drivers/pacman.cpp
View File

@ -28,13 +28,13 @@
* Porky
* MTV Rock-N-Roll Trivia (Part 2)
* Woodpecker
* Pacman Club / Club Lambada
* Pacman Club / Club Lambada
Known issues:
* Mystery items in Ali Baba don't work correctly because of protection.
* Pacman Club controls need to be demultiplexed for 2-players simultaneous mode.
Also need 4-players extra inputs.
* Pacman Club controls need to be demultiplexed for 2-players simultaneous mode.
Also need 4-players extra inputs.
Known to exist but dumps needed
* Eeeek!
@ -4135,7 +4135,7 @@ ROM_START( clubpacm )
ROM_LOAD( "13.5f", 0x1000, 0x0800, CRC(22b0188a) SHA1(a9ed9ca8b36a60081fd364abc9bc23963932cc0b) )
ROM_LOAD( "15.5j", 0x1800, 0x0800, CRC(50c7477d) SHA1(c04ec282a8cb528df5e38ad750d12ee71612695d) )
// Color PROMs have been dumped. They match the pacman/mspacman ones
// Color PROMs have been dumped. They match the pacman/mspacman ones
ROM_REGION( 0x0120, "proms", 0 )
ROM_LOAD( "n82s123n.7f", 0x0000, 0x0020, CRC(2fc650bd) SHA1(8d0268dee78e47c712202b0ec4f1f51109b1f2a5) )
ROM_LOAD( "m7611.4a", 0x0020, 0x0100, CRC(3eb3a8e4) SHA1(19097b5f60d1030f8b82d9f1d3a241f93e5c75d6) )

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