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https://github.com/holub/mame
synced 2025-04-23 08:49:55 +03:00
XaviX naming changes (#4069)
* naming changes (nw) * move stub audio related functions to their own file (nw) * addressing notes (nw) * control sprite mode with sprite reg instead of value set in init (nw) * refactor a bit (nw) * sprite DMA connects directly to spriteram, not through the main bus (nw) * minor changes (nw) * fix multiplier unit use in rad_madf (nw) * implement 'text array / memory emulator' (nw) * some naming (nw) * code treats this like another palette entry (bg pen maybe)
This commit is contained in:
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@ -3428,6 +3428,7 @@ files {
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MAME_DIR .. "src/mame/drivers/xavix.cpp",
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MAME_DIR .. "src/mame/video/xavix.cpp",
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MAME_DIR .. "src/mame/machine/xavix.cpp",
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MAME_DIR .. "src/mame/audio/xavix.cpp",
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MAME_DIR .. "src/mame/includes/xavix.h",
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}
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@ -61,8 +61,16 @@ brk_xav_imp
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}
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else
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{
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PC = m_vector_callback(0,1);
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PC = set_h(PC, m_vector_callback(0,0));
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if (m_vector_callback(0,1) != -1)
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{
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PC = m_vector_callback(0,1);
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PC = set_h(PC, m_vector_callback(0,0));
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}
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else
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{
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PC = read_arg(0xfffa);
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PC = set_h(PC, read_arg(0xfffb));
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}
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}
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nmi_state = false;
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@ -75,8 +83,16 @@ brk_xav_imp
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}
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else
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{
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PC = m_vector_callback(1,1);
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PC = set_h(PC, m_vector_callback(1,0));
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if (m_vector_callback(1,1) != -1)
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{
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PC = m_vector_callback(1,1);
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PC = set_h(PC, m_vector_callback(1,0));
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}
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else
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{
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PC = read_arg(0xfffe);
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PC = set_h(PC, read_arg(0xffff));
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}
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}
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if(irq_taken)
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@ -32,7 +32,7 @@ public:
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O(brk_xav_imp);
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O(rti_xav_imp);
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typedef device_delegate<uint8_t (int which, int half)> xavix_interrupt_vector_delegate;
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typedef device_delegate<int16_t (int which, int half)> xavix_interrupt_vector_delegate;
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template <typename Object> void set_vector_callback(Object &&cb) { m_vector_callback = std::forward<Object>(cb); }
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157
src/mame/audio/xavix.cpp
Normal file
157
src/mame/audio/xavix.cpp
Normal file
@ -0,0 +1,157 @@
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// license:BSD-3-Clause
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// copyright-holders:David Haywood
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#include "emu.h"
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#include "includes/xavix.h"
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READ8_MEMBER(xavix_state::sound_75f0_r)
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{
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logerror("%s: sound_75f0_r\n", machine().describe_context());
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return m_soundregs[0];
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}
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READ8_MEMBER(xavix_state::sound_75f1_r)
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{
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logerror("%s: sound_75f1_r\n", machine().describe_context());
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return m_soundregs[1];
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}
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READ8_MEMBER(xavix_state::sound_75f6_r)
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{
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logerror("%s: sound_75f6_r\n", machine().describe_context());
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return m_soundregs[6];
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}
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READ8_MEMBER(xavix_state::sound_75f8_r)
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{
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logerror("%s: sound_75f8_r\n", machine().describe_context());
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return m_soundregs[8];
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}
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READ8_MEMBER(xavix_state::sound_75f9_r)
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{
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logerror("%s: sound_75f9_r\n", machine().describe_context());
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return 0x00;
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}
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READ8_MEMBER(xavix_state::sound_75fa_r)
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{
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logerror("%s: sound_75fa_r\n", machine().describe_context());
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return m_soundregs[10];
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}
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READ8_MEMBER(xavix_state::sound_75fb_r)
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{
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logerror("%s: sound_75fb_r\n", machine().describe_context());
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return m_soundregs[11];
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}
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READ8_MEMBER(xavix_state::sound_75fc_r)
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{
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logerror("%s: sound_75fc_r\n", machine().describe_context());
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return m_soundregs[12];
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}
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READ8_MEMBER(xavix_state::sound_75fd_r)
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{
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logerror("%s: sound_75fd_r\n", machine().describe_context());
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return m_soundregs[13];
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}
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WRITE8_MEMBER(xavix_state::sound_75f0_w)
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{
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// expected to return data written
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m_soundregs[0] = data;
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logerror("%s: sound_75f0_w %02x\n", machine().describe_context(), data);
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}
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WRITE8_MEMBER(xavix_state::sound_75f1_w)
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{
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// expected to return data written
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m_soundregs[1] = data;
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logerror("%s: sound_75f1_w %02x\n", machine().describe_context(), data);
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}
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WRITE8_MEMBER(xavix_state::sound_75f6_w)
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{
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// expected to return data written
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m_soundregs[6] = data;
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logerror("%s: sound_75f6_w %02x\n", machine().describe_context(), data);
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}
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WRITE8_MEMBER(xavix_state::sound_75f7_w)
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{
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m_soundregs[7] = data;
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logerror("%s: sound_75f7_w %02x\n", machine().describe_context(), data);
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}
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WRITE8_MEMBER(xavix_state::sound_75f8_w)
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{
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// expected to return data written
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m_soundregs[8] = data;
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logerror("%s: sound_75f8_w %02x\n", machine().describe_context(), data);
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}
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WRITE8_MEMBER(xavix_state::sound_75f9_w)
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{
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m_soundregs[9] = data;
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logerror("%s: sound_75f9_w %02x\n", machine().describe_context(), data);
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}
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WRITE8_MEMBER(xavix_state::sound_75fa_w)
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{
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// expected to return data written
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m_soundregs[10] = data;
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logerror("%s: sound_75fa_w %02x\n", machine().describe_context(), data);
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}
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WRITE8_MEMBER(xavix_state::sound_75fb_w)
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{
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// expected to return data written
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m_soundregs[11] = data;
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logerror("%s: sound_75fb_w %02x\n", machine().describe_context(), data);
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}
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WRITE8_MEMBER(xavix_state::sound_75fc_w)
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{
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// expected to return data written
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m_soundregs[12] = data;
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logerror("%s: sound_75fc_w %02x\n", machine().describe_context(), data);
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}
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WRITE8_MEMBER(xavix_state::sound_75fd_w)
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{
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// expected to return data written
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m_soundregs[13] = data;
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logerror("%s: sound_75fd_w %02x\n", machine().describe_context(), data);
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}
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WRITE8_MEMBER(xavix_state::sound_75fe_w)
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{
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m_soundregs[14] = data;
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logerror("%s: sound_75fe_w %02x\n", machine().describe_context(), data);
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}
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WRITE8_MEMBER(xavix_state::sound_75ff_w)
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{
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m_soundregs[15] = data;
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logerror("%s: sound_75ff_w %02x\n", machine().describe_context(), data);
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}
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READ8_MEMBER(xavix_state::sound_75f4_r)
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{
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// used with 75f0
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return 0xff;
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}
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READ8_MEMBER(xavix_state::sound_75f5_r)
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{
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// used with 75f1
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return 0xff;
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}
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@ -244,17 +244,22 @@ WRITE8_MEMBER(xavix_state::main_w)
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note, many DMA operations and tile bank redirects etc. have the high bit set too, so that could be significant if it defines how it accesses
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memory in those cases too
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this can't be correct, it breaks monster truck which expects ROM at 8000 even in the >0x800000 region, maybe code + data mappings need
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to be kept separate, with >0x800000 showing both ROM banks for code, but still having the zero page area etc. for data?
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*/
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READ8_MEMBER(xavix_state::main2_r)
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{
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if (offset & 0x8000)
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{
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return m_lowbus->read8(space, offset&0x7fff);
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return m_rgn[(offset) & (m_rgnlen - 1)];
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// return m_lowbus->read8(space, offset&0x7fff);
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}
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else
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{
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if (offset>0x200)
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return m_rgn[(offset) & (m_rgnlen - 1)];
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return m_rgn[(offset) & (m_rgnlen - 1)];
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else
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return m_lowbus->read8(space, offset&0x7fff);
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}
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@ -262,6 +267,7 @@ READ8_MEMBER(xavix_state::main2_r)
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WRITE8_MEMBER(xavix_state::main2_w)
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{
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/*
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if (offset & 0x8000)
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{
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m_lowbus->write8(space, offset & 0x7fff, data);
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@ -273,6 +279,7 @@ WRITE8_MEMBER(xavix_state::main2_w)
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else
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m_lowbus->write8(space, offset & 0x7fff, data);
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}
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*/
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}
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// DATA reads from 0x8000-0xffff are banked by byte 0xff of 'ram' (this is handled in the CPU core)
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@ -288,122 +295,135 @@ void xavix_state::xavix_lowbus_map(address_map &map)
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map(0x0000, 0x01ff).ram();
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map(0x0200, 0x3fff).ram().share("mainram");
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// this might not be a real area, the tilemap base register gets set to 0x40 in monster truck service mode, and expects a fixed layout.
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// As that would point at this address maybe said layout is being read from here, or maybe it's just a magic tilemap register value that doesn't read address space at all.
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map(0x4000, 0x41ff).r(FUNC(xavix_state::xavix_4000_r));
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// Memory Emulator / Text Array
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map(0x4000, 0x4fff).rw(FUNC(xavix_state::xavix_memoryemu_txarray_r), FUNC(xavix_state::xavix_memoryemu_txarray_w));
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// 6xxx ranges are the video hardware
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// appears to be 256 sprites
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map(0x6000, 0x60ff).ram().share("spr_attr0");
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map(0x6100, 0x61ff).ram().share("spr_attr1");
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map(0x6200, 0x62ff).ram().share("spr_ypos"); // cleared to 0x80 by both games, maybe enable registers?
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map(0x6300, 0x63ff).ram().share("spr_xpos");
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map(0x6400, 0x64ff).ram(); // 6400 range gets populated in some cases, but it seems to be more like work ram, data doesn't matter and must be ignored?
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map(0x6500, 0x65ff).ram().share("spr_addr_lo");
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map(0x6600, 0x66ff).ram().share("spr_addr_md");
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map(0x6700, 0x67ff).ram().share("spr_addr_hi");
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map(0x6800, 0x68ff).ram().share("palram1"); // written with 6900
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map(0x6900, 0x69ff).ram().share("palram2"); // startup (taitons1)
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map(0x6a00, 0x6a1f).ram().share("spr_attra"); // test mode, pass flag 0x20
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// Sprite RAM (aka Fragment RAM)
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map(0x6000, 0x67ff).ram().share("fragment_sprite");
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map(0x6fc0, 0x6fc0).w(FUNC(xavix_state::xavix_6fc0_w)); // startup (maybe this is a mirror of tmap1_regs_w)
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// Palette RAM
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map(0x6800, 0x68ff).ram().share("palram_sh");
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map(0x6900, 0x69ff).ram().share("palram_l");
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map(0x6fc8, 0x6fcf).w(FUNC(xavix_state::tmap1_regs_w)); // video registers
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// Segment RAM
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map(0x6a00, 0x6a1f).ram().share("segment_regs"); // test mode, pass flag 0x20
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// Tilemap 1 Registers
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map(0x6fc8, 0x6fcf).rw(FUNC(xavix_state::tmap1_regs_r), FUNC(xavix_state::tmap1_regs_w));
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// Tilemap 2 Registers
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map(0x6fd0, 0x6fd7).rw(FUNC(xavix_state::tmap2_regs_r), FUNC(xavix_state::tmap2_regs_w));
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map(0x6fd8, 0x6fd8).w(FUNC(xavix_state::xavix_6fd8_w)); // startup (mirror of tmap2_regs_w?)
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// Sprite Registers
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map(0x6fd8, 0x6fd8).w(FUNC(xavix_state::spriteregs_w));
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map(0x6fe0, 0x6fe0).rw(FUNC(xavix_state::vid_dma_trigger_r), FUNC(xavix_state::vid_dma_trigger_w)); // after writing to 6fe1/6fe2 and 6fe5/6fe6 rad_mtrk writes 0x43/0x44 here then polls on 0x40 (see function call at c273) write values are hardcoded, similar code at 18401
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map(0x6fe1, 0x6fe2).w(FUNC(xavix_state::vid_dma_params_1_w));
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map(0x6fe5, 0x6fe6).w(FUNC(xavix_state::vid_dma_params_2_w));
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// Sprite DMA
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map(0x6fe0, 0x6fe0).rw(FUNC(xavix_state::spritefragment_dma_status_r), FUNC(xavix_state::spritefragment_dma_trg_w)); // after writing to 6fe1/6fe2 and 6fe5/6fe6 rad_mtrk writes 0x43/0x44 here then polls on 0x40 (see function call at c273) write values are hardcoded, similar code at 18401
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map(0x6fe1, 0x6fe2).w(FUNC(xavix_state::spritefragment_dma_params_1_w));
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map(0x6fe5, 0x6fe6).w(FUNC(xavix_state::spritefragment_dma_params_2_w));
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// function in rad_mtrk at 0184b7 uses this
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map(0x6fe8, 0x6fe8).rw(FUNC(xavix_state::xavix_6fe8_r), FUNC(xavix_state::xavix_6fe8_w)); // r/w tested
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map(0x6fe9, 0x6fe9).rw(FUNC(xavix_state::xavix_6fe9_r), FUNC(xavix_state::xavix_6fe9_w)); // r/w tested
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map(0x6fea, 0x6fea).w(FUNC(xavix_state::xavix_6fea_w));
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// Arena Registers
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map(0x6fe8, 0x6fe8).rw(FUNC(xavix_state::arena_start_r), FUNC(xavix_state::arena_start_w)); // r/w tested
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map(0x6fe9, 0x6fe9).rw(FUNC(xavix_state::arena_end_r), FUNC(xavix_state::arena_end_w)); // r/w tested
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map(0x6fea, 0x6fea).w(FUNC(xavix_state::arena_control_w));
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map(0x6ff0, 0x6ff0).rw(FUNC(xavix_state::xavix_6ff0_r), FUNC(xavix_state::xavix_6ff0_w)); // r/w tested
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map(0x6ff1, 0x6ff1).w(FUNC(xavix_state::xavix_6ff1_w)); // startup - cleared in interrupt 0
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map(0x6ff2, 0x6ff2).w(FUNC(xavix_state::xavix_6ff2_w)); // set to 07 after clearing above things in interrupt 0
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// Colour Mixing / Enabling Registers
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map(0x6ff0, 0x6ff0).ram().share("colmix_sh"); // a single colour (for effects or bgpen?)
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map(0x6ff1, 0x6ff1).ram().share("colmix_l");
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map(0x6ff2, 0x6ff2).w(FUNC(xavix_state::colmix_6ff2_w)); // set to 07 after clearing above things in interrupt 0
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map(0x6ff8, 0x6ff8).rw(FUNC(xavix_state::xavix_6ff8_r), FUNC(xavix_state::xavix_6ff8_w)); // always seems to be a read/store or read/modify/store
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// Display Control Register / Status Flags
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map(0x6ff8, 0x6ff8).rw(FUNC(xavix_state::dispctrl_6ff8_r), FUNC(xavix_state::dispctrl_6ff8_w)); // always seems to be a read/store or read/modify/store
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map(0x6ff9, 0x6ff9).r(FUNC(xavix_state::pal_ntsc_r));
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map(0x6ffa, 0x6ffa).w(FUNC(xavix_state::xavix_6ffa_w));
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map(0x6ffb, 0x6ffb).w(FUNC(xavix_state::xavix_6ffb_w)); // increases / decreases when you jump in snowboard, maybe raster irq pos or part of a clipping window?
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map(0x6ffa, 0x6ffa).w(FUNC(xavix_state::dispctrl_6ffa_w));
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map(0x6ffb, 0x6ffb).w(FUNC(xavix_state::dispctrl_6ffb_w)); // increases / decreases when you jump in snowboard, maybe raster irq pos or part of a clipping window?
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// 7xxx ranges system controller?
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map(0x75f0, 0x75f0).rw(FUNC(xavix_state::xavix_75f0_r), FUNC(xavix_state::xavix_75f0_w)); // r/w tested read/written 8 times in a row
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map(0x75f1, 0x75f1).rw(FUNC(xavix_state::xavix_75f1_r), FUNC(xavix_state::xavix_75f1_w)); // r/w tested read/written 8 times in a row
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// Lightgun / pen 1 control
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// map(0x6ffc, 0x6fff)
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// Sound RAM
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// map(0x7400, 0x75ff)
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// Sound Control
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map(0x75f0, 0x75f0).rw(FUNC(xavix_state::sound_75f0_r), FUNC(xavix_state::sound_75f0_w)); // r/w tested read/written 8 times in a row
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map(0x75f1, 0x75f1).rw(FUNC(xavix_state::sound_75f1_r), FUNC(xavix_state::sound_75f1_w)); // r/w tested read/written 8 times in a row
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map(0x75f3, 0x75f3).ram();
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map(0x75f4, 0x75f4).r(FUNC(xavix_state::xavix_75f4_r)); // related to 75f0 (read after writing there - rad_mtrk)
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map(0x75f5, 0x75f5).r(FUNC(xavix_state::xavix_75f5_r)); // related to 75f1 (read after writing there - rad_mtrk)
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map(0x75f4, 0x75f4).r(FUNC(xavix_state::sound_75f4_r)); // related to 75f0 (read after writing there - rad_mtrk)
|
||||
map(0x75f5, 0x75f5).r(FUNC(xavix_state::sound_75f5_r)); // related to 75f1 (read after writing there - rad_mtrk)
|
||||
// taitons1 after 75f7/75f8
|
||||
map(0x75f6, 0x75f6).rw(FUNC(xavix_state::xavix_75f6_r), FUNC(xavix_state::xavix_75f6_w)); // r/w tested
|
||||
map(0x75f6, 0x75f6).rw(FUNC(xavix_state::sound_75f6_r), FUNC(xavix_state::sound_75f6_w)); // r/w tested
|
||||
// taitons1 written as a pair
|
||||
map(0x75f7, 0x75f7).w(FUNC(xavix_state::xavix_75f7_w));
|
||||
map(0x75f8, 0x75f8).rw(FUNC(xavix_state::xavix_75f8_r), FUNC(xavix_state::xavix_75f8_w)); // r/w tested
|
||||
map(0x75f7, 0x75f7).w(FUNC(xavix_state::sound_75f7_w));
|
||||
map(0x75f8, 0x75f8).rw(FUNC(xavix_state::sound_75f8_r), FUNC(xavix_state::sound_75f8_w)); // r/w tested
|
||||
// taitons1 written after 75f6, then read
|
||||
map(0x75f9, 0x75f9).rw(FUNC(xavix_state::xavix_75f9_r), FUNC(xavix_state::xavix_75f9_w));
|
||||
map(0x75f9, 0x75f9).rw(FUNC(xavix_state::sound_75f9_r), FUNC(xavix_state::sound_75f9_w));
|
||||
// at another time
|
||||
map(0x75fa, 0x75fa).rw(FUNC(xavix_state::xavix_75fa_r), FUNC(xavix_state::xavix_75fa_w)); // r/w tested
|
||||
map(0x75fb, 0x75fb).rw(FUNC(xavix_state::xavix_75fb_r), FUNC(xavix_state::xavix_75fb_w)); // r/w tested
|
||||
map(0x75fc, 0x75fc).rw(FUNC(xavix_state::xavix_75fc_r), FUNC(xavix_state::xavix_75fc_w)); // r/w tested
|
||||
map(0x75fd, 0x75fd).rw(FUNC(xavix_state::xavix_75fd_r), FUNC(xavix_state::xavix_75fd_w)); // r/w tested
|
||||
map(0x75fe, 0x75fe).w(FUNC(xavix_state::xavix_75fe_w));
|
||||
map(0x75fa, 0x75fa).rw(FUNC(xavix_state::sound_75fa_r), FUNC(xavix_state::sound_75fa_w)); // r/w tested
|
||||
map(0x75fb, 0x75fb).rw(FUNC(xavix_state::sound_75fb_r), FUNC(xavix_state::sound_75fb_w)); // r/w tested
|
||||
map(0x75fc, 0x75fc).rw(FUNC(xavix_state::sound_75fc_r), FUNC(xavix_state::sound_75fc_w)); // r/w tested
|
||||
map(0x75fd, 0x75fd).rw(FUNC(xavix_state::sound_75fd_r), FUNC(xavix_state::sound_75fd_w)); // r/w tested
|
||||
map(0x75fe, 0x75fe).w(FUNC(xavix_state::sound_75fe_w));
|
||||
// taitons1 written other 75xx operations
|
||||
map(0x75ff, 0x75ff).w(FUNC(xavix_state::xavix_75ff_w));
|
||||
map(0x75ff, 0x75ff).w(FUNC(xavix_state::sound_75ff_w));
|
||||
|
||||
map(0x7810, 0x7810).w(FUNC(xavix_state::xavix_7810_w)); // startup
|
||||
// Slot Registers
|
||||
map(0x7810, 0x7810).w(FUNC(xavix_state::slotreg_7810_w)); // startup
|
||||
|
||||
map(0x7900, 0x7900).w(FUNC(xavix_state::xavix_7900_w));
|
||||
map(0x7901, 0x7901).w(FUNC(xavix_state::xavix_7901_w));
|
||||
map(0x7902, 0x7902).w(FUNC(xavix_state::xavix_7902_w));
|
||||
// External Interface
|
||||
map(0x7900, 0x7900).w(FUNC(xavix_state::extintrf_7900_w));
|
||||
map(0x7901, 0x7901).w(FUNC(xavix_state::extintrf_7901_w));
|
||||
map(0x7902, 0x7902).w(FUNC(xavix_state::extintrf_7902_w));
|
||||
|
||||
// DMA trigger for below (written after the others) waits on status of bit 1 in a loop
|
||||
map(0x7980, 0x7980).rw(FUNC(xavix_state::dma_trigger_r), FUNC(xavix_state::dma_trigger_w));
|
||||
// DMA source
|
||||
map(0x7981, 0x7981).w(FUNC(xavix_state::rom_dmasrc_lo_w));
|
||||
// DMA Controller
|
||||
map(0x7980, 0x7980).rw(FUNC(xavix_state::rom_dmatrg_r), FUNC(xavix_state::rom_dmatrg_w));
|
||||
map(0x7981, 0x7981).w(FUNC(xavix_state::rom_dmasrc_lo_w)); // DMA source
|
||||
map(0x7982, 0x7982).w(FUNC(xavix_state::rom_dmasrc_md_w));
|
||||
map(0x7983, 0x7983).w(FUNC(xavix_state::rom_dmasrc_hi_w));
|
||||
// DMA dest
|
||||
map(0x7984, 0x7984).w(FUNC(xavix_state::rom_dmadst_lo_w));
|
||||
map(0x7984, 0x7984).w(FUNC(xavix_state::rom_dmadst_lo_w)); // DMA dest
|
||||
map(0x7985, 0x7985).w(FUNC(xavix_state::rom_dmadst_hi_w));
|
||||
// DMA length
|
||||
map(0x7986, 0x7986).w(FUNC(xavix_state::rom_dmalen_lo_w));
|
||||
map(0x7986, 0x7986).w(FUNC(xavix_state::rom_dmalen_lo_w)); // DMA length
|
||||
map(0x7987, 0x7987).w(FUNC(xavix_state::rom_dmalen_hi_w));
|
||||
|
||||
// GPIO stuff
|
||||
map(0x7a00, 0x7a00).rw(FUNC(xavix_state::xavix_io_0_r),FUNC(xavix_state::xavix_7a00_w));
|
||||
map(0x7a01, 0x7a01).rw(FUNC(xavix_state::xavix_io_1_r),FUNC(xavix_state::xavix_7a01_w)); // startup (taitons1)
|
||||
map(0x7a02, 0x7a02).rw(FUNC(xavix_state::xavix_7a02_r),FUNC(xavix_state::xavix_7a02_w)); // startup, gets set to 20, 7a00 is then also written with 20
|
||||
map(0x7a03, 0x7a03).rw(FUNC(xavix_state::xavix_7a03_r),FUNC(xavix_state::xavix_7a03_w)); // startup (gets set to 84 which is the same as the bits checked on 7a01, possible port direction register?)
|
||||
// IO Ports
|
||||
map(0x7a00, 0x7a00).rw(FUNC(xavix_state::io_0_r),FUNC(xavix_state::io_0_w));
|
||||
map(0x7a01, 0x7a01).rw(FUNC(xavix_state::io_1_r),FUNC(xavix_state::io_1_w)); // startup (taitons1)
|
||||
map(0x7a02, 0x7a02).rw(FUNC(xavix_state::io_2_r),FUNC(xavix_state::io_2_w)); // startup, gets set to 20, 7a00 is then also written with 20
|
||||
map(0x7a03, 0x7a03).rw(FUNC(xavix_state::io_3_r),FUNC(xavix_state::io_3_w)); // startup (gets set to 84 which is the same as the bits checked on 7a01, possible port direction register?)
|
||||
|
||||
// Interrupt control registers
|
||||
map(0x7a80, 0x7a80).w(FUNC(xavix_state::xavix_7a80_w)); // still IO? ADC related?
|
||||
|
||||
map(0x7b00, 0x7b00).w(FUNC(xavix_state::xavix_7b00_w)); // rad_snow (not often)
|
||||
// Mouse?
|
||||
map(0x7b00, 0x7b00).w(FUNC(xavix_state::adc_7b00_w)); // rad_snow (not often, why?)
|
||||
|
||||
map(0x7b80, 0x7b80).rw(FUNC(xavix_state::xavix_7b80_r), FUNC(xavix_state::xavix_7b80_w)); // rad_snow (not often)
|
||||
map(0x7b81, 0x7b81).w(FUNC(xavix_state::xavix_7b81_w)); // written (often, m_trck, analog related?)
|
||||
// Lightgun / pen 2 control
|
||||
//map(0x7b18, 0x7b1b)
|
||||
|
||||
// ADC registers
|
||||
map(0x7b80, 0x7b80).rw(FUNC(xavix_state::adc_7b80_r), FUNC(xavix_state::adc_7b80_w)); // rad_snow (not often)
|
||||
map(0x7b81, 0x7b81).w(FUNC(xavix_state::adc_7b81_w)); // written (often, m_trck, analog related?)
|
||||
|
||||
map(0x7c00, 0x7c00).w(FUNC(xavix_state::xavix_7c00_w));
|
||||
map(0x7c01, 0x7c01).rw(FUNC(xavix_state::xavix_7c01_r), FUNC(xavix_state::xavix_7c01_w)); // r/w tested
|
||||
map(0x7c02, 0x7c02).w(FUNC(xavix_state::xavix_7c02_w));
|
||||
// Sleep control
|
||||
//map(7b82, 7b83)
|
||||
|
||||
// this is a multiplication chip
|
||||
// Timer control
|
||||
map(0x7c00, 0x7c00).w(FUNC(xavix_state::timer_control_w));
|
||||
map(0x7c01, 0x7c01).rw(FUNC(xavix_state::timer_baseval_r), FUNC(xavix_state::timer_baseval_w)); // r/w tested
|
||||
map(0x7c02, 0x7c02).w(FUNC(xavix_state::timer_freq_w));
|
||||
|
||||
// Barrel Shifter registers
|
||||
// map(0x7ff0, 0x7ff1)
|
||||
|
||||
// Multiply / Divide registers
|
||||
map(0x7ff2, 0x7ff4).w(FUNC(xavix_state::mult_param_w));
|
||||
map(0x7ff5, 0x7ff6).rw(FUNC(xavix_state::mult_r), FUNC(xavix_state::mult_w));
|
||||
|
||||
// maybe irq enable, written after below
|
||||
map(0x7ff9, 0x7ff9).w(FUNC(xavix_state::irq_enable_w)); // interrupt related, but probalby not a simple 'enable' otherwise interrupts happen before we're ready for them.
|
||||
// an IRQ vector (nmi?)
|
||||
map(0x7ffa, 0x7ffa).w(FUNC(xavix_state::irq_vector0_lo_w));
|
||||
// CPU Vector registers
|
||||
map(0x7ff9, 0x7ff9).w(FUNC(xavix_state::vector_enable_w)); // interrupt related, but probalby not a simple 'enable' otherwise interrupts happen before we're ready for them.
|
||||
map(0x7ffa, 0x7ffa).w(FUNC(xavix_state::irq_vector0_lo_w)); // an IRQ vector (nmi?)
|
||||
map(0x7ffb, 0x7ffb).w(FUNC(xavix_state::irq_vector0_hi_w));
|
||||
|
||||
map(0x7ffc, 0x7ffc).rw(FUNC(xavix_state::irq_source_r), FUNC(xavix_state::irq_source_w));
|
||||
|
||||
// an IRQ vector (irq?)
|
||||
map(0x7ffe, 0x7ffe).w(FUNC(xavix_state::irq_vector1_lo_w));
|
||||
map(0x7ffe, 0x7ffe).w(FUNC(xavix_state::irq_vector1_lo_w)); // an IRQ vector (irq?)
|
||||
map(0x7fff, 0x7fff).w(FUNC(xavix_state::irq_vector1_hi_w));
|
||||
}
|
||||
|
||||
@ -652,7 +672,7 @@ MACHINE_CONFIG_START(xavix_state::xavix)
|
||||
|
||||
MCFG_DEVICE_ADD("gfxdecode", GFXDECODE, "palette", gfx_xavix)
|
||||
|
||||
MCFG_PALETTE_ADD("palette", 256)
|
||||
MCFG_PALETTE_ADD("palette", 256 + 1)
|
||||
|
||||
/* sound hardware */
|
||||
SPEAKER(config, "mono").front_center();
|
||||
@ -687,18 +707,6 @@ void xavix_state::init_xavix()
|
||||
m_rgn = memregion("bios")->base();
|
||||
}
|
||||
|
||||
void xavix_state::init_taitons1()
|
||||
{
|
||||
init_xavix();
|
||||
m_alt_addressing = 1;
|
||||
}
|
||||
|
||||
void xavix_state::init_rad_box()
|
||||
{
|
||||
init_xavix();
|
||||
m_alt_addressing = 2;
|
||||
}
|
||||
|
||||
/***************************************************************************
|
||||
|
||||
Game driver(s)
|
||||
@ -842,51 +850,51 @@ ROM_END
|
||||
|
||||
/* Standalone TV Games */
|
||||
|
||||
CONS( 2006, taitons1, 0, 0, xavix, xavix, xavix_state, init_taitons1, "Bandai / SSD Company LTD / Taito", "Let's! TV Play Classic - Taito Nostalgia 1", MACHINE_IS_SKELETON )
|
||||
CONS( 2006, taitons1, 0, 0, xavix, xavix, xavix_state, init_xavix, "Bandai / SSD Company LTD / Taito", "Let's! TV Play Classic - Taito Nostalgia 1", MACHINE_IS_SKELETON )
|
||||
|
||||
CONS( 2006, taitons2, 0, 0, xavix, namcons2, xavix_state, init_xavix, "Bandai / SSD Company LTD / Taito", "Let's! TV Play Classic - Taito Nostalgia 2", MACHINE_IS_SKELETON )
|
||||
|
||||
CONS( 2006, namcons1, 0, 0, xavix, namcons2, xavix_state, init_taitons1, "Bandai / SSD Company LTD / Namco", "Let's! TV Play Classic - Namco Nostalgia 1", MACHINE_IS_SKELETON )
|
||||
CONS( 2006, namcons1, 0, 0, xavix, namcons2, xavix_state, init_xavix, "Bandai / SSD Company LTD / Namco", "Let's! TV Play Classic - Namco Nostalgia 1", MACHINE_IS_SKELETON )
|
||||
|
||||
CONS( 2006, namcons2, 0, 0, xavix, namcons2, xavix_state, init_taitons1, "Bandai / SSD Company LTD / Namco", "Let's! TV Play Classic - Namco Nostalgia 2", MACHINE_IS_SKELETON )
|
||||
CONS( 2006, namcons2, 0, 0, xavix, namcons2, xavix_state, init_xavix, "Bandai / SSD Company LTD / Namco", "Let's! TV Play Classic - Namco Nostalgia 2", MACHINE_IS_SKELETON )
|
||||
|
||||
CONS( 2000, rad_ping, 0, 0, xavix, xavix, xavix_state, init_xavix, "Radica / SSD Company LTD / Simmer Technology", "Play TV Ping Pong", MACHINE_IS_SKELETON ) // "Simmer Technology" is also known as "Hummer Technology Co., Ltd"
|
||||
|
||||
CONS( 2003, rad_mtrk, 0, 0, xavix, rad_mtrk, xavix_state, init_xavix, "Radica / SSD Company LTD", "Play TV Monster Truck (NTSC)", MACHINE_IS_SKELETON )
|
||||
CONS( 2003, rad_mtrkp, rad_mtrk, 0, xavixp, rad_mtrkp,xavix_state, init_xavix, "Radica / SSD Company LTD", "ConnecTV Monster Truck (PAL)", MACHINE_IS_SKELETON )
|
||||
|
||||
CONS( 200?, rad_box, 0, 0, xavix, rad_box, xavix_state, init_rad_box, "Radica / SSD Company LTD", "Play TV Boxing (NTSC)", MACHINE_IS_SKELETON)
|
||||
CONS( 200?, rad_boxp, rad_box, 0, xavixp, rad_boxp, xavix_state, init_rad_box, "Radica / SSD Company LTD", "ConnecTV Boxing (PAL)", MACHINE_IS_SKELETON)
|
||||
CONS( 200?, rad_box, 0, 0, xavix, rad_box, xavix_state, init_xavix, "Radica / SSD Company LTD", "Play TV Boxing (NTSC)", MACHINE_IS_SKELETON)
|
||||
CONS( 200?, rad_boxp, rad_box, 0, xavixp, rad_boxp, xavix_state, init_xavix, "Radica / SSD Company LTD", "ConnecTV Boxing (PAL)", MACHINE_IS_SKELETON)
|
||||
|
||||
CONS( 200?, rad_crdn, 0, 0, xavix, rad_crdn, xavix_state, init_rad_box, "Radica / SSD Company LTD", "Play TV Card Night (NTSC)", MACHINE_IS_SKELETON)
|
||||
CONS( 200?, rad_crdnp, rad_crdn, 0, xavixp, rad_crdnp,xavix_state, init_rad_box, "Radica / SSD Company LTD", "ConnecTV Card Night (PAL)", MACHINE_IS_SKELETON)
|
||||
CONS( 200?, rad_crdn, 0, 0, xavix, rad_crdn, xavix_state, init_xavix, "Radica / SSD Company LTD", "Play TV Card Night (NTSC)", MACHINE_IS_SKELETON)
|
||||
CONS( 200?, rad_crdnp, rad_crdn, 0, xavixp, rad_crdnp,xavix_state, init_xavix, "Radica / SSD Company LTD", "ConnecTV Card Night (PAL)", MACHINE_IS_SKELETON)
|
||||
|
||||
CONS( 2002, rad_bb2, 0, 0, xavix, xavix, xavix_state, init_xavix, "Radica / SSD Company LTD", "Play TV Baseball 2", MACHINE_IS_SKELETON ) // contains string "Radica RBB2 V1.0"
|
||||
|
||||
CONS( 2001, rad_bass, 0, 0, xavix, xavix, xavix_state, init_rad_box, "Radica / SSD Company LTD", "Play TV Bass Fishin' (NTSC)", MACHINE_IS_SKELETON)
|
||||
CONS( 2001, rad_bassp, rad_bass, 0, xavixp, xavixp, xavix_state, init_rad_box, "Radica / SSD Company LTD", "ConnecTV Bass Fishin' (PAL)", MACHINE_IS_SKELETON)
|
||||
CONS( 2001, rad_bass, 0, 0, xavix, xavix, xavix_state, init_xavix, "Radica / SSD Company LTD", "Play TV Bass Fishin' (NTSC)", MACHINE_IS_SKELETON)
|
||||
CONS( 2001, rad_bassp, rad_bass, 0, xavixp, xavixp, xavix_state, init_xavix, "Radica / SSD Company LTD", "ConnecTV Bass Fishin' (PAL)", MACHINE_IS_SKELETON)
|
||||
|
||||
// there is another 'Snowboarder' with a white coloured board, it appears to be a newer game closer to 'SSX Snowboarder' but without the SSX license.
|
||||
CONS( 2001, rad_snow, 0, 0, xavix, rad_snow, xavix_state, init_rad_box, "Radica / SSD Company LTD", "Play TV Snowboarder (Blue) (NTSC)", MACHINE_IS_SKELETON)
|
||||
CONS( 2001, rad_snowp, rad_snow, 0, xavixp, rad_snowp,xavix_state, init_rad_box, "Radica / SSD Company LTD", "ConnecTV Snowboarder (Blue) (PAL)", MACHINE_IS_SKELETON)
|
||||
CONS( 2001, rad_snow, 0, 0, xavix, rad_snow, xavix_state, init_xavix, "Radica / SSD Company LTD", "Play TV Snowboarder (Blue) (NTSC)", MACHINE_IS_SKELETON)
|
||||
CONS( 2001, rad_snowp, rad_snow, 0, xavixp, rad_snowp,xavix_state, init_xavix, "Radica / SSD Company LTD", "ConnecTV Snowboarder (Blue) (PAL)", MACHINE_IS_SKELETON)
|
||||
|
||||
CONS( 2003, rad_madf, 0, 0, xavix, xavix, xavix_state, init_taitons1, "Radica / SSD Company LTD", "EA Sports Madden Football (NTSC)", MACHINE_IS_SKELETON) // no Play TV branding, USA only release?
|
||||
CONS( 2003, rad_madf, 0, 0, xavix, xavix, xavix_state, init_xavix, "Radica / SSD Company LTD", "EA Sports Madden Football (NTSC)", MACHINE_IS_SKELETON) // no Play TV branding, USA only release?
|
||||
|
||||
CONS( 200?, rad_fb, 0, 0, xavix, xavix, xavix_state, init_taitons1, "Radica / SSD Company LTD", "Play TV Football (NTSC)", MACHINE_IS_SKELETON) // USA only release? doesn't change logo for PAL
|
||||
CONS( 200?, rad_fb, 0, 0, xavix, xavix, xavix_state, init_xavix, "Radica / SSD Company LTD", "Play TV Football (NTSC)", MACHINE_IS_SKELETON) // USA only release? doesn't change logo for PAL
|
||||
|
||||
CONS( 200?, rad_rh, 0, 0, xavix, xavix, xavix_state, init_taitons1, "Radioa / Fisher-Price / SSD Company LTD", "Play TV Rescue Heroes", MACHINE_IS_SKELETON)
|
||||
CONS( 200?, rad_rh, 0, 0, xavix, xavix, xavix_state, init_xavix, "Radioa / Fisher-Price / SSD Company LTD", "Play TV Rescue Heroes", MACHINE_IS_SKELETON)
|
||||
|
||||
CONS( 200?, epo_efdx, 0, 0, xavix, xavix, xavix_state, init_taitons1, "Epoch / SSD Company LTD", "Excite Fishing DX (Japan)", MACHINE_IS_SKELETON)
|
||||
CONS( 200?, epo_efdx, 0, 0, xavix, xavix, xavix_state, init_xavix, "Epoch / SSD Company LTD", "Excite Fishing DX (Japan)", MACHINE_IS_SKELETON)
|
||||
|
||||
CONS( 200?, has_wamg, 0, 0, xavix, xavix, xavix_state, init_rad_box, "Hasbro / Milton Bradley / SSD Company LTD", "TV Wild Adventure Mini Golf", MACHINE_IS_SKELETON)
|
||||
CONS( 200?, has_wamg, 0, 0, xavix, xavix, xavix_state, init_xavix, "Hasbro / Milton Bradley / SSD Company LTD", "TV Wild Adventure Mini Golf", MACHINE_IS_SKELETON)
|
||||
|
||||
CONS( 200?, eka_base, 0, 0, xavix, xavix, xavix_state, init_xavix, "Takara / Hasbro / SSD Company LTD", "e-kara (US?)", MACHINE_IS_SKELETON)
|
||||
CONS( 200?, eka_base, 0, 0, xavix, xavix, xavix_state, init_xavix, "Takara / Hasbro / SSD Company LTD", "e-kara (US?)", MACHINE_IS_SKELETON)
|
||||
|
||||
CONS( 200?, eka_strt, 0, 0, xavix, xavix, xavix_state, init_xavix, "Takara / Hasbro / SSD Company LTD", "e-kara Starter (US?)", MACHINE_IS_SKELETON)
|
||||
CONS( 200?, eka_strt, 0, 0, xavix, xavix, xavix_state, init_xavix, "Takara / Hasbro / SSD Company LTD", "e-kara Starter (US?)", MACHINE_IS_SKELETON)
|
||||
|
||||
CONS( 200?, eka_vol1, 0, 0, xavix, xavix, xavix_state, init_xavix, "Takara / Hasbro / SSD Company LTD", "e-kara Volume 1 (US?)", MACHINE_IS_SKELETON) // insert calls it 'HIT MIX Vol 1'
|
||||
CONS( 200?, eka_vol1, 0, 0, xavix, xavix, xavix_state, init_xavix, "Takara / Hasbro / SSD Company LTD", "e-kara Volume 1 (US?)", MACHINE_IS_SKELETON) // insert calls it 'HIT MIX Vol 1'
|
||||
|
||||
CONS( 200?, eka_vol2, 0, 0, xavix, xavix, xavix_state, init_xavix, "Takara / Hasbro / SSD Company LTD", "e-kara Volume 2 (US?)", MACHINE_IS_SKELETON) // insert calls it 'HIT MIX Vol 2'
|
||||
CONS( 200?, eka_vol2, 0, 0, xavix, xavix , xavix_state, init_xavix, "Takara / Hasbro / SSD Company LTD", "e-kara Volume 2 (US?)", MACHINE_IS_SKELETON) // insert calls it 'HIT MIX Vol 2'
|
||||
|
||||
/* The 'XaviXPORT' isn't a real console, more of a TV adapter, all the actual hardware (CPU including video hw, sound hw) is in the cartridges and controllers
|
||||
and can vary between games, see notes at top of driver.
|
||||
|
@ -19,22 +19,17 @@ public:
|
||||
: driver_device(mconfig, type, tag),
|
||||
m_maincpu(*this, "maincpu"),
|
||||
m_mainram(*this, "mainram"),
|
||||
m_spr_attr0(*this, "spr_attr0"),
|
||||
m_spr_attr1(*this, "spr_attr1"),
|
||||
m_spr_ypos(*this, "spr_ypos"),
|
||||
m_spr_xpos(*this, "spr_xpos"),
|
||||
m_spr_addr_lo(*this, "spr_addr_lo"),
|
||||
m_spr_addr_md(*this, "spr_addr_md"),
|
||||
m_spr_addr_hi(*this, "spr_addr_hi"),
|
||||
m_palram1(*this, "palram1"),
|
||||
m_palram2(*this, "palram2"),
|
||||
m_spr_attra(*this, "spr_attra"),
|
||||
m_fragment_sprite(*this, "fragment_sprite"),
|
||||
m_palram_sh(*this, "palram_sh"),
|
||||
m_palram_l(*this, "palram_l"),
|
||||
m_colmix_sh(*this, "colmix_sh"),
|
||||
m_colmix_l(*this, "colmix_l"),
|
||||
m_segment_regs(*this, "segment_regs"),
|
||||
m_palette(*this, "palette"),
|
||||
m_in0(*this, "IN0"),
|
||||
m_in1(*this, "IN1"),
|
||||
m_region(*this, "REGION"),
|
||||
m_gfxdecode(*this, "gfxdecode"),
|
||||
m_alt_addressing(0),
|
||||
m_lowbus(*this, "lowbus")
|
||||
{ }
|
||||
|
||||
@ -43,8 +38,6 @@ public:
|
||||
void xavix2000(machine_config &config);
|
||||
|
||||
void init_xavix();
|
||||
void init_taitons1();
|
||||
void init_rad_box();
|
||||
|
||||
private:
|
||||
// screen updates
|
||||
@ -67,19 +60,19 @@ private:
|
||||
DECLARE_READ8_MEMBER(main2_r);
|
||||
DECLARE_WRITE8_MEMBER(main2_w);
|
||||
|
||||
DECLARE_WRITE8_MEMBER(xavix_7900_w);
|
||||
DECLARE_WRITE8_MEMBER(xavix_7901_w);
|
||||
DECLARE_WRITE8_MEMBER(xavix_7902_w);
|
||||
DECLARE_WRITE8_MEMBER(extintrf_7900_w);
|
||||
DECLARE_WRITE8_MEMBER(extintrf_7901_w);
|
||||
DECLARE_WRITE8_MEMBER(extintrf_7902_w);
|
||||
|
||||
DECLARE_WRITE8_MEMBER(xavix_7a80_w);
|
||||
DECLARE_WRITE8_MEMBER(xavix_7b00_w);
|
||||
DECLARE_READ8_MEMBER(xavix_7b80_r);
|
||||
DECLARE_WRITE8_MEMBER(xavix_7b80_w);
|
||||
DECLARE_WRITE8_MEMBER(xavix_7b81_w);
|
||||
DECLARE_WRITE8_MEMBER(adc_7b00_w);
|
||||
DECLARE_READ8_MEMBER(adc_7b80_r);
|
||||
DECLARE_WRITE8_MEMBER(adc_7b80_w);
|
||||
DECLARE_WRITE8_MEMBER(adc_7b81_w);
|
||||
|
||||
DECLARE_WRITE8_MEMBER(xavix_7810_w);
|
||||
DECLARE_WRITE8_MEMBER(slotreg_7810_w);
|
||||
|
||||
DECLARE_WRITE8_MEMBER(dma_trigger_w);
|
||||
DECLARE_WRITE8_MEMBER(rom_dmatrg_w);
|
||||
DECLARE_WRITE8_MEMBER(rom_dmasrc_lo_w);
|
||||
DECLARE_WRITE8_MEMBER(rom_dmasrc_md_w);
|
||||
DECLARE_WRITE8_MEMBER(rom_dmasrc_hi_w);
|
||||
@ -87,24 +80,24 @@ private:
|
||||
DECLARE_WRITE8_MEMBER(rom_dmadst_hi_w);
|
||||
DECLARE_WRITE8_MEMBER(rom_dmalen_lo_w);
|
||||
DECLARE_WRITE8_MEMBER(rom_dmalen_hi_w);
|
||||
DECLARE_READ8_MEMBER(dma_trigger_r);
|
||||
DECLARE_READ8_MEMBER(rom_dmatrg_r);
|
||||
|
||||
DECLARE_WRITE8_MEMBER(vid_dma_params_1_w);
|
||||
DECLARE_WRITE8_MEMBER(vid_dma_params_2_w);
|
||||
DECLARE_WRITE8_MEMBER(vid_dma_trigger_w);
|
||||
DECLARE_READ8_MEMBER(vid_dma_trigger_r);
|
||||
DECLARE_WRITE8_MEMBER(spritefragment_dma_params_1_w);
|
||||
DECLARE_WRITE8_MEMBER(spritefragment_dma_params_2_w);
|
||||
DECLARE_WRITE8_MEMBER(spritefragment_dma_trg_w);
|
||||
DECLARE_READ8_MEMBER(spritefragment_dma_status_r);
|
||||
|
||||
DECLARE_READ8_MEMBER(xavix_io_0_r);
|
||||
DECLARE_READ8_MEMBER(xavix_io_1_r);
|
||||
DECLARE_READ8_MEMBER(xavix_7a02_r);
|
||||
DECLARE_READ8_MEMBER(xavix_7a03_r);
|
||||
DECLARE_READ8_MEMBER(io_0_r);
|
||||
DECLARE_READ8_MEMBER(io_1_r);
|
||||
DECLARE_READ8_MEMBER(io_2_r);
|
||||
DECLARE_READ8_MEMBER(io_3_r);
|
||||
|
||||
DECLARE_WRITE8_MEMBER(xavix_7a00_w);
|
||||
DECLARE_WRITE8_MEMBER(xavix_7a01_w);
|
||||
DECLARE_WRITE8_MEMBER(xavix_7a02_w);
|
||||
DECLARE_WRITE8_MEMBER(xavix_7a03_w);
|
||||
DECLARE_WRITE8_MEMBER(io_0_w);
|
||||
DECLARE_WRITE8_MEMBER(io_1_w);
|
||||
DECLARE_WRITE8_MEMBER(io_2_w);
|
||||
DECLARE_WRITE8_MEMBER(io_3_w);
|
||||
|
||||
DECLARE_WRITE8_MEMBER(irq_enable_w);
|
||||
DECLARE_WRITE8_MEMBER(vector_enable_w);
|
||||
DECLARE_WRITE8_MEMBER(irq_vector0_lo_w);
|
||||
DECLARE_WRITE8_MEMBER(irq_vector0_hi_w);
|
||||
DECLARE_WRITE8_MEMBER(irq_vector1_lo_w);
|
||||
@ -113,69 +106,72 @@ private:
|
||||
DECLARE_READ8_MEMBER(irq_source_r);
|
||||
DECLARE_WRITE8_MEMBER(irq_source_w);
|
||||
|
||||
DECLARE_READ8_MEMBER(xavix_6fe8_r);
|
||||
DECLARE_WRITE8_MEMBER(xavix_6fe8_w);
|
||||
DECLARE_READ8_MEMBER(xavix_6fe9_r);
|
||||
DECLARE_WRITE8_MEMBER(xavix_6fe9_w);
|
||||
DECLARE_WRITE8_MEMBER(xavix_6fea_w);
|
||||
DECLARE_READ8_MEMBER(arena_start_r);
|
||||
DECLARE_WRITE8_MEMBER(arena_start_w);
|
||||
DECLARE_READ8_MEMBER(arena_end_r);
|
||||
DECLARE_WRITE8_MEMBER(arena_end_w);
|
||||
DECLARE_WRITE8_MEMBER(arena_control_w);
|
||||
|
||||
DECLARE_READ8_MEMBER(xavix_6ff0_r);
|
||||
DECLARE_WRITE8_MEMBER(xavix_6ff0_w);
|
||||
DECLARE_READ8_MEMBER(colmix_6ff0_r);
|
||||
DECLARE_WRITE8_MEMBER(colmix_6ff0_w);
|
||||
|
||||
DECLARE_WRITE8_MEMBER(xavix_6ff1_w);
|
||||
DECLARE_WRITE8_MEMBER(xavix_6ff2_w);
|
||||
DECLARE_WRITE8_MEMBER(colmix_6ff1_w);
|
||||
DECLARE_WRITE8_MEMBER(colmix_6ff2_w);
|
||||
|
||||
DECLARE_READ8_MEMBER(xavix_6ff8_r);
|
||||
DECLARE_WRITE8_MEMBER(xavix_6ff8_w);
|
||||
DECLARE_READ8_MEMBER(dispctrl_6ff8_r);
|
||||
DECLARE_WRITE8_MEMBER(dispctrl_6ff8_w);
|
||||
|
||||
DECLARE_WRITE8_MEMBER(xavix_6ffa_w);
|
||||
DECLARE_WRITE8_MEMBER(xavix_6ffb_w);
|
||||
DECLARE_WRITE8_MEMBER(dispctrl_6ffa_w);
|
||||
DECLARE_WRITE8_MEMBER(dispctrl_6ffb_w);
|
||||
|
||||
DECLARE_READ8_MEMBER(xavix_75f0_r);
|
||||
DECLARE_WRITE8_MEMBER(xavix_75f0_w);
|
||||
DECLARE_READ8_MEMBER(sound_75f0_r);
|
||||
DECLARE_WRITE8_MEMBER(sound_75f0_w);
|
||||
|
||||
DECLARE_READ8_MEMBER(xavix_75f1_r);
|
||||
DECLARE_WRITE8_MEMBER(xavix_75f1_w);
|
||||
DECLARE_READ8_MEMBER(sound_75f1_r);
|
||||
DECLARE_WRITE8_MEMBER(sound_75f1_w);
|
||||
|
||||
DECLARE_READ8_MEMBER(xavix_75f4_r);
|
||||
DECLARE_READ8_MEMBER(xavix_75f5_r);
|
||||
DECLARE_READ8_MEMBER(xavix_75f6_r);
|
||||
DECLARE_WRITE8_MEMBER(xavix_75f6_w);
|
||||
DECLARE_READ8_MEMBER(sound_75f4_r);
|
||||
DECLARE_READ8_MEMBER(sound_75f5_r);
|
||||
DECLARE_READ8_MEMBER(sound_75f6_r);
|
||||
DECLARE_WRITE8_MEMBER(sound_75f6_w);
|
||||
|
||||
DECLARE_WRITE8_MEMBER(xavix_75f7_w);
|
||||
DECLARE_WRITE8_MEMBER(sound_75f7_w);
|
||||
|
||||
DECLARE_READ8_MEMBER(xavix_75f8_r);
|
||||
DECLARE_WRITE8_MEMBER(xavix_75f8_w);
|
||||
DECLARE_READ8_MEMBER(sound_75f8_r);
|
||||
DECLARE_WRITE8_MEMBER(sound_75f8_w);
|
||||
|
||||
DECLARE_READ8_MEMBER(xavix_75f9_r);
|
||||
DECLARE_WRITE8_MEMBER(xavix_75f9_w);
|
||||
DECLARE_READ8_MEMBER(sound_75f9_r);
|
||||
DECLARE_WRITE8_MEMBER(sound_75f9_w);
|
||||
|
||||
DECLARE_READ8_MEMBER(xavix_75fa_r);
|
||||
DECLARE_WRITE8_MEMBER(xavix_75fa_w);
|
||||
DECLARE_READ8_MEMBER(xavix_75fb_r);
|
||||
DECLARE_WRITE8_MEMBER(xavix_75fb_w);
|
||||
DECLARE_READ8_MEMBER(xavix_75fc_r);
|
||||
DECLARE_WRITE8_MEMBER(xavix_75fc_w);
|
||||
DECLARE_READ8_MEMBER(xavix_75fd_r);
|
||||
DECLARE_WRITE8_MEMBER(xavix_75fd_w);
|
||||
DECLARE_READ8_MEMBER(sound_75fa_r);
|
||||
DECLARE_WRITE8_MEMBER(sound_75fa_w);
|
||||
DECLARE_READ8_MEMBER(sound_75fb_r);
|
||||
DECLARE_WRITE8_MEMBER(sound_75fb_w);
|
||||
DECLARE_READ8_MEMBER(sound_75fc_r);
|
||||
DECLARE_WRITE8_MEMBER(sound_75fc_w);
|
||||
DECLARE_READ8_MEMBER(sound_75fd_r);
|
||||
DECLARE_WRITE8_MEMBER(sound_75fd_w);
|
||||
|
||||
DECLARE_WRITE8_MEMBER(xavix_75fe_w);
|
||||
DECLARE_WRITE8_MEMBER(xavix_75ff_w);
|
||||
DECLARE_WRITE8_MEMBER(sound_75fe_w);
|
||||
DECLARE_WRITE8_MEMBER(sound_75ff_w);
|
||||
|
||||
DECLARE_WRITE8_MEMBER(xavix_7c00_w);
|
||||
DECLARE_READ8_MEMBER(xavix_7c01_r);
|
||||
DECLARE_WRITE8_MEMBER(xavix_7c01_w);
|
||||
DECLARE_WRITE8_MEMBER(xavix_7c02_w);
|
||||
DECLARE_WRITE8_MEMBER(timer_control_w);
|
||||
DECLARE_READ8_MEMBER(timer_baseval_r);
|
||||
DECLARE_WRITE8_MEMBER(timer_baseval_w);
|
||||
DECLARE_WRITE8_MEMBER(timer_freq_w);
|
||||
|
||||
DECLARE_WRITE8_MEMBER(xavix_6fc0_w);
|
||||
DECLARE_WRITE8_MEMBER(tmap1_regs_w);
|
||||
DECLARE_WRITE8_MEMBER(xavix_6fd8_w);
|
||||
DECLARE_WRITE8_MEMBER(tmap2_regs_w);
|
||||
DECLARE_READ8_MEMBER(tmap1_regs_r);
|
||||
DECLARE_READ8_MEMBER(tmap2_regs_r);
|
||||
|
||||
DECLARE_WRITE8_MEMBER(spriteregs_w);
|
||||
|
||||
DECLARE_READ8_MEMBER(pal_ntsc_r);
|
||||
|
||||
DECLARE_READ8_MEMBER(xavix_4000_r);
|
||||
DECLARE_READ8_MEMBER(xavix_memoryemu_txarray_r);
|
||||
DECLARE_WRITE8_MEMBER(xavix_memoryemu_txarray_w);
|
||||
uint8_t m_txarray[3];
|
||||
|
||||
DECLARE_READ8_MEMBER(mult_r);
|
||||
DECLARE_WRITE8_MEMBER(mult_w);
|
||||
@ -193,7 +189,7 @@ private:
|
||||
uint8_t m_rom_dmalen_lo_data;
|
||||
uint8_t m_rom_dmalen_hi_data;
|
||||
|
||||
uint8_t m_irq_enable_data;
|
||||
uint8_t m_vectorenable;
|
||||
uint8_t m_irq_vector0_lo_data;
|
||||
uint8_t m_irq_vector0_hi_data;
|
||||
uint8_t m_irq_vector1_lo_data;
|
||||
@ -202,39 +198,35 @@ private:
|
||||
uint8_t m_multparams[3];
|
||||
uint8_t m_multresults[2];
|
||||
|
||||
uint8_t m_vid_dma_param1[2];
|
||||
uint8_t m_vid_dma_param2[2];
|
||||
uint8_t m_spritefragment_dmaparam1[2];
|
||||
uint8_t m_spritefragment_dmaparam2[2];
|
||||
|
||||
uint8_t m_tmap1_regs[8];
|
||||
uint8_t m_tmap2_regs[8];
|
||||
|
||||
uint8_t m_6fe8;
|
||||
uint8_t m_6fe9;
|
||||
uint8_t m_arena_start;
|
||||
uint8_t m_arena_end;
|
||||
|
||||
uint8_t m_6ff0;
|
||||
uint8_t m_6ff8;
|
||||
|
||||
uint8_t m_75fx[0x10];
|
||||
uint8_t m_soundregs[0x10];
|
||||
|
||||
uint8_t m_7c01;
|
||||
uint8_t m_timer_baseval;
|
||||
|
||||
uint8_t get_vectors(int which, int half);
|
||||
int16_t get_vectors(int which, int half);
|
||||
|
||||
required_shared_ptr<uint8_t> m_mainram;
|
||||
|
||||
required_shared_ptr<uint8_t> m_spr_attr0;
|
||||
required_shared_ptr<uint8_t> m_spr_attr1;
|
||||
required_shared_ptr<uint8_t> m_spr_ypos;
|
||||
required_shared_ptr<uint8_t> m_spr_xpos;
|
||||
required_shared_ptr<uint8_t> m_fragment_sprite;
|
||||
|
||||
required_shared_ptr<uint8_t> m_spr_addr_lo;
|
||||
required_shared_ptr<uint8_t> m_spr_addr_md;
|
||||
required_shared_ptr<uint8_t> m_spr_addr_hi;
|
||||
required_shared_ptr<uint8_t> m_palram_sh;
|
||||
required_shared_ptr<uint8_t> m_palram_l;
|
||||
required_shared_ptr<uint8_t> m_colmix_sh;
|
||||
required_shared_ptr<uint8_t> m_colmix_l;
|
||||
|
||||
required_shared_ptr<uint8_t> m_palram1;
|
||||
required_shared_ptr<uint8_t> m_palram2;
|
||||
|
||||
required_shared_ptr<uint8_t> m_spr_attra;
|
||||
required_shared_ptr<uint8_t> m_segment_regs;
|
||||
|
||||
required_device<palette_device> m_palette;
|
||||
|
||||
@ -250,6 +242,8 @@ private:
|
||||
void draw_tilemap(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect, int which);
|
||||
void draw_sprites(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
|
||||
|
||||
uint8_t m_spritereg;
|
||||
|
||||
int m_rgnlen;
|
||||
uint8_t* m_rgn;
|
||||
|
||||
@ -262,7 +256,6 @@ private:
|
||||
|
||||
int get_current_address_byte();
|
||||
|
||||
int m_alt_addressing;
|
||||
required_device<address_map_bank_device> m_lowbus;
|
||||
};
|
||||
|
||||
|
@ -5,11 +5,11 @@
|
||||
#include "includes/xavix.h"
|
||||
|
||||
// general DMA fro ROM, not Video DMA
|
||||
WRITE8_MEMBER(xavix_state::dma_trigger_w)
|
||||
WRITE8_MEMBER(xavix_state::rom_dmatrg_w)
|
||||
{
|
||||
if (data & 0x01) // namcons2 writes 0x81, most of the time things write 0x01
|
||||
{
|
||||
logerror("%s: dma_trigger_w (do DMA?) %02x\n", machine().describe_context(), data);
|
||||
logerror("%s: rom_dmatrg_w (do DMA?) %02x\n", machine().describe_context(), data);
|
||||
|
||||
uint32_t source = (m_rom_dmasrc_hi_data << 16) | (m_rom_dmasrc_md_data << 8) | m_rom_dmasrc_lo_data;
|
||||
uint16_t dest = (m_rom_dmadst_hi_data << 8) | m_rom_dmadst_lo_data;
|
||||
@ -28,7 +28,7 @@ WRITE8_MEMBER(xavix_state::dma_trigger_w)
|
||||
}
|
||||
else // the interrupt routine writes 0x80 to the trigger, maybe 'clear IRQ?'
|
||||
{
|
||||
logerror("%s: dma_trigger_w (unknown) %02x\n", machine().describe_context(), data);
|
||||
logerror("%s: rom_dmatrg_w (unknown) %02x\n", machine().describe_context(), data);
|
||||
}
|
||||
}
|
||||
|
||||
@ -80,18 +80,18 @@ WRITE8_MEMBER(xavix_state::rom_dmalen_hi_w)
|
||||
logerror(" (DMA len of %02x%02x)\n", m_rom_dmalen_hi_data, m_rom_dmalen_lo_data);
|
||||
}
|
||||
|
||||
READ8_MEMBER(xavix_state::dma_trigger_r)
|
||||
READ8_MEMBER(xavix_state::rom_dmatrg_r)
|
||||
{
|
||||
logerror("%s: dma_trigger_r (operation status?)\n", machine().describe_context());
|
||||
logerror("%s: rom_dmatrg_r (operation status?)\n", machine().describe_context());
|
||||
return 0x00;
|
||||
}
|
||||
|
||||
|
||||
|
||||
WRITE8_MEMBER(xavix_state::irq_enable_w)
|
||||
WRITE8_MEMBER(xavix_state::vector_enable_w)
|
||||
{
|
||||
logerror("%s: irq_enable_w %02x\n", machine().describe_context(), data);
|
||||
m_irq_enable_data = data;
|
||||
logerror("%s: vector_enable_w %02x\n", machine().describe_context(), data);
|
||||
m_vectorenable = data;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(xavix_state::irq_vector0_lo_w)
|
||||
@ -119,19 +119,19 @@ WRITE8_MEMBER(xavix_state::irq_vector1_hi_w)
|
||||
}
|
||||
|
||||
|
||||
WRITE8_MEMBER(xavix_state::xavix_7900_w)
|
||||
WRITE8_MEMBER(xavix_state::extintrf_7900_w)
|
||||
{
|
||||
logerror("%s: xavix_7900_w %02x (---FIRST WRITE ON STARTUP---)\n", machine().describe_context(), data);
|
||||
logerror("%s: extintrf_7900_w %02x (---FIRST WRITE ON STARTUP---)\n", machine().describe_context(), data);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(xavix_state::xavix_7901_w)
|
||||
WRITE8_MEMBER(xavix_state::extintrf_7901_w)
|
||||
{
|
||||
logerror("%s: xavix_7901_w %02x\n", machine().describe_context(), data);
|
||||
logerror("%s: extintrf_7901_w %02x\n", machine().describe_context(), data);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(xavix_state::xavix_7902_w)
|
||||
WRITE8_MEMBER(xavix_state::extintrf_7902_w)
|
||||
{
|
||||
logerror("%s: xavix_7902_w %02x\n", machine().describe_context(), data);
|
||||
logerror("%s: extintrf_7902_w %02x\n", machine().describe_context(), data);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(xavix_state::xavix_7a80_w)
|
||||
@ -139,256 +139,83 @@ WRITE8_MEMBER(xavix_state::xavix_7a80_w)
|
||||
logerror("%s: xavix_7a80_w %02x\n", machine().describe_context(), data);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(xavix_state::xavix_7b00_w)
|
||||
WRITE8_MEMBER(xavix_state::adc_7b00_w)
|
||||
{
|
||||
logerror("%s: xavix_7b00_w %02x\n", machine().describe_context(), data);
|
||||
logerror("%s: adc_7b00_w %02x\n", machine().describe_context(), data);
|
||||
}
|
||||
|
||||
READ8_MEMBER(xavix_state::xavix_7b80_r)
|
||||
READ8_MEMBER(xavix_state::adc_7b80_r)
|
||||
{
|
||||
logerror("%s: xavix_7b80_r\n", machine().describe_context());
|
||||
logerror("%s: adc_7b80_r\n", machine().describe_context());
|
||||
return 0xff;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(xavix_state::xavix_7b80_w)
|
||||
WRITE8_MEMBER(xavix_state::adc_7b80_w)
|
||||
{
|
||||
logerror("%s: xavix_7b80_w %02x\n", machine().describe_context(), data);
|
||||
logerror("%s: adc_7b80_w %02x\n", machine().describe_context(), data);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(xavix_state::xavix_7b81_w)
|
||||
WRITE8_MEMBER(xavix_state::adc_7b81_w)
|
||||
{
|
||||
logerror("%s: xavix_7b81_w %02x\n", machine().describe_context(), data);
|
||||
logerror("%s: adc_7b81_w %02x\n", machine().describe_context(), data);
|
||||
}
|
||||
|
||||
|
||||
WRITE8_MEMBER(xavix_state::xavix_7810_w)
|
||||
WRITE8_MEMBER(xavix_state::slotreg_7810_w)
|
||||
{
|
||||
logerror("%s: xavix_7810_w %02x\n", machine().describe_context(), data);
|
||||
logerror("%s: slotreg_7810_w %02x\n", machine().describe_context(), data);
|
||||
}
|
||||
|
||||
|
||||
TIMER_DEVICE_CALLBACK_MEMBER(xavix_state::scanline_cb)
|
||||
{
|
||||
/*
|
||||
int scanline = param;
|
||||
|
||||
if (scanline == 200)
|
||||
{
|
||||
if (m_irq_enable_data != 0)
|
||||
m_maincpu->set_input_line(INPUT_LINE_IRQ0,HOLD_LINE);
|
||||
}
|
||||
*/
|
||||
}
|
||||
|
||||
INTERRUPT_GEN_MEMBER(xavix_state::interrupt)
|
||||
{
|
||||
// if (m_irq_enable_data != 0)
|
||||
// m_maincpu->set_input_line(INPUT_LINE_IRQ0,HOLD_LINE);
|
||||
|
||||
// this logic is clearly VERY wrong
|
||||
|
||||
if (m_irq_enable_data != 0)
|
||||
{
|
||||
if (m_6ff8)
|
||||
m_maincpu->pulse_input_line(INPUT_LINE_NMI, attotime::zero);
|
||||
}
|
||||
if (m_6ff8 & 0x20)
|
||||
m_maincpu->pulse_input_line(INPUT_LINE_NMI, attotime::zero);
|
||||
}
|
||||
|
||||
|
||||
|
||||
READ8_MEMBER(xavix_state::xavix_6ff0_r)
|
||||
{
|
||||
//logerror("%s: xavix_6ff0_r\n", machine().describe_context());
|
||||
return m_6ff0;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(xavix_state::xavix_6ff0_w)
|
||||
WRITE8_MEMBER(xavix_state::colmix_6ff2_w)
|
||||
{
|
||||
// expected to return data written
|
||||
m_6ff0 = data;
|
||||
//logerror("%s: xavix_6ff0_w %02x\n", machine().describe_context(), data);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(xavix_state::xavix_6ff1_w)
|
||||
{
|
||||
logerror("%s: xavix_6ff1_w %02x\n", machine().describe_context(), data);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(xavix_state::xavix_6ff2_w)
|
||||
{
|
||||
logerror("%s: xavix_6ff2_w %02x\n", machine().describe_context(), data);
|
||||
logerror("%s: colmix_6ff2_w %02x\n", machine().describe_context(), data);
|
||||
}
|
||||
|
||||
|
||||
READ8_MEMBER(xavix_state::xavix_6ff8_r)
|
||||
READ8_MEMBER(xavix_state::dispctrl_6ff8_r)
|
||||
{
|
||||
//logerror("%s: xavix_6ff8_r\n", machine().describe_context());
|
||||
//logerror("%s: dispctrl_6ff8_r\n", machine().describe_context());
|
||||
return m_6ff8;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(xavix_state::xavix_6ff8_w)
|
||||
WRITE8_MEMBER(xavix_state::dispctrl_6ff8_w)
|
||||
{
|
||||
// I think this is something to do with IRQ ack / enable
|
||||
m_6ff8 = data;
|
||||
logerror("%s: xavix_6ff8_w %02x\n", machine().describe_context(), data);
|
||||
logerror("%s: dispctrl_6ff8_w %02x\n", machine().describe_context(), data);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(xavix_state::xavix_6ffa_w)
|
||||
WRITE8_MEMBER(xavix_state::dispctrl_6ffa_w)
|
||||
{
|
||||
logerror("%s: xavix_6ffa_w %02x\n", machine().describe_context(), data);
|
||||
logerror("%s: dispctrl_6ffa_w %02x\n", machine().describe_context(), data);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(xavix_state::xavix_6ffb_w)
|
||||
WRITE8_MEMBER(xavix_state::dispctrl_6ffb_w)
|
||||
{
|
||||
logerror("%s: xavix_6ffb_w %02x\n", machine().describe_context(), data);
|
||||
logerror("%s: dispctrl_6ffb_w %02x\n", machine().describe_context(), data);
|
||||
}
|
||||
|
||||
READ8_MEMBER(xavix_state::xavix_75f0_r)
|
||||
{
|
||||
logerror("%s: xavix_75f0_r\n", machine().describe_context());
|
||||
return m_75fx[0];
|
||||
}
|
||||
|
||||
READ8_MEMBER(xavix_state::xavix_75f1_r)
|
||||
{
|
||||
logerror("%s: xavix_75f1_r\n", machine().describe_context());
|
||||
return m_75fx[1];
|
||||
}
|
||||
|
||||
READ8_MEMBER(xavix_state::xavix_75f6_r)
|
||||
{
|
||||
logerror("%s: xavix_75f6_r\n", machine().describe_context());
|
||||
return m_75fx[6];
|
||||
}
|
||||
|
||||
READ8_MEMBER(xavix_state::xavix_75f8_r)
|
||||
{
|
||||
logerror("%s: xavix_75f8_r\n", machine().describe_context());
|
||||
return m_75fx[8];
|
||||
}
|
||||
|
||||
READ8_MEMBER(xavix_state::xavix_75f9_r)
|
||||
{
|
||||
logerror("%s: xavix_75f9_r\n", machine().describe_context());
|
||||
return 0x00;
|
||||
}
|
||||
|
||||
READ8_MEMBER(xavix_state::xavix_75fa_r)
|
||||
{
|
||||
logerror("%s: xavix_75fa_r\n", machine().describe_context());
|
||||
return m_75fx[10];
|
||||
}
|
||||
|
||||
READ8_MEMBER(xavix_state::xavix_75fb_r)
|
||||
{
|
||||
logerror("%s: xavix_75fb_r\n", machine().describe_context());
|
||||
return m_75fx[11];
|
||||
}
|
||||
|
||||
READ8_MEMBER(xavix_state::xavix_75fc_r)
|
||||
{
|
||||
logerror("%s: xavix_75fc_r\n", machine().describe_context());
|
||||
return m_75fx[12];
|
||||
}
|
||||
|
||||
READ8_MEMBER(xavix_state::xavix_75fd_r)
|
||||
{
|
||||
logerror("%s: xavix_75fd_r\n", machine().describe_context());
|
||||
return m_75fx[13];
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
WRITE8_MEMBER(xavix_state::xavix_75f0_w)
|
||||
{
|
||||
// expected to return data written
|
||||
m_75fx[0] = data;
|
||||
logerror("%s: xavix_75f0_w %02x\n", machine().describe_context(), data);
|
||||
}
|
||||
|
||||
|
||||
WRITE8_MEMBER(xavix_state::xavix_75f1_w)
|
||||
{
|
||||
// expected to return data written
|
||||
m_75fx[1] = data;
|
||||
logerror("%s: xavix_75f1_w %02x\n", machine().describe_context(), data);
|
||||
}
|
||||
|
||||
|
||||
WRITE8_MEMBER(xavix_state::xavix_75f6_w)
|
||||
{
|
||||
// expected to return data written
|
||||
m_75fx[6] = data;
|
||||
logerror("%s: xavix_75f6_w %02x\n", machine().describe_context(), data);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(xavix_state::xavix_75f7_w)
|
||||
{
|
||||
m_75fx[7] = data;
|
||||
logerror("%s: xavix_75f7_w %02x\n", machine().describe_context(), data);
|
||||
}
|
||||
|
||||
|
||||
WRITE8_MEMBER(xavix_state::xavix_75f8_w)
|
||||
{
|
||||
// expected to return data written
|
||||
m_75fx[8] = data;
|
||||
logerror("%s: xavix_75f8_w %02x\n", machine().describe_context(), data);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(xavix_state::xavix_75f9_w)
|
||||
{
|
||||
m_75fx[9] = data;
|
||||
logerror("%s: xavix_75f9_w %02x\n", machine().describe_context(), data);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(xavix_state::xavix_75fa_w)
|
||||
{
|
||||
// expected to return data written
|
||||
m_75fx[10] = data;
|
||||
logerror("%s: xavix_75fa_w %02x\n", machine().describe_context(), data);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(xavix_state::xavix_75fb_w)
|
||||
{
|
||||
// expected to return data written
|
||||
m_75fx[11] = data;
|
||||
logerror("%s: xavix_75fb_w %02x\n", machine().describe_context(), data);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(xavix_state::xavix_75fc_w)
|
||||
{
|
||||
// expected to return data written
|
||||
m_75fx[12] = data;
|
||||
logerror("%s: xavix_75fc_w %02x\n", machine().describe_context(), data);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(xavix_state::xavix_75fd_w)
|
||||
{
|
||||
// expected to return data written
|
||||
m_75fx[13] = data;
|
||||
logerror("%s: xavix_75fd_w %02x\n", machine().describe_context(), data);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(xavix_state::xavix_75fe_w)
|
||||
{
|
||||
m_75fx[14] = data;
|
||||
logerror("%s: xavix_75fe_w %02x\n", machine().describe_context(), data);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(xavix_state::xavix_75ff_w)
|
||||
{
|
||||
m_75fx[15] = data;
|
||||
logerror("%s: xavix_75ff_w %02x\n", machine().describe_context(), data);
|
||||
}
|
||||
|
||||
READ8_MEMBER(xavix_state::xavix_io_0_r)
|
||||
READ8_MEMBER(xavix_state::io_0_r)
|
||||
{
|
||||
return m_in0->read();
|
||||
}
|
||||
|
||||
READ8_MEMBER(xavix_state::xavix_io_1_r)
|
||||
READ8_MEMBER(xavix_state::io_1_r)
|
||||
{
|
||||
/*
|
||||
int pc = m_maincpu->state_int(M6502_PC);
|
||||
@ -402,103 +229,91 @@ READ8_MEMBER(xavix_state::xavix_io_1_r)
|
||||
return m_in1->read();
|
||||
}
|
||||
|
||||
READ8_MEMBER(xavix_state::xavix_7a02_r)
|
||||
READ8_MEMBER(xavix_state::io_2_r)
|
||||
{
|
||||
return 0xff;
|
||||
}
|
||||
|
||||
READ8_MEMBER(xavix_state::xavix_7a03_r)
|
||||
READ8_MEMBER(xavix_state::io_3_r)
|
||||
{
|
||||
return 0xff;
|
||||
}
|
||||
|
||||
|
||||
WRITE8_MEMBER(xavix_state::xavix_7a00_w)
|
||||
WRITE8_MEMBER(xavix_state::io_0_w)
|
||||
{
|
||||
logerror("%s: xavix_7a00_w %02x\n", machine().describe_context(), data);
|
||||
logerror("%s: io_0_w %02x\n", machine().describe_context(), data);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(xavix_state::xavix_7a01_w)
|
||||
WRITE8_MEMBER(xavix_state::io_1_w)
|
||||
{
|
||||
logerror("%s: xavix_7a01_w %02x\n", machine().describe_context(), data);
|
||||
logerror("%s: io_1_w %02x\n", machine().describe_context(), data);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(xavix_state::xavix_7a02_w)
|
||||
WRITE8_MEMBER(xavix_state::io_2_w)
|
||||
{
|
||||
logerror("%s: xavix_7a02_w %02x\n", machine().describe_context(), data);
|
||||
logerror("%s: io_2_w %02x\n", machine().describe_context(), data);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(xavix_state::xavix_7a03_w)
|
||||
WRITE8_MEMBER(xavix_state::io_3_w)
|
||||
{
|
||||
logerror("%s: xavix_7a03_w %02x\n", machine().describe_context(), data);
|
||||
logerror("%s: io_3_w %02x\n", machine().describe_context(), data);
|
||||
}
|
||||
|
||||
READ8_MEMBER(xavix_state::xavix_6fe8_r)
|
||||
READ8_MEMBER(xavix_state::arena_start_r)
|
||||
{
|
||||
logerror("%s: xavix_6fe8_r\n", machine().describe_context());
|
||||
return m_6fe8;
|
||||
//logerror("%s: arena_start_r\n", machine().describe_context());
|
||||
return m_arena_start;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(xavix_state::xavix_6fe8_w)
|
||||
WRITE8_MEMBER(xavix_state::arena_start_w)
|
||||
{
|
||||
//logerror("%s: arena_start_w %02x\n", machine().describe_context(), data);
|
||||
m_arena_start = data; // expected to return data written
|
||||
|
||||
}
|
||||
READ8_MEMBER(xavix_state::arena_end_r)
|
||||
{
|
||||
logerror("%s: arena_end_r\n", machine().describe_context());
|
||||
return m_arena_end;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(xavix_state::arena_end_w)
|
||||
{
|
||||
//logerror("%s: arena_end_w %02x\n", machine().describe_context(), data);
|
||||
m_arena_end = data; // expected to return data written
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(xavix_state::arena_control_w)
|
||||
{
|
||||
//logerror("%s: arena_control_w %02x\n", machine().describe_context(), data);
|
||||
}
|
||||
|
||||
|
||||
READ8_MEMBER(xavix_state::timer_baseval_r)
|
||||
{
|
||||
logerror("%s: timer_baseval_r\n", machine().describe_context());
|
||||
return m_timer_baseval;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(xavix_state::timer_control_w)
|
||||
{
|
||||
logerror("%s: timer_control_w %02x\n", machine().describe_context(), data);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(xavix_state::timer_baseval_w)
|
||||
{
|
||||
// expected to return data written
|
||||
m_6fe8 = data;
|
||||
logerror("%s: xavix_6fe8_w %02x\n", machine().describe_context(), data);
|
||||
m_timer_baseval = data;
|
||||
logerror("%s: timer_baseval_w %02x\n", machine().describe_context(), data);
|
||||
}
|
||||
|
||||
READ8_MEMBER(xavix_state::xavix_6fe9_r)
|
||||
WRITE8_MEMBER(xavix_state::timer_freq_w)
|
||||
{
|
||||
logerror("%s: xavix_6fe9_r\n", machine().describe_context());
|
||||
return m_6fe9;
|
||||
// 4-bit prescale
|
||||
logerror("%s: timer_freq_w %02x\n", machine().describe_context(), data);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(xavix_state::xavix_6fe9_w)
|
||||
{
|
||||
// expected to return data written
|
||||
m_6fe9 = data;
|
||||
logerror("%s: xavix_6fe9_w %02x\n", machine().describe_context(), data);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(xavix_state::xavix_6fea_w)
|
||||
{
|
||||
logerror("%s: xavix_6fea_w %02x\n", machine().describe_context(), data);
|
||||
}
|
||||
|
||||
|
||||
READ8_MEMBER(xavix_state::xavix_7c01_r)
|
||||
{
|
||||
logerror("%s: xavix_7c01_r\n", machine().describe_context());
|
||||
return m_7c01;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(xavix_state::xavix_7c00_w)
|
||||
{
|
||||
logerror("%s: xavix_7c00_w %02x\n", machine().describe_context(), data);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(xavix_state::xavix_7c01_w)
|
||||
{
|
||||
// expected to return data written
|
||||
m_7c01 = data;
|
||||
logerror("%s: xavix_7c01_w %02x\n", machine().describe_context(), data);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(xavix_state::xavix_7c02_w)
|
||||
{
|
||||
logerror("%s: xavix_7c02_w %02x\n", machine().describe_context(), data);
|
||||
}
|
||||
|
||||
READ8_MEMBER(xavix_state::xavix_75f4_r)
|
||||
{
|
||||
// used with 75f0
|
||||
return 0xff;
|
||||
}
|
||||
|
||||
READ8_MEMBER(xavix_state::xavix_75f5_r)
|
||||
{
|
||||
// used with 75f1
|
||||
return 0xff;
|
||||
}
|
||||
|
||||
READ8_MEMBER(xavix_state::mult_r)
|
||||
{
|
||||
@ -507,8 +322,7 @@ READ8_MEMBER(xavix_state::mult_r)
|
||||
|
||||
WRITE8_MEMBER(xavix_state::mult_w)
|
||||
{
|
||||
// rad_fb writes here, why would you write to the results registers?
|
||||
logerror("%s: mult_w (write to multiply RESULT registers, why?) reg: %d %02x\n", machine().describe_context(), offset, data);
|
||||
// rad_madf writes here to set the base value which the multiplication result gets added to
|
||||
m_multresults[offset] = data;
|
||||
}
|
||||
|
||||
@ -518,13 +332,43 @@ WRITE8_MEMBER(xavix_state::mult_param_w)
|
||||
// there are NOPs after one of the writes, so presumably the operation is write triggerd and not intstant
|
||||
// see test code at 0184a4 in monster truck
|
||||
|
||||
// offset0 is control
|
||||
|
||||
// mm-- --Ss
|
||||
// mm = mode, S = sign for param1, s = sign for param2
|
||||
// modes 00 = multiply (regular?) 11 = add to previous 01 / 10 unknown (maybe subtract?)
|
||||
|
||||
if (offset == 2)
|
||||
{
|
||||
// assume 0 is upper bits, might be 'mode' instead, check
|
||||
uint16_t param1 = (m_multparams[0]<<8) | (m_multparams[1]);
|
||||
uint8_t param2 = (m_multparams[2]);
|
||||
int param1 = m_multparams[1];
|
||||
int param2 = m_multparams[2];
|
||||
|
||||
uint16_t result = param1*param2;
|
||||
#if 0
|
||||
int signparam1 = (m_multparams[0] & 0x02)>>1;
|
||||
int signparam2 = (m_multparams[0] & 0x01)>>0;
|
||||
|
||||
if (signparam1) param1 = -param1;
|
||||
if (signparam2) param2 = -param2;
|
||||
#endif
|
||||
|
||||
uint16_t result = 0;
|
||||
|
||||
// rad_madf uses this mode (add to previous result)
|
||||
if ((m_multparams[0] & 0xc0) == 0xc0)
|
||||
{
|
||||
result = param1 * param2;
|
||||
uint16_t oldresult = (m_multresults[1] << 8) | m_multresults[0];
|
||||
result = oldresult + result;
|
||||
}
|
||||
else if ((m_multparams[0] & 0xc0) == 0x00)
|
||||
{
|
||||
result = param1 * param2;
|
||||
}
|
||||
else
|
||||
{
|
||||
popmessage("unknown multiplier mode %02n", m_multparams[0] & 0xc0);
|
||||
}
|
||||
|
||||
m_multresults[1] = (result>>8)&0xff;
|
||||
m_multresults[0] = result&0xff;
|
||||
@ -534,16 +378,18 @@ WRITE8_MEMBER(xavix_state::mult_param_w)
|
||||
|
||||
READ8_MEMBER(xavix_state::irq_source_r)
|
||||
{
|
||||
/* the 2nd IRQ routine (regular IRQ, not NMI?) reads here before deciding what to do
|
||||
/* the 2nd IRQ routine (regular IRQ) reads here before deciding what to do
|
||||
|
||||
the following bits have been seen to be checked (active low?)
|
||||
|
||||
0x40 - Monster Truck - stuff with 6ffb 6fd6 and 6ff8
|
||||
0x20 - most games (but not Monster Truck) - DMA related?
|
||||
0x10 - card night + monster truck - 7c00 related? (increases 16-bit counter in ram stores 0xc1 at 7c00)
|
||||
0x08 - several games - Input related (ADC? - used for analog control on Monster Truck) (uses 7a80 top bit to determine direction, and 7a81 0x08 as an output, presumably to clock)
|
||||
0x04 - Monster Truck - loads/stores 7b81
|
||||
0x80 - Sound Irq
|
||||
0x40 - Picture / Arena Irq?
|
||||
0x20 - DMA Irq
|
||||
0x10 - Timer / Counter IRQ
|
||||
0x08 - IO Irq (ADC? - used for analog control on Monster Truck) (uses 7a80 top bit to determine direction, and 7a81 0x08 as an output, presumably to clock)
|
||||
0x04 - ADC IRQ - loads/stores 7b81
|
||||
*/
|
||||
|
||||
logerror("%s: irq_source_r\n", machine().describe_context());
|
||||
return 0xff;
|
||||
}
|
||||
@ -572,24 +418,25 @@ void xavix_state::machine_reset()
|
||||
m_rom_dmalen_lo_data = 0;
|
||||
m_rom_dmalen_hi_data = 0;
|
||||
|
||||
m_irq_enable_data = 0;
|
||||
m_vectorenable = 0;
|
||||
m_irq_vector0_lo_data = 0;
|
||||
m_irq_vector0_hi_data = 0;
|
||||
m_irq_vector1_lo_data = 0;
|
||||
m_irq_vector1_hi_data = 0;
|
||||
|
||||
m_6ff0 = 0;
|
||||
m_6ff8 = 0;
|
||||
|
||||
m_75fx[0] = 0;
|
||||
m_75fx[1] = 0;
|
||||
m_spritereg = 0;
|
||||
|
||||
m_75fx[6] = 0;
|
||||
m_75fx[8] = 0;
|
||||
m_75fx[10] = 0;
|
||||
m_75fx[11] = 0;
|
||||
m_75fx[12] = 0;
|
||||
m_75fx[13] = 0;
|
||||
m_soundregs[0] = 0;
|
||||
m_soundregs[1] = 0;
|
||||
|
||||
m_soundregs[6] = 0;
|
||||
m_soundregs[8] = 0;
|
||||
m_soundregs[10] = 0;
|
||||
m_soundregs[11] = 0;
|
||||
m_soundregs[12] = 0;
|
||||
m_soundregs[13] = 0;
|
||||
|
||||
for (int i = 0; i < 3; i++)
|
||||
m_multparams[i] = 0;
|
||||
@ -599,8 +446,8 @@ void xavix_state::machine_reset()
|
||||
|
||||
for (int i = 0; i < 2; i++)
|
||||
{
|
||||
m_vid_dma_param1[i] = 0;
|
||||
m_vid_dma_param2[i] = 0;
|
||||
m_spritefragment_dmaparam1[i] = 0;
|
||||
m_spritefragment_dmaparam2[i] = 0;
|
||||
}
|
||||
|
||||
for (int i = 0; i < 8; i++)
|
||||
@ -609,14 +456,21 @@ void xavix_state::machine_reset()
|
||||
m_tmap2_regs[i] = 0;
|
||||
}
|
||||
|
||||
for (int i = 0; i < 3; i++)
|
||||
{
|
||||
m_txarray[i] = 0x00;
|
||||
}
|
||||
|
||||
m_lowbus->set_bank(0);
|
||||
}
|
||||
|
||||
typedef device_delegate<uint8_t (int which, int half)> xavix_interrupt_vector_delegate;
|
||||
|
||||
uint8_t xavix_state::get_vectors(int which, int half)
|
||||
int16_t xavix_state::get_vectors(int which, int half)
|
||||
{
|
||||
// logerror("get_vectors %d %d\n", which, half);
|
||||
if (m_vectorenable == 0)
|
||||
return -1;
|
||||
|
||||
if (which == 0) // irq?
|
||||
{
|
||||
|
@ -63,10 +63,21 @@ void xavix_state::handle_palette(screen_device &screen, bitmap_ind16 &bitmap, co
|
||||
{
|
||||
// not verified
|
||||
int offs = 0;
|
||||
for (int index = 0; index < 256; index++)
|
||||
for (int index = 0; index < 257; index++)
|
||||
{
|
||||
uint16_t dat = m_palram1[offs];
|
||||
dat |= m_palram2[offs]<<8;
|
||||
uint16_t dat;
|
||||
|
||||
if (index < 256)
|
||||
{
|
||||
dat = m_palram_sh[offs];
|
||||
dat |= m_palram_l[offs] << 8;
|
||||
}
|
||||
else
|
||||
{
|
||||
dat = m_colmix_sh[0];
|
||||
dat |= m_colmix_l[0] << 8;
|
||||
}
|
||||
|
||||
offs++;
|
||||
|
||||
int l_raw = (dat & 0x1f00) >> 8;
|
||||
@ -110,18 +121,8 @@ void xavix_state::handle_palette(screen_device &screen, bitmap_ind16 &bitmap, co
|
||||
|
||||
void xavix_state::draw_tilemap(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect, int which)
|
||||
{
|
||||
int alt_tileaddressing = 0;
|
||||
int alt_tileaddressing2 = 0;
|
||||
|
||||
int ydimension = 0;
|
||||
int xdimension = 0;
|
||||
int ytilesize = 0;
|
||||
int xtilesize = 0;
|
||||
int offset_multiplier = 0;
|
||||
int opaque = 0;
|
||||
|
||||
uint8_t* tileregs;
|
||||
address_space& mainspace = m_maincpu->space(AS_PROGRAM);
|
||||
int opaque = 0;
|
||||
|
||||
if (which == 0)
|
||||
{
|
||||
@ -134,6 +135,18 @@ void xavix_state::draw_tilemap(screen_device &screen, bitmap_ind16 &bitmap, cons
|
||||
opaque = 0;
|
||||
}
|
||||
|
||||
// bail if tilemap is disabled
|
||||
if (!(tileregs[0x7] & 0x80))
|
||||
return;
|
||||
|
||||
int alt_tileaddressing = 0;
|
||||
int alt_tileaddressing2 = 0;
|
||||
|
||||
int ydimension = 0;
|
||||
int xdimension = 0;
|
||||
int ytilesize = 0;
|
||||
int xtilesize = 0;
|
||||
|
||||
switch (tileregs[0x3] & 0x30)
|
||||
{
|
||||
case 0x00:
|
||||
@ -165,8 +178,6 @@ void xavix_state::draw_tilemap(screen_device &screen, bitmap_ind16 &bitmap, cons
|
||||
break;
|
||||
}
|
||||
|
||||
offset_multiplier = (ytilesize * xtilesize)/8;
|
||||
|
||||
if (tileregs[0x7] & 0x10)
|
||||
alt_tileaddressing = 1;
|
||||
else
|
||||
@ -175,6 +186,7 @@ void xavix_state::draw_tilemap(screen_device &screen, bitmap_ind16 &bitmap, cons
|
||||
if (tileregs[0x7] & 0x02)
|
||||
alt_tileaddressing2 = 1;
|
||||
|
||||
/*
|
||||
static int hackx = 1;
|
||||
|
||||
if (machine().input().code_pressed_once(KEYCODE_Q))
|
||||
@ -188,187 +200,228 @@ void xavix_state::draw_tilemap(screen_device &screen, bitmap_ind16 &bitmap, cons
|
||||
hackx++;
|
||||
logerror("%02x\n", hackx);
|
||||
}
|
||||
*/
|
||||
|
||||
if (tileregs[0x7] & 0x80)
|
||||
//logerror("draw tilemap %d, regs base0 %02x base1 %02x base2 %02x tilesize,bpp %02x scrollx %02x scrolly %02x pal %02x mode %02x\n", which, tileregs[0x0], tileregs[0x1], tileregs[0x2], tileregs[0x3], tileregs[0x4], tileregs[0x5], tileregs[0x6], tileregs[0x7]);
|
||||
|
||||
// there's a tilemap register to specify base in main ram, although in the monster truck test mode it points to an unmapped region
|
||||
// and expected a fixed layout, we handle that in the memory map at the moment
|
||||
int count;
|
||||
|
||||
count = 0;// ;
|
||||
for (int y = 0; y < ydimension; y++)
|
||||
{
|
||||
//logerror("draw tilemap %d, regs base0 %02x base1 %02x base2 %02x tilesize,bpp %02x scrollx %02x scrolly %02x pal %02x mode %02x\n", which, tileregs[0x0], tileregs[0x1], tileregs[0x2], tileregs[0x3], tileregs[0x4], tileregs[0x5], tileregs[0x6], tileregs[0x7]);
|
||||
|
||||
// there's a tilemap register to specify base in main ram, although in the monster truck test mode it points to an unmapped region
|
||||
// and expected a fixed layout, we handle that in the memory map at the moment
|
||||
int count;
|
||||
|
||||
count = 0;// ;
|
||||
for (int y = 0; y < ydimension; y++)
|
||||
for (int x = 0; x < xdimension; x++)
|
||||
{
|
||||
for (int x = 0; x < xdimension; x++)
|
||||
address_space& mainspace = m_maincpu->space(AS_PROGRAM);
|
||||
|
||||
int bpp, pal, scrolly, scrollx;
|
||||
int tile = 0;
|
||||
int extraattr = 0;
|
||||
|
||||
// the register being 0 probably isn't the condition here
|
||||
if (tileregs[0x0] != 0x00) tile |= mainspace.read_byte((tileregs[0x0] << 8) + count);
|
||||
if (tileregs[0x1] != 0x00) tile |= mainspace.read_byte((tileregs[0x1] << 8) + count) << 8;
|
||||
|
||||
// at the very least boxing leaves unwanted bits set in ram after changing between mode 0x8a and 0x82, expecting them to not be used
|
||||
if (tileregs[0x7] & 0x08)
|
||||
extraattr = mainspace.read_byte((tileregs[0x2] << 8) + count);
|
||||
|
||||
count++;
|
||||
|
||||
bpp = (tileregs[0x3] & 0x0e) >> 1;
|
||||
bpp++;
|
||||
pal = (tileregs[0x6] & 0xf0) >> 4;
|
||||
scrolly = tileregs[0x5];
|
||||
scrollx = tileregs[0x4];
|
||||
|
||||
int basereg;
|
||||
int flipx = 0;
|
||||
int flipy = 0;
|
||||
int gfxbase;
|
||||
|
||||
// tile 0 is always skipped, doesn't even point to valid data packets in alt mode
|
||||
// this is consistent with the top layer too
|
||||
// should we draw as solid in solid layer?
|
||||
if (tile == 0)
|
||||
continue;
|
||||
|
||||
const int debug_packets = 0;
|
||||
int test = 0;
|
||||
|
||||
if (!alt_tileaddressing)
|
||||
{
|
||||
int bpp, pal, scrolly, scrollx;
|
||||
int tile = 0;
|
||||
int extraattr = 0;
|
||||
|
||||
// the register being 0 probably isn't the condition here
|
||||
if (tileregs[0x0] != 0x00) tile |= mainspace.read_byte((tileregs[0x0] << 8) + count);
|
||||
if (tileregs[0x1] != 0x00) tile |= mainspace.read_byte((tileregs[0x1] << 8) + count) << 8;
|
||||
|
||||
// at the very least boxing leaves unwanted bits set in ram after changing between mode 0x8a and 0x82, expecting them to not be used
|
||||
if (tileregs[0x7] & 0x08)
|
||||
extraattr = mainspace.read_byte((tileregs[0x2] << 8) + count);
|
||||
|
||||
count++;
|
||||
|
||||
bpp = (tileregs[0x3] & 0x0e) >> 1;
|
||||
bpp++;
|
||||
pal = (tileregs[0x6] & 0xf0) >> 4;
|
||||
scrolly = tileregs[0x5];
|
||||
scrollx = tileregs[0x4];
|
||||
|
||||
int basereg;
|
||||
int flipx = 0;
|
||||
int flipy = 0;
|
||||
int gfxbase;
|
||||
|
||||
// tile 0 is always skipped, doesn't even point to valid data packets in alt mode
|
||||
// this is consistent with the top layer too
|
||||
// should we draw as solid in solid layer?
|
||||
if (tile == 0)
|
||||
continue;
|
||||
|
||||
const int debug_packets = 0;
|
||||
int test = 0;
|
||||
|
||||
if (!alt_tileaddressing)
|
||||
if (!alt_tileaddressing2)
|
||||
{
|
||||
if (!alt_tileaddressing2)
|
||||
{
|
||||
basereg = 0;
|
||||
gfxbase = (m_spr_attra[(basereg * 2) + 1] << 16) | (m_spr_attra[(basereg * 2)] << 8);
|
||||
// Tile Based Addressing takes into account Tile Sizes and bpp
|
||||
const int offset_multiplier = (ytilesize * xtilesize)/8;
|
||||
|
||||
basereg = 0;
|
||||
gfxbase = (m_segment_regs[(basereg * 2) + 1] << 16) | (m_segment_regs[(basereg * 2)] << 8);
|
||||
|
||||
tile = tile * (offset_multiplier * bpp);
|
||||
tile += gfxbase;
|
||||
}
|
||||
else
|
||||
{
|
||||
tile = tile * 8;
|
||||
basereg = (tile & 0x70000) >> 16;
|
||||
tile &= 0xffff;
|
||||
gfxbase = (m_spr_attra[(basereg * 2) + 1] << 16) | (m_spr_attra[(basereg * 2)] << 8);
|
||||
tile += gfxbase;
|
||||
|
||||
if (tileregs[0x7] & 0x08)
|
||||
{
|
||||
// make use of the extraattr stuff?
|
||||
pal = (extraattr & 0xf0)>>4;
|
||||
// low bits are priority?
|
||||
}
|
||||
}
|
||||
tile = tile * (offset_multiplier * bpp);
|
||||
tile += gfxbase;
|
||||
}
|
||||
else
|
||||
{
|
||||
if (debug_packets) logerror("for tile %04x (at %d %d): ", tile, (((x * 16) + scrollx) & 0xff), (((y * 16) + scrolly) & 0xff));
|
||||
|
||||
|
||||
basereg = (tile & 0xf000) >> 12;
|
||||
tile &= 0x0fff;
|
||||
gfxbase = (m_spr_attra[(basereg * 2) + 1] << 16) | (m_spr_attra[(basereg * 2)] << 8);
|
||||
|
||||
// Addressing Mode 1 uses a fixed offset? (like sprites)
|
||||
tile = tile * 8;
|
||||
basereg = (tile & 0x70000) >> 16;
|
||||
tile &= 0xffff;
|
||||
gfxbase = (m_segment_regs[(basereg * 2) + 1] << 16) | (m_segment_regs[(basereg * 2)] << 8);
|
||||
tile += gfxbase;
|
||||
set_data_address(tile, 0);
|
||||
|
||||
// there seems to be a packet stored before the tile?!
|
||||
// the offset used for flipped sprites seems to specifically be changed so that it picks up an extra byte which presumably triggers the flipping
|
||||
uint8_t byte1 = 0;
|
||||
int done = 0;
|
||||
int skip = 0;
|
||||
|
||||
do
|
||||
// Tilemap specific mode extension with an 8-bit per tile attribute
|
||||
if (tileregs[0x7] & 0x08)
|
||||
{
|
||||
byte1 = get_next_byte();
|
||||
|
||||
if (debug_packets) logerror(" %02x, ", byte1);
|
||||
|
||||
if (skip == 1)
|
||||
{
|
||||
skip = 0;
|
||||
//test = 1;
|
||||
}
|
||||
else if ((byte1 & 0x0f) == 0x01)
|
||||
{
|
||||
// used
|
||||
}
|
||||
else if ((byte1 & 0x0f) == 0x03)
|
||||
{
|
||||
// causes next byte to be skipped??
|
||||
skip = 1;
|
||||
}
|
||||
else if ((byte1 & 0x0f) == 0x05)
|
||||
{
|
||||
// the upper bits are often 0x00, 0x10, 0x20, 0x30, why?
|
||||
flipx = 1;
|
||||
}
|
||||
else if ((byte1 & 0x0f) == 0x06) // there must be other finish conditions too because sometimes this fails..
|
||||
{
|
||||
// tile data will follow after this, always?
|
||||
pal = (byte1 & 0xf0) >> 4;
|
||||
done = 1;
|
||||
}
|
||||
else if ((byte1 & 0x0f) == 0x07)
|
||||
{
|
||||
// causes next byte to be skipped??
|
||||
skip = 1;
|
||||
}
|
||||
else if ((byte1 & 0x0f) == 0x09)
|
||||
{
|
||||
// used
|
||||
}
|
||||
else if ((byte1 & 0x0f) == 0x0a)
|
||||
{
|
||||
// not seen
|
||||
}
|
||||
else if ((byte1 & 0x0f) == 0x0b)
|
||||
{
|
||||
// used
|
||||
}
|
||||
else if ((byte1 & 0x0f) == 0x0c)
|
||||
{
|
||||
// not seen
|
||||
}
|
||||
else if ((byte1 & 0x0f) == 0x0d)
|
||||
{
|
||||
// used
|
||||
}
|
||||
else if ((byte1 & 0x0f) == 0x0e)
|
||||
{
|
||||
// not seen
|
||||
}
|
||||
else if ((byte1 & 0x0f) == 0x0f)
|
||||
{
|
||||
// used
|
||||
}
|
||||
|
||||
} while (done == 0);
|
||||
if (debug_packets) logerror("\n");
|
||||
tile = get_current_address_byte();
|
||||
// make use of the extraattr stuff?
|
||||
pal = (extraattr & 0xf0)>>4;
|
||||
// low bits are priority?
|
||||
}
|
||||
}
|
||||
|
||||
if (test == 1) pal = machine().rand() & 0xf;
|
||||
|
||||
|
||||
draw_tile(screen, bitmap, cliprect, tile, bpp, (x * xtilesize) + scrollx, ((y * ytilesize) - 16) - scrolly, ytilesize, xtilesize, flipx, flipy, pal, opaque);
|
||||
draw_tile(screen, bitmap, cliprect, tile, bpp, (x * xtilesize) + scrollx, (((y * ytilesize) - 16) - scrolly) + 256, ytilesize, xtilesize, flipx, flipy, pal, opaque); // wrap-y
|
||||
draw_tile(screen, bitmap, cliprect, tile, bpp, ((x * xtilesize) + scrollx) - 256, ((y * ytilesize) - 16) - scrolly, ytilesize, xtilesize, flipx, flipy, pal, opaque); // wrap-x
|
||||
draw_tile(screen, bitmap, cliprect, tile, bpp, ((x * xtilesize) + scrollx) - 256, (((y * ytilesize) - 16) - scrolly) + 256, ytilesize, xtilesize, flipx, flipy, pal, opaque); // wrap-y and x
|
||||
}
|
||||
else
|
||||
{
|
||||
// Addressing Mode 2 (plus Inline Header)
|
||||
|
||||
if (debug_packets) logerror("for tile %04x (at %d %d): ", tile, (((x * 16) + scrollx) & 0xff), (((y * 16) + scrolly) & 0xff));
|
||||
|
||||
|
||||
basereg = (tile & 0xf000) >> 12;
|
||||
tile &= 0x0fff;
|
||||
gfxbase = (m_segment_regs[(basereg * 2) + 1] << 16) | (m_segment_regs[(basereg * 2)] << 8);
|
||||
|
||||
tile += gfxbase;
|
||||
set_data_address(tile, 0);
|
||||
|
||||
// there seems to be a packet stored before the tile?!
|
||||
// the offset used for flipped sprites seems to specifically be changed so that it picks up an extra byte which presumably triggers the flipping
|
||||
uint8_t byte1 = 0;
|
||||
int done = 0;
|
||||
int skip = 0;
|
||||
|
||||
do
|
||||
{
|
||||
byte1 = get_next_byte();
|
||||
|
||||
if (debug_packets) logerror(" %02x, ", byte1);
|
||||
|
||||
if (skip == 1)
|
||||
{
|
||||
skip = 0;
|
||||
//test = 1;
|
||||
}
|
||||
else if ((byte1 & 0x0f) == 0x01)
|
||||
{
|
||||
// used
|
||||
}
|
||||
else if ((byte1 & 0x0f) == 0x03)
|
||||
{
|
||||
// causes next byte to be skipped??
|
||||
skip = 1;
|
||||
}
|
||||
else if ((byte1 & 0x0f) == 0x05)
|
||||
{
|
||||
// the upper bits are often 0x00, 0x10, 0x20, 0x30, why?
|
||||
flipx = 1;
|
||||
}
|
||||
else if ((byte1 & 0x0f) == 0x06) // there must be other finish conditions too because sometimes this fails..
|
||||
{
|
||||
// tile data will follow after this, always?
|
||||
pal = (byte1 & 0xf0) >> 4;
|
||||
done = 1;
|
||||
}
|
||||
else if ((byte1 & 0x0f) == 0x07)
|
||||
{
|
||||
// causes next byte to be skipped??
|
||||
skip = 1;
|
||||
}
|
||||
else if ((byte1 & 0x0f) == 0x09)
|
||||
{
|
||||
// used
|
||||
}
|
||||
else if ((byte1 & 0x0f) == 0x0a)
|
||||
{
|
||||
// not seen
|
||||
}
|
||||
else if ((byte1 & 0x0f) == 0x0b)
|
||||
{
|
||||
// used
|
||||
}
|
||||
else if ((byte1 & 0x0f) == 0x0c)
|
||||
{
|
||||
// not seen
|
||||
}
|
||||
else if ((byte1 & 0x0f) == 0x0d)
|
||||
{
|
||||
// used
|
||||
}
|
||||
else if ((byte1 & 0x0f) == 0x0e)
|
||||
{
|
||||
// not seen
|
||||
}
|
||||
else if ((byte1 & 0x0f) == 0x0f)
|
||||
{
|
||||
// used
|
||||
}
|
||||
|
||||
} while (done == 0);
|
||||
if (debug_packets) logerror("\n");
|
||||
tile = get_current_address_byte();
|
||||
}
|
||||
|
||||
if (test == 1) pal = machine().rand() & 0xf;
|
||||
|
||||
|
||||
draw_tile(screen, bitmap, cliprect, tile, bpp, (x * xtilesize) + scrollx, ((y * ytilesize) - 16) - scrolly, ytilesize, xtilesize, flipx, flipy, pal, opaque);
|
||||
draw_tile(screen, bitmap, cliprect, tile, bpp, (x * xtilesize) + scrollx, (((y * ytilesize) - 16) - scrolly) + 256, ytilesize, xtilesize, flipx, flipy, pal, opaque); // wrap-y
|
||||
draw_tile(screen, bitmap, cliprect, tile, bpp, ((x * xtilesize) + scrollx) - 256, ((y * ytilesize) - 16) - scrolly, ytilesize, xtilesize, flipx, flipy, pal, opaque); // wrap-x
|
||||
draw_tile(screen, bitmap, cliprect, tile, bpp, ((x * xtilesize) + scrollx) - 256, (((y * ytilesize) - 16) - scrolly) + 256, ytilesize, xtilesize, flipx, flipy, pal, opaque); // wrap-y and x
|
||||
}
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
void xavix_state::draw_sprites(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
|
||||
{
|
||||
int alt_addressing = 0;
|
||||
|
||||
if (m_spritereg == 0x00)
|
||||
{
|
||||
// 8-bit addressing (Tile Number)
|
||||
alt_addressing = 1;
|
||||
}
|
||||
else if (m_spritereg == 0x02)
|
||||
{
|
||||
// 16-bit addressing (Addressing Mode 1)
|
||||
alt_addressing = 2;
|
||||
}
|
||||
else if (m_spritereg == 0x04)
|
||||
{
|
||||
// 24-bit addressing (Addressing Mode 2)
|
||||
alt_addressing = 0;
|
||||
}
|
||||
else
|
||||
{
|
||||
popmessage("unknown sprite reg %02x", m_spritereg);
|
||||
}
|
||||
|
||||
//logerror("frame\n");
|
||||
// priority doesn't seem to be based on list order, there are bad sprite-sprite priorities with either forward or reverse
|
||||
|
||||
for (int i = 0xff; i >= 0; i--)
|
||||
{
|
||||
|
||||
uint8_t* spr_attr0 = m_fragment_sprite + 0x000;
|
||||
uint8_t* spr_attr1 = m_fragment_sprite + 0x100;
|
||||
uint8_t* spr_ypos = m_fragment_sprite + 0x200;
|
||||
uint8_t* spr_xpos = m_fragment_sprite + 0x300;
|
||||
// + 0x400
|
||||
uint8_t* spr_addr_lo = m_fragment_sprite + 0x500;
|
||||
uint8_t* spr_addr_md = m_fragment_sprite + 0x600;
|
||||
uint8_t* spr_addr_hi = m_fragment_sprite + 0x700;
|
||||
|
||||
|
||||
/* attribute 0 bits
|
||||
pppp bbb- p = palette, b = bpp
|
||||
|
||||
@ -376,11 +429,11 @@ void xavix_state::draw_sprites(screen_device &screen, bitmap_ind16 &bitmap, cons
|
||||
---- ss-f s = size, f = flipx
|
||||
*/
|
||||
|
||||
int ypos = m_spr_ypos[i];
|
||||
int xpos = m_spr_xpos[i];
|
||||
int tile = (m_spr_addr_hi[i] << 16) | (m_spr_addr_md[i] << 8) | m_spr_addr_lo[i];
|
||||
int attr0 = m_spr_attr0[i];
|
||||
int attr1 = m_spr_attr1[i];
|
||||
int ypos = spr_ypos[i];
|
||||
int xpos = spr_xpos[i];
|
||||
int tile = (spr_addr_hi[i] << 16) | (spr_addr_md[i] << 8) | spr_addr_lo[i];
|
||||
int attr0 = spr_attr0[i];
|
||||
int attr1 = spr_attr1[i];
|
||||
|
||||
int pal = (attr0 & 0xf0) >> 4;
|
||||
int flipx = (attr1 & 0x01);
|
||||
@ -390,37 +443,24 @@ void xavix_state::draw_sprites(screen_device &screen, bitmap_ind16 &bitmap, cons
|
||||
|
||||
tile &= (m_rgnlen - 1);
|
||||
|
||||
// taito nostalgia 1 also seems to use a different addressing, is it selectable or is the chip different?
|
||||
// taito nost attr1 is 84 / 80 / 88 / 8c for the various elements of the xavix logo. monster truck uses ec / fc / dc / 4c / 5c / 6c (final 6 sprites ingame are 00 00 f0 f0 f0 f0, radar?)
|
||||
|
||||
if ((attr1 & 0x0c) == 0x0c)
|
||||
{
|
||||
drawheight = 16;
|
||||
drawwidth = 16;
|
||||
if (m_alt_addressing == 1)
|
||||
tile = tile * 128;
|
||||
else if (m_alt_addressing == 2)
|
||||
tile = tile * 8;
|
||||
}
|
||||
else if ((attr1 & 0x0c) == 0x08)
|
||||
{
|
||||
drawheight = 16;
|
||||
drawwidth = 8;
|
||||
xpos += 4;
|
||||
if (m_alt_addressing == 1)
|
||||
tile = tile * 64;
|
||||
else if (m_alt_addressing == 2)
|
||||
tile = tile * 8;
|
||||
}
|
||||
else if ((attr1 & 0x0c) == 0x04)
|
||||
{
|
||||
drawheight = 8;
|
||||
drawwidth = 16;
|
||||
ypos -= 4;
|
||||
if (m_alt_addressing == 1)
|
||||
tile = tile * 64;
|
||||
else if (m_alt_addressing == 2)
|
||||
tile = tile * 8;
|
||||
}
|
||||
else if ((attr1 & 0x0c) == 0x00)
|
||||
{
|
||||
@ -428,17 +468,22 @@ void xavix_state::draw_sprites(screen_device &screen, bitmap_ind16 &bitmap, cons
|
||||
drawwidth = 8;
|
||||
xpos += 4;
|
||||
ypos -= 4;
|
||||
if (m_alt_addressing == 1)
|
||||
tile = tile * 32;
|
||||
else if (m_alt_addressing == 2)
|
||||
tile = tile * 8;
|
||||
}
|
||||
|
||||
if (m_alt_addressing != 0)
|
||||
// Everything except direct addressing (Addressing Mode 2) goes through the segment registers?
|
||||
if (alt_addressing != 0)
|
||||
{
|
||||
// tile based addressing takes into account tile size (and bpp?)
|
||||
if (alt_addressing == 1)
|
||||
tile = (tile * drawheight * drawwidth) / 2;
|
||||
|
||||
// Addressing Mode 1 uses a fixed offset?
|
||||
if (alt_addressing == 2)
|
||||
tile = tile * 8;
|
||||
|
||||
int basereg = (tile & 0xf0000) >> 16;
|
||||
tile &= 0xffff;
|
||||
int gfxbase = (m_spr_attra[(basereg * 2) + 1] << 16) | (m_spr_attra[(basereg * 2)] << 8);
|
||||
int gfxbase = (m_segment_regs[(basereg * 2) + 1] << 16) | (m_segment_regs[(basereg * 2)] << 8);
|
||||
tile+= gfxbase;
|
||||
}
|
||||
|
||||
@ -464,9 +509,9 @@ void xavix_state::draw_sprites(screen_device &screen, bitmap_ind16 &bitmap, cons
|
||||
draw_tile(screen, bitmap, cliprect, tile, bpp, xpos - 256, ypos - 256, drawheight, drawwidth, flipx, 0, pal, 0); // wrap-x,y
|
||||
|
||||
/*
|
||||
if ((m_spr_ypos[i] != 0x81) && (m_spr_ypos[i] != 0x80) && (m_spr_ypos[i] != 0x00))
|
||||
if ((spr_ypos[i] != 0x81) && (spr_ypos[i] != 0x80) && (spr_ypos[i] != 0x00))
|
||||
{
|
||||
logerror("sprite with enable? %02x attr0 %02x attr1 %02x attr3 %02x attr5 %02x attr6 %02x attr7 %02x\n", m_spr_ypos[i], m_spr_attr0[i], m_spr_attr1[i], m_spr_xpos[i], m_spr_addr_lo[i], m_spr_addr_md[i], m_spr_addr_hi[i] );
|
||||
logerror("sprite with enable? %02x attr0 %02x attr1 %02x attr3 %02x attr5 %02x attr6 %02x attr7 %02x\n", spr_ypos[i], spr_attr0[i], spr_attr1[i], spr_xpos[i], spr_addr_lo[i], spr_addr_md[i], spr_addr_hi[i] );
|
||||
}
|
||||
*/
|
||||
}
|
||||
@ -540,36 +585,35 @@ uint32_t xavix_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap,
|
||||
draw_sprites(screen,bitmap,cliprect);
|
||||
draw_tilemap(screen,bitmap,cliprect,1);
|
||||
|
||||
//popmessage("%02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x", m_75fx[0],m_75fx[1],m_75fx[2],m_75fx[3],m_75fx[4],m_75fx[5],m_75fx[6],m_75fx[7],m_75fx[8],m_75fx[9],m_75fx[10],m_75fx[11],m_75fx[12],m_75fx[13],m_75fx[14],m_75fx[15]);
|
||||
//popmessage("%02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x", m_soundregs[0],m_soundregs[1],m_soundregs[2],m_soundregs[3],m_soundregs[4],m_soundregs[5],m_soundregs[6],m_soundregs[7],m_soundregs[8],m_soundregs[9],m_soundregs[10],m_soundregs[11],m_soundregs[12],m_soundregs[13],m_soundregs[14],m_soundregs[15]);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
WRITE8_MEMBER(xavix_state::vid_dma_params_1_w)
|
||||
WRITE8_MEMBER(xavix_state::spritefragment_dma_params_1_w)
|
||||
{
|
||||
m_vid_dma_param1[offset] = data;
|
||||
m_spritefragment_dmaparam1[offset] = data;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(xavix_state::vid_dma_params_2_w)
|
||||
WRITE8_MEMBER(xavix_state::spritefragment_dma_params_2_w)
|
||||
{
|
||||
m_vid_dma_param2[offset] = data;
|
||||
m_spritefragment_dmaparam2[offset] = data;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(xavix_state::vid_dma_trigger_w)
|
||||
WRITE8_MEMBER(xavix_state::spritefragment_dma_trg_w)
|
||||
{
|
||||
uint16_t len = data & 0x07;
|
||||
uint16_t src = (m_vid_dma_param1[1]<<8) | m_vid_dma_param1[0];
|
||||
uint16_t dst = (m_vid_dma_param2[0]<<8);
|
||||
dst += 0x6000;
|
||||
uint16_t src = (m_spritefragment_dmaparam1[1]<<8) | m_spritefragment_dmaparam1[0];
|
||||
uint16_t dst = (m_spritefragment_dmaparam2[0]<<8);
|
||||
|
||||
uint8_t unk = m_vid_dma_param2[1];
|
||||
uint8_t unk = m_spritefragment_dmaparam2[1];
|
||||
|
||||
logerror("%s: vid_dma_trigger_w with trg %02x size %04x src %04x dest %04x unk (%02x)\n", machine().describe_context(), data & 0xf8, len,src,dst,unk);
|
||||
logerror("%s: spritefragment_dma_trg_w with trg %02x size %04x src %04x dest %04x unk (%02x)\n", machine().describe_context(), data & 0xf8, len,src,dst,unk);
|
||||
|
||||
if (unk)
|
||||
{
|
||||
fatalerror("m_vid_dma_param2[1] != 0x00 (is %02x)\n", m_vid_dma_param2[1]);
|
||||
fatalerror("m_spritefragment_dmaparam2[1] != 0x00 (is %02x)\n", m_spritefragment_dmaparam2[1]);
|
||||
}
|
||||
|
||||
if (len == 0x00)
|
||||
@ -580,19 +624,17 @@ WRITE8_MEMBER(xavix_state::vid_dma_trigger_w)
|
||||
|
||||
len = len << 8;
|
||||
|
||||
address_space& dmaspace = m_maincpu->space(AS_PROGRAM);
|
||||
|
||||
if (data & 0x40)
|
||||
{
|
||||
for (int i = 0; i < len; i++)
|
||||
{
|
||||
uint8_t dat = dmaspace.read_byte(src + i);
|
||||
dmaspace.write_byte(dst + i, dat);
|
||||
uint8_t dat = m_maincpu->space(AS_PROGRAM).read_byte(src + i);
|
||||
m_fragment_sprite[(dst + i) & 0x7ff] = dat;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
READ8_MEMBER(xavix_state::vid_dma_trigger_r)
|
||||
READ8_MEMBER(xavix_state::spritefragment_dma_status_r)
|
||||
{
|
||||
// expects bit 0x40 to clear in most cases
|
||||
return 0x00;
|
||||
@ -606,80 +648,45 @@ READ8_MEMBER(xavix_state::pal_ntsc_r)
|
||||
return m_region->read();
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(xavix_state::xavix_6fc0_w) // also related to tilemap 1?
|
||||
{
|
||||
logerror("%s: xavix_6fc0_w data %02x\n", machine().describe_context(), data);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(xavix_state::tmap1_regs_w)
|
||||
{
|
||||
/*
|
||||
0x0 pointer to address where tile data is
|
||||
it gets set to 0x40 in monster truck test mode, which is outside of ram but test mode requires a fixed 'column scan' layout
|
||||
so that might be special
|
||||
0x0 pointer to low tile bits
|
||||
0x1 pointer to middle tile bits
|
||||
0x2 pointer to upper tile bits
|
||||
|
||||
0x1 pointer to middle tile bits (if needed, depends on mode) (usually straight after the ram needed for above)
|
||||
0x3 Fftt bbb- Ff = flip Y,X
|
||||
tt = tile/tilemap size
|
||||
b = bpp
|
||||
- = unused
|
||||
|
||||
0x2 pointer to tile highest tile bits (if needed, depends on mode) (usually straight after the ram needed for above)
|
||||
0x4 scroll
|
||||
0x5 scroll
|
||||
|
||||
0x3 --tt bbb- - = ? tt = tile/tilemap size b = bpp (0x36 xavix logo, 0x3c title screen, 0x36 course select)
|
||||
0x6 pppp zzzz p = palette
|
||||
z = priority
|
||||
|
||||
0x4 and 0x5 are scroll
|
||||
0x7 e--m mmmm e = enable
|
||||
m = mode
|
||||
|
||||
0x6 pppp ---- p = palette - = ? (0x02 xavix logo, 0x01 course select)
|
||||
modes are
|
||||
---0 0000 (00) 8-bit addressing (Tile Number)
|
||||
---0 0001 (01) 16-bit addressing (Tile Number) (monster truck, ekara)
|
||||
---0 0010 (02) 16-bit addressing (Addressing Mode 1) (boxing)
|
||||
---0 0011 (03) 16-bit addressing (Addressing Mode 2)
|
||||
---0 0100 (04) 24-bit addressing (Addressing Mode 2)
|
||||
|
||||
0x7 could be mode (16x16, 8x8 etc.)
|
||||
0x00 is disabled?
|
||||
0x80 means 16x16 tiles
|
||||
0x81 might be 8x8 tiles
|
||||
0x93 course / mode select bg / ingame (weird addressing?)
|
||||
---0 1000 (08) 8-bit+8 addressing (Tile Number + 8-bit Attribute)
|
||||
---0 1001 (09) 16-bit+8 addressing (Tile Number + 8-bit Attribute)
|
||||
---0 1010 (0a) 16-bit+8 addressing (Addressing Mode 1 + 8-bit Attribute) (boxing, Snowboard)
|
||||
---0 1011 (0b) 16-bit+8 addressing (Addressing Mode 2 + 8-bit Attribute)
|
||||
|
||||
---1 0011 (13) 16-bit addressing (Addressing Mode 2 + Inline Header) (monster truck)
|
||||
---1 0100 (14) 24-bit addressing (Addressing Mode 2 + Inline Header)
|
||||
|
||||
*/
|
||||
|
||||
/*
|
||||
6aff base registers
|
||||
-- ingame
|
||||
|
||||
ae 80
|
||||
02 80
|
||||
02 90
|
||||
02 a0
|
||||
02 b0
|
||||
02 c0
|
||||
02 d0
|
||||
02 e0
|
||||
|
||||
02 00
|
||||
04 80
|
||||
04 90
|
||||
04 a0
|
||||
04 b0
|
||||
04 c0
|
||||
04 d0
|
||||
04 e0
|
||||
|
||||
-- menu
|
||||
af 80
|
||||
27 80
|
||||
27 90
|
||||
27 a0
|
||||
27 b0
|
||||
27 c0
|
||||
27 d0
|
||||
27 e0
|
||||
|
||||
27 00
|
||||
00 80
|
||||
00 90
|
||||
00 a0
|
||||
00 b0
|
||||
00 c0
|
||||
00 d0
|
||||
00 e0
|
||||
*/
|
||||
|
||||
|
||||
if ((offset != 0x4) && (offset != 0x5))
|
||||
{
|
||||
logerror("%s: tmap1_regs_w offset %02x data %02x\n", machine().describe_context(), offset, data);
|
||||
@ -688,15 +695,6 @@ WRITE8_MEMBER(xavix_state::tmap1_regs_w)
|
||||
COMBINE_DATA(&m_tmap1_regs[offset]);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(xavix_state::xavix_6fd8_w) // also related to tilemap 2?
|
||||
{
|
||||
// possibly just a mirror of tmap2_regs_w, at least it writes 0x04 here which would be the correct
|
||||
// base address to otherwise write at tmap2_regs_w offset 0
|
||||
// tmap2_regs_w(space,offset,data);
|
||||
|
||||
logerror("%s: xavix_6fd8_w data %02x\n", machine().describe_context(), data);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(xavix_state::tmap2_regs_w)
|
||||
{
|
||||
// same as above but for 2nd tilemap
|
||||
@ -708,23 +706,93 @@ WRITE8_MEMBER(xavix_state::tmap2_regs_w)
|
||||
COMBINE_DATA(&m_tmap2_regs[offset]);
|
||||
}
|
||||
|
||||
|
||||
WRITE8_MEMBER(xavix_state::spriteregs_w)
|
||||
{
|
||||
logerror("%s: spriteregs_w data %02x\n", machine().describe_context(), data);
|
||||
/*
|
||||
This is similar to Tilemap reg 7 and is used to set the addressing mode for sprite data
|
||||
|
||||
---0 -000 (00) 8-bit addressing (Tile Number)
|
||||
---0 -001 (01) 16-bit addressing (Tile Number)
|
||||
---0 -010 (02) 16-bit addressing (Addressing Mode 1)
|
||||
---0 -011 (03) 16-bit addressing (Addressing Mode 2)
|
||||
---0 -100 (04) 24-bit addressing (Addressing Mode 2)
|
||||
|
||||
---1 -011 (13) 16-bit addressing (Addressing Mode 2 + Inline Header)
|
||||
---1 -100 (14) 24-bit addressing (Addressing Mode 2 + Inline Header)
|
||||
*/
|
||||
m_spritereg = data;
|
||||
}
|
||||
|
||||
READ8_MEMBER(xavix_state::tmap1_regs_r)
|
||||
{
|
||||
logerror("%s: tmap1_regs_r offset %02x\n", offset, machine().describe_context());
|
||||
return m_tmap1_regs[offset];
|
||||
}
|
||||
|
||||
READ8_MEMBER(xavix_state::tmap2_regs_r)
|
||||
{
|
||||
// does this return the same data or a status?
|
||||
|
||||
logerror("%s: tmap2_regs_r offset %02x\n", offset, machine().describe_context());
|
||||
return m_tmap2_regs[offset];
|
||||
}
|
||||
|
||||
READ8_MEMBER(xavix_state::xavix_4000_r)
|
||||
// The Text Array / Memory Emulator acts as a memory area that you can point the tilemap sources at to get a fixed pattern of data
|
||||
WRITE8_MEMBER(xavix_state::xavix_memoryemu_txarray_w)
|
||||
{
|
||||
if (offset < 0x400)
|
||||
{
|
||||
// nothing
|
||||
}
|
||||
else if (offset < 0x800)
|
||||
{
|
||||
m_txarray[0] = data;
|
||||
}
|
||||
else if (offset < 0xc00)
|
||||
{
|
||||
m_txarray[1] = data;
|
||||
}
|
||||
else if (offset < 0x1000)
|
||||
{
|
||||
m_txarray[2] = data;
|
||||
}
|
||||
}
|
||||
|
||||
READ8_MEMBER(xavix_state::xavix_memoryemu_txarray_r)
|
||||
{
|
||||
if (offset < 0x100)
|
||||
{
|
||||
offset &= 0xff;
|
||||
return ((offset>>4) | (offset<<4));
|
||||
}
|
||||
else
|
||||
else if (offset < 0x200)
|
||||
{
|
||||
return 0x00;
|
||||
offset &= 0xff;
|
||||
return ((offset>>4) | (~offset<<4));
|
||||
}
|
||||
else if (offset < 0x300)
|
||||
{
|
||||
offset &= 0xff;
|
||||
return ((~offset>>4) | (offset<<4));
|
||||
}
|
||||
else if (offset < 0x400)
|
||||
{
|
||||
offset &= 0xff;
|
||||
return ((~offset>>4) | (~offset<<4));
|
||||
}
|
||||
else if (offset < 0x800)
|
||||
{
|
||||
return m_txarray[0];
|
||||
}
|
||||
else if (offset < 0xc00)
|
||||
{
|
||||
return m_txarray[1];
|
||||
}
|
||||
else if (offset < 0x1000)
|
||||
{
|
||||
return m_txarray[2];
|
||||
}
|
||||
|
||||
return 0xff;
|
||||
}
|
||||
|
||||
|
Loading…
Reference in New Issue
Block a user