mirror of
https://github.com/holub/mame
synced 2025-04-22 16:31:49 +03:00
watchdog: make watchdog_enable compatible with writeline, add a watchdog reset writeline, add debugger side effect checks for watchdog reset_r,
supertnk: fix reset caused by watchdog on titlescreen, mos6530n: remove a7800 workaround, tourtabl: use mos6532_new_device, small cleanups
This commit is contained in:
hap
parent
7566aca63d
commit
4b1257e2f0
@ -64,10 +64,10 @@ void mos6532_new_device::ram_map(address_map &map)
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void mos6532_new_device::io_map(address_map &map)
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{
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map.global_mask(0x1f);
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map(0x00, 0x00).mirror(0x18).rw(FUNC(mos6532_new_device::pa_data_r), FUNC(mos6532_new_device::pa_data_w)); // SWCHA
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map(0x01, 0x01).mirror(0x18).rw(FUNC(mos6532_new_device::pa_ddr_r), FUNC(mos6532_new_device::pa_ddr_w)); // SWACNT
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map(0x02, 0x02).mirror(0x18).rw(FUNC(mos6532_new_device::pb_data_r), FUNC(mos6532_new_device::pb_data_w)); // SWCHB
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map(0x03, 0x03).mirror(0x18).rw(FUNC(mos6532_new_device::pb_ddr_r), FUNC(mos6532_new_device::pb_ddr_w)); // SWBCNT
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map(0x00, 0x00).mirror(0x18).rw(FUNC(mos6532_new_device::pa_data_r), FUNC(mos6532_new_device::pa_data_w));
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map(0x01, 0x01).mirror(0x18).rw(FUNC(mos6532_new_device::pa_ddr_r), FUNC(mos6532_new_device::pa_ddr_w));
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map(0x02, 0x02).mirror(0x18).rw(FUNC(mos6532_new_device::pb_data_r), FUNC(mos6532_new_device::pb_data_w));
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map(0x03, 0x03).mirror(0x18).rw(FUNC(mos6532_new_device::pb_ddr_r), FUNC(mos6532_new_device::pb_ddr_w));
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map(0x14, 0x17).w(FUNC(mos6532_new_device::timer_off_w));
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map(0x1c, 0x1f).w(FUNC(mos6532_new_device::timer_on_w));
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map(0x04, 0x04).mirror(0x12).r(FUNC(mos6532_new_device::timer_off_r));
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@ -109,9 +109,7 @@ mos6530_device_base::mos6530_device_base(const machine_config &mconfig, device_t
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m_ie_timer(false),
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m_irq_timer(false),
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m_ie_edge(false),
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m_irq_edge(false),
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m_timershift(0),
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m_timerstate(0)
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m_irq_edge(false)
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{
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}
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@ -142,6 +140,9 @@ void mos6530_device_base::device_start()
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{
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// allocate timer
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m_timer = timer_alloc(FUNC(mos6530_device_base::timer_end), this);
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m_timershift = 10;
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m_timerstate = TIMER_COUNTING;
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m_timer->adjust(attotime::from_ticks(256 << m_timershift, clock()));
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// state saving
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save_item(NAME(m_pa_in));
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@ -171,13 +172,12 @@ void mos6530_device_base::device_start()
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void mos6530_device_base::device_reset()
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{
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m_pa_out = 0xff;
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m_pa_out = 0;
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m_pa_ddr = 0;
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m_pb_out = 0xff; // a7800 One-On-One Basketball (1on1u) needs this or you can't start a game, it doesn't initialize it. (see MT6060)
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m_pb_out = 0;
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m_pb_ddr = 0;
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m_ie_timer = false;
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m_irq_timer = false;
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m_ie_edge = false;
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m_irq_edge = false;
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m_pa7_dir = 0;
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@ -186,11 +186,6 @@ void mos6530_device_base::device_reset()
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update_pb();
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update_irq();
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edge_detect();
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// reset timer states
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m_timershift = 10;
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m_timerstate = TIMER_COUNTING;
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m_timer->adjust(attotime::from_ticks(256 << m_timershift, clock()));
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}
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@ -319,7 +314,7 @@ TIMER_CALLBACK_MEMBER(mos6530_device_base::timer_end)
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}
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// if we finished, keep spinning without the prescaler
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m_timerstate = TIMER_FINISHING;
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m_timerstate = TIMER_SPINNING;
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m_timer->adjust(attotime::from_ticks(256, clock()));
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}
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@ -108,7 +108,7 @@ protected:
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enum {
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TIMER_COUNTING,
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TIMER_FINISHING
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TIMER_SPINNING
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};
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void update_pa();
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@ -2,8 +2,6 @@
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// copyright-holders:Aaron Giles
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/***************************************************************************
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watchdog.c
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Watchdog timer device.
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***************************************************************************/
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@ -30,6 +28,9 @@ watchdog_timer_device::watchdog_timer_device(const machine_config &mconfig, cons
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, m_vblank_count(0)
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, m_time(attotime::zero)
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, m_screen(*this, finder_base::DUMMY_TAG)
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, m_enabled(false)
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, m_reset_line(0)
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, m_counter(0)
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{
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}
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@ -52,14 +53,12 @@ void watchdog_timer_device::device_validity_check(validity_checker &valid) const
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//-------------------------------------------------
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// device_start - perform device-specific
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// startup
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// device_start - perform device-specific startup
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//-------------------------------------------------
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void watchdog_timer_device::device_start()
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{
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// initialize the watchdog
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m_counter = 0;
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m_timer = timer_alloc(FUNC(watchdog_timer_device::watchdog_expired), this);
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if (m_vblank_count != 0)
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@ -68,7 +67,9 @@ void watchdog_timer_device::device_start()
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if (m_screen)
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m_screen->register_vblank_callback(vblank_state_delegate(&watchdog_timer_device::watchdog_vblank, this));
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}
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save_item(NAME(m_enabled));
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save_item(NAME(m_reset_line));
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save_item(NAME(m_counter));
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}
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@ -121,11 +122,13 @@ void watchdog_timer_device::watchdog_reset()
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//-------------------------------------------------
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// watchdog_enable - reset the watchdog timer
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// watchdog_enable - enable the watchdog timer
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//-------------------------------------------------
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void watchdog_timer_device::watchdog_enable(bool enable)
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void watchdog_timer_device::watchdog_enable(int state)
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{
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const bool enable = bool(state);
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// when re-enabled, we reset our state
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if (m_enabled != enable)
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{
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@ -180,21 +183,67 @@ void watchdog_timer_device::watchdog_vblank(screen_device &screen, bool vblank_s
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// 8-bit reset read/write handlers
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//-------------------------------------------------
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void watchdog_timer_device::reset_w(u8 data) { watchdog_reset(); }
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u8 watchdog_timer_device::reset_r(address_space &space) { watchdog_reset(); return space.unmap(); }
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void watchdog_timer_device::reset_w(u8 data)
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{
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watchdog_reset();
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}
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u8 watchdog_timer_device::reset_r(address_space &space)
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{
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if (!machine().side_effects_disabled())
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watchdog_reset();
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return space.unmap();
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}
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//-------------------------------------------------
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// 16-bit reset read/write handlers
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//-------------------------------------------------
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void watchdog_timer_device::reset16_w(u16 data) { watchdog_reset(); }
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u16 watchdog_timer_device::reset16_r(address_space &space) { watchdog_reset(); return space.unmap(); }
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void watchdog_timer_device::reset16_w(u16 data)
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{
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watchdog_reset();
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}
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u16 watchdog_timer_device::reset16_r(address_space &space)
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{
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if (!machine().side_effects_disabled())
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watchdog_reset();
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return space.unmap();
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}
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//-------------------------------------------------
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// 32-bit reset read/write handlers
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//-------------------------------------------------
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void watchdog_timer_device::reset32_w(u32 data) { watchdog_reset(); }
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u32 watchdog_timer_device::reset32_r(address_space &space) { watchdog_reset(); return space.unmap(); }
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void watchdog_timer_device::reset32_w(u32 data)
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{
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watchdog_reset();
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}
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u32 watchdog_timer_device::reset32_r(address_space &space)
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{
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if (!machine().side_effects_disabled())
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watchdog_reset();
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return space.unmap();
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}
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//-------------------------------------------------
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// reset writeline handler
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//-------------------------------------------------
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void watchdog_timer_device::reset_line_w(int state)
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{
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state = state ? 1 : 0;
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// reset watchdog on rising edge
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if (state && !m_reset_line)
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watchdog_reset();
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m_reset_line = state;
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}
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@ -26,10 +26,10 @@ public:
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// watchdog control
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void watchdog_reset();
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void watchdog_enable(bool enable = true);
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void watchdog_enable(int state = 1);
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int32_t get_vblank_counter() const { return m_counter; }
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// read/write handlers
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// watchdog reset read/write handlers (strobe on R/W pin)
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void reset_w(u8 data = 0);
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u8 reset_r(address_space &space);
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void reset16_w(u16 data = 0);
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@ -37,6 +37,9 @@ public:
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void reset32_w(u32 data = 0);
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u32 reset32_r(address_space &space);
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// watchdog reset writeline strobe
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void reset_line_w(int state);
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protected:
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// device-level overrides
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virtual void device_validity_check(validity_checker &valid) const override;
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@ -57,6 +60,7 @@ private:
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// internal state
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bool m_enabled; // is the watchdog enabled?
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int m_reset_line; // watchdog reset writeline state
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int32_t m_counter; // counter for VBLANK tracking
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emu_timer * m_timer; // timer for triggering reset
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};
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@ -210,10 +210,9 @@ uint8_t a7800_state::riot_console_button_r()
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void a7800_state::riot_button_pullup_w(uint8_t data)
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{
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if(m_maincpu->space(AS_PROGRAM).read_byte(0x283) & 0x04)
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m_p1_one_button = data & 0x04; // pin 6 of the controller port is held high by the riot chip when reading two-button controllers (from schematic)
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if(m_maincpu->space(AS_PROGRAM).read_byte(0x283) & 0x10)
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m_p2_one_button = data & 0x10;
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// pin 6 of the controller port is held high by the riot chip when reading two-button controllers (from schematic)
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m_p1_one_button = data & 0x04;
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m_p2_one_button = data & 0x10;
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}
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uint8_t a7800_state::tia_r(offs_t offset)
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@ -240,12 +239,12 @@ uint8_t a7800_state::tia_r(offs_t offset)
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case 0x0b:
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return ((m_io_buttons->read() & 0x04) << 5);
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case 0x0c:
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if (((m_io_buttons->read() & 0x08) ||(m_io_buttons->read() & 0x02)) && m_p1_one_button)
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if (((m_io_buttons->read() & 0x08) || (m_io_buttons->read() & 0x02)) && m_p1_one_button)
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return 0x00;
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else
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return 0x80;
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case 0x0d:
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if (((m_io_buttons->read() & 0x01) ||(m_io_buttons->read() & 0x04)) && m_p2_one_button)
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if (((m_io_buttons->read() & 0x01) || (m_io_buttons->read() & 0x04)) && m_p2_one_button)
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return 0x00;
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else
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return 0x80;
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@ -9,11 +9,13 @@
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***************************************************************************/
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#include "emu.h"
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#include "machine/6532riot.h"
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#include "machine/mos6530n.h"
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#include "cpu/m6502/m6507.h"
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#include "machine/watchdog.h"
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#include "sound/tiaintf.h"
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#include "tia.h"
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#include "screen.h"
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#include "speaker.h"
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@ -26,104 +28,98 @@ public:
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tourtabl_state(const machine_config &mconfig, device_type type, const char *tag) :
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driver_device(mconfig, type, tag),
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m_maincpu(*this, "maincpu"),
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m_riot(*this, "riot%u", 0),
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m_tia(*this, "tia_video"),
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m_tia_inputs(*this, { "PADDLE1", "PADDLE2", "PADDLE3", "PADDLE4", "TIA_IN4", "TIA_IN5" }),
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m_screen(*this, "screen"),
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m_leds(*this, "led%u", 0U)
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{ }
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void tourtabl(machine_config &config);
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private:
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protected:
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virtual void machine_start() override { m_leds.resolve(); }
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void tourtabl_led_w(uint8_t data);
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uint16_t tourtabl_read_input_port(offs_t offset);
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uint8_t tourtabl_get_databus_contents(offs_t offset);
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void main_map(address_map &map);
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private:
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required_device<cpu_device> m_maincpu;
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required_device_array<mos6532_new_device, 2> m_riot;
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required_device<tia_video_device> m_tia;
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required_ioport_array<6> m_tia_inputs;
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required_device<screen_device> m_screen;
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output_finder<4> m_leds;
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void tourtabl_led_w(uint8_t data);
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uint16_t tourtabl_read_input_port(offs_t offset) { return m_tia_inputs[offset]->read(); }
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uint8_t tourtabl_get_databus_contents(offs_t offset) { return offset; }
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void main_map(address_map &map);
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};
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#define MASTER_CLOCK XTAL(3'579'545)
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void tourtabl_state::tourtabl_led_w(uint8_t data)
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{
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m_leds[0] = BIT(data, 6); /* start 1 */
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m_leds[1] = BIT(data, 5); /* start 2 */
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m_leds[2] = BIT(data, 4); /* start 4 */
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m_leds[3] = BIT(data, 7); /* select game */
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m_leds[0] = BIT(data, 6); // start 1
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m_leds[1] = BIT(data, 5); // start 2
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m_leds[2] = BIT(data, 4); // start 4
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m_leds[3] = BIT(data, 7); // select game
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machine().bookkeeping().coin_lockout_global_w(!(data & 0x80));
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}
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uint16_t tourtabl_state::tourtabl_read_input_port(offs_t offset)
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{
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static const char *const tianames[] = { "PADDLE4", "PADDLE3", "PADDLE2", "PADDLE1", "TIA_IN4", "TIA_IN5" };
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return ioport(tianames[offset])->read();
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}
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uint8_t tourtabl_state::tourtabl_get_databus_contents(offs_t offset)
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{
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return offset;
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}
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void tourtabl_state::main_map(address_map &map)
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{
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map(0x0000, 0x007f).mirror(0x0100).rw("tia_video", FUNC(tia_video_device::read), FUNC(tia_video_device::write));
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map(0x0080, 0x00ff).mirror(0x0100).ram();
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map(0x0280, 0x029f).rw("riot1", FUNC(riot6532_device::read), FUNC(riot6532_device::write));
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map(0x0400, 0x047f).ram();
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map(0x0500, 0x051f).rw("riot2", FUNC(riot6532_device::read), FUNC(riot6532_device::write));
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map(0x0000, 0x007f).mirror(0x0100).rw(m_tia, FUNC(tia_video_device::read), FUNC(tia_video_device::write));
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map(0x0080, 0x00ff).mirror(0x0100).m(m_riot[0], FUNC(mos6532_new_device::ram_map));
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map(0x0280, 0x029f).m(m_riot[0], FUNC(mos6532_new_device::io_map));
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map(0x0400, 0x047f).m(m_riot[1], FUNC(mos6532_new_device::ram_map));
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map(0x0500, 0x051f).m(m_riot[1], FUNC(mos6532_new_device::io_map));
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map(0x0800, 0x1fff).rom();
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}
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static INPUT_PORTS_START( tourtabl )
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PORT_START("PADDLE4")
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PORT_BIT( 0xff, 0x80, IPT_PADDLE ) PORT_SENSITIVITY(40) PORT_KEYDELTA(10) PORT_CENTERDELTA(0) PORT_REVERSE PORT_PLAYER(4)
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PORT_START("PADDLE3")
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PORT_BIT( 0xff, 0x80, IPT_PADDLE ) PORT_SENSITIVITY(40) PORT_KEYDELTA(10) PORT_CENTERDELTA(0) PORT_REVERSE PORT_PLAYER(3)
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PORT_START("PADDLE1")
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PORT_BIT( 0xff, 0x8f, IPT_PADDLE ) PORT_MINMAX(0x1f, 0xff) PORT_SENSITIVITY(40) PORT_KEYDELTA(10) PORT_CENTERDELTA(0) PORT_REVERSE PORT_PLAYER(1)
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PORT_START("PADDLE2")
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PORT_BIT( 0xff, 0x80, IPT_PADDLE ) PORT_SENSITIVITY(40) PORT_KEYDELTA(10) PORT_CENTERDELTA(0) PORT_REVERSE PORT_PLAYER(2)
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PORT_BIT( 0xff, 0x8f, IPT_PADDLE ) PORT_MINMAX(0x1f, 0xff) PORT_SENSITIVITY(40) PORT_KEYDELTA(10) PORT_CENTERDELTA(0) PORT_REVERSE PORT_PLAYER(2)
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PORT_START("PADDLE1")
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PORT_BIT( 0xff, 0x80, IPT_PADDLE ) PORT_SENSITIVITY(40) PORT_KEYDELTA(10) PORT_CENTERDELTA(0) PORT_REVERSE PORT_PLAYER(1)
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PORT_START("PADDLE3")
|
||||
PORT_BIT( 0xff, 0x8f, IPT_PADDLE ) PORT_MINMAX(0x1f, 0xff) PORT_SENSITIVITY(40) PORT_KEYDELTA(10) PORT_CENTERDELTA(0) PORT_PLAYER(3)
|
||||
|
||||
PORT_START("TIA_IN4") /* TIA INPT4 */
|
||||
PORT_START("PADDLE4")
|
||||
PORT_BIT( 0xff, 0x8f, IPT_PADDLE ) PORT_MINMAX(0x1f, 0xff) PORT_SENSITIVITY(40) PORT_KEYDELTA(10) PORT_CENTERDELTA(0) PORT_REVERSE PORT_PLAYER(4)
|
||||
|
||||
PORT_START("TIA_IN4") // TIA INPT4
|
||||
PORT_DIPNAME( 0x80, 0x80, "Breakout Replay" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ))
|
||||
PORT_DIPSETTING( 0x80, DEF_STR( On ))
|
||||
|
||||
PORT_START("TIA_IN5") /* TIA INPT5 */
|
||||
PORT_START("TIA_IN5") // TIA INPT5
|
||||
PORT_DIPNAME( 0x80, 0x80, "Game Length" )
|
||||
PORT_DIPSETTING( 0x00, "11 points (3 balls)" )
|
||||
PORT_DIPSETTING( 0x80, "15 points (5 balls)" )
|
||||
|
||||
PORT_START("RIOT0_SWA") /* RIOT #0 SWCHA */
|
||||
PORT_DIPNAME( 0x0F, 0x0E, "Replay Level" )
|
||||
PORT_DIPSETTING( 0x0B, "200 points" )
|
||||
PORT_DIPSETTING( 0x0C, "250 points" )
|
||||
PORT_DIPSETTING( 0x0D, "300 points" )
|
||||
PORT_DIPSETTING( 0x0E, "400 points" )
|
||||
PORT_DIPSETTING( 0x0F, "450 points" )
|
||||
PORT_START("RIOT0_SWA") // RIOT #0 SWCHA
|
||||
PORT_DIPNAME( 0x0f, 0x0e, "Replay Level" )
|
||||
PORT_DIPSETTING( 0x0b, "200 points" )
|
||||
PORT_DIPSETTING( 0x0c, "250 points" )
|
||||
PORT_DIPSETTING( 0x0d, "300 points" )
|
||||
PORT_DIPSETTING( 0x0e, "400 points" )
|
||||
PORT_DIPSETTING( 0x0f, "450 points" )
|
||||
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(4)
|
||||
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(3)
|
||||
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2)
|
||||
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1)
|
||||
|
||||
PORT_START("RIOT0_SWB") /* RIOT #0 SWCHB */
|
||||
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("Game Select") PORT_CODE(KEYCODE_SPACE)
|
||||
PORT_START("RIOT0_SWB") // RIOT #0 SWCHB
|
||||
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_NAME("Game Select")
|
||||
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_TILT )
|
||||
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_COIN2 )
|
||||
|
||||
PORT_START("RIOT1_SWA")/* RIOT #1 SWCHA */
|
||||
PORT_DIPNAME( 0x0F, 0x07, DEF_STR( Coinage ))
|
||||
PORT_START("RIOT1_SWA") // RIOT #1 SWCHA
|
||||
PORT_DIPNAME( 0x0f, 0x07, DEF_STR( Coinage ))
|
||||
PORT_DIPSETTING( 0x00, "Mode A" )
|
||||
PORT_DIPSETTING( 0x01, "Mode B" )
|
||||
PORT_DIPSETTING( 0x02, "Mode C" )
|
||||
@ -134,12 +130,12 @@ static INPUT_PORTS_START( tourtabl )
|
||||
PORT_DIPSETTING( 0x07, "Mode H" )
|
||||
PORT_DIPSETTING( 0x08, "Mode I" )
|
||||
PORT_DIPSETTING( 0x09, "Mode J" )
|
||||
PORT_DIPSETTING( 0x0A, "Mode K" )
|
||||
PORT_DIPSETTING( 0x0B, "Mode L" )
|
||||
PORT_DIPSETTING( 0x0C, "Mode M" )
|
||||
PORT_DIPSETTING( 0x0D, "Mode N" )
|
||||
PORT_DIPSETTING( 0x0E, "Mode O" )
|
||||
PORT_DIPSETTING( 0x0F, "Mode P" )
|
||||
PORT_DIPSETTING( 0x0a, "Mode K" )
|
||||
PORT_DIPSETTING( 0x0b, "Mode L" )
|
||||
PORT_DIPSETTING( 0x0c, "Mode M" )
|
||||
PORT_DIPSETTING( 0x0d, "Mode N" )
|
||||
PORT_DIPSETTING( 0x0e, "Mode O" )
|
||||
PORT_DIPSETTING( 0x0f, "Mode P" )
|
||||
PORT_DIPNAME( 0x30, 0x00, DEF_STR( Language ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( English ) )
|
||||
PORT_DIPSETTING( 0x10, DEF_STR( French ) )
|
||||
@ -148,42 +144,42 @@ static INPUT_PORTS_START( tourtabl )
|
||||
PORT_SERVICE( 0x40, IP_ACTIVE_HIGH )
|
||||
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_COIN1 )
|
||||
|
||||
PORT_START("RIOT1_SWB") /* RIOT #1 SWCHB */
|
||||
PORT_START("RIOT1_SWB") // RIOT #1 SWCHB
|
||||
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_START4 )
|
||||
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_START2 )
|
||||
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_START1 )
|
||||
|
||||
INPUT_PORTS_END
|
||||
|
||||
|
||||
void tourtabl_state::tourtabl(machine_config &config)
|
||||
{
|
||||
/* basic machine hardware */
|
||||
// basic machine hardware
|
||||
constexpr XTAL MASTER_CLOCK(3.579575_MHz_XTAL);
|
||||
M6507(config, m_maincpu, MASTER_CLOCK / 3);
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &tourtabl_state::main_map);
|
||||
|
||||
riot6532_device &riot1(RIOT6532(config, "riot1", MASTER_CLOCK / 3));
|
||||
riot1.in_pa_callback().set_ioport("RIOT0_SWA");
|
||||
riot1.in_pb_callback().set_ioport("RIOT0_SWB");
|
||||
riot1.out_pb_callback().set("watchdog", FUNC(watchdog_timer_device::reset_w));
|
||||
MOS6532_NEW(config, m_riot[0], MASTER_CLOCK / 3);
|
||||
m_riot[0]->pa_rd_callback().set_ioport("RIOT0_SWA");
|
||||
m_riot[0]->pb_rd_callback().set_ioport("RIOT0_SWB");
|
||||
m_riot[0]->pb_wr_callback().set("watchdog", FUNC(watchdog_timer_device::reset_line_w)).bit(0);
|
||||
|
||||
riot6532_device &riot2(RIOT6532(config, "riot2", MASTER_CLOCK / 3));
|
||||
riot2.in_pa_callback().set_ioport("RIOT1_SWA");
|
||||
riot2.in_pb_callback().set_ioport("RIOT1_SWB");
|
||||
riot2.out_pb_callback().set(FUNC(tourtabl_state::tourtabl_led_w));
|
||||
MOS6532_NEW(config, m_riot[1], MASTER_CLOCK / 3);
|
||||
m_riot[1]->pa_rd_callback().set_ioport("RIOT1_SWA");
|
||||
m_riot[1]->pb_rd_callback().set_ioport("RIOT1_SWB");
|
||||
m_riot[1]->pb_wr_callback().set(FUNC(tourtabl_state::tourtabl_led_w));
|
||||
|
||||
WATCHDOG_TIMER(config, "watchdog");
|
||||
|
||||
/* video hardware */
|
||||
tia_ntsc_video_device &tia(TIA_NTSC_VIDEO(config, "tia_video", 0, "tia"));
|
||||
tia.read_input_port_callback().set(FUNC(tourtabl_state::tourtabl_read_input_port));
|
||||
tia.databus_contents_callback().set(FUNC(tourtabl_state::tourtabl_get_databus_contents));
|
||||
// video hardware
|
||||
TIA_NTSC_VIDEO(config, m_tia, 0, "tia");
|
||||
m_tia->read_input_port_callback().set(FUNC(tourtabl_state::tourtabl_read_input_port));
|
||||
m_tia->databus_contents_callback().set(FUNC(tourtabl_state::tourtabl_get_databus_contents));
|
||||
|
||||
screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER));
|
||||
screen.set_raw(MASTER_CLOCK, 228, 34, 34 + 160, 262, 46, 46 + 200);
|
||||
screen.set_screen_update("tia_video", FUNC(tia_video_device::screen_update));
|
||||
SCREEN(config, m_screen, SCREEN_TYPE_RASTER);
|
||||
m_screen->set_raw(MASTER_CLOCK, 228, 34, 34 + 160, 262, 46, 46 + 200);
|
||||
m_screen->set_screen_update(m_tia, FUNC(tia_video_device::screen_update));
|
||||
|
||||
/* sound hardware */
|
||||
// sound hardware
|
||||
SPEAKER(config, "mono").front_center();
|
||||
TIA(config, "tia", MASTER_CLOCK/114).add_route(ALL_OUTPUTS, "mono", 1.0);
|
||||
}
|
||||
|
||||
@ -186,7 +186,6 @@ private:
|
||||
bitmap_ind16 m_update_bitmap;
|
||||
|
||||
uint8_t m_port2_data = 0;
|
||||
uint32_t m_last_watchdog = 0;
|
||||
int m_left_volume = 0;
|
||||
int m_right_volume = 0;
|
||||
uint8_t m_interrupt_mask = 0;
|
||||
@ -272,7 +271,6 @@ void rastersp_state::machine_start()
|
||||
save_item(NAME(m_speedup_count));
|
||||
save_item(NAME(m_tms_io_regs));
|
||||
save_item(NAME(m_port2_data));
|
||||
save_item(NAME(m_last_watchdog));
|
||||
save_item(NAME(m_left_volume));
|
||||
save_item(NAME(m_right_volume));
|
||||
save_item(NAME(m_interrupt_mask));
|
||||
@ -299,7 +297,6 @@ void rastersp_state::machine_reset()
|
||||
m_dlba = 0;
|
||||
m_palette_number = 0;
|
||||
|
||||
m_last_watchdog = 0;
|
||||
m_port2_data = 0;
|
||||
m_left_volume = 0;
|
||||
m_right_volume = 0;
|
||||
@ -763,13 +760,7 @@ void rastersp_state::port1_w(uint32_t data)
|
||||
m_dsp->set_input_line(TMS3203X_IRQ2, CLEAR_LINE);
|
||||
}
|
||||
|
||||
if (BIT(data, 7) != m_last_watchdog)
|
||||
{
|
||||
m_last_watchdog = BIT(data, 7);
|
||||
|
||||
if (BIT(data, 7))
|
||||
m_watchdog->watchdog_reset();
|
||||
}
|
||||
m_watchdog->reset_line_w(BIT(data, 7));
|
||||
}
|
||||
|
||||
|
||||
@ -1617,4 +1608,5 @@ ROM_END
|
||||
|
||||
GAME( 1994, rotr, 0, rastersp, rotr, rastersp_state, empty_init, ROT0, "BFM/Mirage", "Rise of the Robots (prototype)", MACHINE_SUPPORTS_SAVE )
|
||||
GAME( 1994, rotra, rotr, rastersp, rotr, rastersp_state, empty_init, ROT0, "BFM/Mirage", "Rise of the Robots (prototype, older)", MACHINE_SUPPORTS_SAVE )
|
||||
|
||||
GAME( 1997, fbcrazy, 0, fbcrazy, fbcrazy, fbcrazy_state, empty_init, ROT0, "BFM", "Football Crazy (Video Quiz)", MACHINE_SUPPORTS_SAVE )
|
||||
|
||||
@ -37,7 +37,6 @@ Display : unknown; similar protocol for HP 3457A documented on
|
||||
http://www.eevblog.com/forum/projects/led-display-for-hp-3457a-multimeter-i-did-it-)/25/
|
||||
|
||||
|
||||
|
||||
Main cpu I/O ports:
|
||||
Port1
|
||||
P14-P17 : keypad out (cols)
|
||||
@ -74,8 +73,6 @@ T1 : data in thru isol, from analog CPU (opcodes jt1 / jnt1)
|
||||
#define P26 (1 << 6)
|
||||
#define P27 (1 << 7)
|
||||
|
||||
|
||||
|
||||
#define A12_PIN P26
|
||||
#define CALRAM_CS P23
|
||||
#define DIPSWITCH_CS P22
|
||||
@ -85,8 +82,7 @@ T1 : data in thru isol, from analog CPU (opcodes jt1 / jnt1)
|
||||
#define DISP_SYNC P23
|
||||
#define DISP_ISA P22
|
||||
#define DISP_IWA P21
|
||||
#define DISP_CK1 P20
|
||||
//don't care about CK2 since it's supposed to be a delayed copy of CK1
|
||||
#define DISP_CK1 P20 //don't care about CK2 since it's supposed to be a delayed copy of CK1
|
||||
#define DISP_MASK (DISP_PWO | DISP_SYNC | DISP_ISA | DISP_IWA | DISP_CK1) //used for edge detection
|
||||
|
||||
// IO banking : indexes of m_iobank maps
|
||||
@ -107,11 +103,11 @@ T1 : data in thru isol, from analog CPU (opcodes jt1 / jnt1)
|
||||
|
||||
#include "logmacro.h"
|
||||
|
||||
/**** HP 3478A class **/
|
||||
|
||||
|
||||
namespace {
|
||||
|
||||
/**** HP 3478A class **/
|
||||
|
||||
class hp3478a_state : public driver_device
|
||||
{
|
||||
public:
|
||||
@ -120,7 +116,6 @@ public:
|
||||
, m_maincpu(*this, "maincpu")
|
||||
, m_nvram(*this, "nvram")
|
||||
, m_nvram_raw(*this, "nvram")
|
||||
, m_watchdog(*this, "watchdog")
|
||||
, m_bank0(*this, "bank0")
|
||||
, m_iobank(*this, "iobank")
|
||||
, m_keypad(*this, "COL.%u", 0)
|
||||
@ -136,7 +131,6 @@ protected:
|
||||
|
||||
private:
|
||||
uint8_t p1read();
|
||||
void p1write(uint8_t data);
|
||||
void p2write(uint8_t data);
|
||||
void nvwrite(offs_t offset, uint8_t data);
|
||||
|
||||
@ -147,7 +141,6 @@ private:
|
||||
required_device<i8039_device> m_maincpu;
|
||||
required_device<nvram_device> m_nvram;
|
||||
required_shared_ptr<uint8_t> m_nvram_raw;
|
||||
required_device<watchdog_timer_device> m_watchdog;
|
||||
required_memory_bank m_bank0;
|
||||
required_device<address_map_bank_device> m_iobank;
|
||||
required_ioport_array<4> m_keypad;
|
||||
@ -187,10 +180,7 @@ private:
|
||||
bool m_lcd_annuns[12]; //local copy of annunciators
|
||||
///////////////////////////
|
||||
|
||||
|
||||
uint8_t m_p2_oldstate; //used to detect edges on Port2 IO pins. Should be saveable ?
|
||||
uint8_t m_p1_oldstate; //for P17 edge detection (WDT reset)
|
||||
|
||||
};
|
||||
|
||||
|
||||
@ -213,16 +203,6 @@ uint8_t hp3478a_state::p1read()
|
||||
return data;
|
||||
}
|
||||
|
||||
/* pin P17 rising edges also reset the external WDT counter */
|
||||
void hp3478a_state::p1write(uint8_t data)
|
||||
{
|
||||
if (~m_p1_oldstate & data & 0x80) {
|
||||
//P17 rising edge
|
||||
m_watchdog->watchdog_reset();
|
||||
}
|
||||
m_p1_oldstate = data;
|
||||
}
|
||||
|
||||
/** a lot of stuff multiplexed on the P2 pins.
|
||||
* parse the chipselect lines, A12 line, and LCD interface.
|
||||
*/
|
||||
@ -578,8 +558,6 @@ void hp3478a_state::lcd_interface(uint8_t p2new)
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
void hp3478a_state::machine_start()
|
||||
{
|
||||
m_bank0->configure_entries(0, 2, memregion("maincpu")->base(), 0x1000);
|
||||
@ -589,13 +567,10 @@ void hp3478a_state::machine_start()
|
||||
m_annuns = std::make_unique<output_finder<12> >(*this, "ann%u", (unsigned) 0);
|
||||
m_annuns->resolve();
|
||||
|
||||
m_watchdog->watchdog_enable();
|
||||
|
||||
m_p1_oldstate = 0;
|
||||
m_p2_oldstate = 0;
|
||||
|
||||
}
|
||||
|
||||
|
||||
/******************************************************************************
|
||||
Address Maps
|
||||
******************************************************************************/
|
||||
@ -627,6 +602,7 @@ void hp3478a_state::io_bank(address_map &map)
|
||||
/******************************************************************************
|
||||
Input Ports
|
||||
******************************************************************************/
|
||||
|
||||
static INPUT_PORTS_START( hp3478a )
|
||||
/* keypad bit matrix:
|
||||
0x08|0x04|0x02|0x01
|
||||
@ -702,9 +678,9 @@ static INPUT_PORTS_START( hp3478a )
|
||||
PORT_DIPNAME( 0x80, 0x00, "50/60Hz AC" ) PORT_DIPLOCATION("DIP:8")
|
||||
PORT_DIPSETTING( 0x00, "60Hz" )
|
||||
PORT_DIPSETTING( 0x80, "50Hz" )
|
||||
|
||||
INPUT_PORTS_END
|
||||
|
||||
|
||||
/******************************************************************************
|
||||
Machine Drivers
|
||||
******************************************************************************/
|
||||
@ -715,7 +691,7 @@ void hp3478a_state::hp3478a(machine_config &config)
|
||||
mcu.set_addrmap(AS_PROGRAM, &hp3478a_state::i8039_map);
|
||||
mcu.set_addrmap(AS_IO, &hp3478a_state::i8039_io);
|
||||
mcu.p1_in_cb().set(FUNC(hp3478a_state::p1read));
|
||||
mcu.p1_out_cb().set(FUNC(hp3478a_state::p1write));
|
||||
mcu.p1_out_cb().set("watchdog", FUNC(watchdog_timer_device::reset_line_w)).bit(7);
|
||||
mcu.p2_out_cb().set(FUNC(hp3478a_state::p2write));
|
||||
|
||||
NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0);
|
||||
@ -726,15 +702,17 @@ void hp3478a_state::hp3478a(machine_config &config)
|
||||
m_iobank->set_addr_width(18);
|
||||
m_iobank->set_stride(0x100);
|
||||
|
||||
WATCHDOG_TIMER(config, m_watchdog).set_time(attotime::from_ticks(3*5*(1<<19),CPU_CLOCK));
|
||||
WATCHDOG_TIMER(config, "watchdog").set_time(attotime::from_ticks(3*5*(1<<19),CPU_CLOCK));
|
||||
|
||||
// video
|
||||
config.set_default_layout(layout_hp3478a);
|
||||
}
|
||||
|
||||
|
||||
/******************************************************************************
|
||||
ROM Definitions
|
||||
******************************************************************************/
|
||||
|
||||
ROM_START( hp3478a )
|
||||
ROM_REGION( 0x2000, "maincpu", 0 )
|
||||
ROM_LOAD("rom_dc118.bin", 0, 0x2000, CRC(10097ced) SHA1(bd665cf7e07e63f825b2353c8322ed8a4376b3bd)) // main CPU ROM, can match other datecodes too
|
||||
|
||||
@ -673,8 +673,7 @@ void hornet_state::sysreg_w(offs_t offset, uint8_t data)
|
||||
/*
|
||||
0x80 = WDTCLK
|
||||
*/
|
||||
if (data & 0x80)
|
||||
m_watchdog->watchdog_reset();
|
||||
m_watchdog->reset_line_w(BIT(data, 7));
|
||||
break;
|
||||
|
||||
case 7: // CG Control Register
|
||||
|
||||
@ -444,8 +444,7 @@ void zr107_state::sysreg_w(offs_t offset, uint8_t data)
|
||||
/*
|
||||
0x01 = AFE
|
||||
*/
|
||||
if (data & 0x01)
|
||||
m_watchdog->watchdog_reset();
|
||||
m_watchdog->reset_line_w(data & 0x01);
|
||||
break;
|
||||
|
||||
default:
|
||||
|
||||
@ -177,11 +177,10 @@ void midvunit_state::midvunit_control_w(offs_t offset, uint32_t data, uint32_t m
|
||||
/* bit 7 is the LED */
|
||||
|
||||
/* bit 3 is the watchdog */
|
||||
if ((olddata ^ m_control_data) & 0x0008)
|
||||
m_watchdog->watchdog_reset();
|
||||
m_watchdog->reset_line_w(BIT(m_control_data, 3));
|
||||
|
||||
/* bit 1 is the DCS sound reset */
|
||||
m_dcs->reset_w((m_control_data >> 1) & 1);
|
||||
m_dcs->reset_w(BIT(m_control_data, 1));
|
||||
|
||||
/* log anything unusual */
|
||||
if ((olddata ^ m_control_data) & ~0x00e8)
|
||||
@ -195,11 +194,10 @@ void midvunit_state::crusnwld_control_w(offs_t offset, uint32_t data, uint32_t m
|
||||
COMBINE_DATA(&m_control_data);
|
||||
|
||||
/* bit 11 is the DCS sound reset */
|
||||
m_dcs->reset_w((m_control_data >> 11) & 1);
|
||||
m_dcs->reset_w(BIT(m_control_data, 11));
|
||||
|
||||
/* bit 9 is the watchdog */
|
||||
if ((olddata ^ m_control_data) & 0x0200)
|
||||
m_watchdog->watchdog_reset();
|
||||
m_watchdog->reset_line_w(BIT(m_control_data, 9));
|
||||
|
||||
/* bit 8 is the LED */
|
||||
|
||||
@ -562,12 +560,10 @@ void midvunit_state::midvplus_misc_w(offs_t offset, uint32_t data, uint32_t mem_
|
||||
switch (offset)
|
||||
{
|
||||
case 0:
|
||||
/* bit 0x10 resets watchdog */
|
||||
if ((olddata ^ m_midvplus_misc[offset]) & 0x0010)
|
||||
{
|
||||
m_watchdog->watchdog_reset();
|
||||
logit = false;
|
||||
}
|
||||
/* bit 4 resets watchdog */
|
||||
m_watchdog->reset_line_w(BIT(data, 4));
|
||||
|
||||
logit = bool((olddata ^ m_midvplus_misc[offset]) & ~0x0010);
|
||||
break;
|
||||
|
||||
case 3:
|
||||
@ -2188,13 +2184,13 @@ GAMEL( 1996, crusnwld19, crusnwld, crusnwld, crusnwld, midvunit_state, init_crus
|
||||
GAMEL( 1996, crusnwld17, crusnwld, crusnwld, crusnwld, midvunit_state, init_crusnwld, ROT0, "Midway", "Cruis'n World (v1.7)", MACHINE_SUPPORTS_SAVE, layout_crusnusa )
|
||||
GAMEL( 1996, crusnwld13, crusnwld, crusnwld, crusnwld, midvunit_state, init_crusnwld, ROT0, "Midway", "Cruis'n World (v1.3)", MACHINE_SUPPORTS_SAVE, layout_crusnusa )
|
||||
|
||||
GAMEL( 1997, offroadc, 0, offroadc, offroadc, midvunit_state, init_offroadc, ROT0, "Midway", "Off Road Challenge (v1.63)", MACHINE_SUPPORTS_SAVE, layout_crusnusa )
|
||||
GAMEL( 1997, offroadc5, offroadc, offroadc, offroadc, midvunit_state, init_offroadc, ROT0, "Midway", "Off Road Challenge (v1.50)", MACHINE_SUPPORTS_SAVE, layout_crusnusa )
|
||||
GAMEL( 1997, offroadc4, offroadc, offroadc, offroadc, midvunit_state, init_offroadc, ROT0, "Midway", "Off Road Challenge (v1.40)", MACHINE_SUPPORTS_SAVE, layout_crusnusa )
|
||||
GAMEL( 1997, offroadc3, offroadc, offroadc, offroadc, midvunit_state, init_offroadc, ROT0, "Midway", "Off Road Challenge (v1.30)", MACHINE_SUPPORTS_SAVE, layout_crusnusa )
|
||||
GAMEL( 1997, offroadc1, offroadc, offroadc, offroadc, midvunit_state, init_offroadc, ROT0, "Midway", "Off Road Challenge (v1.10)", MACHINE_SUPPORTS_SAVE, layout_crusnusa )
|
||||
GAMEL( 1997, offroadc0, offroadc, offroadc, offroadc, midvunit_state, init_offroadc, ROT0, "Midway", "Off Road Challenge (v1.00)", MACHINE_SUPPORTS_SAVE, layout_crusnusa )
|
||||
GAMEL( 1997, offroadc, 0, offroadc, offroadc, midvunit_state, init_offroadc, ROT0, "Midway", "Off Road Challenge (v1.63)", MACHINE_SUPPORTS_SAVE, layout_crusnusa )
|
||||
GAMEL( 1997, offroadc5, offroadc, offroadc, offroadc, midvunit_state, init_offroadc, ROT0, "Midway", "Off Road Challenge (v1.50)", MACHINE_SUPPORTS_SAVE, layout_crusnusa )
|
||||
GAMEL( 1997, offroadc4, offroadc, offroadc, offroadc, midvunit_state, init_offroadc, ROT0, "Midway", "Off Road Challenge (v1.40)", MACHINE_SUPPORTS_SAVE, layout_crusnusa )
|
||||
GAMEL( 1997, offroadc3, offroadc, offroadc, offroadc, midvunit_state, init_offroadc, ROT0, "Midway", "Off Road Challenge (v1.30)", MACHINE_SUPPORTS_SAVE, layout_crusnusa )
|
||||
GAMEL( 1997, offroadc1, offroadc, offroadc, offroadc, midvunit_state, init_offroadc, ROT0, "Midway", "Off Road Challenge (v1.10)", MACHINE_SUPPORTS_SAVE, layout_crusnusa )
|
||||
GAMEL( 1997, offroadc0, offroadc, offroadc, offroadc, midvunit_state, init_offroadc, ROT0, "Midway", "Off Road Challenge (v1.00)", MACHINE_SUPPORTS_SAVE, layout_crusnusa )
|
||||
|
||||
GAME( 1995, wargods, 0, midvplus, wargods, midvunit_state, init_wargods, ROT0, "Midway", "War Gods (HD 10/09/1996 - Dual Resolution)", MACHINE_SUPPORTS_SAVE )
|
||||
GAME( 1995, wargodsa, wargods, midvplus, wargodsa, midvunit_state, init_wargods, ROT0, "Midway", "War Gods (HD 08/15/1996)", MACHINE_SUPPORTS_SAVE )
|
||||
GAME( 1995, wargodsb, wargods, midvplus, wargodsa, midvunit_state, init_wargods, ROT0, "Midway", "War Gods (HD 12/11/1995)", MACHINE_SUPPORTS_SAVE )
|
||||
GAME( 1995, wargods, 0, midvplus, wargods, midvunit_state, init_wargods, ROT0, "Midway", "War Gods (HD 10/09/1996 - Dual Resolution)", MACHINE_SUPPORTS_SAVE )
|
||||
GAME( 1995, wargodsa, wargods, midvplus, wargodsa, midvunit_state, init_wargods, ROT0, "Midway", "War Gods (HD 08/15/1996)", MACHINE_SUPPORTS_SAVE )
|
||||
GAME( 1995, wargodsb, wargods, midvplus, wargodsa, midvunit_state, init_wargods, ROT0, "Midway", "War Gods (HD 12/11/1995)", MACHINE_SUPPORTS_SAVE )
|
||||
|
||||
@ -430,8 +430,7 @@ void zwackery_state::pia0_porta_w(uint8_t data)
|
||||
// bits 5 and 6 control hflip/vflip
|
||||
|
||||
// bit 7, watchdog
|
||||
if (BIT(data, 7) == 0)
|
||||
m_watchdog->watchdog_reset();
|
||||
m_watchdog->reset_line_w(BIT(data, 7));
|
||||
}
|
||||
|
||||
void zwackery_state::pia0_irq_w(int state)
|
||||
|
||||
@ -49,7 +49,7 @@
|
||||
|
||||
To 'init' (boot) the machine:
|
||||
1) Turn ON the Operator Key (9).
|
||||
2) Keep pressed the DOOR key (W). You are entering the Operator Mode.
|
||||
2) Keep pressed the DOOR key (O). You are entering the Operator Mode.
|
||||
3) Turn OFF the Operator Key (9).
|
||||
4) Reset the machine. (you must reset manually the machine due to watchdog issues).
|
||||
|
||||
|
||||
@ -119,7 +119,6 @@ public:
|
||||
supertnk_state(const machine_config &mconfig, device_type type, const char *tag)
|
||||
: driver_device(mconfig, type, tag)
|
||||
, m_maincpu(*this, "maincpu")
|
||||
, m_watchdog(*this, "watchdog")
|
||||
, m_videoram(*this, "videoram%u", 0U, 0x2000U, ENDIANNESS_BIG)
|
||||
, m_prgbank(*this, "prgbank")
|
||||
{ }
|
||||
@ -136,7 +135,6 @@ private:
|
||||
void bankswitch_0_w(int state);
|
||||
void bankswitch_1_w(int state);
|
||||
void interrupt_enable_w(int state);
|
||||
void watchdog_reset_w(int state);
|
||||
void videoram_w(offs_t offset, uint8_t data);
|
||||
uint8_t videoram_r(offs_t offset);
|
||||
void bitplane_select_0_w(int state);
|
||||
@ -156,7 +154,6 @@ private:
|
||||
bool m_interrupt_enable = false;
|
||||
|
||||
required_device<cpu_device> m_maincpu;
|
||||
required_device<watchdog_timer_device> m_watchdog;
|
||||
memory_share_array_creator<uint8_t, 3> m_videoram;
|
||||
required_memory_bank m_prgbank;
|
||||
};
|
||||
@ -214,11 +211,6 @@ void supertnk_state::interrupt_enable_w(int state)
|
||||
}
|
||||
|
||||
|
||||
void supertnk_state::watchdog_reset_w(int state)
|
||||
{
|
||||
m_watchdog->watchdog_enable(!state);
|
||||
}
|
||||
|
||||
|
||||
/*************************************
|
||||
*
|
||||
@ -435,16 +427,16 @@ void supertnk_state::supertnk(machine_config &config)
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &supertnk_state::prg_map);
|
||||
m_maincpu->set_addrmap(AS_IO, &supertnk_state::io_map);
|
||||
|
||||
WATCHDOG_TIMER(config, "watchdog");
|
||||
|
||||
ls259_device &outlatch(LS259(config, "outlatch")); // on CPU board near 2114 SRAM
|
||||
outlatch.q_out_cb<0>().set(FUNC(supertnk_state::bitplane_select_0_w));
|
||||
outlatch.q_out_cb<1>().set(FUNC(supertnk_state::bitplane_select_1_w));
|
||||
outlatch.q_out_cb<2>().set(FUNC(supertnk_state::bankswitch_0_w));
|
||||
outlatch.q_out_cb<4>().set(FUNC(supertnk_state::bankswitch_1_w));
|
||||
outlatch.q_out_cb<6>().set(FUNC(supertnk_state::watchdog_reset_w)).invert();
|
||||
outlatch.q_out_cb<6>().set("watchdog", FUNC(watchdog_timer_device::watchdog_enable)).invert();
|
||||
outlatch.q_out_cb<7>().set(FUNC(supertnk_state::interrupt_enable_w));
|
||||
|
||||
WATCHDOG_TIMER(config, m_watchdog);
|
||||
|
||||
// video hardware
|
||||
screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER));
|
||||
screen.set_raw(20.79_MHz_XTAL / 4, 330, 0, 32*8, 315, 0, 32*8); // parameters guessed
|
||||
|
||||
@ -289,8 +289,7 @@ void dribling_state::pb_w(uint8_t data)
|
||||
void dribling_state::shr_w(uint8_t data)
|
||||
{
|
||||
// bit 3 = watchdog
|
||||
if (data & 0x08)
|
||||
m_watchdog->watchdog_reset();
|
||||
m_watchdog->reset_line_w(BIT(~data, 3));
|
||||
|
||||
// bit 2-0 = SH0-2
|
||||
m_sh = data & 0x07;
|
||||
|
||||
@ -282,6 +282,7 @@ uint32_t funkybee_state::screen_update(screen_device &screen, bitmap_ind16 &bitm
|
||||
m_bg_tilemap->draw(screen, bitmap, cliprect, 0, 0);
|
||||
draw_sprites(bitmap, cliprect);
|
||||
draw_columns(bitmap, cliprect);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
@ -290,7 +291,9 @@ uint32_t funkybee_state::screen_update(screen_device &screen, bitmap_ind16 &bitm
|
||||
|
||||
uint8_t funkybee_state::input_port_0_r()
|
||||
{
|
||||
m_watchdog->watchdog_reset();
|
||||
if (!machine().side_effects_disabled())
|
||||
m_watchdog->watchdog_reset();
|
||||
|
||||
return m_in0->read();
|
||||
}
|
||||
|
||||
|
||||
@ -175,7 +175,9 @@ uint16_t xtheball_state::analogx_r()
|
||||
uint16_t xtheball_state::analogy_watchdog_r()
|
||||
{
|
||||
/* doubles as a watchdog address */
|
||||
m_watchdog->watchdog_reset();
|
||||
if (!machine().side_effects_disabled())
|
||||
m_watchdog->watchdog_reset();
|
||||
|
||||
return (m_analog_y->read() << 8) | 0x00ff;
|
||||
}
|
||||
|
||||
|
||||
@ -101,8 +101,7 @@ public:
|
||||
m_dac(*this, "dac"),
|
||||
m_soundlatch(*this, "soundlatch"),
|
||||
m_gfxdecode(*this, "gfxdecode"),
|
||||
m_palette(*this, "palette"),
|
||||
m_watchdog(*this, "watchdog")
|
||||
m_palette(*this, "palette")
|
||||
{ }
|
||||
|
||||
void looping(machine_config &config);
|
||||
@ -121,7 +120,6 @@ private:
|
||||
void colorram_w(offs_t offset, uint8_t data);
|
||||
void level2_irq_set(int state);
|
||||
void main_irq_ack_w(int state);
|
||||
void watchdog_w(int state);
|
||||
void souint_clr(int state);
|
||||
void ballon_enable_w(int state);
|
||||
void out_0_w(uint8_t data);
|
||||
@ -166,7 +164,6 @@ private:
|
||||
required_device<generic_latch_8_device> m_soundlatch;
|
||||
required_device<gfxdecode_device> m_gfxdecode;
|
||||
required_device<palette_device> m_palette;
|
||||
required_device<watchdog_timer_device> m_watchdog;
|
||||
};
|
||||
|
||||
|
||||
@ -375,11 +372,6 @@ void looping_state::main_irq_ack_w(int state)
|
||||
m_maincpu->set_input_line(INT_9995_INT1, CLEAR_LINE);
|
||||
}
|
||||
|
||||
void looping_state::watchdog_w(int state)
|
||||
{
|
||||
m_watchdog->watchdog_reset();
|
||||
}
|
||||
|
||||
|
||||
void looping_state::souint_clr(int state)
|
||||
{
|
||||
@ -638,9 +630,9 @@ void looping_state::looping(machine_config &config)
|
||||
// Q4 = C0
|
||||
// Q5 = C1
|
||||
mainlatch.q_out_cb<6>().set(FUNC(looping_state::main_irq_ack_w));
|
||||
mainlatch.q_out_cb<7>().set(FUNC(looping_state::watchdog_w));
|
||||
mainlatch.q_out_cb<7>().set("watchdog", FUNC(watchdog_timer_device::reset_line_w)).invert();
|
||||
|
||||
WATCHDOG_TIMER(config, m_watchdog);
|
||||
WATCHDOG_TIMER(config, "watchdog");
|
||||
|
||||
// video hardware
|
||||
screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER));
|
||||
|
||||
Loading…
Reference in New Issue
Block a user