mirror of
https://github.com/holub/mame
synced 2025-05-29 09:03:08 +03:00
Attempt to hook up a bunch of floppy related bits to no avail, nw
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dfc6a4a16f
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4b3da60e07
@ -887,6 +887,7 @@ void model2_state::push_geo_data(UINT32 data)
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READ32_MEMBER(model2_state::geo_prg_r)
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READ32_MEMBER(model2_state::geo_prg_r)
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{
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{
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popmessage("Read from Geometry FIFO at %08x, contact MAMEdev",offset*4);
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return 0xffffffff;
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return 0xffffffff;
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}
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}
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@ -970,6 +971,8 @@ WRITE32_MEMBER(model2_state::geo_w)
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UINT32 r = 0;
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UINT32 r = 0;
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r |= data & 0x000fffff;
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r |= data & 0x000fffff;
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r |= ((address >> 4) & 0x3f) << 23;
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r |= ((address >> 4) & 0x3f) << 23;
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if((address >> 4) & 0xc0)
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popmessage("Eye mode? Contact MAMEdev");
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push_geo_data(r);
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push_geo_data(r);
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}
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}
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}
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}
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@ -133,6 +133,8 @@ private:
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bool m_cursor_enabled;
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bool m_cursor_enabled;
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emu_timer *m_timer[4], *m_snd_timer, *m_vid_timer;
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emu_timer *m_timer[4], *m_snd_timer, *m_vid_timer;
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emu_timer *m_vbl_timer;
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emu_timer *m_vbl_timer;
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UINT8 m_floppy_select;
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bool check_floppy_ready();
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};
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};
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/* IOC registers */
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/* IOC registers */
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@ -476,6 +476,27 @@ void archimedes_state::latch_timer_cnt(int tmr)
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m_ioc_timerout[tmr] = m_ioc_timercnt[tmr] - (UINT32)time;
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m_ioc_timerout[tmr] = m_ioc_timercnt[tmr] - (UINT32)time;
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}
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}
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bool archimedes_state::check_floppy_ready()
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{
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floppy_image_device *floppy = NULL;
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if(!m_fdc)
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return false;
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switch(m_floppy_select & 3)
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{
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case 0:
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floppy = m_floppy0->get_device(); break;
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case 1:
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floppy = m_floppy1->get_device(); break;
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}
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if(floppy)
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return floppy->ready_r();
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return false;
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}
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/* TODO: should be a 8-bit handler */
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/* TODO: should be a 8-bit handler */
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READ32_MEMBER( archimedes_state::ioc_ctrl_r )
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READ32_MEMBER( archimedes_state::ioc_ctrl_r )
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{
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{
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@ -487,8 +508,9 @@ READ32_MEMBER( archimedes_state::ioc_ctrl_r )
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case CONTROL:
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case CONTROL:
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{
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{
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UINT8 i2c_data = 1;
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UINT8 i2c_data = 1;
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static UINT8 flyback; //internal name for vblank here
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UINT8 flyback; //internal name for vblank here
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int vert_pos;
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int vert_pos;
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bool floppy_ready_state;
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vert_pos = m_screen->vpos();
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vert_pos = m_screen->vpos();
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flyback = (vert_pos <= m_vidc_regs[VIDC_VDSR] || vert_pos >= m_vidc_regs[VIDC_VDER]) ? 0x80 : 0x00;
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flyback = (vert_pos <= m_vidc_regs[VIDC_VDSR] || vert_pos >= m_vidc_regs[VIDC_VDER]) ? 0x80 : 0x00;
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@ -498,7 +520,9 @@ READ32_MEMBER( archimedes_state::ioc_ctrl_r )
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i2c_data = (m_i2cmem->read_sda() & 1);
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i2c_data = (m_i2cmem->read_sda() & 1);
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}
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}
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return (flyback) | (m_ioc_regs[CONTROL] & 0x7c) | (m_i2c_clk<<1) | i2c_data;
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floppy_ready_state = check_floppy_ready();
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return (flyback) | (m_ioc_regs[CONTROL] & 0x78) | (floppy_ready_state<<2) | (m_i2c_clk<<1) | i2c_data;
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}
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}
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case KART: // keyboard read
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case KART: // keyboard read
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@ -567,6 +591,17 @@ WRITE32_MEMBER( archimedes_state::ioc_ctrl_w )
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m_i2cmem->write_scl((data & 0x02) >> 1);
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m_i2cmem->write_scl((data & 0x02) >> 1);
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}
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}
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m_i2c_clk = (data & 2) >> 1;
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m_i2c_clk = (data & 2) >> 1;
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//TODO: does writing bit 2 here causes a fdc force ready?
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/*
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-x-- ---- Printer ack
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--x- ---- Sound mute
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---x ---- Aux I/O connector
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---- -x-- Floppy ready
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---- --x- I2C clock
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---- ---x I2C data
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*/
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//if(data & 0x40)
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// popmessage("Muting sound, contact MAME/MESSdev");
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break;
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break;
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case KART:
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case KART:
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@ -801,16 +836,26 @@ WRITE32_MEMBER(archimedes_state::archimedes_ioc_w)
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switch(ioc_addr & 0xfffc)
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switch(ioc_addr & 0xfffc)
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{
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{
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case 0x18: // latch B
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case 0x18: // latch B
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/*
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---- x--- floppy controller reset
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*/
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m_fdc->dden_w(BIT(data, 1));
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m_fdc->dden_w(BIT(data, 1));
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if(data & 8)
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m_fdc->soft_reset();
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if(data & ~0xa)
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printf("%02x Latch B\n",data);
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return;
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return;
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case 0x40: // latch A
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case 0x40: // latch A
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/*
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-x-- ---- In Use Control (floppy?)
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*/
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floppy_image_device *floppy = NULL;
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floppy_image_device *floppy = NULL;
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if (!(data & 1)) { floppy = m_floppy0->get_device(); }
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if (!(data & 1)) { m_floppy_select = 0; floppy = m_floppy0->get_device(); }
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if (!(data & 2)) { floppy = m_floppy1->get_device(); }
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if (!(data & 2)) { m_floppy_select = 1; floppy = m_floppy1->get_device(); }
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if (!(data & 4)) { floppy = NULL; } // floppy 2
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if (!(data & 4)) { m_floppy_select = 2; floppy = NULL; } // floppy 2
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if (!(data & 8)) { floppy = NULL; } // floppy 3
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if (!(data & 8)) { m_floppy_select = 3; floppy = NULL; } // floppy 3
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m_fdc->set_floppy(floppy);
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m_fdc->set_floppy(floppy);
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@ -970,7 +1015,7 @@ WRITE32_MEMBER(archimedes_state::archimedes_vidc_w)
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//#ifdef MAME_DEBUG
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//#ifdef MAME_DEBUG
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if(1)
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if(reg != VIDC_VCSR && reg != VIDC_VCER && reg != VIDC_HCSR)
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logerror("VIDC: %s = %d\n", vrnames[(reg-0x80)/4], m_vidc_regs[reg]);
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logerror("VIDC: %s = %d\n", vrnames[(reg-0x80)/4], m_vidc_regs[reg]);
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//#endif
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//#endif
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@ -9,13 +9,14 @@
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* Angelo Salese, August 2010
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* Angelo Salese, August 2010
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*
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*
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* TODO:
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* TODO:
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* - Make floppies to work;
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* - Attempting to load the GUI gives an exception;
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* - Graphics in GUI misses some vram data on the right edges (for example white vertical stripe on the far right), rmw bug related to the above?
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* - Apparently same deal happens to Arthur OS, on a bunch of icons;
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* - Hook up mouse in AAKART;
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* - Add shifted version of keyboard inputs, necessary especially for loading programs thru Supervisor Mode;
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* - try to understand why bios 2 was working at some point and now isn't
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* - try to understand why bios 2 was working at some point and now isn't
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* - fix RISC OS / Arthur booting, possible causes:
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*
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* \- missing reset page size hook-up
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* \- some subtle memory paging fault
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* \- missing RAM max size
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* \- ARM bug?
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* - 38776b8
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*
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*
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*
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*
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=======================================================================================
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=======================================================================================
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