Sprinter/mame
2
0
Fork 0
mirror of https://github.com/holub/mame synced 2025-04-24 01:11:11 +03:00
Code Issues Actions 1 Packages Projects Releases Wiki Activity

uPD7725: Fix LSB-first bit ordering for SO reg, not used yet. [Lord Nightmare]

Browse Source
This commit is contained in:
Lord-Nightmare 2017-03-17 12:30:20 -04:00
parent a0f5806387
commit 4ba2a062cb
1 changed files with 2 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
src/devices/cpu/upd7725/upd7725.cpp
View File

@ -586,8 +586,8 @@ void necdsp_device::exec_ld(uint32_t opcode) {
m_out_p0_cb(regs.sr&0x1);
m_out_p1_cb((regs.sr&0x2)>>1);
break;
case 8: regs.so = id; break; //LSB
case 9: regs.so = id; break; //MSB
case 8: regs.so = BITSWAP16(id, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15); break; //LSB first output, output tapped at bit 15 shifting left
case 9: regs.so = id; break; //MSB first output, output tapped at bit 15 shifting left
case 10: regs.k = id; break;
case 11: regs.k = id; regs.l = m_data->read_word(regs.rp<<1); break;
case 12: regs.l = id; regs.k = dataRAM[regs.dp | 0x40]; break;