diff --git a/src/devices/cpu/hphybrid/hphybrid.cpp b/src/devices/cpu/hphybrid/hphybrid.cpp index 027a37e03ed..ddfd740d90b 100644 --- a/src/devices/cpu/hphybrid/hphybrid.cpp +++ b/src/devices/cpu/hphybrid/hphybrid.cpp @@ -17,7 +17,22 @@ enum { HPHYBRID_DMAPA, HPHYBRID_DMAMA, HPHYBRID_DMAC, - HPHYBRID_I + HPHYBRID_I, + HPHYBRID_W, + HPHYBRID_AR2, + HPHYBRID_AR2_2, + HPHYBRID_AR2_3, + HPHYBRID_AR2_4, + HPHYBRID_SE, + HPHYBRID_R25, + HPHYBRID_R26, + HPHYBRID_R27, + HPHYBRID_R32, + HPHYBRID_R33, + HPHYBRID_R34, + HPHYBRID_R35, + HPHYBRID_R36, + HPHYBRID_R37 }; #define BIT_MASK(n) (1U << (n)) @@ -40,13 +55,22 @@ enum { #define HPHYBRID_IRH_SVC_BIT 10 // IRH in service #define HPHYBRID_IRL_SVC_BIT 11 // IRL in service #define HPHYBRID_DMAR_BIT 12 // DMA request +#define HPHYBRID_STS_BIT 13 // Status flag +#define HPHYBRID_FLG_BIT 14 // "Flag" flag +#define HPHYBRID_DC_BIT 15 // Decimal carry #define HPHYBRID_IV_MASK 0xfff0 // IV mask +#define HP_REG_SE_MASK 0x000f + #define CURRENT_PA (m_reg_PA[ 0 ]) #define HP_RESET_ADDR 0x0020 +// Part of r32-r37 that is actually output as address extension (6 bits of "BSC": block select code) +#define BSC_REG_MASK 0x3f + +const device_type HP_5061_3001 = &device_creator; const device_type HP_5061_3011 = &device_creator; WRITE_LINE_MEMBER(hp_hybrid_cpu_device::dmar_w) @@ -58,10 +82,38 @@ WRITE_LINE_MEMBER(hp_hybrid_cpu_device::dmar_w) } } -hp_hybrid_cpu_device::hp_hybrid_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname) -: cpu_device(mconfig, type, name, tag, owner, clock, shortname, __FILE__), - m_program_config("program", ENDIANNESS_BIG, 16, 16, -1), - m_io_config("io", ENDIANNESS_BIG, 16, 6, -1) +WRITE_LINE_MEMBER(hp_hybrid_cpu_device::halt_w) +{ + if (state) { + BIT_SET(m_flags , HPHYBRID_HALT_BIT); + } else { + BIT_CLR(m_flags , HPHYBRID_HALT_BIT); + } +} + +WRITE_LINE_MEMBER(hp_hybrid_cpu_device::status_w) +{ + if (state) { + BIT_SET(m_flags , HPHYBRID_STS_BIT); + } else { + BIT_CLR(m_flags , HPHYBRID_STS_BIT); + } +} + +WRITE_LINE_MEMBER(hp_hybrid_cpu_device::flag_w) +{ + if (state) { + BIT_SET(m_flags , HPHYBRID_FLG_BIT); + } else { + BIT_CLR(m_flags , HPHYBRID_FLG_BIT); + } +} + +hp_hybrid_cpu_device::hp_hybrid_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname , UINT8 addrwidth) + : cpu_device(mconfig, type, name, tag, owner, clock, shortname, __FILE__), + m_pa_changed_func(*this), + m_program_config("program", ENDIANNESS_BIG, 16, addrwidth, -1), + m_io_config("io", ENDIANNESS_BIG, 16, 6, -1) { } @@ -77,11 +129,13 @@ void hp_hybrid_cpu_device::device_start() m_reg_PA[ 0 ] = 0; m_reg_PA[ 1 ] = 0; m_reg_PA[ 2 ] = 0; + m_reg_W = 0; m_flags = 0; m_dmapa = 0; m_dmama = 0; m_dmac = 0; m_reg_I = 0; + m_forced_bsc_25 = false; { state_add(HPHYBRID_A, "A", m_reg_A); @@ -89,11 +143,12 @@ void hp_hybrid_cpu_device::device_start() state_add(HPHYBRID_C, "C", m_reg_C); state_add(HPHYBRID_D, "D", m_reg_D); state_add(HPHYBRID_P, "P", m_reg_P); - state_add(STATE_GENPC, "GENPC", m_reg_P).noshow(); + state_add(STATE_GENPC, "GENPC", m_genpc).noshow(); state_add(HPHYBRID_R, "R", m_reg_R); state_add(STATE_GENSP, "GENSP", m_reg_R).noshow(); state_add(HPHYBRID_IV, "IV", m_reg_IV); state_add(HPHYBRID_PA, "PA", m_reg_PA[ 0 ]); + state_add(HPHYBRID_W, "W", m_reg_W).noshow(); state_add(STATE_GENFLAGS, "GENFLAGS", m_flags).noshow().formatstr("%9s"); state_add(HPHYBRID_DMAPA , "DMAPA" , m_dmapa).noshow(); state_add(HPHYBRID_DMAMA , "DMAMA" , m_dmama).noshow(); @@ -115,19 +170,23 @@ void hp_hybrid_cpu_device::device_start() save_item(NAME(m_reg_PA[0])); save_item(NAME(m_reg_PA[1])); save_item(NAME(m_reg_PA[2])); + save_item(NAME(m_reg_W)); save_item(NAME(m_flags)); save_item(NAME(m_dmapa)); save_item(NAME(m_dmama)); save_item(NAME(m_dmac)); save_item(NAME(m_reg_I)); + save_item(NAME(m_forced_bsc_25)); m_icountptr = &m_icount; + + m_pa_changed_func.resolve_safe(); } void hp_hybrid_cpu_device::device_reset() { m_reg_P = HP_RESET_ADDR; - m_reg_I = RM(m_reg_P); + m_reg_I = fetch(); m_flags = 0; } @@ -137,7 +196,7 @@ void hp_hybrid_cpu_device::execute_run() if (BIT(m_flags , HPHYBRID_DMAEN_BIT) && BIT(m_flags , HPHYBRID_DMAR_BIT)) { handle_dma(); } else { - debugger_instruction_hook(this, m_reg_P); + debugger_instruction_hook(this, m_genpc); // Check for interrupts check_for_interrupts(); @@ -173,7 +232,7 @@ UINT16 hp_hybrid_cpu_device::execute_one(UINT16 opcode) return RM(opcode & 0x1f); } else { m_reg_P = execute_one_sub(opcode); - return RM(m_reg_P); + return fetch(); } } @@ -186,7 +245,7 @@ UINT16 hp_hybrid_cpu_device::execute_one(UINT16 opcode) */ UINT16 hp_hybrid_cpu_device::execute_one_sub(UINT16 opcode) { - UINT16 ea; + UINT32 ea; UINT16 tmp; switch (opcode & 0x7800) { @@ -247,8 +306,8 @@ UINT16 hp_hybrid_cpu_device::execute_one_sub(UINT16 opcode) case 0x4000: // JSM m_icount -= 17; - WM(++m_reg_R , m_reg_P); - return get_ea(opcode); + WM(AEC_CASE_C , ++m_reg_R , m_reg_P); + return remove_mae(get_ea(opcode)); case 0x4800: // ISZ @@ -289,7 +348,7 @@ UINT16 hp_hybrid_cpu_device::execute_one_sub(UINT16 opcode) case 0x6800: // JMP m_icount -= 8; - return get_ea(opcode); + return remove_mae(get_ea(opcode)); default: switch (opcode & 0xfec0) { @@ -309,8 +368,7 @@ UINT16 hp_hybrid_cpu_device::execute_one_sub(UINT16 opcode) // SFS // SFC m_icount -= 14; - // TODO: read flag bit - return get_skip_addr(opcode , true); + return get_skip_addr(opcode , !BIT(m_flags , HPHYBRID_FLG_BIT)); case 0x7C00: // RZB @@ -328,8 +386,7 @@ UINT16 hp_hybrid_cpu_device::execute_one_sub(UINT16 opcode) // SSS // SSC m_icount -= 14; - // TODO: read status bit - return get_skip_addr(opcode , true); + return get_skip_addr(opcode , !BIT(m_flags , HPHYBRID_STS_BIT)); case 0x7cc0: // SHS @@ -449,12 +506,14 @@ UINT16 hp_hybrid_cpu_device::execute_one_sub(UINT16 opcode) if (BIT(m_flags , HPHYBRID_IRH_SVC_BIT)) { BIT_CLR(m_flags , HPHYBRID_IRH_SVC_BIT); memmove(&m_reg_PA[ 0 ] , &m_reg_PA[ 1 ] , HPHYBRID_INT_LVLS); + m_pa_changed_func((UINT8)CURRENT_PA); } else if (BIT(m_flags , HPHYBRID_IRL_SVC_BIT)) { BIT_CLR(m_flags , HPHYBRID_IRL_SVC_BIT); memmove(&m_reg_PA[ 0 ] , &m_reg_PA[ 1 ] , HPHYBRID_INT_LVLS); + m_pa_changed_func((UINT8)CURRENT_PA); } } - tmp = RM(m_reg_R--) + (opcode & 0x1f); + tmp = RM(AEC_CASE_C , m_reg_R--) + (opcode & 0x1f); return BIT(opcode , 5) ? tmp - 0x20 : tmp; } else { switch (opcode) { @@ -545,15 +604,14 @@ UINT16 hp_hybrid_cpu_device::execute_one_sub(UINT16 opcode) break; default: - // Unrecognized instructions: NOP - // Execution time is fictional - m_icount -= 6; - } - } - } - } - } - } + // Unrecognized instruction: pass it on for further processing (by EMC if present) + return execute_no_bpc_ioc(opcode); + } + } + } + } + } + } return m_reg_P + 1; } @@ -575,34 +633,206 @@ offs_t hp_hybrid_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const U return CPU_DISASSEMBLE_NAME(hp_hybrid)(this, buffer, pc, oprom, opram, options); } -UINT16 hp_hybrid_cpu_device::get_ea(UINT16 opcode) +UINT16 hp_hybrid_cpu_device::remove_mae(UINT32 addr) { - UINT16 base; - UINT16 off; + return (UINT16)(addr & 0xffff); +} - if (BIT(opcode , 10)) { - // Current page - base = m_reg_P; - } else { - // Base page - base = 0; - } +UINT16 hp_hybrid_cpu_device::RM(aec_cases_t aec_case , UINT16 addr) +{ + return RM(add_mae(aec_case , addr)); +} - off = opcode & 0x3ff; - if (off & 0x200) { - off -= 0x400; - } +UINT16 hp_hybrid_cpu_device::RM(UINT32 addr) +{ + UINT16 tmp; + UINT16 addr_wo_bsc = remove_mae(addr); - base += off; + if (addr_wo_bsc <= HP_REG_LAST_ADDR) { + // Any access to internal registers removes forcing of BSC 2x + m_forced_bsc_25 = false; - if (BIT(opcode , 15)) { - // Indirect addressing - m_icount -= 6; - return RM(base); - } else { - // Direct addressing - return base; - } + // Memory mapped registers that are present in both 3001 & 3011 + switch (addr_wo_bsc) { + case HP_REG_A_ADDR: + return m_reg_A; + + case HP_REG_B_ADDR: + return m_reg_B; + + case HP_REG_P_ADDR: + return m_reg_P; + + case HP_REG_R_ADDR: + return m_reg_R; + + case HP_REG_R4_ADDR: + case HP_REG_R5_ADDR: + case HP_REG_R6_ADDR: + case HP_REG_R7_ADDR: + return RIO(CURRENT_PA , addr_wo_bsc - HP_REG_R4_ADDR); + + case HP_REG_IV_ADDR: + // Correct? + if (!BIT(m_flags , HPHYBRID_IRH_SVC_BIT) && !BIT(m_flags , HPHYBRID_IRL_SVC_BIT)) { + return m_reg_IV; + } else { + return m_reg_IV | CURRENT_PA; + } + + case HP_REG_PA_ADDR: + return CURRENT_PA; + + case HP_REG_W_ADDR: + return m_reg_W; + + case HP_REG_DMAPA_ADDR: + tmp = m_dmapa & HP_REG_PA_MASK; + if (BIT(m_flags , HPHYBRID_CB_BIT)) { + BIT_SET(tmp , 15); + } + if (BIT(m_flags , HPHYBRID_DB_BIT)) { + BIT_SET(tmp , 14); + } + return tmp; + + case HP_REG_DMAMA_ADDR: + return m_dmama; + + case HP_REG_DMAC_ADDR: + return m_dmac; + + case HP_REG_C_ADDR: + return m_reg_C; + + case HP_REG_D_ADDR: + return m_reg_D; + + default: + return read_non_common_reg(addr_wo_bsc); + } + } else { + return m_direct->read_word(addr << 1); + } +} + +void hp_hybrid_cpu_device::WM(aec_cases_t aec_case , UINT16 addr , UINT16 v) +{ + WM(add_mae(aec_case , addr) , v); +} + +void hp_hybrid_cpu_device::WM(UINT32 addr , UINT16 v) +{ + UINT16 addr_wo_bsc = remove_mae(addr); + + if (addr_wo_bsc <= HP_REG_LAST_ADDR) { + // Any access to internal registers removes forcing of BSC 2x + m_forced_bsc_25 = false; + + // Memory mapped registers + switch (addr_wo_bsc) { + case HP_REG_A_ADDR: + m_reg_A = v; + break; + + case HP_REG_B_ADDR: + m_reg_B = v; + break; + + case HP_REG_P_ADDR: + m_reg_P = v; + break; + + case HP_REG_R_ADDR: + m_reg_R = v; + break; + + case HP_REG_R4_ADDR: + case HP_REG_R5_ADDR: + case HP_REG_R6_ADDR: + case HP_REG_R7_ADDR: + WIO(CURRENT_PA , addr_wo_bsc - HP_REG_R4_ADDR , v); + break; + + case HP_REG_IV_ADDR: + m_reg_IV = v & HP_REG_IV_MASK; + break; + + case HP_REG_PA_ADDR: + CURRENT_PA = v & HP_REG_PA_MASK; + m_pa_changed_func((UINT8)CURRENT_PA); + break; + + case HP_REG_W_ADDR: + m_reg_W = v; + break; + + case HP_REG_DMAPA_ADDR: + m_dmapa = v & HP_REG_PA_MASK; + break; + + case HP_REG_DMAMA_ADDR: + m_dmama = v; + break; + + case HP_REG_DMAC_ADDR: + m_dmac = v; + break; + + case HP_REG_C_ADDR: + m_reg_C = v; + break; + + case HP_REG_D_ADDR: + m_reg_D = v; + break; + + default: + write_non_common_reg(addr_wo_bsc , v); + break; + } + } else { + m_program->write_word(addr << 1 , v); + } +} + +UINT16 hp_hybrid_cpu_device::fetch(void) +{ + m_genpc = add_mae(AEC_CASE_A , m_reg_P); + return RM(m_genpc); +} + +UINT32 hp_hybrid_cpu_device::get_ea(UINT16 opcode) +{ + UINT16 base; + UINT16 off; + aec_cases_t aec; + + if (BIT(opcode , 10)) { + // Current page + base = m_reg_P; + aec = AEC_CASE_A; + } else { + // Base page + base = 0; + aec = AEC_CASE_B; + } + + off = opcode & 0x3ff; + if (off & 0x200) { + off -= 0x400; + } + + base += off; + + if (BIT(opcode , 15)) { + // Indirect addressing + m_icount -= 6; + return add_mae(AEC_CASE_C , RM(aec , base)); + } else { + // Direct addressing + return add_mae(aec , base); + } } void hp_hybrid_cpu_device::do_add(UINT16& addend1 , UINT16 addend2) @@ -676,7 +906,7 @@ void hp_hybrid_cpu_device::do_pw(UINT16 opcode) if (m_flags & b_mask) { tmp_addr |= 0x10000; } - tmp = RM((UINT16)(tmp_addr >> 1)); + tmp = RM(AEC_CASE_C , (UINT16)(tmp_addr >> 1)); if (BIT(tmp_addr , 0)) { tmp &= 0xff; } else { @@ -684,7 +914,7 @@ void hp_hybrid_cpu_device::do_pw(UINT16 opcode) } } else { // Word - tmp = RM(*ptr_reg); + tmp = RM(AEC_CASE_C , *ptr_reg); } WM(reg_addr , tmp); @@ -719,10 +949,25 @@ void hp_hybrid_cpu_device::do_pw(UINT16 opcode) if (m_flags & b_mask) { tmp_addr |= 0x10000; } - WMB(tmp_addr , (UINT8)tmp); + if (tmp_addr <= (HP_REG_LAST_ADDR * 2 + 1)) { + // Single bytes can be written to registers. + // The addressed register gets the written byte in the proper position + // and a 0 in the other byte because access to registers is always done in + // 16 bits units. + if (BIT(tmp_addr , 0)) { + tmp &= 0xff; + } else { + tmp <<= 8; + } + WM(tmp_addr >> 1 , tmp); + } else { + // Extend address, preserve LSB & form byte address + tmp_addr = (add_mae(AEC_CASE_C , tmp_addr >> 1) << 1) | (tmp_addr & 1); + m_program->write_byte(tmp_addr , (UINT8)tmp); + } } else { // Word - WM(*ptr_reg , tmp); + WM(AEC_CASE_C , *ptr_reg , tmp); } } } @@ -768,14 +1013,16 @@ void hp_hybrid_cpu_device::check_for_interrupts(void) CURRENT_PA = new_PA; + m_pa_changed_func((UINT8)CURRENT_PA); + // Is this correct? Patent @ pg 210 suggests that the whole interrupt recognition sequence // lasts for 32 cycles (6 are already accounted for in get_ea for one indirection) m_icount -= 26; // Do a double-indirect JSM IV,I instruction - WM(++m_reg_R , m_reg_P); + WM(AEC_CASE_C , ++m_reg_R , m_reg_P); m_reg_P = RM(get_ea(0xc008)); - m_reg_I = RM(m_reg_P); + m_reg_I = fetch(); } void hp_hybrid_cpu_device::handle_dma(void) @@ -786,13 +1033,13 @@ void hp_hybrid_cpu_device::handle_dma(void) if (BIT(m_flags , HPHYBRID_DMADIR_BIT)) { // "Outward" DMA: memory -> peripheral - tmp = RM(m_dmama++); + tmp = RM(AEC_CASE_D , m_dmama++); WIO(m_dmapa , tc ? 2 : 0 , tmp); m_icount -= 10; } else { // "Inward" DMA: peripheral -> memory tmp = RIO(m_dmapa , tc ? 2 : 0); - WM(m_dmama++ , tmp); + WM(AEC_CASE_D , m_dmama++ , tmp); m_icount -= 9; } @@ -804,147 +1051,6 @@ void hp_hybrid_cpu_device::handle_dma(void) } } -UINT16 hp_hybrid_cpu_device::RM(UINT16 addr) -{ - UINT16 tmp; - - if (addr <= HP_REG_LAST_ADDR) { - // Memory mapped registers - switch (addr) { - case HP_REG_A_ADDR: - return m_reg_A; - - case HP_REG_B_ADDR: - return m_reg_B; - - case HP_REG_P_ADDR: - return m_reg_P; - - case HP_REG_R_ADDR: - return m_reg_R; - - case HP_REG_R4_ADDR: - case HP_REG_R5_ADDR: - case HP_REG_R6_ADDR: - case HP_REG_R7_ADDR: - return RIO(CURRENT_PA , addr - HP_REG_R4_ADDR); - - case HP_REG_IV_ADDR: - // Correct? - if (!BIT(m_flags , HPHYBRID_IRH_SVC_BIT) && !BIT(m_flags , HPHYBRID_IRL_SVC_BIT)) { - return m_reg_IV; - } else { - return m_reg_IV | CURRENT_PA; - } - - case HP_REG_PA_ADDR: - return CURRENT_PA; - - case HP_REG_DMAPA_ADDR: - tmp = m_dmapa & HP_REG_PA_MASK; - if (BIT(m_flags , HPHYBRID_CB_BIT)) { - BIT_SET(tmp , 15); - } - if (BIT(m_flags , HPHYBRID_DB_BIT)) { - BIT_SET(tmp , 14); - } - return tmp; - - case HP_REG_DMAMA_ADDR: - return m_dmama; - - case HP_REG_DMAC_ADDR: - return m_dmac; - - case HP_REG_C_ADDR: - return m_reg_C; - - case HP_REG_D_ADDR: - return m_reg_D; - - default: - // Unknown registers are returned as 0 - return 0; - } - } else { - return m_direct->read_word((offs_t)addr << 1); - } -} - -void hp_hybrid_cpu_device::WM(UINT16 addr , UINT16 v) -{ - if (addr <= HP_REG_LAST_ADDR) { - // Memory mapped registers - switch (addr) { - case HP_REG_A_ADDR: - m_reg_A = v; - break; - - case HP_REG_B_ADDR: - m_reg_B = v; - break; - - case HP_REG_P_ADDR: - m_reg_P = v; - break; - - case HP_REG_R_ADDR: - m_reg_R = v; - break; - - case HP_REG_R4_ADDR: - case HP_REG_R5_ADDR: - case HP_REG_R6_ADDR: - case HP_REG_R7_ADDR: - WIO(CURRENT_PA , addr - HP_REG_R4_ADDR , v); - break; - - case HP_REG_IV_ADDR: - m_reg_IV = v & HP_REG_IV_MASK; - break; - - case HP_REG_PA_ADDR: - CURRENT_PA = v & HP_REG_PA_MASK; - break; - - case HP_REG_DMAPA_ADDR: - m_dmapa = v & HP_REG_PA_MASK; - break; - - case HP_REG_DMAMA_ADDR: - m_dmama = v; - break; - - case HP_REG_DMAC_ADDR: - m_dmac = v; - break; - - case HP_REG_C_ADDR: - m_reg_C = v; - break; - - case HP_REG_D_ADDR: - m_reg_D = v; - break; - - default: - // Unknown registers are silently discarded - break; - } - } else { - m_program->write_word((offs_t)addr << 1 , v); - } -} - -void hp_hybrid_cpu_device::WMB(UINT32 addr , UINT8 v) -{ - if (addr <= (HP_REG_LAST_ADDR * 2 + 1)) { - // Cannot write bytes to registers - } else { - m_program->write_byte(addr , v); - } -} - UINT16 hp_hybrid_cpu_device::RIO(UINT8 pa , UINT8 ic) { return m_io->read_word(HP_MAKE_IOADDR(pa, ic) << 1); @@ -955,7 +1061,546 @@ void hp_hybrid_cpu_device::WIO(UINT8 pa , UINT8 ic , UINT16 v) m_io->write_word(HP_MAKE_IOADDR(pa, ic) << 1 , v); } -hp_5061_3011_cpu_device::hp_5061_3011_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) -: hp_hybrid_cpu_device(mconfig, HP_5061_3011, "HP_5061_3011", tag, owner, clock, "5061-3011") +hp_5061_3001_cpu_device::hp_5061_3001_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) + : hp_hybrid_cpu_device(mconfig, HP_5061_3001, "HP-5061-3001", tag, owner, clock, "5061-3001", 22), + m_boot_mode(false) { } + +void hp_5061_3001_cpu_device::device_start() +{ + hp_hybrid_cpu_device::device_start(); + + state_add(HPHYBRID_AR2, "Ar2" , m_reg_ar2[ 0 ]); + state_add(HPHYBRID_AR2_2, "Ar2_2" , m_reg_ar2[ 1 ]); + state_add(HPHYBRID_AR2_3, "Ar2_3" , m_reg_ar2[ 2 ]); + state_add(HPHYBRID_AR2_4, "Ar2_4" , m_reg_ar2[ 3 ]); + state_add(HPHYBRID_SE, "SE" , m_reg_se); + state_add(HPHYBRID_R25, "R25" , m_reg_r25).noshow(); + state_add(HPHYBRID_R26, "R26" , m_reg_r26).noshow(); + state_add(HPHYBRID_R27, "R27" , m_reg_r27).noshow(); + state_add(HPHYBRID_R32, "R32" , m_reg_aec[ 0 ]); + state_add(HPHYBRID_R33, "R33" , m_reg_aec[ 1 ]); + state_add(HPHYBRID_R34, "R34" , m_reg_aec[ 2 ]); + state_add(HPHYBRID_R35, "R35" , m_reg_aec[ 3 ]); + state_add(HPHYBRID_R36, "R36" , m_reg_aec[ 4 ]); + state_add(HPHYBRID_R37, "R37" , m_reg_aec[ 5 ]); + + save_item(NAME(m_reg_ar2[ 0 ])); + save_item(NAME(m_reg_ar2[ 1 ])); + save_item(NAME(m_reg_ar2[ 2 ])); + save_item(NAME(m_reg_ar2[ 3 ])); + save_item(NAME(m_reg_se)); + save_item(NAME(m_reg_r25)); + save_item(NAME(m_reg_r26)); + save_item(NAME(m_reg_r27)); + save_item(NAME(m_reg_aec[ 0 ])); + save_item(NAME(m_reg_aec[ 1 ])); + save_item(NAME(m_reg_aec[ 2 ])); + save_item(NAME(m_reg_aec[ 3 ])); + save_item(NAME(m_reg_aec[ 4 ])); + save_item(NAME(m_reg_aec[ 5 ])); +} + +void hp_5061_3001_cpu_device::device_reset() +{ + // Initial state of AEC registers: + // R32 0 + // R33 5 + // R34 0 + // R35 0 + // R36 0 + // R37 0 + m_reg_aec[ 0 ] = 0; + m_reg_aec[ 1 ] = 5; + m_reg_aec[ 2 ] = 0; + m_reg_aec[ 3 ] = 0; + m_reg_aec[ 4 ] = 0; + m_reg_aec[ 5 ] = 0; + + m_forced_bsc_25 = m_boot_mode; + + hp_hybrid_cpu_device::device_reset(); +} + +UINT8 hp_5061_3001_cpu_device::do_dec_shift_r(UINT8 d1 , UINT64& mantissa) +{ + UINT8 d12 = (UINT8)(mantissa & 0xf); + + mantissa = (mantissa >> 4) | ((UINT64)d1 << 44); + + return d12; +} + +UINT8 hp_5061_3001_cpu_device::do_dec_shift_l(UINT8 d12 , UINT64& mantissa) +{ + UINT8 d1 = (UINT8)((mantissa >> 44) & 0xf); + + mantissa = (mantissa << 4) | ((UINT64)d12); + mantissa &= 0xffffffffffffULL; + + return d1; +} + +UINT64 hp_5061_3001_cpu_device::get_ar1(void) +{ + UINT32 addr; + UINT64 tmp; + + addr = add_mae(AEC_CASE_B , HP_REG_AR1_ADDR + 1); + tmp = (UINT64)RM(addr++); + tmp <<= 16; + tmp |= (UINT64)RM(addr++); + tmp <<= 16; + tmp |= (UINT64)RM(addr); + + return tmp; +} + +void hp_5061_3001_cpu_device::set_ar1(UINT64 v) +{ + UINT32 addr; + + addr = add_mae(AEC_CASE_B , HP_REG_AR1_ADDR + 3); + WM(addr-- , (UINT16)(v & 0xffff)); + v >>= 16; + WM(addr-- , (UINT16)(v & 0xffff)); + v >>= 16; + WM(addr , (UINT16)(v & 0xffff)); +} + +UINT64 hp_5061_3001_cpu_device::get_ar2(void) const +{ + UINT64 tmp; + + tmp = (UINT64)m_reg_ar2[ 1 ]; + tmp <<= 16; + tmp |= (UINT64)m_reg_ar2[ 2 ]; + tmp <<= 16; + tmp |= (UINT64)m_reg_ar2[ 3 ]; + + return tmp; +} + +void hp_5061_3001_cpu_device::set_ar2(UINT64 v) +{ + m_reg_ar2[ 3 ] = (UINT16)(v & 0xffff); + v >>= 16; + m_reg_ar2[ 2 ] = (UINT16)(v & 0xffff); + v >>= 16; + m_reg_ar2[ 1 ] = (UINT16)(v & 0xffff); +} + +UINT64 hp_5061_3001_cpu_device::do_mrxy(UINT64 ar) +{ + UINT8 n; + + n = m_reg_B & 0xf; + m_reg_A &= 0xf; + m_reg_se = m_reg_A; + while (n--) { + m_reg_se = do_dec_shift_r(m_reg_A , ar); + m_reg_A = 0; + m_icount -= 4; + } + m_reg_A = m_reg_se; + BIT_CLR(m_flags , HPHYBRID_DC_BIT); + + return ar; +} + +bool hp_5061_3001_cpu_device::do_dec_add(bool carry_in , UINT64& a , UINT64 b) +{ + UINT64 tmp = 0; + unsigned i; + UINT8 digit_a , digit_b; + + for (i = 0; i < 12; i++) { + digit_a = (UINT8)(a & 0xf); + digit_b = (UINT8)(b & 0xf); + + if (carry_in) { + digit_a++; + } + + digit_a += digit_b; + + carry_in = digit_a >= 10; + + if (carry_in) { + digit_a = (digit_a - 10) & 0xf; + } + + tmp |= (UINT64)digit_a << (4 * i); + + a >>= 4; + b >>= 4; + } + + a = tmp; + + return carry_in; +} + +void hp_5061_3001_cpu_device::do_mpy(void) +{ + INT32 a = (INT16)m_reg_A; + INT32 b = (INT16)m_reg_B; + INT32 p = a * b; + + m_reg_A = (UINT16)(p & 0xffff); + m_reg_B = (UINT16)((p >> 16) & 0xffff); + + // Not entirely correct, timing depends on initial content of A register + m_icount -= 65; +} + +UINT16 hp_5061_3001_cpu_device::execute_no_bpc_ioc(UINT16 opcode) +{ + // EMC instructions + UINT8 n; + UINT16 tmp1; + UINT16 tmp2; + UINT64 tmp_ar; + UINT64 tmp_ar2; + bool carry; + + switch (opcode & 0xfff0) { + case 0x7300: + // XFR + tmp1 = m_reg_A; + tmp2 = m_reg_B; + n = (opcode & 0xf) + 1; + m_icount -= 21; + while (n--) { + m_icount -= 12; + WM(AEC_CASE_C , tmp2 , RM(AEC_CASE_C , tmp1)); + tmp1++; + tmp2++; + } + break; + + case 0x7380: + // CLR + tmp1 = m_reg_A; + n = (opcode & 0xf) + 1; + m_icount -= 16; + while (n--) { + m_icount -= 6; + WM(AEC_CASE_C , tmp1 , 0); + tmp1++; + } + break; + + default: + switch (opcode) { + case 0x7200: + // MWA + m_icount -= 28; + tmp_ar2 = get_ar2(); + carry = do_dec_add(BIT(m_flags , HPHYBRID_DC_BIT) , tmp_ar2 , m_reg_B); + set_ar2(tmp_ar2); + if (carry) { + BIT_SET(m_flags, HPHYBRID_DC_BIT); + } else { + BIT_CLR(m_flags, HPHYBRID_DC_BIT); + } + break; + + case 0x7220: + // CMY + m_icount -= 23; + tmp_ar2 = get_ar2(); + tmp_ar2 = 0x999999999999ULL - tmp_ar2; + do_dec_add(true , tmp_ar2 , 0); + set_ar2(tmp_ar2); + BIT_CLR(m_flags , HPHYBRID_DC_BIT); + break; + + case 0x7260: + // CMX + m_icount -= 59; + tmp_ar = get_ar1(); + tmp_ar = 0x999999999999ULL - tmp_ar; + do_dec_add(true , tmp_ar , 0); + set_ar1(tmp_ar); + BIT_CLR(m_flags , HPHYBRID_DC_BIT); + break; + + case 0x7280: + // FXA + m_icount -= 40; + tmp_ar2 = get_ar2(); + carry = do_dec_add(BIT(m_flags , HPHYBRID_DC_BIT) , tmp_ar2 , get_ar1()); + set_ar2(tmp_ar2); + if (carry) { + BIT_SET(m_flags, HPHYBRID_DC_BIT); + } else { + BIT_CLR(m_flags, HPHYBRID_DC_BIT); + } + break; + + case 0x7340: + // NRM + tmp_ar2 = get_ar2(); + m_icount -= 23; + for (n = 0; n < 12 && (tmp_ar2 & 0xf00000000000ULL) == 0; n++) { + do_dec_shift_l(0 , tmp_ar2); + m_icount--; + } + m_reg_B = n; + if (n < 12) { + BIT_CLR(m_flags , HPHYBRID_DC_BIT); + set_ar2(tmp_ar2); + } else { + BIT_SET(m_flags , HPHYBRID_DC_BIT); + // When ar2 is 0, total time is 69 cycles + // (salcazzo che cosa fa per altri 34 cicli) + m_icount -= 34; + } + break; + + case 0x73c0: + // CDC + m_icount -= 11; + BIT_CLR(m_flags , HPHYBRID_DC_BIT); + break; + + case 0x7a00: + // FMP + m_icount -= 42; + m_reg_A = 0; + tmp_ar = get_ar1(); + tmp_ar2 = get_ar2(); + for (n = m_reg_B & 0xf; n > 0; n--) { + m_icount -= 13; + if (do_dec_add(BIT(m_flags , HPHYBRID_DC_BIT) , tmp_ar2 , tmp_ar)) { + m_reg_A++; + } + BIT_CLR(m_flags , HPHYBRID_DC_BIT); + } + set_ar2(tmp_ar2); + break; + + case 0x7a21: + // FDV + // No doc mentions any limit on the iterations done by this instruction. + // Here we stop at 15 (after all there are only 4 bits in the loop counter). But is it correct? + m_icount -= 37; + m_reg_B = 0; + tmp_ar = get_ar1(); + tmp_ar2 = get_ar2(); + while (m_reg_B < 15 && !do_dec_add(BIT(m_flags , HPHYBRID_DC_BIT) , tmp_ar2 , tmp_ar)) { + m_icount -= 13; + BIT_CLR(m_flags , HPHYBRID_DC_BIT); + m_reg_B++; + } + set_ar2(tmp_ar2); + break; + + case 0x7b00: + // MRX + set_ar1(do_mrxy(get_ar1())); + m_icount -= 62; + break; + + case 0x7b21: + // DRS + tmp_ar = get_ar1(); + m_icount -= 56; + m_reg_A = m_reg_se = do_dec_shift_r(0 , tmp_ar); + set_ar1(tmp_ar); + BIT_CLR(m_flags , HPHYBRID_DC_BIT); + break; + + case 0x7b40: + // MRY + set_ar2(do_mrxy(get_ar2())); + m_icount -= 33; + break; + + case 0x7b61: + // MLY + tmp_ar2 = get_ar2(); + m_icount -= 32; + m_reg_A = m_reg_se = do_dec_shift_l(m_reg_A & 0xf , tmp_ar2); + set_ar2(tmp_ar2); + BIT_CLR(m_flags , HPHYBRID_DC_BIT); + break; + + case 0x7b8f: + // MPY + do_mpy(); + break; + + default: + if ((opcode & 0xfec0) == 0x74c0) { + // SDS + // SDC + m_icount -= 14; + return get_skip_addr(opcode , !BIT(m_flags , HPHYBRID_DC_BIT)); + } else { + // Unrecognized instructions: NOP + // Execution time is fictional + logerror("hp-5061-3001: unknown opcode %04x @ %06x\n" , opcode , m_genpc); + m_icount -= 6; + } + break; + } + } + + return m_reg_P + 1; +} + +offs_t hp_5061_3001_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) +{ + extern CPU_DISASSEMBLE(hp_5061_3001); + return CPU_DISASSEMBLE_NAME(hp_5061_3001)(this, buffer, pc, oprom, opram, options); +} + +UINT32 hp_5061_3001_cpu_device::add_mae(aec_cases_t aec_case , UINT16 addr) +{ + UINT16 bsc_reg; + bool top_half = BIT(addr , 15) != 0; + + // Detect accesses to top half of base page + if (aec_case == AEC_CASE_C && (addr & 0xfe00) == 0xfe00) { + aec_case = AEC_CASE_B; + } + + switch (aec_case) { + case AEC_CASE_A: + bsc_reg = top_half ? HP_REG_R34_ADDR : HP_REG_R33_ADDR; + break; + + case AEC_CASE_B: + bsc_reg = top_half ? HP_REG_R36_ADDR : HP_REG_R33_ADDR; + break; + + case AEC_CASE_C: + bsc_reg = top_half ? HP_REG_R32_ADDR : HP_REG_R35_ADDR; + break; + + case AEC_CASE_D: + bsc_reg = HP_REG_R37_ADDR; + break; + + default: + logerror("hphybrid: aec_case=%d\n" , aec_case); + return 0; + } + + UINT16 aec_reg = m_reg_aec[ bsc_reg - HP_REG_R32_ADDR ] & BSC_REG_MASK; + + if (m_forced_bsc_25) { + aec_reg = (aec_reg & 0xf) | 0x20; + } + + return (UINT32)addr | ((UINT32)aec_reg << 16); +} + +UINT16 hp_5061_3001_cpu_device::read_non_common_reg(UINT16 addr) +{ + switch (addr) { + case HP_REG_AR2_ADDR: + case HP_REG_AR2_ADDR + 1: + case HP_REG_AR2_ADDR + 2: + case HP_REG_AR2_ADDR + 3: + return m_reg_ar2[ addr - HP_REG_AR2_ADDR ]; + + case HP_REG_SE_ADDR: + return m_reg_se; + + case HP_REG_R25_ADDR: + return m_reg_r25; + + case HP_REG_R26_ADDR: + return m_reg_r26; + + case HP_REG_R27_ADDR: + return m_reg_r27; + + case HP_REG_R32_ADDR: + case HP_REG_R33_ADDR: + case HP_REG_R34_ADDR: + case HP_REG_R35_ADDR: + case HP_REG_R36_ADDR: + case HP_REG_R37_ADDR: + return m_reg_aec[ addr - HP_REG_R32_ADDR ]; + + default: + return 0; + } +} + +void hp_5061_3001_cpu_device::write_non_common_reg(UINT16 addr , UINT16 v) +{ + switch (addr) { + case HP_REG_AR2_ADDR: + case HP_REG_AR2_ADDR + 1: + case HP_REG_AR2_ADDR + 2: + case HP_REG_AR2_ADDR + 3: + m_reg_ar2[ addr - HP_REG_AR2_ADDR ] = v; + break; + + case HP_REG_SE_ADDR: + m_reg_se = v & HP_REG_SE_MASK; + break; + + case HP_REG_R25_ADDR: + m_reg_r25 = v; + break; + + case HP_REG_R26_ADDR: + m_reg_r26 = v; + break; + + case HP_REG_R27_ADDR: + m_reg_r27 = v; + break; + + case HP_REG_R32_ADDR: + case HP_REG_R33_ADDR: + case HP_REG_R34_ADDR: + case HP_REG_R35_ADDR: + case HP_REG_R36_ADDR: + case HP_REG_R37_ADDR: + m_reg_aec[ addr - HP_REG_R32_ADDR ] = v; + break; + + default: + break; + } +} + +hp_5061_3011_cpu_device::hp_5061_3011_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) + : hp_hybrid_cpu_device(mconfig, HP_5061_3011, "HP-5061-3011", tag, owner, clock, "5061-3011", 16) +{ +} + +UINT16 hp_5061_3011_cpu_device::execute_no_bpc_ioc(UINT16 opcode) +{ + // Unrecognized instructions: NOP + // Execution time is fictional + m_icount -= 6; + + return m_reg_P + 1; +} + +UINT32 hp_5061_3011_cpu_device::add_mae(aec_cases_t aec_case , UINT16 addr) +{ + // No MAE on 3011 + return addr; +} + +UINT16 hp_5061_3011_cpu_device::read_non_common_reg(UINT16 addr) +{ + // Non-existing registers are returned as 0 + return 0; +} + +void hp_5061_3011_cpu_device::write_non_common_reg(UINT16 addr , UINT16 v) +{ + // Non-existing registers are silently discarded +} + diff --git a/src/devices/cpu/hphybrid/hphybrid.h b/src/devices/cpu/hphybrid/hphybrid.h index 49d2910b4a1..2b59a44120b 100644 --- a/src/devices/cpu/hphybrid/hphybrid.h +++ b/src/devices/cpu/hphybrid/hphybrid.h @@ -8,14 +8,15 @@ // The HP hybrid processor series is composed of a few different models with different // capabilities. The series was derived from HP's own 2116 processor by translating a // discrete implementation of the 1960s into a multi-chip module (hence the "hybrid" name). -// This emulator currently supports the 5061-3011 version only. +// This emulator currently supports both the 5061-3001 & the 5061-3011 versions. // // For this emulator I mainly relied on these sources: // - http://www.hp9845.net/ website // - HP manual "Assembly development ROM manual for the HP9845": this is the most precious // and "enabling" resource of all // - US Patent 4,180,854 describing the HP9845 system -// - Study of disassembly of firmware of HP64000 system +// - Study of disassembly of firmware of HP64000 & HP9845 systems +// - hp9800e emulator for inspiration on implementing EMC instructions // - A lot of "educated" guessing #ifndef _HPHYBRID_H_ @@ -26,11 +27,6 @@ #define HPHYBRID_IRL 1 // Low-level interrupt #define HPHYBRID_INT_LVLS 2 // Levels of interrupt -#define HPHYBRID_DMAR 2 // DMA request -#define HPHYBRID_HALT 3 // "Halt" input -#define HPHYBRID_STS 4 // "Status" input -#define HPHYBRID_FLG 5 // "Flag" input - // I/O addressing space (16-bit wide) // Addresses into this space are composed as follows: // b[5..2] = Peripheral address 0..15 @@ -52,95 +48,199 @@ #define HP_REG_R7_ADDR 0x0007 #define HP_REG_IV_ADDR 0x0008 #define HP_REG_PA_ADDR 0x0009 +#define HP_REG_W_ADDR 0x000A #define HP_REG_DMAPA_ADDR 0x000B #define HP_REG_DMAMA_ADDR 0x000C #define HP_REG_DMAC_ADDR 0x000D #define HP_REG_C_ADDR 0x000e #define HP_REG_D_ADDR 0x000f +#define HP_REG_AR2_ADDR 0x0010 +#define HP_REG_SE_ADDR 0x0014 +#define HP_REG_R25_ADDR 0x0015 +#define HP_REG_R26_ADDR 0x0016 +#define HP_REG_R27_ADDR 0x0017 +#define HP_REG_R32_ADDR 0x001a +#define HP_REG_R33_ADDR 0x001b +#define HP_REG_R34_ADDR 0x001c +#define HP_REG_R35_ADDR 0x001d +#define HP_REG_R36_ADDR 0x001e +#define HP_REG_R37_ADDR 0x001f #define HP_REG_LAST_ADDR 0x001f +#define HP_REG_AR1_ADDR 0xfff8 #define HP_REG_IV_MASK 0xfff0 #define HP_REG_PA_MASK 0x000f +// Set boot mode of 5061-3001: either normal (false) or as in HP9845 system (true) +#define MCFG_HPHYBRID_SET_9845_BOOT(_mode) \ + hp_5061_3001_cpu_device::set_boot_mode_static(*device, _mode); + +// PA changed callback +#define MCFG_HPHYBRID_PA_CHANGED(_devcb) \ + hp_hybrid_cpu_device::set_pa_changed_func(*device , DEVCB_##_devcb); + class hp_hybrid_cpu_device : public cpu_device { public: - DECLARE_WRITE_LINE_MEMBER(dmar_w); + DECLARE_WRITE_LINE_MEMBER(dmar_w); + DECLARE_WRITE_LINE_MEMBER(halt_w); + DECLARE_WRITE_LINE_MEMBER(status_w); + DECLARE_WRITE_LINE_MEMBER(flag_w); + + template static devcb_base &set_pa_changed_func(device_t &device, _Object object) { return downcast(device).m_pa_changed_func.set_callback(object); } protected: - hp_hybrid_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname); + hp_hybrid_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname , UINT8 addrwidth); - // device-level overrides - virtual void device_start() override; - virtual void device_reset() override; + // device-level overrides + virtual void device_start(); + virtual void device_reset(); - // device_execute_interface overrides - virtual UINT32 execute_min_cycles() const override { return 6; } - virtual UINT32 execute_max_cycles() const override { return 25; } - virtual UINT32 execute_input_lines() const override { return 2; } - virtual UINT32 execute_default_irq_vector() const override { return 0xffff; } - virtual void execute_run() override; - virtual void execute_set_input(int inputnum, int state) override; + // device_execute_interface overrides + virtual UINT32 execute_min_cycles() const { return 6; } + virtual UINT32 execute_input_lines() const { return 2; } + virtual UINT32 execute_default_irq_vector() const { return 0xffff; } + virtual void execute_run(); + virtual void execute_set_input(int inputnum, int state); - UINT16 execute_one(UINT16 opcode); - UINT16 execute_one_sub(UINT16 opcode); + UINT16 execute_one(UINT16 opcode); + UINT16 execute_one_sub(UINT16 opcode); + // Execute an instruction that doesn't belong to either BPC or IOC + virtual UINT16 execute_no_bpc_ioc(UINT16 opcode) = 0; - // device_memory_interface overrides - virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const override { return (spacenum == AS_PROGRAM) ? &m_program_config : ( (spacenum == AS_IO) ? &m_io_config : nullptr ); } + // device_memory_interface overrides + virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const { return (spacenum == AS_PROGRAM) ? &m_program_config : ( (spacenum == AS_IO) ? &m_io_config : NULL ); } - // device_state_interface overrides - void state_string_export(const device_state_entry &entry, std::string &str) override; + // device_state_interface overrides + void state_string_export(const device_state_entry &entry, std::string &str); - // device_disasm_interface overrides - virtual UINT32 disasm_min_opcode_bytes() const override { return 2; } - virtual UINT32 disasm_max_opcode_bytes() const override { return 2; } - virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override; + // device_disasm_interface overrides + virtual UINT32 disasm_min_opcode_bytes() const { return 2; } + virtual UINT32 disasm_max_opcode_bytes() const { return 2; } + virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options); + + // Different cases of memory access + // See patent @ pg 361 + typedef enum { + AEC_CASE_A, // Instr. fetches, non-base page fetches of link pointers, BPC direct non-base page accesses + AEC_CASE_B, // Base page fetches of link pointers, BPC direct base page accesses + AEC_CASE_C, // IOC, EMC & BPC indirect final destination accesses + AEC_CASE_D // DMA accesses + } aec_cases_t; + + // do memory address extension + virtual UINT32 add_mae(aec_cases_t aec_case , UINT16 addr) = 0; + + UINT16 remove_mae(UINT32 addr); + + UINT16 RM(aec_cases_t aec_case , UINT16 addr); + UINT16 RM(UINT32 addr); + virtual UINT16 read_non_common_reg(UINT16 addr) = 0; + + void WM(aec_cases_t aec_case , UINT16 addr , UINT16 v); + void WM(UINT32 addr , UINT16 v); + virtual void write_non_common_reg(UINT16 addr , UINT16 v) = 0; + + UINT16 fetch(void); + + UINT16 get_skip_addr(UINT16 opcode , bool condition) const; + + devcb_write8 m_pa_changed_func; + + int m_icount; + bool m_forced_bsc_25; + + // State of processor + UINT16 m_reg_A; // Register A + UINT16 m_reg_B; // Register B + UINT16 m_reg_P; // Register P + UINT16 m_reg_R; // Register R + UINT16 m_reg_C; // Register C + UINT16 m_reg_D; // Register D + UINT16 m_reg_IV; // Register IV + UINT16 m_reg_W; // Register W + UINT8 m_reg_PA[ HPHYBRID_INT_LVLS + 1 ]; // Stack of register PA (4 bit-long) + UINT16 m_flags; // Flags + UINT8 m_dmapa; // DMA peripheral address (4 bits) + UINT16 m_dmama; // DMA address + UINT16 m_dmac; // DMA counter + UINT16 m_reg_I; // Instruction register + UINT32 m_genpc; // Full PC private: - address_space_config m_program_config; - address_space_config m_io_config; + address_space_config m_program_config; + address_space_config m_io_config; - address_space *m_program; - direct_read_data *m_direct; - address_space *m_io; - int m_icount; + address_space *m_program; + direct_read_data *m_direct; + address_space *m_io; - // State of processor - UINT16 m_reg_A; // Register A - UINT16 m_reg_B; // Register B - UINT16 m_reg_P; // Register P - UINT16 m_reg_R; // Register R - UINT16 m_reg_C; // Register C - UINT16 m_reg_D; // Register D - UINT16 m_reg_IV; // Register IV - UINT8 m_reg_PA[ HPHYBRID_INT_LVLS + 1 ]; // Stack of register PA (4 bit-long) - UINT16 m_flags; // Flags (carry, overflow, cb, db, int en, dma en, dma dir) - UINT8 m_dmapa; // DMA peripheral address (4 bits) - UINT16 m_dmama; // DMA address - UINT16 m_dmac; // DMA counter - UINT16 m_reg_I; // Instruction register + UINT32 get_ea(UINT16 opcode); + void do_add(UINT16& addend1 , UINT16 addend2); + UINT16 get_skip_addr_sc(UINT16 opcode , UINT16& v , unsigned n); + void do_pw(UINT16 opcode); + void check_for_interrupts(void); + void handle_dma(void); - UINT16 get_ea(UINT16 opcode); - void do_add(UINT16& addend1 , UINT16 addend2); - UINT16 get_skip_addr(UINT16 opcode , bool condition) const; - UINT16 get_skip_addr_sc(UINT16 opcode , UINT16& v , unsigned n); - void do_pw(UINT16 opcode); - void check_for_interrupts(void); - void handle_dma(void); + UINT16 RIO(UINT8 pa , UINT8 ic); + void WIO(UINT8 pa , UINT8 ic , UINT16 v); +}; - UINT16 RM(UINT16 addr); - void WM(UINT16 addr , UINT16 v); - void WMB(UINT32 addr , UINT8 v); - UINT16 RIO(UINT8 pa , UINT8 ic); - void WIO(UINT8 pa , UINT8 ic , UINT16 v); +class hp_5061_3001_cpu_device : public hp_hybrid_cpu_device +{ +public: + hp_5061_3001_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock); + + static void set_boot_mode_static(device_t &device, bool mode) { downcast(device).m_boot_mode = mode; } + +protected: + virtual void device_start(); + virtual void device_reset(); + virtual UINT32 execute_max_cycles() const { return 237; } // FMP 15 + + static UINT8 do_dec_shift_r(UINT8 d1 , UINT64& mantissa); + static UINT8 do_dec_shift_l(UINT8 d12 , UINT64& mantissa); + UINT64 get_ar1(void); + void set_ar1(UINT64 v); + UINT64 get_ar2(void) const; + void set_ar2(UINT64 v); + UINT64 do_mrxy(UINT64 ar); + bool do_dec_add(bool carry_in , UINT64& a , UINT64 b); + void do_mpy(void); + + virtual UINT16 execute_no_bpc_ioc(UINT16 opcode); + virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options); + virtual UINT32 add_mae(aec_cases_t aec_case , UINT16 addr); + virtual UINT16 read_non_common_reg(UINT16 addr); + virtual void write_non_common_reg(UINT16 addr , UINT16 v); + +private: + bool m_boot_mode; + + // Additional state of processor + UINT16 m_reg_ar2[ 4 ]; // AR2 register + UINT16 m_reg_se; // SE register (4 bits) + UINT16 m_reg_r25; // R25 register + UINT16 m_reg_r26; // R26 register + UINT16 m_reg_r27; // R27 register + UINT16 m_reg_aec[ HP_REG_R37_ADDR - HP_REG_R32_ADDR + 1 ]; // AEC registers R32-R37 }; class hp_5061_3011_cpu_device : public hp_hybrid_cpu_device { public: - hp_5061_3011_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock); + hp_5061_3011_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock); + +protected: + virtual UINT32 execute_max_cycles() const { return 25; } + virtual UINT16 execute_no_bpc_ioc(UINT16 opcode); + virtual UINT32 add_mae(aec_cases_t aec_case , UINT16 addr); + virtual UINT16 read_non_common_reg(UINT16 addr); + virtual void write_non_common_reg(UINT16 addr , UINT16 v); + }; +extern const device_type HP_5061_3001; extern const device_type HP_5061_3011; #endif /* _HPHYBRID_H_ */ diff --git a/src/devices/cpu/hphybrid/hphybrid_dasm.cpp b/src/devices/cpu/hphybrid/hphybrid_dasm.cpp index 2f4d1f9ef40..b83352cf7fb 100644 --- a/src/devices/cpu/hphybrid/hphybrid_dasm.cpp +++ b/src/devices/cpu/hphybrid/hphybrid_dasm.cpp @@ -8,7 +8,7 @@ #include "debugger.h" #include "hphybrid.h" -typedef void (*fn_dis_param)(char *buffer , offs_t pc , UINT16 opcode); +typedef void (*fn_dis_param)(char *buffer , offs_t pc , UINT16 opcode , bool is_3001); typedef struct { UINT16 m_op_mask; @@ -18,84 +18,160 @@ typedef struct { UINT32 m_dasm_flags; } dis_entry_t; -static void addr_2_str(char *buffer , UINT16 addr , bool indirect) +static void addr_2_str(char *buffer , UINT16 addr , bool indirect , bool is_3001) { - char *s = buffer + strlen(buffer); + char *s = buffer + strlen(buffer); - s += sprintf(s , "$%04x" , addr); + s += sprintf(s , "$%04x" , addr); - switch (addr) { - case HP_REG_A_ADDR: - strcpy(s , "(A)"); - break; + if (is_3001) { + switch (addr) { + case HP_REG_AR1_ADDR: + strcpy(s , "(Ar1)"); + break; - case HP_REG_B_ADDR: - strcpy(s , "(B)"); - break; + case HP_REG_AR1_ADDR + 1: + strcpy(s , "(Ar1_2)"); + break; - case HP_REG_P_ADDR: - strcpy(s , "(P)"); - break; + case HP_REG_AR1_ADDR + 2: + strcpy(s , "(Ar1_3)"); + break; - case HP_REG_R_ADDR: - strcpy(s , "(R)"); - break; + case HP_REG_AR1_ADDR + 3: + strcpy(s , "(Ar1_4)"); + break; - case HP_REG_R4_ADDR: - strcpy(s , "(R4)"); - break; + case HP_REG_AR2_ADDR: + strcpy(s , "(Ar2)"); + break; - case HP_REG_R5_ADDR: - strcpy(s , "(R5)"); - break; + case HP_REG_AR2_ADDR + 1: + strcpy(s , "(Ar2_2)"); + break; - case HP_REG_R6_ADDR: - strcpy(s , "(R6)"); - break; + case HP_REG_AR2_ADDR + 2: + strcpy(s , "(Ar2_3)"); + break; - case HP_REG_R7_ADDR: - strcpy(s , "(R7)"); - break; + case HP_REG_AR2_ADDR + 3: + strcpy(s , "(Ar2_4)"); + break; - case HP_REG_IV_ADDR: - strcpy(s , "(IV)"); - break; + case HP_REG_SE_ADDR: + strcpy(s , "(SE)"); + break; - case HP_REG_PA_ADDR: - strcpy(s , "(PA)"); - break; + case HP_REG_R25_ADDR: + strcpy(s , "(R25)"); + break; - case HP_REG_DMAPA_ADDR: - strcpy(s , "(DMAPA)"); - break; + case HP_REG_R26_ADDR: + strcpy(s , "(R26)"); + break; - case HP_REG_DMAMA_ADDR: - strcpy(s , "(DMAMA)"); - break; + case HP_REG_R27_ADDR: + strcpy(s , "(R27)"); + break; - case HP_REG_DMAC_ADDR: - strcpy(s , "(DMAC)"); - break; + case HP_REG_R32_ADDR: + strcpy(s , "(R32)"); + break; - case HP_REG_C_ADDR: - strcpy(s , "(C)"); - break; + case HP_REG_R33_ADDR: + strcpy(s , "(R33)"); + break; - case HP_REG_D_ADDR: - strcpy(s , "(D)"); - break; - } + case HP_REG_R34_ADDR: + strcpy(s , "(R34)"); + break; - if (indirect) { - strcat(s , ",I"); - } + case HP_REG_R35_ADDR: + strcpy(s , "(R35)"); + break; + + case HP_REG_R36_ADDR: + strcpy(s , "(R36)"); + break; + + case HP_REG_R37_ADDR: + strcpy(s , "(R37)"); + break; + } + } + + switch (addr) { + case HP_REG_A_ADDR: + strcpy(s , "(A)"); + break; + + case HP_REG_B_ADDR: + strcpy(s , "(B)"); + break; + + case HP_REG_P_ADDR: + strcpy(s , "(P)"); + break; + + case HP_REG_R_ADDR: + strcpy(s , "(R)"); + break; + + case HP_REG_R4_ADDR: + strcpy(s , "(R4)"); + break; + + case HP_REG_R5_ADDR: + strcpy(s , "(R5)"); + break; + + case HP_REG_R6_ADDR: + strcpy(s , "(R6)"); + break; + + case HP_REG_R7_ADDR: + strcpy(s , "(R7)"); + break; + + case HP_REG_IV_ADDR: + strcpy(s , "(IV)"); + break; + + case HP_REG_PA_ADDR: + strcpy(s , "(PA)"); + break; + + case HP_REG_DMAPA_ADDR: + strcpy(s , "(DMAPA)"); + break; + + case HP_REG_DMAMA_ADDR: + strcpy(s , "(DMAMA)"); + break; + + case HP_REG_DMAC_ADDR: + strcpy(s , "(DMAC)"); + break; + + case HP_REG_C_ADDR: + strcpy(s , "(C)"); + break; + + case HP_REG_D_ADDR: + strcpy(s , "(D)"); + break; + } + + if (indirect) { + strcat(s , ",I"); + } } -static void param_none(char *buffer , offs_t pc , UINT16 opcode) +static void param_none(char *buffer , offs_t pc , UINT16 opcode , bool is_3001) { } -static void param_loc(char *buffer , offs_t pc , UINT16 opcode) +static void param_loc(char *buffer , offs_t pc , UINT16 opcode , bool is_3001) { UINT16 base; UINT16 off; @@ -113,26 +189,26 @@ static void param_loc(char *buffer , offs_t pc , UINT16 opcode) off -= 0x400; } - addr_2_str(buffer , base + off , (opcode & 0x8000) != 0); + addr_2_str(buffer , base + off , (opcode & 0x8000) != 0 , is_3001); } -static void param_addr32(char *buffer , offs_t pc , UINT16 opcode) +static void param_addr32(char *buffer , offs_t pc , UINT16 opcode , bool is_3001) { - addr_2_str(buffer , opcode & 0x1f , (opcode & 0x8000) != 0); + addr_2_str(buffer , opcode & 0x1f , (opcode & 0x8000) != 0 , is_3001); } -static void param_skip(char *buffer , offs_t pc , UINT16 opcode) +static void param_skip(char *buffer , offs_t pc , UINT16 opcode , bool is_3001) { UINT16 off = opcode & 0x3f; if (off & 0x20) { off -= 0x40; } - addr_2_str(buffer , pc + off , false); + addr_2_str(buffer , pc + off , false , is_3001); } -static void param_skip_sc(char *buffer , offs_t pc , UINT16 opcode) +static void param_skip_sc(char *buffer , offs_t pc , UINT16 opcode , bool is_3001) { - param_skip(buffer, pc, opcode); + param_skip(buffer, pc, opcode , is_3001); if (opcode & 0x80) { if (opcode & 0x40) { @@ -143,7 +219,7 @@ static void param_skip_sc(char *buffer , offs_t pc , UINT16 opcode) } } -static void param_ret(char *buffer , offs_t pc , UINT16 opcode) +static void param_ret(char *buffer , offs_t pc , UINT16 opcode , bool is_3001) { char *s = buffer + strlen(buffer); @@ -159,16 +235,16 @@ static void param_ret(char *buffer , offs_t pc , UINT16 opcode) } } -static void param_n16(char *buffer , offs_t pc , UINT16 opcode) +static void param_n16(char *buffer , offs_t pc , UINT16 opcode , bool is_3001) { char *s = buffer + strlen(buffer); sprintf(s , "%u" , (opcode & 0xf) + 1); } -static void param_reg_id(char *buffer , offs_t pc , UINT16 opcode) +static void param_reg_id(char *buffer , offs_t pc , UINT16 opcode , bool is_3001) { - addr_2_str(buffer, opcode & 7, false); + addr_2_str(buffer, opcode & 7, false , is_3001); if (opcode & 0x80) { strcat(buffer , ",D"); @@ -260,22 +336,78 @@ static const dis_entry_t dis_table[] = { {0 , 0 , nullptr , nullptr , 0 } }; +static const dis_entry_t dis_table_emc[] = { + // *** EMC Instructions *** + {0xffff , 0x7200 , "MWA" , param_none , 0 }, + {0xffff , 0x7220 , "CMY" , param_none , 0 }, + {0xffff , 0x7260 , "CMX" , param_none , 0 }, + {0xffff , 0x7280 , "FXA" , param_none , 0 }, + {0xfff0 , 0x7300 , "XFR" , param_n16 , 0 }, + {0xffff , 0x7340 , "NRM" , param_none , 0 }, + {0xfff0 , 0x7380 , "CLR" , param_n16 , 0 }, + {0xffff , 0x73c0 , "CDC" , param_none , 0 }, + {0xffc0 , 0x74c0 , "SDS" , param_skip , 0 }, + {0xffc0 , 0x75c0 , "SDC" , param_skip , 0 }, + {0xffff , 0x7a00 , "FMP" , param_none , 0 }, + {0xffff , 0x7a21 , "FDV" , param_none , 0 }, + {0xffff , 0x7b00 , "MRX" , param_none , 0 }, + {0xffff , 0x7b21 , "DRS" , param_none , 0 }, + {0xffff , 0x7b40 , "MRY" , param_none , 0 }, + {0xffff , 0x7b61 , "MLY" , param_none , 0 }, + {0xffff , 0x7b8f , "MPY" , param_none , 0 }, + // *** END *** + {0 , 0 , NULL , NULL , 0 } +}; + +static offs_t disassemble_table(UINT16 opcode , offs_t pc , const dis_entry_t *table , bool is_3001 , char *buffer) +{ + const dis_entry_t *p; + + for (p = table; p->m_op_mask; p++) { + if ((opcode & p->m_op_mask) == p->m_opcode) { + strcpy(buffer , p->m_mnemonic); + strcat(buffer , " "); + p->m_param_fn(buffer , pc , opcode , is_3001); + return 1 | p->m_dasm_flags | DASMFLAG_SUPPORTED; + } + } + + return 0; +} + CPU_DISASSEMBLE(hp_hybrid) { - UINT16 opcode = ((UINT16)oprom[ 0 ] << 8) | oprom[ 1 ]; - const dis_entry_t *p; + UINT16 opcode = ((UINT16)oprom[ 0 ] << 8) | oprom[ 1 ]; + offs_t res; - for (p = dis_table; p->m_op_mask; p++) { - if ((opcode & p->m_op_mask) == p->m_opcode) { - strcpy(buffer , p->m_mnemonic); - strcat(buffer , " "); - p->m_param_fn(buffer , pc , opcode); - return 1 | p->m_dasm_flags | DASMFLAG_SUPPORTED; - } - } + res = disassemble_table(opcode , pc , dis_table , false , buffer); - // Unknown opcode - strcpy(buffer , "???"); + if (res == 0) { + // Unknown opcode + strcpy(buffer , "???"); + res = 1 | DASMFLAG_SUPPORTED; + } - return 1 | DASMFLAG_SUPPORTED; + return res; } + +CPU_DISASSEMBLE(hp_5061_3001) +{ + UINT16 opcode = ((UINT16)oprom[ 0 ] << 8) | oprom[ 1 ]; + offs_t res; + + res = disassemble_table(opcode , pc , dis_table_emc , true , buffer); + + if (res == 0) { + res = disassemble_table(opcode , pc , dis_table , true , buffer); + } + + if (res == 0) { + // Unknown opcode + strcpy(buffer , "???"); + res = 1 | DASMFLAG_SUPPORTED; + } + + return res; +} + diff --git a/src/mame/drivers/hp9845.cpp b/src/mame/drivers/hp9845.cpp index 22ef8533bab..e1e7bc579e0 100644 --- a/src/mame/drivers/hp9845.cpp +++ b/src/mame/drivers/hp9845.cpp @@ -1,5 +1,5 @@ // license:BSD-3-Clause -// copyright-holders:Curt Coder +// copyright-holders:Curt Coder, F. Ulivi /* HP 9845 @@ -7,10 +7,51 @@ http://www.hp9845.net/ */ +// ************************** +// Driver for HP 9845B system +// ************************** +// +// What's in: +// - Emulation of both 5061-3001 CPUs +// - LPU & PPU ROMs +// - LPU & PPU RAMs +// - Text mode screen +// - Keyboard (most of keys) +// What's not yet in: +// - Beeper +// - Rest of keyboard +// - Graphic screen +// - Tape drive (this needs some heavy RE of the TACO chip) +// - Better documentation of this file +// - Software list to load optional ROMs +// What's wrong: +// - I'm using character generator from HP64K (another driver of mine): no known dump of the original one +// - Speed, as usual +// - There are a couple of undocumented opcodes that PPU executes at each keyboard interrupt: don't know if ignoring them is a Bad Thing (tm) or not #include "emu.h" #include "cpu/z80/z80.h" #include "softlist.h" +#include "cpu/hphybrid/hphybrid.h" + +#define BIT_MASK(n) (1U << (n)) + +// Macros to clear/set single bits +#define BIT_CLR(w , n) ((w) &= ~BIT_MASK(n)) +#define BIT_SET(w , n) ((w) |= BIT_MASK(n)) + +// Base address of video buffer +#define VIDEO_BUFFER_BASE 0x17000 + +#define MAX_WORD_PER_ROW 600 + +#define VIDEO_CHAR_WIDTH 9 +#define VIDEO_CHAR_HEIGHT 15 +#define VIDEO_CHAR_COLUMNS 80 +#define VIDEO_CHAR_ROWS 25 +#define VIDEO_ACTIVE_SCANLINES (VIDEO_CHAR_HEIGHT * VIDEO_CHAR_ROWS) + +#define KEY_SCAN_OSCILLATOR 327680 class hp9845_state : public driver_device { @@ -25,11 +66,530 @@ public: static INPUT_PORTS_START( hp9845 ) INPUT_PORTS_END +class hp9845b_state : public driver_device +{ +public: + hp9845b_state(const machine_config &mconfig, device_type type, const char *tag) : + driver_device(mconfig, type, tag), + m_lpu(*this , "lpu"), + m_ppu(*this , "ppu"), + m_palette(*this , "palette"), + m_io_key0(*this , "KEY0"), + m_io_key1(*this , "KEY1"), + m_io_key2(*this , "KEY2"), + m_io_key3(*this , "KEY3") + { } + + UINT32 screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect); + + virtual void machine_start(); + virtual void machine_reset(); + + TIMER_DEVICE_CALLBACK_MEMBER(scanline_timer); + + void vblank_w(screen_device &screen, bool state); + + IRQ_CALLBACK_MEMBER(irq_callback); + void update_irl(void); + + TIMER_DEVICE_CALLBACK_MEMBER(kb_scan); + DECLARE_READ16_MEMBER(kb_scancode_r); + DECLARE_READ16_MEMBER(kb_status_r); + DECLARE_WRITE16_MEMBER(kb_irq_clear_w); + + DECLARE_WRITE8_MEMBER(pa_w); + +private: + required_device m_lpu; + required_device m_ppu; + required_device m_palette; + required_ioport m_io_key0; + required_ioport m_io_key1; + required_ioport m_io_key2; + required_ioport m_io_key3; + + void set_video_mar(UINT16 mar); + void video_fill_buff(bool buff_idx); + void video_render_buff(unsigned line_in_row, bool buff_idx); + + // Character generator + const UINT8 *m_chargen; + + // Text mode video I/F + typedef struct { + UINT8 chars[ 80 ]; + UINT8 attrs[ 80 ]; + bool full; + } video_buffer_t; + + bitmap_rgb32 m_bitmap; + unsigned m_video_scanline; + offs_t m_video_mar; + UINT16 m_video_word; + bool m_video_load_mar; + bool m_video_byte_idx; + UINT8 m_video_attr; + bool m_video_buff_idx; + bool m_video_blanked; + UINT8 m_video_frame; + video_buffer_t m_video_buff[ 2 ]; + + // Interrupt handling + UINT8 m_irl_pending; + + // State of keyboard + ioport_value m_kb_state[ 4 ]; + UINT8 m_kb_scancode; + UINT16 m_kb_status; + +}; + +static INPUT_PORTS_START(hp9845b) + // Keyboard is arranged in a 8 x 16 matrix. Of the 128 possible positions, 118 are used. + // Keys are mapped on bit b of KEYn + // where b = (row & 1) << 4 + column, n = row >> 1 + // column = [0..15] + // row = [0..7] + PORT_START("KEY0") + PORT_BIT(BIT_MASK(0) , IP_ACTIVE_HIGH , IPT_UNUSED) // N/U + PORT_BIT(BIT_MASK(1) , IP_ACTIVE_HIGH , IPT_UNUSED) // Print All + PORT_BIT(BIT_MASK(2) , IP_ACTIVE_HIGH , IPT_UNUSED) // KP + + PORT_BIT(BIT_MASK(3) , IP_ACTIVE_HIGH , IPT_UNUSED) // KP , + PORT_BIT(BIT_MASK(4) , IP_ACTIVE_HIGH , IPT_UNUSED) // KP . + PORT_BIT(BIT_MASK(5) , IP_ACTIVE_HIGH , IPT_UNUSED) // KP 0 + PORT_BIT(BIT_MASK(6) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_F12) PORT_NAME("Execute") // Execute + PORT_BIT(BIT_MASK(7) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_F11) PORT_NAME("Cont") // Cont + PORT_BIT(BIT_MASK(8) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_RIGHT) PORT_CHAR(UCHAR_MAMEKEY(RIGHT)) // Right + PORT_BIT(BIT_MASK(9) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_SPACE) PORT_CHAR(' ') // Space + PORT_BIT(BIT_MASK(10) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_SLASH) PORT_CHAR('/') PORT_CHAR('?') // / + PORT_BIT(BIT_MASK(11) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_COMMA) PORT_CHAR(',') PORT_CHAR('<') // < + PORT_BIT(BIT_MASK(12) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_N) PORT_CHAR('n') PORT_CHAR('N') // N + PORT_BIT(BIT_MASK(13) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_V) PORT_CHAR('v') PORT_CHAR('V') // V + PORT_BIT(BIT_MASK(14) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_X) PORT_CHAR('x') PORT_CHAR('X') // X + PORT_BIT(BIT_MASK(15) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_LSHIFT) PORT_CHAR(UCHAR_SHIFT_1) // Shift + PORT_BIT(BIT_MASK(16) , IP_ACTIVE_HIGH , IPT_UNUSED) // N/U + PORT_BIT(BIT_MASK(17) , IP_ACTIVE_HIGH , IPT_UNUSED) // Auto Start + PORT_BIT(BIT_MASK(18) , IP_ACTIVE_HIGH , IPT_UNUSED) // KP - + PORT_BIT(BIT_MASK(19) , IP_ACTIVE_HIGH , IPT_UNUSED) // KP 3 + PORT_BIT(BIT_MASK(20) , IP_ACTIVE_HIGH , IPT_UNUSED) // KP 2 + PORT_BIT(BIT_MASK(21) , IP_ACTIVE_HIGH , IPT_UNUSED) // KP 1 + PORT_BIT(BIT_MASK(22) , IP_ACTIVE_HIGH , IPT_UNUSED) // N/U + PORT_BIT(BIT_MASK(23) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_LEFT) PORT_CHAR(UCHAR_MAMEKEY(LEFT)) // Left + PORT_BIT(BIT_MASK(24) , IP_ACTIVE_HIGH , IPT_UNUSED) // Repeat + PORT_BIT(BIT_MASK(25) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_DOWN) PORT_CHAR(UCHAR_MAMEKEY(DOWN)) // Down + PORT_BIT(BIT_MASK(26) , IP_ACTIVE_HIGH , IPT_UNUSED) // N/U + PORT_BIT(BIT_MASK(27) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_STOP) PORT_CHAR('.') PORT_CHAR('>') // > + PORT_BIT(BIT_MASK(28) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_M) PORT_CHAR('m') PORT_CHAR('M') // M + PORT_BIT(BIT_MASK(29) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_B) PORT_CHAR('b') PORT_CHAR('B') // B + PORT_BIT(BIT_MASK(30) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_C) PORT_CHAR('c') PORT_CHAR('C') // C + PORT_BIT(BIT_MASK(31) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_Z) PORT_CHAR('z') PORT_CHAR('Z') // Z + + PORT_START("KEY1") + PORT_BIT(BIT_MASK(0) , IP_ACTIVE_HIGH , IPT_UNUSED) // N/U + PORT_BIT(BIT_MASK(1) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_INSERT) PORT_NAME("INSCHAR") // Ins Char + PORT_BIT(BIT_MASK(2) , IP_ACTIVE_HIGH , IPT_UNUSED) // KP * + PORT_BIT(BIT_MASK(3) , IP_ACTIVE_HIGH , IPT_UNUSED) // KP 6 + PORT_BIT(BIT_MASK(4) , IP_ACTIVE_HIGH , IPT_UNUSED) // KP 5 + PORT_BIT(BIT_MASK(5) , IP_ACTIVE_HIGH , IPT_UNUSED) // KP 4 + PORT_BIT(BIT_MASK(6) , IP_ACTIVE_HIGH , IPT_UNUSED) // KP = + PORT_BIT(BIT_MASK(7) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_F10) PORT_NAME("Pause") // Pause + PORT_BIT(BIT_MASK(8) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_UP) PORT_CHAR(UCHAR_MAMEKEY(UP)) // Up + PORT_BIT(BIT_MASK(9) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_ENTER) PORT_CHAR(13) // Store + PORT_BIT(BIT_MASK(10) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_COLON) PORT_CHAR(';') PORT_CHAR(':') // : + PORT_BIT(BIT_MASK(11) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_K) PORT_CHAR('k') PORT_CHAR('K') // K + PORT_BIT(BIT_MASK(12) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_H) PORT_CHAR('h') PORT_CHAR('H') // H + PORT_BIT(BIT_MASK(13) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_F) PORT_CHAR('f') PORT_CHAR('F') // F + PORT_BIT(BIT_MASK(14) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_S) PORT_CHAR('s') PORT_CHAR('S') // S + PORT_BIT(BIT_MASK(15) , IP_ACTIVE_HIGH , IPT_UNUSED) // N/U + PORT_BIT(BIT_MASK(16) , IP_ACTIVE_HIGH , IPT_UNUSED) // N/U + PORT_BIT(BIT_MASK(17) , IP_ACTIVE_HIGH , IPT_UNUSED) // Ins Ln + PORT_BIT(BIT_MASK(18) , IP_ACTIVE_HIGH , IPT_UNUSED) // KP / + PORT_BIT(BIT_MASK(19) , IP_ACTIVE_HIGH , IPT_UNUSED) // KP 9 + PORT_BIT(BIT_MASK(20) , IP_ACTIVE_HIGH , IPT_UNUSED) // KP 8 + PORT_BIT(BIT_MASK(21) , IP_ACTIVE_HIGH , IPT_UNUSED) // KP 7 + PORT_BIT(BIT_MASK(22) , IP_ACTIVE_HIGH , IPT_UNUSED) // Result + PORT_BIT(BIT_MASK(23) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_F9) PORT_NAME("Run") // Run + PORT_BIT(BIT_MASK(24) , IP_ACTIVE_HIGH , IPT_UNUSED) // N/U + PORT_BIT(BIT_MASK(25) , IP_ACTIVE_HIGH , IPT_UNUSED) // N/U + PORT_BIT(BIT_MASK(26) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_QUOTE) PORT_CHAR('\'') PORT_CHAR('"') // " + PORT_BIT(BIT_MASK(27) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_L) PORT_CHAR('l') PORT_CHAR('L') // L + PORT_BIT(BIT_MASK(28) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_J) PORT_CHAR('j') PORT_CHAR('J') // J + PORT_BIT(BIT_MASK(29) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_G) PORT_CHAR('g') PORT_CHAR('G') // G + PORT_BIT(BIT_MASK(30) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_D) PORT_CHAR('d') PORT_CHAR('D') // D + PORT_BIT(BIT_MASK(31) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_A) PORT_CHAR('a') PORT_CHAR('A') // A + + PORT_START("KEY2") + PORT_BIT(BIT_MASK(0) , IP_ACTIVE_HIGH , IPT_UNUSED) // N/U + PORT_BIT(BIT_MASK(1) , IP_ACTIVE_HIGH , IPT_UNUSED) // Del Ln + PORT_BIT(BIT_MASK(2) , IP_ACTIVE_HIGH , IPT_UNUSED) // KP ^ + PORT_BIT(BIT_MASK(3) , IP_ACTIVE_HIGH , IPT_UNUSED) // KP ) + PORT_BIT(BIT_MASK(4) , IP_ACTIVE_HIGH , IPT_UNUSED) // KP ( + PORT_BIT(BIT_MASK(5) , IP_ACTIVE_HIGH , IPT_UNUSED) // KP E + PORT_BIT(BIT_MASK(6) , IP_ACTIVE_HIGH , IPT_UNUSED) // Clear Line + PORT_BIT(BIT_MASK(7) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_F8) PORT_NAME("Stop") // Stop + PORT_BIT(BIT_MASK(8) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_BACKSLASH) PORT_CHAR('\\') PORT_CHAR('|') // | + PORT_BIT(BIT_MASK(9) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_CLOSEBRACE) PORT_CHAR(']') PORT_CHAR('}') // ] + PORT_BIT(BIT_MASK(10) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_P) PORT_CHAR('p') PORT_CHAR('P') // P + PORT_BIT(BIT_MASK(11) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_I) PORT_CHAR('i') PORT_CHAR('I') // I + PORT_BIT(BIT_MASK(12) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_Y) PORT_CHAR('y') PORT_CHAR('Y') // Y + PORT_BIT(BIT_MASK(13) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_R) PORT_CHAR('r') PORT_CHAR('R') // R + PORT_BIT(BIT_MASK(14) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_W) PORT_CHAR('w') PORT_CHAR('W') // W + PORT_BIT(BIT_MASK(15) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_LCONTROL) PORT_CHAR(UCHAR_SHIFT_2) // Control + PORT_BIT(BIT_MASK(16) , IP_ACTIVE_HIGH , IPT_UNUSED) // Typwtr + PORT_BIT(BIT_MASK(17) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_DEL) PORT_NAME("DELCHAR") // Del Char + PORT_BIT(BIT_MASK(18) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_PGDN) PORT_NAME("ROLLDOWN") // Roll down + PORT_BIT(BIT_MASK(19) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_PGUP) PORT_NAME("ROLLUP") // Roll up + PORT_BIT(BIT_MASK(20) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_HOME) PORT_NAME("HOME") // Home + PORT_BIT(BIT_MASK(21) , IP_ACTIVE_HIGH , IPT_UNUSED) // Clr to end + PORT_BIT(BIT_MASK(22) , IP_ACTIVE_HIGH , IPT_UNUSED) // Clear + PORT_BIT(BIT_MASK(23) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_TILDE) PORT_CHAR('`') PORT_CHAR('~') // ~ + PORT_BIT(BIT_MASK(24) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_BACKSPACE) PORT_CHAR(8) // BS + PORT_BIT(BIT_MASK(25) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_EQUALS) PORT_CHAR('=') PORT_CHAR('+') // + + PORT_BIT(BIT_MASK(26) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_OPENBRACE) PORT_CHAR('[') PORT_CHAR('{') // [ + PORT_BIT(BIT_MASK(27) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_O) PORT_CHAR('o') PORT_CHAR('O') // O + PORT_BIT(BIT_MASK(28) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_U) PORT_CHAR('u') PORT_CHAR('U') // U + PORT_BIT(BIT_MASK(29) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_T) PORT_CHAR('t') PORT_CHAR('T') // T + PORT_BIT(BIT_MASK(30) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_E) PORT_CHAR('e') PORT_CHAR('E') // E + PORT_BIT(BIT_MASK(31) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_Q) PORT_CHAR('q') PORT_CHAR('Q') // Q + + PORT_START("KEY3") + PORT_BIT(BIT_MASK(0) , IP_ACTIVE_HIGH , IPT_UNUSED) // Tab set + PORT_BIT(BIT_MASK(1) , IP_ACTIVE_HIGH , IPT_UNUSED) // Recall + PORT_BIT(BIT_MASK(2) , IP_ACTIVE_HIGH , IPT_UNUSED) // K15 + PORT_BIT(BIT_MASK(3) , IP_ACTIVE_HIGH , IPT_UNUSED) // K14 + PORT_BIT(BIT_MASK(4) , IP_ACTIVE_HIGH , IPT_UNUSED) // K13 + PORT_BIT(BIT_MASK(5) , IP_ACTIVE_HIGH , IPT_UNUSED) // K12 + PORT_BIT(BIT_MASK(6) , IP_ACTIVE_HIGH , IPT_UNUSED) // K11 + PORT_BIT(BIT_MASK(7) , IP_ACTIVE_HIGH , IPT_UNUSED) // K10 + PORT_BIT(BIT_MASK(8) , IP_ACTIVE_HIGH , IPT_UNUSED) // K9 + PORT_BIT(BIT_MASK(9) , IP_ACTIVE_HIGH , IPT_UNUSED) // K8 + PORT_BIT(BIT_MASK(10) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_0) PORT_CHAR('0') // 0 + PORT_BIT(BIT_MASK(11) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_8) PORT_CHAR('8') PORT_CHAR('(') // 8 + PORT_BIT(BIT_MASK(12) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_6) PORT_CHAR('6') PORT_CHAR('&') // 6 + PORT_BIT(BIT_MASK(13) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_4) PORT_CHAR('4') PORT_CHAR('$') // 4 + PORT_BIT(BIT_MASK(14) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_2) PORT_CHAR('2') PORT_CHAR('"') // 2 + PORT_BIT(BIT_MASK(15) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_TAB) PORT_CHAR('\t') // Tab + PORT_BIT(BIT_MASK(16) , IP_ACTIVE_HIGH , IPT_UNUSED) // Tab clr + PORT_BIT(BIT_MASK(17) , IP_ACTIVE_HIGH , IPT_UNUSED) // Step + PORT_BIT(BIT_MASK(18) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_F7) PORT_NAME("K7") // K7 + PORT_BIT(BIT_MASK(19) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_F6) PORT_NAME("K6") // K6 + PORT_BIT(BIT_MASK(20) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_F5) PORT_NAME("K5") // K5 + PORT_BIT(BIT_MASK(21) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_F4) PORT_NAME("K4") // K4 + PORT_BIT(BIT_MASK(22) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_F3) PORT_NAME("K3") // K3 + PORT_BIT(BIT_MASK(23) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_F2) PORT_NAME("K2") // K2 + PORT_BIT(BIT_MASK(24) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_F1) PORT_NAME("K1") // K1 + PORT_BIT(BIT_MASK(25) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_ESC) PORT_NAME("K0") // K0 + PORT_BIT(BIT_MASK(26) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_MINUS) PORT_CHAR('-') PORT_CHAR('_') // _ + PORT_BIT(BIT_MASK(27) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_9) PORT_CHAR('9') PORT_CHAR(')') // 9 + PORT_BIT(BIT_MASK(28) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_7) PORT_CHAR('7') PORT_CHAR('\'') // 7 + PORT_BIT(BIT_MASK(29) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_5) PORT_CHAR('5') PORT_CHAR('%') // 5 + PORT_BIT(BIT_MASK(30) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_3) PORT_CHAR('3') PORT_CHAR('#') // 3 + PORT_BIT(BIT_MASK(31) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_1) PORT_CHAR('1') PORT_CHAR('!') // 1 + +INPUT_PORTS_END + UINT32 hp9845_state::screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect) { return 0; } +UINT32 hp9845b_state::screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect) +{ + copybitmap(bitmap, m_bitmap, 0, 0, 0, 0, cliprect); + + return 0; +} + +void hp9845b_state::machine_start() +{ + machine().first_screen()->register_screen_bitmap(m_bitmap); + + m_chargen = memregion("chargen")->base(); +} + +void hp9845b_state::machine_reset() +{ + m_lpu->halt_w(1); + m_ppu->halt_w(0); + + // Some sensible defaults + m_video_mar = VIDEO_BUFFER_BASE; + m_video_load_mar = false; + m_video_byte_idx = false; + m_video_attr = 0; + m_video_buff_idx = false; + m_video_blanked = false; + m_video_frame = 0; + + m_irl_pending = 0; + + memset(&m_kb_state[ 0 ] , 0 , sizeof(m_kb_state)); + m_kb_scancode = 0x7f; + m_kb_status = 0; +} + +void hp9845b_state::set_video_mar(UINT16 mar) +{ + m_video_mar = (mar & 0xfff) | VIDEO_BUFFER_BASE; +} + +void hp9845b_state::video_fill_buff(bool buff_idx) +{ + unsigned char_idx = 0; + unsigned iters = 0; + UINT8 byte; + address_space& prog_space = m_ppu->space(AS_PROGRAM); + + m_video_buff[ buff_idx ].full = false; + + while (1) { + if (!m_video_byte_idx) { + if (iters++ >= MAX_WORD_PER_ROW) { + // Limit on accesses per row reached + break; + } + m_video_word = prog_space.read_word(m_video_mar << 1); + if (m_video_load_mar) { + // Load new address into MAR after start of a new frame or NWA instruction + // TODO: decode graphic/alpha mode bit + set_video_mar(~m_video_word); + m_video_load_mar = false; + continue; + } else { + // Read normal word from frame buffer, start parsing at MSB + set_video_mar(m_video_mar + 1); + byte = (UINT8)(m_video_word >> 8); + m_video_byte_idx = true; + } + } else { + // Parse LSB + byte = (UINT8)(m_video_word & 0xff); + m_video_byte_idx = false; + } + if ((byte & 0xc0) == 0x80) { + // Attribute command + m_video_attr = byte & 0x1f; + } else if ((byte & 0xc1) == 0xc0) { + // New Word Address (NWA) + m_video_load_mar = true; + m_video_byte_idx = false; + } else if ((byte & 0xc1) == 0xc1) { + // End of line (EOL) + // Fill rest of buffer with spaces + memset(&m_video_buff[ buff_idx ].chars[ char_idx ] , 0x20 , 80 - char_idx); + memset(&m_video_buff[ buff_idx ].attrs[ char_idx ] , m_video_attr , 80 - char_idx); + m_video_buff[ buff_idx ].full = true; + break; + } else { + // Normal character + m_video_buff[ buff_idx ].chars[ char_idx ] = byte; + m_video_buff[ buff_idx ].attrs[ char_idx ] = m_video_attr; + char_idx++; + if (char_idx == 80) { + m_video_buff[ buff_idx ].full = true; + break; + } + } + } +} + +void hp9845b_state::video_render_buff(unsigned line_in_row, bool buff_idx) +{ + if (!m_video_buff[ buff_idx ].full) { + m_video_blanked = true; + } + + if (m_video_blanked) { + // TODO: blank scanline + } else { + const rgb_t *palette = m_palette->palette()->entry_list_raw(); + bool cursor_line = line_in_row == 12; + bool ul_line = line_in_row == 14; + bool cursor_blink = BIT(m_video_frame , 3); + bool char_blink = BIT(m_video_frame , 4); + + for (unsigned i = 0; i < 80; i++) { + UINT8 charcode = m_video_buff[ buff_idx ].chars[ i ]; + UINT8 attrs = m_video_buff[ buff_idx ].attrs[ i ]; + UINT8 chargen_byte = m_chargen[ line_in_row | ((unsigned)charcode << 4) ]; + UINT16 pixels; + + // TODO: Handle selection of 2nd chargen + // TODO: Check if order of bits in "pixels" is ok + + if ((ul_line && BIT(attrs , 3)) || + (cursor_line && cursor_blink && BIT(attrs , 0))) { + pixels = ~0; + } else if (char_blink && BIT(attrs , 2)) { + pixels = 0; + } else { + pixels = (UINT16)(chargen_byte & 0x7f) << 2; + } + + if (BIT(attrs , 1)) { + pixels = ~pixels; + } + + for (unsigned j = 0; j < 9; j++) { + bool pixel = (pixels & (1U << (8 - j))) != 0; + + m_bitmap.pix32(m_video_scanline , i * 9 + j) = palette[ pixel ? 1 : 0 ]; + } + } + } +} + +TIMER_DEVICE_CALLBACK_MEMBER(hp9845b_state::scanline_timer) +{ + m_video_scanline = param; + + if (m_video_scanline < VIDEO_ACTIVE_SCANLINES) { + unsigned row = m_video_scanline / 15; + unsigned line_in_row = m_video_scanline - row * 15; + + if (line_in_row == 0) { + // Start of new row, swap buffers + m_video_buff_idx = !m_video_buff_idx; + video_fill_buff(!m_video_buff_idx); + } + + video_render_buff(line_in_row , m_video_buff_idx); + } +} + +void hp9845b_state::vblank_w(screen_device &screen, bool state) +{ + // VBlank signal is fed into HALT flag of PPU + m_ppu->halt_w(state); + + if (state) { + // Start of V blank + set_video_mar(0); + m_video_load_mar = true; + m_video_byte_idx = false; + m_video_blanked = false; + m_video_frame++; + m_video_buff_idx = !m_video_buff_idx; + video_fill_buff(!m_video_buff_idx); + } +} + +IRQ_CALLBACK_MEMBER(hp9845b_state::irq_callback) +{ + if (irqline == HPHYBRID_IRL) { + return m_irl_pending; + } else { + return 0; + } +} + +void hp9845b_state::update_irl(void) +{ + m_ppu->set_input_line(HPHYBRID_IRL , m_irl_pending != 0); +} + +TIMER_DEVICE_CALLBACK_MEMBER(hp9845b_state::kb_scan) +{ + ioport_value input[ 4 ]; + input[ 0 ] = m_io_key0->read(); + input[ 1 ] = m_io_key1->read(); + input[ 2 ] = m_io_key2->read(); + input[ 3 ] = m_io_key3->read(); + + // Set status bits for "shift", "control", "auto start" & "print all" keys + // ** Print all ** + // (R,C) = (0,1) + // Bit 12 in kb status + if (BIT(input[ 0 ] , 1)) { + BIT_SET(m_kb_status , 12); + BIT_CLR(input[ 0 ] , 1); + } else { + BIT_CLR(m_kb_status, 12); + } + // ** Auto start ** + // (R,C) = (1,1) + // Bit 13 in kb status + if (BIT(input[ 0 ] , 17)) { + BIT_SET(m_kb_status , 13); + BIT_CLR(input[ 0 ] , 17); + } else { + BIT_CLR(m_kb_status, 13); + } + // ** Control ** + // (R,C) = (4,15) + // Bit 14 in kb status + if (BIT(input[ 2 ] , 15)) { + BIT_SET(m_kb_status , 14); + BIT_CLR(input[ 2 ] , 15); + } else { + BIT_CLR(m_kb_status, 14); + } + // ** Shift ** + // (R,C) = (0,15) + // Bit 15 in kb status + if (BIT(input[ 0 ] , 15)) { + BIT_SET(m_kb_status , 15); + BIT_CLR(input[ 0 ] , 15); + } else { + BIT_CLR(m_kb_status, 15); + } + + // TODO: handle repeat key + // TODO: handle ctrl+stop + + for (unsigned i = 0; i < 128; i++) { + ioport_value mask = BIT_MASK(i & 0x1f); + unsigned idx = i >> 5; + + if ((input[ idx ] & ~m_kb_state[ idx ]) & mask) { + // Key pressed, store scancode & generate IRL + m_kb_scancode = i; + BIT_SET(m_irl_pending , 0); + BIT_SET(m_kb_status, 0); + update_irl(); + + // Special case: pressing stop key sets LPU "status" flag + if (i == 0x47) { + m_lpu->status_w(1); + } + } + } + + memcpy(&m_kb_state[ 0 ] , &input[ 0 ] , sizeof(m_kb_state)); +} + +READ16_MEMBER(hp9845b_state::kb_scancode_r) +{ + return ~m_kb_scancode & 0x7f; +} + +READ16_MEMBER(hp9845b_state::kb_status_r) +{ + return m_kb_status; +} + +WRITE16_MEMBER(hp9845b_state::kb_irq_clear_w) +{ + BIT_CLR(m_irl_pending , 0); + BIT_CLR(m_kb_status, 0); + update_irl(); + m_lpu->status_w(0); + // TODO: beeper start +} + +WRITE8_MEMBER(hp9845b_state::pa_w) +{ + // TODO: handle sts & flg + if (data == 0xf) { + // RHS tape drive (T15) + m_ppu->status_w(1); + m_ppu->flag_w(1); + } else { + m_ppu->status_w(0); + m_ppu->flag_w(0); + } +} + static MACHINE_CONFIG_START( hp9845a, hp9845_state ) //MCFG_CPU_ADD("lpu", HP_5061_3010, XTAL_11_4MHz) //MCFG_CPU_ADD("ppu", HP_5061_3011, XTAL_11_4MHz) @@ -60,19 +620,50 @@ static MACHINE_CONFIG_START( hp9835a, hp9845_state ) MCFG_SOFTWARE_LIST_ADD("optrom_list", "hp9835a_rom") MACHINE_CONFIG_END -static MACHINE_CONFIG_START( hp9845b, hp9845_state ) - //MCFG_CPU_ADD("lpu", HP_5061_3001, XTAL_11_4MHz) - //MCFG_CPU_ADD("ppu", HP_5061_3001, XTAL_11_4MHz) +static ADDRESS_MAP_START(global_mem_map , AS_PROGRAM , 16 , hp9845b_state) + ADDRESS_MAP_GLOBAL_MASK(0x3f7fff) + ADDRESS_MAP_UNMAP_LOW + AM_RANGE(0x000000 , 0x007fff) AM_RAM AM_SHARE("lpu_ram") + AM_RANGE(0x014000 , 0x017fff) AM_RAM AM_SHARE("ppu_ram") + AM_RANGE(0x030000 , 0x037fff) AM_ROM AM_REGION("lpu" , 0) + AM_RANGE(0x050000 , 0x057fff) AM_ROM AM_REGION("ppu" , 0) + //AM_RANGE(0x250000 , 0x251fff) AM_ROM AM_REGION("test_rom" , 0) +ADDRESS_MAP_END + +static ADDRESS_MAP_START(ppu_io_map , AS_IO , 16 , hp9845b_state) + ADDRESS_MAP_UNMAP_LOW + // PA = 0, IC = 2 + // Keyboard scancode input + AM_RANGE(HP_MAKE_IOADDR(0 , 2) , HP_MAKE_IOADDR(0 , 2)) AM_READ(kb_scancode_r) + // PA = 0, IC = 3 + // Keyboard status input & keyboard interrupt clear + AM_RANGE(HP_MAKE_IOADDR(0 , 3) , HP_MAKE_IOADDR(0 , 3)) AM_READWRITE(kb_status_r , kb_irq_clear_w) +ADDRESS_MAP_END + +static MACHINE_CONFIG_START( hp9845b, hp9845b_state ) + MCFG_CPU_ADD("lpu", HP_5061_3001, 5700000) + MCFG_CPU_PROGRAM_MAP(global_mem_map) + MCFG_HPHYBRID_SET_9845_BOOT(true) + MCFG_CPU_ADD("ppu", HP_5061_3001, 5700000) + MCFG_CPU_PROGRAM_MAP(global_mem_map) + MCFG_CPU_IO_MAP(ppu_io_map) + MCFG_HPHYBRID_SET_9845_BOOT(true) + MCFG_CPU_IRQ_ACKNOWLEDGE_DRIVER(hp9845b_state , irq_callback) + MCFG_HPHYBRID_PA_CHANGED(WRITE8(hp9845b_state , pa_w)) // video hardware MCFG_SCREEN_ADD("screen", RASTER) - MCFG_SCREEN_UPDATE_DRIVER(hp9845_state, screen_update) - MCFG_SCREEN_REFRESH_RATE(60) - MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500)) - MCFG_SCREEN_SIZE(560, 455) - MCFG_SCREEN_VISIBLE_AREA(0, 560-1, 0, 455-1) + MCFG_SCREEN_UPDATE_DRIVER(hp9845b_state, screen_update) + MCFG_SCREEN_RAW_PARAMS(20849400 , 99 * 9 , 0 , 80 * 9 , 26 * 15 , 0 , 25 * 15) + MCFG_SCREEN_VBLANK_DRIVER(hp9845b_state, vblank_w) + MCFG_PALETTE_ADD_MONOCHROME_GREEN("palette") - MCFG_SOFTWARE_LIST_ADD("optrom_list", "hp9845b_rom") + MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", hp9845b_state, scanline_timer, "screen", 0, 1) + + // Actual keyboard refresh rate should be KEY_SCAN_OSCILLATOR / 128 (2560 Hz) + MCFG_TIMER_DRIVER_ADD_PERIODIC("kb_timer" , hp9845b_state , kb_scan , attotime::from_hz(100)) + + MCFG_SOFTWARE_LIST_ADD("optrom_list", "hp9845b_rom") MACHINE_CONFIG_END ROM_START( hp9845a ) @@ -108,6 +699,21 @@ ROM_END #define rom_hp9835b rom_hp9835a ROM_START( hp9845b ) + ROM_REGION(0x4000 , "test_rom" , ROMREGION_16BIT | ROMREGION_BE) + ROM_LOAD("09845-66520-45_00-Test_ROM.bin" , 0x0000 , 0x2000 , CRC(95a5b299)) + ROM_LOAD("09845-66520-45_10-Test_ROM.bin" , 0x2000 , 0x2000 , CRC(257e4c66)) + + ROM_REGION(0x800 , "chargen" , 0) + // Don't have the real character generator from HP9845, use the one from HP64000 for now + ROM_LOAD("1818_2668.bin" , 0 , 0x800 , BAD_DUMP CRC(32a52664) SHA1(8b2a49a32510103ff424e8481d5ed9887f609f2f)) + + ROM_REGION(0x10000, "lpu", ROMREGION_16BIT | ROMREGION_BE) + ROM_LOAD("9845-LPU-Standard-Processor.bin", 0, 0x10000, CRC(dc266c1b) SHA1(1cf3267f13872fbbfc035b70f8b4ec6b5923f182)) + + ROM_REGION(0x10000, "ppu", ROMREGION_16BIT | ROMREGION_BE) + ROM_LOAD("9845-PPU-Standard-Graphics.bin", 0, 0x10000, CRC(f866510f) SHA1(3e22cd2072e3a5f3603a1eb8477b6b4a198d184d)) + +#if 0 ROM_REGION( 0200000, "lpu", ROMREGION_16BIT | ROMREGION_BE ) ROM_LOAD( "1818-0823-0827-03_00-revb-system_lpu.bin", 0000000, 020000, CRC(7e49c781) SHA1(866c9ebd98d94bb6f99692e29d2d83f55b38c4b6) ) ROM_LOAD( "1818-0823-0827-03_10-revb-system_lpu.bin", 0020000, 020000, CRC(2f819e3d) SHA1(250886378c3ce2253229997007c7bf0be80a8d1d) ) @@ -159,6 +765,7 @@ ROM_START( hp9845b ) ROM_LOAD( "1818-0841-0846-05_20-revd-keyboard_german.bin", 0060000, 020000, CRC(3bf6268a) SHA1(65d7dfeaf34c74dbc86ebe5d3bb65c6bd10163cb) ) ROM_LOAD( "1818-0841-0846-05_30-revc-keyboard_german.bin", 0040000, 020000, CRC(2b83db22) SHA1(6eda714ce05d2d75f4c041e36b6b6df40697d94a) ) ROM_LOAD( "1818-0841-0846-05_30-revd-keyboard_german.bin", 0060000, 020000, CRC(b4006959) SHA1(584a85f746a3b0c262fdf9e4be8e696c80cfd429) ) +#endif ROM_END #define rom_hp9845t rom_hp9845b @@ -168,6 +775,6 @@ COMP( 1978, hp9845a, 0, 0, hp9845a, hp9845, driver_device, 0, COMP( 1978, hp9845s, hp9845a, 0, hp9845a, hp9845, driver_device, 0, "Hewlett-Packard", "9845S", MACHINE_IS_SKELETON | MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) COMP( 1979, hp9835a, 0, 0, hp9835a, hp9845, driver_device, 0, "Hewlett-Packard", "9835A", MACHINE_IS_SKELETON | MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) COMP( 1979, hp9835b, hp9835a, 0, hp9835a, hp9845, driver_device, 0, "Hewlett-Packard", "9835B", MACHINE_IS_SKELETON | MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) -COMP( 1980, hp9845b, 0, 0, hp9845b, hp9845, driver_device, 0, "Hewlett-Packard", "9845B", MACHINE_IS_SKELETON | MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) +COMP( 1980, hp9845b, 0, 0, hp9845b, hp9845b,driver_device, 0, "Hewlett-Packard", "9845B", MACHINE_NO_SOUND ) COMP( 1980, hp9845t, hp9845b, 0, hp9845b, hp9845, driver_device, 0, "Hewlett-Packard", "9845T", MACHINE_IS_SKELETON | MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) COMP( 1981, hp9845c, hp9845b, 0, hp9845b, hp9845, driver_device, 0, "Hewlett-Packard", "9845C", MACHINE_IS_SKELETON | MACHINE_NOT_WORKING | MACHINE_NO_SOUND )