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https://github.com/holub/mame
synced 2025-04-23 00:39:36 +03:00
emupal.c: Support palette RAM less than the full width of the data bus it's on,
without the need for per-driver trampolines. Started removing said trampolines. [Alex Jackson] (nw) This fixes generic_paletteram regressions in simpl156.c and tmnt.c. Just a couple left now.
This commit is contained in:
Alex W. Jackson
parent
1ee0b92325
commit
4bfc3aa3e8
@ -25,6 +25,7 @@ palette_device::palette_device(const machine_config &mconfig, const char *tag, d
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m_indirect_entries(0),
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m_enable_shadows(0),
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m_enable_hilights(0),
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m_membits_supplied(false),
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m_endianness_supplied(false),
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m_raw_to_rgb(raw_to_rgb_converter()),
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m_palette(NULL),
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@ -53,6 +54,14 @@ void palette_device::static_set_format(device_t &device, raw_to_rgb_converter ra
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}
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void palette_device::static_set_membits(device_t &device, int membits)
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{
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palette_device &palette = downcast<palette_device &>(device);
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palette.m_membits = membits;
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palette.m_membits_supplied = true;
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}
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void palette_device::static_set_endianness(device_t &device, endianness_t endianness)
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{
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palette_device &palette = downcast<palette_device &>(device);
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@ -432,11 +441,21 @@ void palette_device::device_start()
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m_paletteram_ext.set(*share_ext, bytes_per_entry / 2);
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}
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// override membits if provided
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if (m_membits_supplied)
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{
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// forcing width only makes sense when narrower than the native bus width
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assert_always(m_membits < share->width(), "Improper use of MCFG_PALETTE_MEMBITS");
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m_paletteram.set_membits(m_membits);
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if (share_ext != NULL)
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m_paletteram_ext.set_membits(m_membits);
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}
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// override endianness if provided
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if (m_endianness_supplied)
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{
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// forcing endianness only makes sense when the RAM is narrower than the palette format and not split
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assert(share_ext == NULL && share->width() / 8 < bytes_per_entry);
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assert_always((share_ext == NULL && m_paletteram.membits() / 8 < bytes_per_entry), "Improper use of MCFG_PALETTE_ENDIANNESS");
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m_paletteram.set_endianness(m_endianness);
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}
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}
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@ -561,7 +580,7 @@ void palette_device::allocate_palette()
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m_shadow_group = numgroups++;
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if (m_enable_hilights)
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m_hilight_group = numgroups++;
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assert_always(m_entries * numgroups <= 65536, "Error: palette has more than 65536 colors.");
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assert_always(m_entries * numgroups <= 65536, "Palette has more than 65536 colors.");
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// allocate a palette object containing all the colors and groups
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m_palette = palette_t::alloc(m_entries, numgroups);
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@ -180,6 +180,9 @@
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#define MCFG_PALETTE_FORMAT(_format) \
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palette_device::static_set_format(*device, PALETTE_FORMAT_##_format);
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#define MCFG_PALETTE_MEMBITS(_width) \
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palette_device::static_set_membits(*device, _width);
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#define MCFG_PALETTE_ENDIANNESS(_endianness) \
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palette_device::static_set_endianness(*device, _endianness);
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@ -322,6 +325,7 @@ public:
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// static configuration
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static void static_set_init(device_t &device, palette_init_delegate init);
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static void static_set_format(device_t &device, raw_to_rgb_converter raw_to_rgb);
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static void static_set_membits(device_t &device, int membits);
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static void static_set_endianness(device_t &device, endianness_t endianness);
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static void static_set_entries(device_t &device, int entries);
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static void static_set_indirect_entries(device_t &device, int entries);
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@ -414,8 +418,10 @@ private:
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int m_indirect_entries; // number of indirect colors in the palette
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bool m_enable_shadows; // are shadows enabled?
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bool m_enable_hilights; // are hilights enabled?
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endianness_t m_endianness; // endianness of palette RAM
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bool m_endianness_supplied; // endianness supplied in static config
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int m_membits; // width of palette RAM, if different from native
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bool m_membits_supplied; // true if membits forced in static config
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endianness_t m_endianness; // endianness of palette RAM, if different from native
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bool m_endianness_supplied; // true if endianness forced in static config
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// palette RAM
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raw_to_rgb_converter m_raw_to_rgb; // format of palette RAM
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@ -99,9 +99,24 @@ void memory_array::set(const memory_share &share, int bpe)
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set(share.ptr(), share.bytes(), share.width(), share.endianness(), bpe);
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}
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void memory_array::set(const memory_array &helper)
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void memory_array::set(const memory_array &array)
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{
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set(helper.base(), helper.bytes(), helper.membits(), helper.endianness(), helper.bytes_per_entry());
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set(array.base(), array.bytes(), array.membits(), array.endianness(), array.bytes_per_entry());
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}
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//-------------------------------------------------
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// piecewise configuration
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//-------------------------------------------------
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void memory_array::set_membits(int membits)
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{
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set(m_base, m_bytes, membits, m_endianness, m_bytes_per_entry);
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}
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void memory_array::set_endianness(endianness_t endianness)
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{
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set(m_base, m_bytes, m_membits, endianness, m_bytes_per_entry);
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}
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@ -118,8 +133,8 @@ void memory_array::write8_to_16le(int index, UINT32 data) { reinterpret_cast<UIN
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UINT32 memory_array::read8_from_16be(int index) { return reinterpret_cast<UINT8 *>(m_base)[BYTE_XOR_BE(index)]; }
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void memory_array::write8_to_16be(int index, UINT32 data) { reinterpret_cast<UINT8 *>(m_base)[BYTE_XOR_BE(index)] = data; }
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UINT32 memory_array::read8_from_32le(int index) { return reinterpret_cast<UINT8 *>(m_base)[BYTE4_XOR_BE(index)]; }
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void memory_array::write8_to_32le(int index, UINT32 data) { reinterpret_cast<UINT8 *>(m_base)[BYTE4_XOR_BE(index)] = data; }
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UINT32 memory_array::read8_from_32le(int index) { return reinterpret_cast<UINT8 *>(m_base)[BYTE4_XOR_LE(index)]; }
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void memory_array::write8_to_32le(int index, UINT32 data) { reinterpret_cast<UINT8 *>(m_base)[BYTE4_XOR_LE(index)] = data; }
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UINT32 memory_array::read8_from_32be(int index) { return reinterpret_cast<UINT8 *>(m_base)[BYTE4_XOR_BE(index)]; }
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void memory_array::write8_to_32be(int index, UINT32 data) { reinterpret_cast<UINT8 *>(m_base)[BYTE4_XOR_BE(index)] = data; }
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@ -58,7 +58,8 @@ public:
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void set(const memory_array &array);
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// piecewise configuration
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void set_endianness(endianness_t endianness) { set(m_base, m_bytes, m_membits, endianness, m_bytes_per_entry); }
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void set_membits(int membits);
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void set_endianness(endianness_t endianness);
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// getters
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void *base() const { return m_base; }
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@ -290,7 +290,7 @@ static ADDRESS_MAP_START( main_map, AS_PROGRAM, 32, beathead_state)
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AM_RANGE(0x41000500, 0x41000503) AM_WRITE(eeprom_enable_w)
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AM_RANGE(0x41000600, 0x41000603) AM_WRITE(finescroll_w)
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AM_RANGE(0x41000700, 0x41000703) AM_WRITE(watchdog_reset32_w)
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AM_RANGE(0x42000000, 0x4201ffff) AM_RAM_WRITE(palette_w) AM_SHARE("paletteram")
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AM_RANGE(0x42000000, 0x4201ffff) AM_DEVREADWRITE16("palette", palette_device, read, write, 0x0000ffff) AM_SHARE("palette")
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AM_RANGE(0x43000000, 0x43000007) AM_READWRITE(hsync_ram_r, hsync_ram_w)
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AM_RANGE(0x8df80000, 0x8df80003) AM_READNOP /* noisy x4 during scanline int */
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AM_RANGE(0x8f380000, 0x8f3fffff) AM_WRITE(vram_latch_w)
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@ -379,6 +379,8 @@ static MACHINE_CONFIG_START( beathead, beathead_state )
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MCFG_SCREEN_PALETTE("palette")
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MCFG_PALETTE_ADD("palette", 32768)
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MCFG_PALETTE_FORMAT(IRRRRRGGGGGBBBBB)
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MCFG_PALETTE_MEMBITS(16)
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/* sound hardware */
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MCFG_SPEAKER_STANDARD_MONO("mono")
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@ -23,8 +23,8 @@
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The DECO 156 is a 32-bit custom encrypted ARM5 chip connected to
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16-bit hardware only ROM and System Work Ram is accessed via all
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32 data lines we should throw away the MSB for other accesses
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16-bit hardware. Only ROM and System Work RAM is accessed via all
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32 data lines.
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Info from Charles MacDonald:
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@ -52,7 +52,7 @@
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000000-00FFFF : Main RAM (16K)
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010000-01FFFF : Sprite RAM (8K)
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020000-02FFFF : Palette RAM (4K)
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030000-03FFFF : simpl156_system_r / simpl156_eeprom_w
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030000-03FFFF : Read player inputs, write EEPROM and OKI banking
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040000-04FFFF : PF1,2 control registers
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050000-05FFFF : PF1,2 name tables
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060000-06FFFF : PF1,2 row scroll
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@ -102,8 +102,8 @@ static INPUT_PORTS_START( simpl156 )
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PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_SERVICE1 )
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PORT_SERVICE_NO_TOGGLE( 0x0008, IP_ACTIVE_LOW )
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PORT_BIT( 0x0080, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_VBLANK("screen") // all bits? check..
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PORT_BIT( 0x0100, IP_ACTIVE_HIGH, IPT_SPECIAL ) // eeprom?..
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PORT_BIT( 0x0100, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_READ_LINE_DEVICE_MEMBER("eeprom", eeprom_serial_93cxx_device, do_read)
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PORT_BIT( 0xffff0000, IP_ACTIVE_LOW, IPT_UNUSED )
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PORT_START("IN1")
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PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY PORT_PLAYER(1)
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@ -122,48 +122,10 @@ static INPUT_PORTS_START( simpl156 )
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PORT_BIT( 0x2000, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(2)
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PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(2)
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PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_START2 )
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PORT_BIT( 0xffff0000, IP_ACTIVE_LOW, IPT_UNUSED )
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INPUT_PORTS_END
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READ32_MEMBER(simpl156_state::simpl156_inputs_read)
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{
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int eep = m_eeprom->do_read();
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UINT32 returndata = ioport("IN0")->read() ^ 0xffff0000;
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returndata ^= ((eep << 8));
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return returndata;
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}
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READ32_MEMBER(simpl156_state::simpl156_palette_r)
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{
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return m_generic_paletteram_16[offset]^0xffff0000;
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}
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WRITE32_MEMBER(simpl156_state::simpl156_palette_w)
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{
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UINT16 dat;
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int color;
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data &= 0x0000ffff;
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mem_mask &= 0x0000ffff;
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COMBINE_DATA(&m_generic_paletteram_16[offset]);
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color = offset;
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dat = m_generic_paletteram_16[offset] & 0xffff;
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m_palette->set_pen_color(color,pal5bit(dat >> 0),pal5bit(dat >> 5),pal5bit(dat >> 10));
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}
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READ32_MEMBER(simpl156_state::simpl156_system_r)
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{
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UINT32 returndata;
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returndata = ioport("IN1")->read();
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return returndata;
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}
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WRITE32_MEMBER(simpl156_state::simpl156_eeprom_w)
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{
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//int okibank;
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@ -237,11 +199,12 @@ WRITE32_MEMBER(simpl156_state::simpl156_pf2_rowscroll_w)
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/* Joe and Mac Returns */
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static ADDRESS_MAP_START( joemacr_map, AS_PROGRAM, 32, simpl156_state )
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ADDRESS_MAP_UNMAP_HIGH
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AM_RANGE(0x000000, 0x07ffff) AM_ROM
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AM_RANGE(0x100000, 0x107fff) AM_READWRITE(simpl156_mainram_r, simpl156_mainram_w) AM_SHARE("mainram") // main ram
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AM_RANGE(0x110000, 0x111fff) AM_READWRITE(simpl156_spriteram_r, simpl156_spriteram_w)
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AM_RANGE(0x120000, 0x120fff) AM_READWRITE(simpl156_palette_r, simpl156_palette_w)
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AM_RANGE(0x130000, 0x130003) AM_READWRITE(simpl156_system_r, simpl156_eeprom_w)
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AM_RANGE(0x120000, 0x120fff) AM_DEVREADWRITE16("palette", palette_device, read, write, 0x0000ffff) AM_SHARE("palette")
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AM_RANGE(0x130000, 0x130003) AM_READ_PORT("IN1") AM_WRITE(simpl156_eeprom_w)
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AM_RANGE(0x140000, 0x14001f) AM_DEVREADWRITE("tilegen1", deco16ic_device, pf_control_dword_r, pf_control_dword_w)
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AM_RANGE(0x150000, 0x151fff) AM_DEVREADWRITE("tilegen1", deco16ic_device, pf1_data_dword_r, pf1_data_dword_w)
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AM_RANGE(0x152000, 0x153fff) AM_DEVREADWRITE("tilegen1", deco16ic_device, pf1_data_dword_r, pf1_data_dword_w)
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@ -251,21 +214,22 @@ static ADDRESS_MAP_START( joemacr_map, AS_PROGRAM, 32, simpl156_state )
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AM_RANGE(0x170000, 0x170003) AM_READONLY AM_WRITENOP // ?
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AM_RANGE(0x180000, 0x180003) AM_DEVREADWRITE8("okisfx", okim6295_device, read, write, 0x000000ff)
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AM_RANGE(0x1c0000, 0x1c0003) AM_DEVREADWRITE8("okimusic", okim6295_device, read, write, 0x000000ff)
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AM_RANGE(0x200000, 0x200003) AM_READ(simpl156_inputs_read)
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AM_RANGE(0x200000, 0x200003) AM_READ_PORT("IN0")
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AM_RANGE(0x201000, 0x201fff) AM_RAM AM_SHARE("systemram") // work ram (32-bit)
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ADDRESS_MAP_END
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/* Chain Reaction */
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static ADDRESS_MAP_START( chainrec_map, AS_PROGRAM, 32, simpl156_state )
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ADDRESS_MAP_UNMAP_HIGH
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AM_RANGE(0x000000, 0x07ffff) AM_ROM // rom (32-bit)
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AM_RANGE(0x200000, 0x200003) AM_READ(simpl156_inputs_read)
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AM_RANGE(0x200000, 0x200003) AM_READ_PORT("IN0")
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AM_RANGE(0x201000, 0x201fff) AM_RAM AM_SHARE("systemram") // work ram (32-bit)
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AM_RANGE(0x3c0000, 0x3c0003) AM_DEVREADWRITE8("okimusic", okim6295_device, read, write, 0x000000ff)
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AM_RANGE(0x400000, 0x407fff) AM_READWRITE(simpl156_mainram_r, simpl156_mainram_w) AM_SHARE("mainram") // main ram?
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AM_RANGE(0x410000, 0x411fff) AM_READWRITE(simpl156_spriteram_r, simpl156_spriteram_w)
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AM_RANGE(0x420000, 0x420fff) AM_READWRITE(simpl156_palette_r,simpl156_palette_w)
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AM_RANGE(0x430000, 0x430003) AM_READWRITE(simpl156_system_r,simpl156_eeprom_w)
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AM_RANGE(0x420000, 0x420fff) AM_DEVREADWRITE16("palette", palette_device, read, write, 0x0000ffff) AM_SHARE("palette")
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AM_RANGE(0x430000, 0x430003) AM_READ_PORT("IN1") AM_WRITE(simpl156_eeprom_w)
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AM_RANGE(0x440000, 0x44001f) AM_DEVREADWRITE("tilegen1", deco16ic_device, pf_control_dword_r, pf_control_dword_w)
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AM_RANGE(0x450000, 0x451fff) AM_DEVREADWRITE("tilegen1", deco16ic_device, pf1_data_dword_r, pf1_data_dword_w)
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AM_RANGE(0x452000, 0x453fff) AM_DEVREADWRITE("tilegen1", deco16ic_device, pf1_data_dword_r, pf1_data_dword_w)
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@ -279,14 +243,15 @@ ADDRESS_MAP_END
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/* Magical Drop */
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static ADDRESS_MAP_START( magdrop_map, AS_PROGRAM, 32, simpl156_state )
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ADDRESS_MAP_UNMAP_HIGH
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AM_RANGE(0x000000, 0x07ffff) AM_ROM
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AM_RANGE(0x200000, 0x200003) AM_READ(simpl156_inputs_read)
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AM_RANGE(0x200000, 0x200003) AM_READ_PORT("IN0")
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AM_RANGE(0x201000, 0x201fff) AM_RAM AM_SHARE("systemram") // work ram (32-bit)
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AM_RANGE(0x340000, 0x340003) AM_DEVREADWRITE8("okimusic", okim6295_device, read, write, 0x000000ff)
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AM_RANGE(0x380000, 0x387fff) AM_READWRITE(simpl156_mainram_r, simpl156_mainram_w) AM_SHARE("mainram") // main ram?
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AM_RANGE(0x390000, 0x391fff) AM_READWRITE(simpl156_spriteram_r, simpl156_spriteram_w)
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AM_RANGE(0x3a0000, 0x3a0fff) AM_READWRITE(simpl156_palette_r,simpl156_palette_w)
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AM_RANGE(0x3b0000, 0x3b0003) AM_READWRITE(simpl156_system_r,simpl156_eeprom_w)
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AM_RANGE(0x3a0000, 0x3a0fff) AM_DEVREADWRITE16("palette", palette_device, read, write, 0x0000ffff) AM_SHARE("palette")
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AM_RANGE(0x3b0000, 0x3b0003) AM_READ_PORT("IN1") AM_WRITE(simpl156_eeprom_w)
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AM_RANGE(0x3c0000, 0x3c001f) AM_DEVREADWRITE("tilegen1", deco16ic_device, pf_control_dword_r, pf_control_dword_w)
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AM_RANGE(0x3d0000, 0x3d1fff) AM_DEVREADWRITE("tilegen1", deco16ic_device, pf1_data_dword_r, pf1_data_dword_w)
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AM_RANGE(0x3d2000, 0x3d3fff) AM_DEVREADWRITE("tilegen1", deco16ic_device, pf1_data_dword_r, pf1_data_dword_w)
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@ -300,14 +265,15 @@ ADDRESS_MAP_END
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/* Magical Drop Plus 1 */
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static ADDRESS_MAP_START( magdropp_map, AS_PROGRAM, 32, simpl156_state )
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ADDRESS_MAP_UNMAP_HIGH
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AM_RANGE(0x000000, 0x07ffff) AM_ROM
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AM_RANGE(0x200000, 0x200003) AM_READ(simpl156_inputs_read)
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AM_RANGE(0x200000, 0x200003) AM_READ_PORT("IN0")
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AM_RANGE(0x201000, 0x201fff) AM_RAM AM_SHARE("systemram") // work ram (32-bit)
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AM_RANGE(0x4c0000, 0x4c0003) AM_DEVREADWRITE8("okimusic", okim6295_device, read, write, 0x000000ff)
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AM_RANGE(0x680000, 0x687fff) AM_READWRITE(simpl156_mainram_r, simpl156_mainram_w) AM_SHARE("mainram") // main ram?
|
||||
AM_RANGE(0x690000, 0x691fff) AM_READWRITE(simpl156_spriteram_r, simpl156_spriteram_w)
|
||||
AM_RANGE(0x6a0000, 0x6a0fff) AM_READWRITE(simpl156_palette_r,simpl156_palette_w)
|
||||
AM_RANGE(0x6b0000, 0x6b0003) AM_READWRITE(simpl156_system_r,simpl156_eeprom_w)
|
||||
AM_RANGE(0x6a0000, 0x6a0fff) AM_DEVREADWRITE16("palette", palette_device, read, write, 0x0000ffff) AM_SHARE("palette")
|
||||
AM_RANGE(0x6b0000, 0x6b0003) AM_READ_PORT("IN1") AM_WRITE(simpl156_eeprom_w)
|
||||
AM_RANGE(0x6c0000, 0x6c001f) AM_DEVREADWRITE("tilegen1", deco16ic_device, pf_control_dword_r, pf_control_dword_w)
|
||||
AM_RANGE(0x6d0000, 0x6d1fff) AM_DEVREADWRITE("tilegen1", deco16ic_device, pf1_data_dword_r, pf1_data_dword_w)
|
||||
AM_RANGE(0x6d2000, 0x6d3fff) AM_DEVREADWRITE("tilegen1", deco16ic_device, pf1_data_dword_r, pf1_data_dword_w)
|
||||
@ -321,13 +287,14 @@ ADDRESS_MAP_END
|
||||
|
||||
/* Mitchell MT5601-0 PCB (prtytime, charlien, osman) */
|
||||
static ADDRESS_MAP_START( mitchell156_map, AS_PROGRAM, 32, simpl156_state )
|
||||
ADDRESS_MAP_UNMAP_HIGH
|
||||
AM_RANGE(0x000000, 0x07ffff) AM_ROM
|
||||
AM_RANGE(0x100000, 0x100003) AM_DEVREADWRITE8("okisfx", okim6295_device, read, write, 0x000000ff)
|
||||
AM_RANGE(0x140000, 0x140003) AM_DEVREADWRITE8("okimusic", okim6295_device, read, write, 0x000000ff)
|
||||
AM_RANGE(0x180000, 0x187fff) AM_READWRITE(simpl156_mainram_r, simpl156_mainram_w) AM_SHARE("mainram") // main ram
|
||||
AM_RANGE(0x190000, 0x191fff) AM_READWRITE(simpl156_spriteram_r, simpl156_spriteram_w)
|
||||
AM_RANGE(0x1a0000, 0x1a0fff) AM_READWRITE(simpl156_palette_r,simpl156_palette_w)
|
||||
AM_RANGE(0x1b0000, 0x1b0003) AM_READWRITE(simpl156_system_r,simpl156_eeprom_w)
|
||||
AM_RANGE(0x1a0000, 0x1a0fff) AM_DEVREADWRITE16("palette", palette_device, read, write, 0x0000ffff) AM_SHARE("palette")
|
||||
AM_RANGE(0x1b0000, 0x1b0003) AM_READ_PORT("IN1") AM_WRITE(simpl156_eeprom_w)
|
||||
AM_RANGE(0x1c0000, 0x1c001f) AM_DEVREADWRITE("tilegen1", deco16ic_device, pf_control_dword_r, pf_control_dword_w)
|
||||
AM_RANGE(0x1d0000, 0x1d1fff) AM_DEVREADWRITE("tilegen1", deco16ic_device, pf1_data_dword_r, pf1_data_dword_w)
|
||||
AM_RANGE(0x1d2000, 0x1d3fff) AM_DEVREADWRITE("tilegen1", deco16ic_device, pf1_data_dword_r, pf1_data_dword_w)
|
||||
@ -335,7 +302,7 @@ static ADDRESS_MAP_START( mitchell156_map, AS_PROGRAM, 32, simpl156_state )
|
||||
AM_RANGE(0x1e0000, 0x1e1fff) AM_READWRITE(simpl156_pf1_rowscroll_r, simpl156_pf1_rowscroll_w)
|
||||
AM_RANGE(0x1e4000, 0x1e5fff) AM_READWRITE(simpl156_pf2_rowscroll_r, simpl156_pf2_rowscroll_w)
|
||||
AM_RANGE(0x1f0000, 0x1f0003) AM_READONLY AM_WRITENOP // ?
|
||||
AM_RANGE(0x200000, 0x200003) AM_READ(simpl156_inputs_read)
|
||||
AM_RANGE(0x200000, 0x200003) AM_READ_PORT("IN0")
|
||||
AM_RANGE(0x201000, 0x201fff) AM_RAM AM_SHARE("systemram") // work ram (32-bit)
|
||||
ADDRESS_MAP_END
|
||||
|
||||
@ -425,6 +392,9 @@ static MACHINE_CONFIG_START( chainrec, simpl156_state )
|
||||
MCFG_SCREEN_PALETTE("palette")
|
||||
|
||||
MCFG_PALETTE_ADD("palette", 4096)
|
||||
MCFG_PALETTE_FORMAT(xBBBBBGGGGGRRRRR)
|
||||
MCFG_PALETTE_MEMBITS(16)
|
||||
|
||||
MCFG_GFXDECODE_ADD("gfxdecode", "palette", simpl156)
|
||||
|
||||
MCFG_DEVICE_ADD("tilegen1", DECO16IC, 0)
|
||||
|
||||
@ -262,7 +262,7 @@ static ADDRESS_MAP_START( roundup5_v30_map, AS_PROGRAM, 16, tatsumi_state )
|
||||
AM_RANGE(0x0d800, 0x0d801) AM_WRITEONLY AM_SHARE("ru5_unknown1") // VRAM2 X scroll (todo)
|
||||
AM_RANGE(0x0dc00, 0x0dc01) AM_WRITEONLY AM_SHARE("ru5_unknown2") // VRAM2 Y scroll (todo)
|
||||
AM_RANGE(0x0e000, 0x0e001) AM_WRITE(roundup5_control_w)
|
||||
AM_RANGE(0x0f000, 0x0ffff) AM_RAM_WRITE(roundup5_palette_w) AM_SHARE("paletteram")
|
||||
AM_RANGE(0x0f000, 0x0ffff) AM_DEVREADWRITE8("palette", palette_device, read, write, 0x00ff) AM_SHARE("palette")
|
||||
AM_RANGE(0x10000, 0x1ffff) AM_READWRITE(roundup_v30_z80_r, roundup_v30_z80_w)
|
||||
AM_RANGE(0x20000, 0x2ffff) AM_READWRITE(tatsumi_v30_68000_r, tatsumi_v30_68000_w)
|
||||
AM_RANGE(0x30000, 0x3ffff) AM_READWRITE(roundup5_vram_r, roundup5_vram_w)
|
||||
@ -892,6 +892,14 @@ static MACHINE_CONFIG_START( apache3, tatsumi_state )
|
||||
MCFG_PALETTE_ADD("palette", 1024 + 4096) /* 1024 real colours, and 4096 arranged as series of cluts */
|
||||
MCFG_PALETTE_FORMAT(xRRRRRGGGGGBBBBB)
|
||||
|
||||
/* apache 3 schematics state
|
||||
bit 4: 250
|
||||
bit 3: 500
|
||||
bit 2: 1k
|
||||
bit 1: 2k
|
||||
bit 0: 3.9kOhm resistor
|
||||
*/
|
||||
|
||||
MCFG_VIDEO_START_OVERRIDE(tatsumi_state,apache3)
|
||||
|
||||
/* sound hardware */
|
||||
@ -933,6 +941,8 @@ static MACHINE_CONFIG_START( roundup5, tatsumi_state )
|
||||
MCFG_GFXDECODE_ADD("gfxdecode", "palette", roundup5)
|
||||
MCFG_PALETTE_ADD("palette", 1024 + 4096) /* 1024 real colours, and 4096 arranged as series of cluts */
|
||||
MCFG_PALETTE_FORMAT(xRRRRRGGGGGBBBBB)
|
||||
MCFG_PALETTE_MEMBITS(8)
|
||||
MCFG_PALETTE_ENDIANNESS(ENDIANNESS_BIG)
|
||||
|
||||
MCFG_VIDEO_START_OVERRIDE(tatsumi_state,roundup5)
|
||||
|
||||
|
||||
@ -478,7 +478,7 @@ static ADDRESS_MAP_START( cuebrick_main_map, AS_PROGRAM, 16, tmnt_state )
|
||||
AM_RANGE(0x000000, 0x01ffff) AM_ROM
|
||||
AM_RANGE(0x040000, 0x043fff) AM_RAM /* main RAM */
|
||||
AM_RANGE(0x060000, 0x063fff) AM_RAM /* main RAM */
|
||||
AM_RANGE(0x080000, 0x080fff) AM_RAM_WRITE(tmnt_paletteram_word_w) AM_SHARE("paletteram")
|
||||
AM_RANGE(0x080000, 0x080fff) AM_DEVREADWRITE8("palette", palette_device, read, write, 0x00ff) AM_SHARE("palette")
|
||||
AM_RANGE(0x0a0000, 0x0a0001) AM_READ_PORT("COINS") AM_WRITE(tmnt_0a0000_w)
|
||||
AM_RANGE(0x0a0002, 0x0a0003) AM_READ_PORT("P1")
|
||||
AM_RANGE(0x0a0004, 0x0a0005) AM_READ_PORT("P2")
|
||||
@ -498,7 +498,7 @@ static ADDRESS_MAP_START( mia_main_map, AS_PROGRAM, 16, tmnt_state )
|
||||
AM_RANGE(0x000000, 0x03ffff) AM_ROM
|
||||
AM_RANGE(0x040000, 0x043fff) AM_RAM /* main RAM */
|
||||
AM_RANGE(0x060000, 0x063fff) AM_RAM /* main RAM */
|
||||
AM_RANGE(0x080000, 0x080fff) AM_RAM_WRITE(tmnt_paletteram_word_w) AM_SHARE("paletteram")
|
||||
AM_RANGE(0x080000, 0x080fff) AM_DEVREADWRITE8("palette", palette_device, read, write, 0x00ff) AM_SHARE("palette")
|
||||
AM_RANGE(0x0a0000, 0x0a0001) AM_READ_PORT("COINS") AM_WRITE(tmnt_0a0000_w)
|
||||
AM_RANGE(0x0a0002, 0x0a0003) AM_READ_PORT("P1")
|
||||
AM_RANGE(0x0a0004, 0x0a0005) AM_READ_PORT("P2")
|
||||
@ -519,7 +519,7 @@ ADDRESS_MAP_END
|
||||
static ADDRESS_MAP_START( tmnt_main_map, AS_PROGRAM, 16, tmnt_state )
|
||||
AM_RANGE(0x000000, 0x05ffff) AM_ROM
|
||||
AM_RANGE(0x060000, 0x063fff) AM_RAM /* main RAM */
|
||||
AM_RANGE(0x080000, 0x080fff) AM_RAM_WRITE(tmnt_paletteram_word_w) AM_SHARE("paletteram")
|
||||
AM_RANGE(0x080000, 0x080fff) AM_DEVREADWRITE8("palette", palette_device, read, write, 0x00ff) AM_SHARE("palette")
|
||||
AM_RANGE(0x0a0000, 0x0a0001) AM_READ_PORT("COINS") AM_WRITE(tmnt_0a0000_w)
|
||||
AM_RANGE(0x0a0002, 0x0a0003) AM_READ_PORT("P1")
|
||||
AM_RANGE(0x0a0004, 0x0a0005) AM_READ_PORT("P2")
|
||||
@ -2126,6 +2126,7 @@ static MACHINE_CONFIG_START( cuebrick, tmnt_state )
|
||||
|
||||
MCFG_PALETTE_ADD("palette", 1024)
|
||||
MCFG_PALETTE_FORMAT(xBBBBBGGGGGRRRRR)
|
||||
MCFG_PALETTE_MEMBITS(8)
|
||||
MCFG_PALETTE_ENABLE_SHADOWS()
|
||||
MCFG_PALETTE_ENABLE_HILIGHTS()
|
||||
|
||||
@ -2175,6 +2176,7 @@ static MACHINE_CONFIG_START( mia, tmnt_state )
|
||||
|
||||
MCFG_PALETTE_ADD("palette", 1024)
|
||||
MCFG_PALETTE_FORMAT(xBBBBBGGGGGRRRRR)
|
||||
MCFG_PALETTE_MEMBITS(8)
|
||||
MCFG_PALETTE_ENABLE_SHADOWS()
|
||||
MCFG_PALETTE_ENABLE_HILIGHTS()
|
||||
|
||||
@ -2235,6 +2237,7 @@ static MACHINE_CONFIG_START( tmnt, tmnt_state )
|
||||
|
||||
MCFG_PALETTE_ADD("palette", 1024)
|
||||
MCFG_PALETTE_FORMAT(xBBBBBGGGGGRRRRR)
|
||||
MCFG_PALETTE_MEMBITS(8)
|
||||
MCFG_PALETTE_ENABLE_SHADOWS()
|
||||
MCFG_PALETTE_ENABLE_HILIGHTS()
|
||||
|
||||
|
||||
@ -177,7 +177,7 @@ static ADDRESS_MAP_START( main_map, AS_PROGRAM, 16, twin16_state )
|
||||
AM_RANGE(0x040000, 0x043fff) AM_RAM AM_SHARE("comram")
|
||||
// AM_RANGE(0x044000, 0x04ffff) AM_NOP // miaj
|
||||
AM_RANGE(0x060000, 0x063fff) AM_RAM
|
||||
AM_RANGE(0x080000, 0x080fff) AM_RAM_WRITE(twin16_paletteram_word_w) AM_SHARE("paletteram")
|
||||
AM_RANGE(0x080000, 0x080fff) AM_DEVREADWRITE8("palette", palette_device, read, write, 0x00ff) AM_SHARE("palette")
|
||||
AM_RANGE(0x081000, 0x081fff) AM_WRITENOP
|
||||
AM_RANGE(0x0a0000, 0x0a0001) AM_READ_PORT("SYSTEM") AM_WRITE(twin16_CPUA_register_w)
|
||||
AM_RANGE(0x0a0002, 0x0a0003) AM_READ_PORT("P1")
|
||||
@ -214,7 +214,7 @@ static ADDRESS_MAP_START( fround_map, AS_PROGRAM, 16, twin16_state )
|
||||
AM_RANGE(0x000000, 0x03ffff) AM_ROM
|
||||
AM_RANGE(0x040000, 0x043fff) AM_RAM AM_SHARE("comram")
|
||||
AM_RANGE(0x060000, 0x063fff) AM_RAM
|
||||
AM_RANGE(0x080000, 0x080fff) AM_RAM_WRITE(twin16_paletteram_word_w) AM_SHARE("paletteram")
|
||||
AM_RANGE(0x080000, 0x080fff) AM_DEVREADWRITE8("palette", palette_device, read, write, 0x00ff) AM_SHARE("palette")
|
||||
AM_RANGE(0x0a0000, 0x0a0001) AM_READ_PORT("SYSTEM") AM_WRITE(fround_CPU_register_w)
|
||||
AM_RANGE(0x0a0002, 0x0a0003) AM_READ_PORT("P1")
|
||||
AM_RANGE(0x0a0004, 0x0a0005) AM_READ_PORT("P2")
|
||||
@ -677,6 +677,8 @@ static MACHINE_CONFIG_START( twin16, twin16_state )
|
||||
MCFG_GFXDECODE_ADD("gfxdecode", "palette", twin16)
|
||||
|
||||
MCFG_PALETTE_ADD("palette", 0x400)
|
||||
MCFG_PALETTE_FORMAT(xBBBBBGGGGGRRRRR)
|
||||
MCFG_PALETTE_MEMBITS(8)
|
||||
MCFG_PALETTE_ENABLE_SHADOWS()
|
||||
|
||||
MCFG_VIDEO_START_OVERRIDE(twin16_state,twin16)
|
||||
@ -730,6 +732,8 @@ static MACHINE_CONFIG_START( fround, twin16_state )
|
||||
MCFG_GFXDECODE_ADD("gfxdecode", "palette", twin16)
|
||||
|
||||
MCFG_PALETTE_ADD("palette", 0x400)
|
||||
MCFG_PALETTE_FORMAT(xBBBBBGGGGGRRRRR)
|
||||
MCFG_PALETTE_MEMBITS(8)
|
||||
MCFG_PALETTE_ENABLE_SHADOWS()
|
||||
|
||||
MCFG_VIDEO_START_OVERRIDE(twin16_state,twin16)
|
||||
|
||||
@ -19,7 +19,6 @@ public:
|
||||
m_jsa(*this, "jsa"),
|
||||
m_nvram(*this, "nvram"),
|
||||
m_videoram(*this, "videoram"),
|
||||
m_paletteram(*this, "paletteram"),
|
||||
m_vram_bulk_latch(*this, "vram_bulk_latch"),
|
||||
m_palette_select(*this, "palette_select"),
|
||||
m_ram_base(*this, "ram_base"),
|
||||
@ -37,7 +36,6 @@ public:
|
||||
required_shared_ptr<UINT32> m_nvram;
|
||||
|
||||
required_shared_ptr<UINT32> m_videoram;
|
||||
required_shared_ptr<UINT32> m_paletteram;
|
||||
|
||||
required_shared_ptr<UINT32> m_vram_bulk_latch;
|
||||
required_shared_ptr<UINT32> m_palette_select;
|
||||
@ -83,7 +81,6 @@ public:
|
||||
DECLARE_WRITE32_MEMBER( vram_latch_w );
|
||||
DECLARE_WRITE32_MEMBER( vram_copy_w );
|
||||
DECLARE_WRITE32_MEMBER( finescroll_w );
|
||||
DECLARE_WRITE32_MEMBER( palette_w );
|
||||
DECLARE_READ32_MEMBER( hsync_ram_r );
|
||||
DECLARE_WRITE32_MEMBER( hsync_ram_w );
|
||||
DECLARE_DRIVER_INIT(beathead);
|
||||
|
||||
@ -21,9 +21,7 @@ public:
|
||||
m_mainram(*this, "mainram"),
|
||||
m_systemram(*this, "systemram"),
|
||||
m_sprgen(*this, "spritegen"),
|
||||
m_palette(*this, "palette"),
|
||||
m_generic_paletteram_16(*this, "paletteram")
|
||||
{ }
|
||||
m_palette(*this, "palette") { }
|
||||
|
||||
/* devices */
|
||||
required_device<cpu_device> m_maincpu;
|
||||
@ -37,16 +35,11 @@ public:
|
||||
required_shared_ptr<UINT32> m_systemram;
|
||||
optional_device<decospr_device> m_sprgen;
|
||||
required_device<palette_device> m_palette;
|
||||
required_shared_ptr<UINT16> m_generic_paletteram_16;
|
||||
UINT16 *m_spriteram;
|
||||
size_t m_spriteram_size;
|
||||
DECO16IC_BANK_CB_MEMBER(bank_callback);
|
||||
DECOSPR_PRIORITY_CB_MEMBER(pri_callback);
|
||||
|
||||
DECLARE_READ32_MEMBER(simpl156_inputs_read);
|
||||
DECLARE_READ32_MEMBER(simpl156_palette_r);
|
||||
DECLARE_WRITE32_MEMBER(simpl156_palette_w);
|
||||
DECLARE_READ32_MEMBER(simpl156_system_r);
|
||||
DECLARE_WRITE32_MEMBER(simpl156_eeprom_w);
|
||||
DECLARE_READ32_MEMBER(simpl156_spriteram_r);
|
||||
DECLARE_WRITE32_MEMBER(simpl156_spriteram_w);
|
||||
|
||||
@ -30,8 +30,7 @@ public:
|
||||
m_subcpu2(*this, "sub2"),
|
||||
m_oki(*this, "oki"),
|
||||
m_gfxdecode(*this, "gfxdecode"),
|
||||
m_palette(*this, "palette"),
|
||||
m_generic_paletteram_16(*this, "paletteram") { }
|
||||
m_palette(*this, "palette") { }
|
||||
|
||||
optional_shared_ptr<UINT16> m_videoram;
|
||||
optional_shared_ptr<UINT16> m_cyclwarr_cpua_ram;
|
||||
@ -111,7 +110,6 @@ public:
|
||||
DECLARE_WRITE8_MEMBER(apache3_road_x_w);
|
||||
DECLARE_READ16_MEMBER(roundup5_vram_r);
|
||||
DECLARE_WRITE16_MEMBER(roundup5_vram_w);
|
||||
DECLARE_WRITE16_MEMBER(roundup5_palette_w);
|
||||
DECLARE_WRITE16_MEMBER(roundup5_text_w);
|
||||
DECLARE_READ16_MEMBER(cyclwarr_videoram0_r);
|
||||
DECLARE_READ16_MEMBER(cyclwarr_videoram1_r);
|
||||
@ -144,7 +142,6 @@ public:
|
||||
required_device<okim6295_device> m_oki;
|
||||
required_device<gfxdecode_device> m_gfxdecode;
|
||||
required_device<palette_device> m_palette;
|
||||
optional_shared_ptr<UINT16> m_generic_paletteram_16;
|
||||
};
|
||||
|
||||
/*----------- defined in machine/tatsumi.c -----------*/
|
||||
|
||||
@ -39,15 +39,13 @@ public:
|
||||
m_upd7759(*this, "upd"),
|
||||
m_samples(*this, "samples"),
|
||||
m_gfxdecode(*this, "gfxdecode"),
|
||||
m_palette(*this, "palette"),
|
||||
m_generic_paletteram_16(*this, "paletteram") { }
|
||||
m_palette(*this, "palette") { }
|
||||
|
||||
/* memory pointers */
|
||||
optional_shared_ptr<UINT16> m_spriteram;
|
||||
optional_shared_ptr<UINT16> m_tmnt2_rom;
|
||||
optional_shared_ptr<UINT16> m_sunset_104000;
|
||||
optional_shared_ptr<UINT16> m_tmnt2_1c0800;
|
||||
// UINT16 * m_paletteram; // currently this uses generic palette handling
|
||||
|
||||
/* video-related */
|
||||
int m_layer_colorbase[3];
|
||||
@ -90,7 +88,6 @@ public:
|
||||
optional_device<samples_device> m_samples;
|
||||
required_device<gfxdecode_device> m_gfxdecode;
|
||||
required_device<palette_device> m_palette;
|
||||
required_shared_ptr<UINT16> m_generic_paletteram_16;
|
||||
|
||||
/* memory buffers */
|
||||
INT16 m_sampledata[0x40000];
|
||||
@ -125,7 +122,6 @@ public:
|
||||
DECLARE_WRITE16_MEMBER(tmnt2_1c0800_w);
|
||||
DECLARE_READ8_MEMBER(k054539_ctrl_r);
|
||||
DECLARE_WRITE8_MEMBER(k054539_ctrl_w);
|
||||
DECLARE_WRITE16_MEMBER(tmnt_paletteram_word_w);
|
||||
DECLARE_WRITE16_MEMBER(tmnt_0a0000_w);
|
||||
DECLARE_WRITE16_MEMBER(punkshot_0a0020_w);
|
||||
DECLARE_WRITE16_MEMBER(lgtnfght_0a0018_w);
|
||||
|
||||
@ -19,8 +19,7 @@ public:
|
||||
m_upd7759(*this, "upd"),
|
||||
m_gfxdecode(*this, "gfxdecode"),
|
||||
m_screen(*this, "screen"),
|
||||
m_palette(*this, "palette"),
|
||||
m_generic_paletteram_16(*this, "paletteram") { }
|
||||
m_palette(*this, "palette") { }
|
||||
|
||||
required_device<buffered_spriteram16_device> m_spriteram;
|
||||
required_shared_ptr<UINT16> m_text_ram;
|
||||
@ -47,7 +46,6 @@ public:
|
||||
DECLARE_WRITE16_MEMBER(twin16_CPUB_register_w);
|
||||
DECLARE_WRITE16_MEMBER(fround_CPU_register_w);
|
||||
DECLARE_WRITE16_MEMBER(twin16_text_ram_w);
|
||||
DECLARE_WRITE16_MEMBER(twin16_paletteram_word_w);
|
||||
DECLARE_WRITE16_MEMBER(fround_gfx_bank_w);
|
||||
DECLARE_WRITE16_MEMBER(twin16_video_register_w);
|
||||
DECLARE_READ16_MEMBER(twin16_sprite_status_r);
|
||||
@ -79,7 +77,6 @@ public:
|
||||
required_device<gfxdecode_device> m_gfxdecode;
|
||||
required_device<screen_device> m_screen;
|
||||
required_device<palette_device> m_palette;
|
||||
required_shared_ptr<UINT16> m_generic_paletteram_16;
|
||||
};
|
||||
|
||||
class cuebrickj_state : public twin16_state
|
||||
|
||||
@ -97,23 +97,6 @@ WRITE32_MEMBER( beathead_state::finescroll_w )
|
||||
|
||||
|
||||
|
||||
/*************************************
|
||||
*
|
||||
* Palette handling
|
||||
*
|
||||
*************************************/
|
||||
|
||||
WRITE32_MEMBER( beathead_state::palette_w )
|
||||
{
|
||||
int newword = COMBINE_DATA(&m_paletteram[offset]);
|
||||
int r = ((newword >> 9) & 0x3e) | ((newword >> 15) & 0x01);
|
||||
int g = ((newword >> 4) & 0x3e) | ((newword >> 15) & 0x01);
|
||||
int b = ((newword << 1) & 0x3e) | ((newword >> 15) & 0x01);
|
||||
m_palette->set_pen_color(offset, pal6bit(r), pal6bit(g), pal6bit(b));
|
||||
}
|
||||
|
||||
|
||||
|
||||
/*************************************
|
||||
*
|
||||
* HSYNC RAM handling
|
||||
|
||||
@ -13,7 +13,6 @@ void simpl156_state::video_start()
|
||||
m_pf1_rowscroll = auto_alloc_array_clear(machine(), UINT16, 0x800/2);
|
||||
m_pf2_rowscroll = auto_alloc_array_clear(machine(), UINT16, 0x800/2);
|
||||
m_spriteram = auto_alloc_array_clear(machine(), UINT16, 0x2000/2);
|
||||
m_generic_paletteram_16.allocate(0x1000/2);
|
||||
|
||||
memset(m_spriteram, 0xff, 0x2000);
|
||||
|
||||
|
||||
@ -46,39 +46,6 @@ WRITE16_MEMBER(tatsumi_state::roundup5_vram_w)
|
||||
m_gfxdecode->gfx(1)->mark_dirty(offset/0x10);
|
||||
}
|
||||
|
||||
|
||||
WRITE16_MEMBER(tatsumi_state::roundup5_palette_w)
|
||||
{
|
||||
// static int hack=0;
|
||||
int word;
|
||||
|
||||
COMBINE_DATA(&m_generic_paletteram_16[offset]);
|
||||
|
||||
// if (offset==0xbfe)
|
||||
// hack++;
|
||||
|
||||
// if (hack>1)
|
||||
// return;
|
||||
|
||||
/*
|
||||
apache 3 schematics state
|
||||
|
||||
bit 4: 250
|
||||
bit 3: 500
|
||||
bit 2: 1k
|
||||
bit 1: 2k
|
||||
bit 0: 3.9kOhm resistor
|
||||
|
||||
*/
|
||||
|
||||
// logerror("PAL: %04x %02x\n",offset,data);
|
||||
|
||||
offset&=~1;
|
||||
word = ((m_generic_paletteram_16[offset] & 0xff)<<8) | (m_generic_paletteram_16[offset+1] & 0xff);
|
||||
m_palette->set_pen_color(offset/2,pal5bit(word >> 10),pal5bit(word >> 5),pal5bit(word >> 0));
|
||||
}
|
||||
|
||||
|
||||
WRITE16_MEMBER(tatsumi_state::roundup5_text_w)
|
||||
{
|
||||
UINT16 *videoram = m_videoram;
|
||||
|
||||
@ -301,17 +301,6 @@ VIDEO_START_MEMBER(tmnt_state,blswhstl)
|
||||
|
||||
***************************************************************************/
|
||||
|
||||
WRITE16_MEMBER(tmnt_state::tmnt_paletteram_word_w)
|
||||
{
|
||||
COMBINE_DATA(m_generic_paletteram_16 + offset);
|
||||
offset &= ~1;
|
||||
|
||||
data = (m_generic_paletteram_16[offset] << 8) | m_generic_paletteram_16[offset + 1];
|
||||
m_palette->set_pen_color(offset / 2, pal5bit(data >> 0), pal5bit(data >> 5), pal5bit(data >> 10));
|
||||
}
|
||||
|
||||
|
||||
|
||||
WRITE16_MEMBER(tmnt_state::tmnt_0a0000_w)
|
||||
{
|
||||
if (ACCESSING_BITS_0_7)
|
||||
|
||||
@ -46,15 +46,6 @@ WRITE16_MEMBER(twin16_state::twin16_text_ram_w)
|
||||
m_text_tilemap->mark_tile_dirty(offset);
|
||||
}
|
||||
|
||||
WRITE16_MEMBER(twin16_state::twin16_paletteram_word_w)
|
||||
{ // identical to tmnt_paletteram_w
|
||||
COMBINE_DATA(m_generic_paletteram_16 + offset);
|
||||
offset &= ~1;
|
||||
|
||||
data = ((m_generic_paletteram_16[offset] & 0xff) << 8) | (m_generic_paletteram_16[offset + 1] & 0xff);
|
||||
m_palette->set_pen_color(offset / 2, pal5bit(data >> 0), pal5bit(data >> 5), pal5bit(data >> 10));
|
||||
}
|
||||
|
||||
WRITE16_MEMBER(twin16_state::fround_gfx_bank_w)
|
||||
{
|
||||
COMBINE_DATA(&m_gfx_bank);
|
||||
|
||||
Loading…
Reference in New Issue
Block a user