From 4c14baf3259fda1ff981e4f4b965a002074a927d Mon Sep 17 00:00:00 2001 From: AJR Date: Sun, 1 Dec 2019 18:06:00 -0500 Subject: [PATCH] dp8344: SHL uses a bit count of 0-7, not 1-8 (nw) --- src/devices/cpu/bcp/bcpdasm.cpp | 2 +- src/devices/cpu/bcp/dp8344.cpp | 3 ++- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/src/devices/cpu/bcp/bcpdasm.cpp b/src/devices/cpu/bcp/bcpdasm.cpp index c9754d3d568..ddcaec55829 100644 --- a/src/devices/cpu/bcp/bcpdasm.cpp +++ b/src/devices/cpu/bcp/bcpdasm.cpp @@ -387,7 +387,7 @@ offs_t dp8344_disassembler::disassemble(std::ostream &stream, offs_t pc, const d // C900-C9FF: SHL Rsd,b (2 T-states) util::stream_format(stream, "%-8s", "shl"); format_register(stream, inst & 0x001f); - util::stream_format(stream, ",%d", 8 - ((inst & 0x00e0) >> 5)); + util::stream_format(stream, ",%d", (inst & 0x00e0) == 0 ? 0 : 8 - ((inst & 0x00e0) >> 5)); break; case 0xa00: case 0xa80: diff --git a/src/devices/cpu/bcp/dp8344.cpp b/src/devices/cpu/bcp/dp8344.cpp index dcdfa9901ad..2f3c0e6c83e 100644 --- a/src/devices/cpu/bcp/dp8344.cpp +++ b/src/devices/cpu/bcp/dp8344.cpp @@ -1653,7 +1653,8 @@ void dp8344_device::store_result() case 0x900: set_carry(BIT(m_source_data, (m_latched_instr & 0x00e0) >> 5)); - m_source_data <<= 8 - ((m_latched_instr & 0x00e0) >> 5); + if ((m_latched_instr & 0x00e0) != 0) + m_source_data <<= 8 - ((m_latched_instr & 0x00e0) >> 5); set_nz(m_source_data); write_register(m_latched_instr & 0x001f, m_source_data); break;