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bus/pci: PowerVR Neon 250 stub
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e5b401ef36
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@ -5643,6 +5643,8 @@ if (BUSES["PCI"]~=null) then
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MAME_DIR .. "src/devices/bus/pci/mga2064w.h",
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MAME_DIR .. "src/devices/bus/pci/ncr53c825.cpp",
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MAME_DIR .. "src/devices/bus/pci/ncr53c825.h",
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MAME_DIR .. "src/devices/bus/pci/neon250.cpp",
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MAME_DIR .. "src/devices/bus/pci/neon250.h",
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MAME_DIR .. "src/devices/bus/pci/oti_spitfire.cpp",
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MAME_DIR .. "src/devices/bus/pci/oti_spitfire.h",
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MAME_DIR .. "src/devices/bus/pci/opti82c861.cpp",
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188
src/devices/bus/pci/neon250.cpp
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188
src/devices/bus/pci/neon250.cpp
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@ -0,0 +1,188 @@
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// license:BSD-3-Clause
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// copyright-holders:
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/**************************************************************************************************
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VideoLogic PowerVR Neon 250
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TODO:
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- stub device;
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- detects 0Kb of RAM in SDD test, plays with pvr_io_map $54 (IIC Interface B);
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**************************************************************************************************/
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#include "emu.h"
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#include "neon250.h"
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#define LOG_WARN (1U << 1)
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#define LOG_TODO (1U << 2) // log unimplemented registers
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#define VERBOSE (LOG_GENERAL | LOG_WARN | LOG_TODO)
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//#define LOG_OUTPUT_FUNC osd_printf_info
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#include "logmacro.h"
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#define LOGWARN(...) LOGMASKED(LOG_WARN, __VA_ARGS__)
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#define LOGTODO(...) LOGMASKED(LOG_TODO, __VA_ARGS__)
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DEFINE_DEVICE_TYPE(NEON250, neon250_device, "neon250", "VideoLogic PowerVR Neon 250 (PMX1)")
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neon250_device::neon250_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock)
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: pci_card_device(mconfig, type, tag, owner, clock)
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, m_svga(*this, "svga")
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, m_vga_rom(*this, "vga_rom")
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{
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// PowerVR Neon 250 AGP (NEC branded)
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set_ids_agp(0x10330067, 0x02, 0x10100120);
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}
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neon250_device::neon250_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
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: neon250_device(mconfig, NEON250, tag, owner, clock)
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{
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}
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ROM_START( neon250 )
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ROM_REGION32_LE( 0x20000, "vga_rom", ROMREGION_ERASEFF )
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ROM_SYSTEM_BIOS( 0, "neon250", "NEC Neon 250" )
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ROMX_LOAD( "n0020331.bin", 0x000000, 0x20000, CRC(e76008f5) SHA1(1ddda1494d5b32148e2c9e7a6557f00ee9cffea6), ROM_BIOS(0) )
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// ROMX_LOAD( "ppvr201i.bin", 0x000000, 0x10000, CRC(b6e763c9) SHA1(1e1fecbb663dde5295a9db98dde70a4e1bd8338d), ROM_BIOS(0) )
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// ROMX_LOAD( "b1002816.bin", 0x000000, 0x10000, CRC(d3cf607a) SHA1(8fea7c3e678bc585ed5729d7f1a4b203bae8d15d), ROM_BIOS(0) )
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// from VGA Legacy MkIII, bad
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// ROMX_LOAD( "neon250agp.vbi", 0x000000, 0x009200, CRC(41a46c28) SHA1(f99482b906436d9b1db25e68de5a2bc96a192128) BAD_DUMP, ROM_BIOS(0) )
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ROM_END
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const tiny_rom_entry *neon250_device::device_rom_region() const
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{
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return ROM_NAME(neon250);
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}
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void neon250_device::device_add_mconfig(machine_config &config)
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{
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screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER));
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screen.set_raw(XTAL(25'174'800), 900, 0, 640, 526, 0, 480);
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screen.set_screen_update(m_svga, FUNC(vga_device::screen_update));
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// TODO: PVR "VGA Emulator"
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VGA(config, m_svga, 0);
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m_svga->set_screen("screen");
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m_svga->set_vram_size(32*1024*1024);
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}
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void neon250_device::device_start()
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{
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pci_card_device::device_start();
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add_map( 64*1024*1024, M_MEM | M_PREF, FUNC(neon250_device::pvr_fb_map));
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add_map( 16*1024, M_MEM | M_PREF, FUNC(neon250_device::pvr_mmio_map));
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add_map( 128*1024, M_MEM | M_PREF, FUNC(neon250_device::vga_fb_map));
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add_map( 2*1024, M_MEM, FUNC(neon250_device::vga_mmio_map));
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// not indicated, assume no-pref again
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add_map( 256, M_IO, FUNC(neon250_device::pvr_io_map));
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add_rom((u8 *)m_vga_rom->base(), 128*1024 );
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expansion_rom_base = 0xc0000;
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// INTA#
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intr_pin = 1;
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}
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void neon250_device::device_reset()
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{
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pci_card_device::device_reset();
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command = 0x0000;
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// can VGA palette snoop, can MWI (bit 4)
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command_mask = 0x0037;
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// medium DEVSELB + fast back to back + new cap support
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// can set AGP bit 5
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status = 0x0290;
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remap_cb();
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}
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u8 neon250_device::capptr_r()
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{
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return 0x60;
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}
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void neon250_device::config_map(address_map &map)
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{
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pci_device::config_map(map);
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// AGP
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map(0x40, 0x43).lr32(NAME([] { return 0x0010'0002; }));
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// AGP 1x & 2x + SBA + 31 RQ
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map(0x44, 0x47).lr32(NAME([] { return 0x1f00'0203; }));
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// map(0x4c, 0x4d) Discard Timer
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// map(0x50, 0x50) 16T Timer
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// map(0x54, 0x54) 8T Timer
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// map(0x58, 0x59) SSVIDW
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// map(0x5a, 0x5b) Subsystem Control
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// map(0x5c, 0x5d) SSDEVW
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// Power management
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// PCI PM 1.0 compliant + Device Specific Init (DSI) + D1 & D2 support
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// TODO: disables capptr if AGP is unset
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map(0x60, 0x63).lr32(NAME([] { return 0x0621'4001; }));
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// map(0x70, 0x71) AGP PLL Control
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// map(0x72, 0x73) Core PLL Control
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}
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void neon250_device::pvr_fb_map(address_map &map)
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{
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}
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void neon250_device::pvr_mmio_map(address_map &map)
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{
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}
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void neon250_device::pvr_io_map(address_map &map)
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{
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}
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void neon250_device::vga_fb_map(address_map &map)
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{
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}
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void neon250_device::vga_mmio_map(address_map &map)
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{
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}
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// TODO: this should really be a subclass of VGA
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void neon250_device::legacy_memory_map(address_map &map)
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{
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map(0xa0000, 0xbffff).rw(FUNC(neon250_device::vram_r), FUNC(neon250_device::vram_w));
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}
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void neon250_device::legacy_io_map(address_map &map)
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{
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map(0, 0x02f).m(m_svga, FUNC(vga_device::io_map));
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}
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uint8_t neon250_device::vram_r(offs_t offset)
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{
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return downcast<vga_device *>(m_svga.target())->mem_r(offset);
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}
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void neon250_device::vram_w(offs_t offset, uint8_t data)
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{
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downcast<vga_device *>(m_svga.target())->mem_w(offset, data);
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}
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void neon250_device::map_extra(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space,
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uint64_t io_window_start, uint64_t io_window_end, uint64_t io_offset, address_space *io_space)
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{
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if (command & 7)
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{
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memory_space->install_readwrite_handler(0xa0000, 0xbffff, read8sm_delegate(*this, FUNC(neon250_device::vram_r)), write8sm_delegate(*this, FUNC(neon250_device::vram_w)));
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io_space->install_device(0x03b0, 0x03df, *this, &neon250_device::legacy_io_map);
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//memory_space->install_rom(0xc0000, 0xcffff, (void *)expansion_rom);
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}
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}
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54
src/devices/bus/pci/neon250.h
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54
src/devices/bus/pci/neon250.h
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@ -0,0 +1,54 @@
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// license:BSD-3-Clause
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// copyright-holders:
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#ifndef MAME_VIDEO_NEON250_H
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#define MAME_VIDEO_NEON250_H
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#pragma once
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#include "pci_slot.h"
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#include "video/pc_vga.h"
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class neon250_device : public pci_card_device
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{
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public:
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neon250_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
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void legacy_memory_map(address_map &map);
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void legacy_io_map(address_map &map);
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protected:
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neon250_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
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virtual void device_start() override;
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virtual void device_reset() override;
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virtual void device_add_mconfig(machine_config &config) override;
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virtual const tiny_rom_entry *device_rom_region() const override;
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virtual void map_extra(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space,
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uint64_t io_window_start, uint64_t io_window_end, uint64_t io_offset, address_space *io_space) override;
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virtual void config_map(address_map &map) override;
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required_device<vga_device> m_svga;
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required_memory_region m_vga_rom;
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virtual u8 capptr_r() override;
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// bool m_vga_legacy_enable = false;
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private:
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u8 vram_r(offs_t offset);
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void vram_w(offs_t offset, uint8_t data);
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void pvr_fb_map(address_map &map);
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void pvr_mmio_map(address_map &map);
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void pvr_io_map(address_map &map);
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void vga_fb_map(address_map &map);
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void vga_mmio_map(address_map &map);
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};
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DECLARE_DEVICE_TYPE(NEON250, neon250_device)
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#endif // MAME_VIDEO_NEON250_H
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@ -15,6 +15,7 @@
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#include "geforce.h"
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#include "mga2064w.h"
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#include "ncr53c825.h"
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#include "neon250.h"
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#include "opti82c861.h"
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#include "oti_spitfire.h"
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#include "pdc20262.h"
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@ -164,6 +165,7 @@ void pci_cards(device_slot_interface &device)
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// assume all natively with class code 03
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void agp_cards(device_slot_interface &device)
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{
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// nVidia
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device.option_add("riva128", RIVA128);
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device.option_add("riva128zx", RIVA128ZX);
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device.option_add("rivatnt", RIVATNT);
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@ -174,6 +176,10 @@ void agp_cards(device_slot_interface &device)
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device.option_add("geforce256", GEFORCE256);
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device.option_add("geforce256_ddr", GEFORCE256_DDR);
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device.option_add("quadro", QUADRO);
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// Cirrus Logic
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device.option_add("laguna3d", GD5465_LAGUNA3D);
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// PowerVR VideoLogic
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device.option_add("neon250", NEON250);
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// SiS
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device.option_add("sis6326_agp", SIS6326_AGP);
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}
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@ -1,6 +1,6 @@
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// license: BSD-3-Clause
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// copyright-holders: Angelo Salese, AJR
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/***************************************************************************************************
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/**************************************************************************************************
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Another World (c) 1989 Sunwise
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@ -8,13 +8,14 @@ TODO:
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- Identify irq sources ($24 timer, $26 VBLANK?, $20 or $22 quadrature encoder);
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- Z80DMA never sends a ready signal, workaround by forcing is_ready fn to 1;
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- Verify data ROM bank;
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- Complete inputs: cabinet shows 3 buttons and a trackball;
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- Sound i/f not fully understood:
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\- no irq from CTC, hooking up YM irq in daisy chain will fail device validation;
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\- sound ROMs mainly decodes as regular 8-bit DAC, mono, 8000 Hz.
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\- Denote they ends abruptly towards the end (bad ROMs?).
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\- is output connected to CTC ZC0 / ZC1 as DAC1BIT?
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====================================================================================================
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===================================================================================================
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TOP BOARD (S-8808A)
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=========
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@ -44,7 +45,7 @@ video output
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5x 5816 RAM
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18 MHz osc
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***************************************************************************************************/
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**************************************************************************************************/
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#include "emu.h"
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