From 4c913c8641eceabfec0f3b2d67ac272d23e0d5ba Mon Sep 17 00:00:00 2001 From: angelosa Date: Sat, 7 Oct 2017 03:32:45 +0200 Subject: [PATCH] MT #06697 or: How I Learned to Stop Worrying and Love the Odd bit (nw) --- src/devices/video/stvvdp2.cpp | 18 +++++++----------- src/mame/drivers/saturn.cpp | 1 + src/mame/drivers/stv.cpp | 1 + src/mame/includes/saturn.h | 1 + src/mame/machine/saturn.cpp | 3 +++ 5 files changed, 13 insertions(+), 11 deletions(-) diff --git a/src/devices/video/stvvdp2.cpp b/src/devices/video/stvvdp2.cpp index 75d8dba5b84..51a7075ce7a 100644 --- a/src/devices/video/stvvdp2.cpp +++ b/src/devices/video/stvvdp2.cpp @@ -6000,22 +6000,16 @@ uint8_t saturn_state::get_vblank( void ) return 0; } -// TODO: seabass explicitly wants this bit to be 0 when screen is disabled from bios to game transition, assume following disp bit. -// this is actually wrong for finlarch/sasissu/magzun so it needs to be tested on real HW. uint8_t saturn_state::get_odd_bit( void ) { if(STV_VDP2_HRES & 4) //exclusive monitor mode makes this bit to be always 1 return 1; - if(STV_VDP2_LSMD == 0) // same for non-interlace mode - { - if((STV_VDP2_HRES & 1) == 0) - return STV_VDP2_DISP; - - return 1; - } - - return machine().first_screen()->frame_number() & 1; +// TODO: seabass explicitly wants this bit to be 0 when screen is disabled from bios to game transition. +// But the documentation claims that "non-interlaced" mode is always 1. +// grdforce tests this bit to be 1 from title screen to gameplay, ditto for finlarch/sasissu/magzun. +// Assume documentation is wrong and actually always flip this bit. + return m_vdp2.odd;//machine().first_screen()->frame_number() & 1; } int saturn_state::get_vblank_start_position( void ) @@ -6205,6 +6199,8 @@ void saturn_state::stv_vdp2_dynamic_res_change( void ) int horz_res,vert_res; int vres_mask; + // reset odd bit if a dynamic resolution change occurs, seabass ST-V cares! + m_vdp2.odd = 1; vres_mask = (m_vdp2.pal << 1)|1; //PAL uses mask 3, NTSC uses mask 1 vert_res = d_vres[STV_VDP2_VRES & vres_mask]; diff --git a/src/mame/drivers/saturn.cpp b/src/mame/drivers/saturn.cpp index 1db3046ba4d..836e2e5bc26 100644 --- a/src/mame/drivers/saturn.cpp +++ b/src/mame/drivers/saturn.cpp @@ -711,6 +711,7 @@ MACHINE_START_MEMBER(sat_console_state, saturn) save_pointer(NAME(m_scu_regs.get()), 0x100/4); save_item(NAME(m_en_68k)); save_item(NAME(m_scsp_last_line)); + save_item(NAME(m_vdp2.odd)); machine().add_notifier(MACHINE_NOTIFY_EXIT, machine_notify_delegate(&sat_console_state::stvcd_exit, this)); diff --git a/src/mame/drivers/stv.cpp b/src/mame/drivers/stv.cpp index db2a48b7314..bc5f88c890f 100644 --- a/src/mame/drivers/stv.cpp +++ b/src/mame/drivers/stv.cpp @@ -1296,6 +1296,7 @@ MACHINE_START_MEMBER(stv_state,stv) save_item(NAME(m_port_sel)); save_item(NAME(m_mux_data)); save_item(NAME(m_scsp_last_line)); + save_item(NAME(m_vdp2.odd)); stv_register_protection_savestates(); // machine/stvprot.c diff --git a/src/mame/includes/saturn.h b/src/mame/includes/saturn.h index 410ed46cac7..b5318482293 100644 --- a/src/mame/includes/saturn.h +++ b/src/mame/includes/saturn.h @@ -113,6 +113,7 @@ public: bitmap_rgb32 roz_bitmap[2]; uint8_t dotsel; uint8_t pal; + uint8_t odd; uint16_t h_count; uint16_t v_count; uint8_t exltfg; diff --git a/src/mame/machine/saturn.cpp b/src/mame/machine/saturn.cpp index 0866deebed6..7907f5bfd21 100644 --- a/src/mame/machine/saturn.cpp +++ b/src/mame/machine/saturn.cpp @@ -757,6 +757,8 @@ TIMER_DEVICE_CALLBACK_MEMBER(saturn_state::saturn_scanline) else m_scu.ist |= (IRQ_VBLANK_IN); + // flip odd bit here + m_vdp2.odd ^= 1; /* TODO: when Automatic Draw actually happens? Night Striker S is very fussy on this, and it looks like that VDP1 starts at more or less vblank-in time ... */ video_update_vdp1(); } @@ -958,6 +960,7 @@ WRITE_LINE_MEMBER( saturn_state::system_reset_w ) if(!state) return; + // TODO: actually send a device reset signal to the connected devices /*Only backup ram and SMPC ram are retained after that this command is issued.*/ memset(m_scu_regs.get() ,0x00,0x000100); memset(m_sound_ram,0x00,0x080000);