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ns32000dasm: floating point fixes

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* show floating point register names
* correct floating point immediate lengths
This commit is contained in:
Patrick Mackinlay 2020-10-05 14:36:04 +07:00
parent 1f2cf06ae5
commit 4c95256076
2 changed files with 36 additions and 14 deletions
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47
src/devices/cpu/ns32000/ns32000dasm.cpp
View File

@ -354,6 +354,10 @@ const char *const ns32000_disassembler::PR[] =
{
"UPSR", "DCR", "BPC", "DSR", "CAR", "", "", "", "FP", "SP", "SB", "USP", "CFG", "PSR", "INTBASE", "MOD"
};
const char *const ns32000_disassembler::FP[] =
{
"F0", "F1", "F2", "F3", "F4", "F5", "F6", "F7"
};
int8_t ns32000_disassembler::short2int(uint8_t val)
{
@ -508,7 +512,7 @@ inline std::string ns32000_disassembler::get_reg_list(offs_t &pc, const data_buf
return reg_list;
}
void ns32000_disassembler::stream_gen(std::ostream &stream, u8 gen_addr, u8 op_len, operand_class op_class, offs_t &pc, const data_buffer &opcodes)
void ns32000_disassembler::stream_gen(std::ostream &stream, u8 gen_addr, u8 op_len, operand_class op_class, offs_t &pc, const data_buffer &opcodes, bool fpreg)
{
uint8_t index_byte;
int32_t disp1, disp2;
@ -518,7 +522,7 @@ void ns32000_disassembler::stream_gen(std::ostream &stream, u8 gen_addr, u8 op_l
case 0x00: case 0x01: case 0x02: case 0x03: case 0x04: case 0x05: case 0x06: case 0x07:
/* Register */
if (op_class != operand_class::ADDRESS)
util::stream_format(stream, "%s", R[gen_addr & 0x07]);
util::stream_format(stream, "%s", fpreg ? FP[gen_addr & 0x07] : R[gen_addr & 0x07]);
else
util::stream_format(stream, "(invalid)");
break;
@ -541,20 +545,25 @@ void ns32000_disassembler::stream_gen(std::ostream &stream, u8 gen_addr, u8 op_l
/* Immediate */
if (op_class == operand_class::SOURCE || op_class == operand_class::BITPOS)
{
int64_t imm;
if (op_len == 0)
disp1 = int8_t(opcodes.r8(pc));
imm = int8_t(opcodes.r8(pc));
else if (op_len == 1)
disp1 = int16_t(swapendian_int16(opcodes.r16(pc)));
imm = int16_t(swapendian_int16(opcodes.r16(pc)));
else if (op_len == 3)
imm = int32_t(swapendian_int32(opcodes.r32(pc)));
else
disp1 = swapendian_int32(opcodes.r32(pc));
imm = int64_t(swapendian_int64(opcodes.r64(pc)));
if (op_class == operand_class::BITPOS)
util::stream_format(stream, "$%d", disp1);
util::stream_format(stream, "$%d", imm);
else if (op_len == 0)
util::stream_format(stream, "$0x%02X", uint8_t(disp1));
util::stream_format(stream, "$0x%02X", uint8_t(imm));
else if (op_len == 1)
util::stream_format(stream, "$0x%04X", uint16_t(disp1));
else
util::stream_format(stream, "$0x%08X", disp1);
util::stream_format(stream, "$0x%04X", uint16_t(imm));
else if (op_len == 3)
util::stream_format(stream, "$0x%08X", uint32_t(imm));
else if (op_len == 7)
util::stream_format(stream, "$0x%016X", imm);
pc += op_len + 1;
}
else
@ -850,10 +859,22 @@ offs_t ns32000_disassembler::disassemble(std::ostream &stream, offs_t pc, const
mnemonic = mnemonic_index(Format9[Format9op(opcode)], iType[Format9i(opcode)], fType[Format9f(opcode)]);
switch (Format9op(opcode))
{
case 0x00: case 0x02: case 0x03: case 0x04: case 0x05: case 0x07:
case 0x00:
util::stream_format(stream, "%-8s ", mnemonic);
stream_gen(stream, Format9gen1(opcode), Format9i(opcode), operand_class::SOURCE, pc, opcodes);
util::stream_format(stream, ", ");
stream_gen(stream, Format9gen2(opcode), Format9i(opcode), operand_class::DESTINATION, pc, opcodes, true);
break;
case 0x02: case 0x03:
util::stream_format(stream, "%-8s ", mnemonic);
stream_gen(stream, Format9gen1(opcode), Format9f(opcode) ? 7 : 3, operand_class::SOURCE, pc, opcodes, true);
util::stream_format(stream, ", ");
stream_gen(stream, Format9gen2(opcode), Format9f(opcode) ? 3 : 7, operand_class::DESTINATION, pc, opcodes, true);
break;
case 0x04: case 0x05: case 0x07:
util::stream_format(stream, "%-8s ", mnemonic);
stream_gen(stream, Format9gen1(opcode), Format9f(opcode) ? 3 : 7, operand_class::SOURCE, pc, opcodes, true);
util::stream_format(stream, ", ");
stream_gen(stream, Format9gen2(opcode), Format9i(opcode), operand_class::DESTINATION, pc, opcodes);
break;
case 0x01: case 0x06:
@ -873,9 +894,9 @@ offs_t ns32000_disassembler::disassemble(std::ostream &stream, offs_t pc, const
{
case 0x00: case 0x01: case 0x02: case 0x04: case 0x05 : case 0x08: case 0x0c : case 0x0d:
util::stream_format(stream, "%-8s ", mnemonic);
stream_gen(stream, Format11gen1(opcode), Format11f(opcode), operand_class::SOURCE, pc, opcodes);
stream_gen(stream, Format11gen1(opcode), Format11f(opcode) ? 3 : 7, operand_class::SOURCE, pc, opcodes, true);
util::stream_format(stream, ",");
stream_gen(stream, Format11gen2(opcode), Format11f(opcode), operand_class::DESTINATION, pc, opcodes);
stream_gen(stream, Format11gen2(opcode), Format11f(opcode) ? 3 : 7, operand_class::DESTINATION, pc, opcodes, true);
break;
default: /* Trap */
util::stream_format(stream, "%-8s ", mnemonic);

3
src/devices/cpu/ns32000/ns32000dasm.h
View File

@ -109,6 +109,7 @@ private:
static char const *const R[];
static char const *const M[];
static char const *const PR[];
static char const *const FP[];
std::string mnemonic_index(std::string form, const std::string &itype, const std::string &ftype);
uint8_t opcode_format(uint8_t byte);
@ -119,7 +120,7 @@ private:
static inline std::string get_options(uint8_t opts);
static inline std::string get_reg_list(offs_t &pc, const data_buffer &opcodes, bool reverse);
void stream_gen(std::ostream &stream, u8 gen_addr, u8 op_len, operand_class op_class, offs_t &pc, const data_buffer &opcodes);
void stream_gen(std::ostream &stream, u8 gen_addr, u8 op_len, operand_class op_class, offs_t &pc, const data_buffer &opcodes, bool fpreg = false);
u32 m_base_pc;
};