plygonet.cpp: Polygonet Warriors goes in-game. (#9987) [Ryan Holtz, Phil Bennett, Hydreigon]

More PSAC2 fixes, some K056230 fixes, plus some screen size fixes.
This commit is contained in:
MooglyGuy 2022-06-26 13:27:53 +02:00 committed by GitHub
parent 3e0d0d31a8
commit 4cb331700f
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GPG Key ID: 4AEE18F83AFDEB23
5 changed files with 117 additions and 95 deletions

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@ -17,95 +17,111 @@ TODO: nearly everything
***************************************************************************/
#include "emu.h"
#include "k056230.h"
#define LOG_REG_READS (1 << 1U)
#define LOG_REG_WRITES (1 << 2U)
#define LOG_RAM_READS (1 << 3U)
#define LOG_RAM_WRITES (1 << 4U)
#define LOG_UNKNOWNS (1 << 5U)
#define LOG_ALL (LOG_REG_READS | LOG_REG_WRITES | LOG_RAM_READS | LOG_RAM_WRITES | LOG_UNKNOWNS)
//**************************************************************************
// LIVE DEVICE
//**************************************************************************
#define VERBOSE (0)
#include "logmacro.h"
// device type definition
DEFINE_DEVICE_TYPE(K056230, k056230_device, "k056230", "K056230 LANC")
//-------------------------------------------------
// k056230_device - constructor
//-------------------------------------------------
k056230_device::k056230_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
k056230_device::k056230_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
: device_t(mconfig, K056230, tag, owner, clock)
, m_cpu(*this, finder_base::DUMMY_TAG)
, m_ram(*this, "lanc_ram", 0x800U * 4, ENDIANNESS_BIG)
, m_irq_cb(*this)
{
}
//-------------------------------------------------
// device_start - device-specific startup
//-------------------------------------------------
void k056230_device::device_start()
{
save_item(NAME(m_ram));
m_irq_cb.resolve_safe();
m_irq_state = CLEAR_LINE;
save_item(NAME(m_irq_state));
}
uint8_t k056230_device::read(offs_t offset)
u8 k056230_device::regs_r(offs_t offset)
{
u8 data = 0;
switch (offset)
{
case 0: // Status register
{
return 0x08;
}
data = 0x08;
LOGMASKED(LOG_REG_READS, "%s: regs_r: Status Register: %02x\n", machine().describe_context(), data);
break;
case 1: // CRC Error register
{
return 0x00;
}
data = 0x00;
LOGMASKED(LOG_REG_READS, "%s: regs_r: CRC Error Register: %02x\n", machine().describe_context(), data);
break;
default:
LOGMASKED(LOG_REG_READS, "%s: regs_r: Unknown Register [%02x]: %02x\n", machine().describe_context(), offset, data);
break;
}
// logerror("k056230_r: %d %s\n", offset, machine().describe_context());
return 0;
return data;
}
void k056230_device::write(offs_t offset, uint8_t data)
void k056230_device::regs_w(offs_t offset, u8 data)
{
switch(offset)
switch (offset)
{
case 0: // Mode register
{
LOGMASKED(LOG_REG_WRITES, "%s: regs_w: Mode Register = %02x\n", machine().describe_context(), data);
break;
}
case 1: // Control register
{
if(data & 0x20)
LOGMASKED(LOG_REG_WRITES, "%s: regs_w: Control Register = %02x\n", machine().describe_context(), data);
// TODO: This is a literal translation of the previous device behaviour, and seems pretty likely to be incorrect.
const int old_state = m_irq_state;
if (BIT(data, 5))
{
if (m_cpu)
m_cpu->set_input_line(INPUT_LINE_IRQ2, ASSERT_LINE);
LOGMASKED(LOG_REG_WRITES, "%s: regs_w: Asserting IRQ\n", machine().describe_context());
m_irq_state = ASSERT_LINE;
}
if ((data & 1) == 0)
if (!BIT(data, 0))
{
if (m_cpu)
m_cpu->set_input_line(INPUT_LINE_IRQ2, CLEAR_LINE);
LOGMASKED(LOG_REG_WRITES, "%s: regs_w: Clearing IRQ\n", machine().describe_context());
m_irq_state = CLEAR_LINE;
}
if (old_state != m_irq_state)
{
m_irq_cb(m_irq_state);
}
} break;
break;
}
case 2: // Sub ID register
{
LOGMASKED(LOG_REG_WRITES, "%s: regs_w: Sub ID Register = %02x\n", machine().describe_context(), data);
break;
default:
LOGMASKED(LOG_REG_WRITES | LOG_UNKNOWNS, "%s: regs_w: Unknown Register [%02x] = %02x\n", machine().describe_context(), offset, data);
break;
}
}
// logerror("k056230_w: %d, %02X at %08X\n", offset, data, machine().describe_context());
}
uint32_t k056230_device::lanc_ram_r(offs_t offset, uint32_t mem_mask)
u32 k056230_device::ram_r(offs_t offset, u32 mem_mask)
{
//logerror("LANC_RAM_r: %08X, %08X %s\n", offset, mem_mask, machine().describe_context());
return m_ram[offset & 0x7ff];
const auto lanc_ram = util::big_endian_cast<const u32>(m_ram.target());
u32 data = lanc_ram[offset & 0x7ff];
LOGMASKED(LOG_RAM_READS, "%s: Network RAM read [%04x (%03x)]: %08x & %08x\n", machine().describe_context(), offset << 2, (offset & 0x7ff) << 2, data, mem_mask);
return data;
}
void k056230_device::lanc_ram_w(offs_t offset, uint32_t data, uint32_t mem_mask)
void k056230_device::ram_w(offs_t offset, u32 data, u32 mem_mask)
{
//logerror("LANC_RAM_w: %08X, %08X, %08X %s\n", data, offset, mem_mask, machine().describe_context());
COMBINE_DATA(m_ram + (offset & 0x7ff));
const auto lanc_ram = util::big_endian_cast<u32>(m_ram.target());
LOGMASKED(LOG_RAM_WRITES, "%s: Network RAM write [%04x (%03x)] = %08x & %08x\n", machine().describe_context(), offset << 2, (offset & 0x7ff) << 2, data, mem_mask);
COMBINE_DATA(&lanc_ram[offset & 0x7ff]);
}

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@ -2,7 +2,7 @@
// copyright-holders:Fabio Priuli
/***************************************************************************
Konami 056230
Konami 056230 LAN controller skeleton device
***************************************************************************/
@ -15,29 +15,25 @@ class k056230_device : public device_t
{
public:
// construction/destruction
template <typename T>
k056230_device(const machine_config &mconfig, const char *tag, device_t *owner, T &&cpu_tag)
: k056230_device(mconfig, tag, owner, (uint32_t)0)
{
m_cpu.set_tag(std::forward<T>(cpu_tag));
}
k056230_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock = 0);
k056230_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
auto irq_cb() { return m_irq_cb.bind(); }
uint32_t lanc_ram_r(offs_t offset, uint32_t mem_mask = ~0);
void lanc_ram_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
u32 ram_r(offs_t offset, u32 mem_mask = ~0);
void ram_w(offs_t offset, u32 data, u32 mem_mask = ~0);
uint8_t read(offs_t offset);
void write(offs_t offset, uint8_t data);
u8 regs_r(offs_t offset);
void regs_w(offs_t offset, u8 data);
protected:
// device-level overrides
virtual void device_start() override;
private:
memory_share_creator<u32> m_ram;
required_device<cpu_device> m_cpu;
uint32_t m_ram[0x2000];
devcb_write_line m_irq_cb;
int m_irq_state;
u8 m_ctrl_reg;
};

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@ -482,8 +482,8 @@ void gticlub_state::gticlub_map(address_map &map)
map(0x78080000, 0x7808000f).rw(m_k001006[1], FUNC(k001006_device::read), FUNC(k001006_device::write));
map(0x780c0000, 0x780c0003).rw(m_konppc, FUNC(konppc_device::cgboard_dsp_comm_r_ppc), FUNC(konppc_device::cgboard_dsp_comm_w_ppc));
map(0x7e000000, 0x7e003fff).rw(FUNC(gticlub_state::sysreg_r), FUNC(gticlub_state::sysreg_w));
map(0x7e008000, 0x7e009fff).rw(m_k056230, FUNC(k056230_device::read), FUNC(k056230_device::write));
map(0x7e00a000, 0x7e00bfff).rw(m_k056230, FUNC(k056230_device::lanc_ram_r), FUNC(k056230_device::lanc_ram_w));
map(0x7e008000, 0x7e009fff).rw(m_k056230, FUNC(k056230_device::regs_r), FUNC(k056230_device::regs_w));
map(0x7e00a000, 0x7e00bfff).rw(m_k056230, FUNC(k056230_device::ram_r), FUNC(k056230_device::ram_w));
map(0x7e00c000, 0x7e00c00f).rw(m_k056800, FUNC(k056800_device::host_r), FUNC(k056800_device::host_w));
map(0x7f000000, 0x7f3fffff).rom().region("datarom", 0);
map(0x7f800000, 0x7f9fffff).rom().region("prgrom", 0);
@ -504,8 +504,8 @@ void gticlub_state::hangplt_map(address_map &map)
map(0x78000000, 0x7800ffff).rw(m_konppc, FUNC(konppc_device::cgboard_dsp_shared_r_ppc), FUNC(konppc_device::cgboard_dsp_shared_w_ppc));
map(0x780c0000, 0x780c0003).rw(m_konppc, FUNC(konppc_device::cgboard_dsp_comm_r_ppc), FUNC(konppc_device::cgboard_dsp_comm_w_ppc));
map(0x7e000000, 0x7e003fff).rw(FUNC(gticlub_state::sysreg_r), FUNC(gticlub_state::sysreg_w));
map(0x7e008000, 0x7e009fff).rw(m_k056230, FUNC(k056230_device::read), FUNC(k056230_device::write));
map(0x7e00a000, 0x7e00bfff).rw(m_k056230, FUNC(k056230_device::lanc_ram_r), FUNC(k056230_device::lanc_ram_w));
map(0x7e008000, 0x7e009fff).rw(m_k056230, FUNC(k056230_device::regs_r), FUNC(k056230_device::regs_w));
map(0x7e00a000, 0x7e00bfff).rw(m_k056230, FUNC(k056230_device::ram_r), FUNC(k056230_device::ram_w));
map(0x7e00c000, 0x7e00c00f).rw(m_k056800, FUNC(k056800_device::host_r), FUNC(k056800_device::host_w));
map(0x7f000000, 0x7f3fffff).rom().region("datarom", 0);
map(0x7f800000, 0x7f9fffff).rom().region("prgrom", 0);
@ -868,7 +868,8 @@ void gticlub_state::gticlub(machine_config &config)
m_adc1038->set_input_callback(FUNC(gticlub_state::adc1038_input_callback));
m_adc1038->set_gti_club_hack(true);
K056230(config, m_k056230, "maincpu");
K056230(config, m_k056230);
m_k056230->irq_cb().set_inputline(m_maincpu, INPUT_LINE_IRQ2);
// video hardware
screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER));
@ -948,7 +949,8 @@ void gticlub_state::hangplt(machine_config &config)
ADC1038(config, m_adc1038, 0);
m_adc1038->set_input_callback(FUNC(gticlub_state::adc1038_input_callback));
K056230(config, m_k056230, "maincpu");
K056230(config, m_k056230);
m_k056230->irq_cb().set_inputline(m_maincpu, INPUT_LINE_IRQ2);
VOODOO_1(config, m_voodoo[0], voodoo_1_device::NOMINAL_CLOCK);
m_voodoo[0]->set_fbmem(2);

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@ -69,6 +69,7 @@
#include "cpu/z80/z80.h"
#include "machine/eepromser.h"
#include "machine/k054321.h"
#include "machine/k056230.h"
#include "machine/watchdog.h"
#include "sound/k054539.h"
#include "video/k053936.h"
@ -111,6 +112,7 @@ public:
m_dsp(*this, "dsp"),
m_watchdog(*this, "watchdog"),
m_eeprom(*this, "eeprom"),
m_k056230(*this, "lanc"),
m_k053936(*this, "k053936"),
m_gfxdecode(*this, "gfxdecode"),
m_palette(*this, "palette"),
@ -166,7 +168,6 @@ private:
u32 shared_ram_read(offs_t offset, u32 mem_mask = ~0);
void shared_ram_write(offs_t offset, u32 data, u32 mem_mask = ~0);
void dsp_w_lines(offs_t offset, u32 data, u32 mem_mask = ~0);
u32 network_r();
// DSP handlers
u16 dsp_bootload_r();
@ -193,7 +194,6 @@ private:
// Video handlers
u32 screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
INTERRUPT_GEN_MEMBER(vblank_interrupt);
DECLARE_WRITE_LINE_MEMBER(k054539_nmi_gen);
void ttl_vram_w(offs_t offset, u32 data, u32 mem_mask = ~0);
u32 fix_regs_r(offs_t offset, u32 mem_mask = ~0);
void fix_regs_w(offs_t offset, u32 data, u32 mem_mask = ~0);
@ -204,6 +204,7 @@ private:
// Sound handlers
void sound_ctrl_w(u8 data);
void update_sound_nmi();
DECLARE_WRITE_LINE_MEMBER(k054539_nmi_gen);
template <int PolyPage> void process_polys();
template <int PolyPage> void draw_poly(bitmap_rgb32 &bitmap, const u16 raw_color, const u16 span_ptr, const u16 raw_start, const u16 raw_end);
@ -213,6 +214,9 @@ private:
required_device<dsp56156_device> m_dsp;
required_device<watchdog_timer_device> m_watchdog;
required_device<eeprom_serial_er5911_device> m_eeprom;
required_device<k056230_device> m_k056230;
required_device<k053936_device> m_k053936;
required_device<gfxdecode_device> m_gfxdecode;
required_device<palette_device> m_palette;
@ -254,7 +258,7 @@ private:
// Sound members
u8 m_sound_ctrl;
u8 m_sound_intck;
int m_sound_intck;
// Span drawer management
bitmap_rgb32 m_pla_bitmaps[2];
@ -269,10 +273,10 @@ private:
void polygonet_state::machine_start()
{
m_pla_bitmaps[0].allocate(368, 256);
m_pla_bitmaps[1].allocate(368, 256);
m_plb_bitmaps[0].allocate(368, 256);
m_plb_bitmaps[1].allocate(368, 256);
m_pla_bitmaps[0].allocate(384, 256);
m_pla_bitmaps[1].allocate(384, 256);
m_plb_bitmaps[0].allocate(384, 256);
m_plb_bitmaps[1].allocate(384, 256);
m_sound_bank->configure_entries(0, 8, memregion("audiocpu")->base(), 0x4000);
@ -297,8 +301,8 @@ void polygonet_state::machine_reset()
m_sound_bank->set_entry(0);
m_sys1 = 0;
m_sound_intck = 0;
m_sound_ctrl = 0;
m_sound_intck = 0;
m_dsp_portc = 0;
std::fill(std::begin(m_render_buf_idx), std::end(m_render_buf_idx), 0);
@ -410,10 +414,11 @@ void polygonet_state::sys_w(offs_t offset, u8 data)
// D16 = COIN1 - Coin counter 1
machine().bookkeeping().coin_counter_w(0, data & 1);
machine().bookkeeping().coin_counter_w(1, data & 2);
if (~data & 0x20)
if (BIT(~data, 5))
m_maincpu->set_input_line(M68K_IRQ_5, CLEAR_LINE);
m_sys1 = data;
LOGMASKED(LOG_GENERAL, "sys1 write: %02x\n", data);
break;
default:
@ -521,10 +526,6 @@ void polygonet_state::dsp_w_lines(offs_t offset, u32 data, u32 mem_mask)
// 0x04000000 is the COMBNK line - it switches who has access to the shared RAM - the dsp or the 68020
}
u32 polygonet_state::network_r()
{
return 0x08000000;
}
//-------------------------------------------------
@ -782,7 +783,7 @@ void polygonet_state::draw_poly(bitmap_rgb32 &bitmap, const u16 raw_color, const
for (s16 x = x_start; x <= x_end; x++)
{
const u16 bitmap_x = (u16)(x + 1024) - 832;
if (bitmap_x < 368 && (dst[bitmap_x] & 0xff000000) == 0)
if (bitmap_x < 384 && (dst[bitmap_x] & 0xff000000) == 0)
{
dst[bitmap_x] = color888;
}
@ -907,7 +908,7 @@ u32 polygonet_state::screen_update(screen_device &screen, bitmap_rgb32 &bitmap,
u32 *dst = &bitmap.pix(y, cliprect.min_x);
u32 *src_b = &bitmap_b.pix(y);
u32 *src_a = &bitmap_a.pix(y);
for (int x = 0; x < 368; x++)
for (int x = 0; x < 384; x++)
{
u32 a_pix = *src_a++ & 0x00ffffff;
u32 b_pix = *src_b++ & 0x00ffffff;
@ -946,8 +947,8 @@ void polygonet_state::main_map(address_map &map)
map(0x506000, 0x50600f).rw(FUNC(polygonet_state::dsp_host_interface_r), FUNC(polygonet_state::dsp_host_interface_w));
map(0x540000, 0x540fff).ram().share(m_ttl_vram).w(FUNC(polygonet_state::ttl_vram_w));
map(0x541000, 0x54101f).ram().share(m_fix_regs).rw(FUNC(polygonet_state::fix_regs_r), FUNC(polygonet_state::fix_regs_w));
map(0x580000, 0x5807ff).ram();
map(0x580800, 0x580803).r(FUNC(polygonet_state::network_r)).nopw(); // Network RAM and registers?
map(0x580000, 0x5807ff).rw(m_k056230, FUNC(k056230_device::ram_r), FUNC(k056230_device::ram_w));
map(0x580800, 0x580803).rw(m_k056230, FUNC(k056230_device::regs_r), FUNC(k056230_device::regs_w));
map(0x600000, 0x60000f).m(m_k054321, FUNC(k054321_device::main_map));
map(0x640000, 0x640003).w(FUNC(polygonet_state::sound_irq_w));
map(0x680000, 0x680003).w(m_watchdog, FUNC(watchdog_timer_device::reset32_w));
@ -1017,7 +1018,7 @@ void polygonet_state::sound_ctrl_w(u8 data)
void polygonet_state::update_sound_nmi()
{
if (m_sound_intck) // checking m_sound_ctrl & 0x10 seems logical based on other Konami games, but polynetw doesn't like it?
if (m_sound_intck) // checking m_sound_ctrl & 0x10 seems logical based on other Konami games, but polynetw doesn't like it
m_audiocpu->set_input_line(INPUT_LINE_NMI, ASSERT_LINE);
else
m_audiocpu->set_input_line(INPUT_LINE_NMI, CLEAR_LINE);
@ -1053,16 +1054,20 @@ void polygonet_state::plygonet(machine_config &config)
WATCHDOG_TIMER(config, m_watchdog);
GFXDECODE(config, m_gfxdecode, m_palette, gfx_plygonet);
// Networking hardware
K056230(config, m_k056230);
m_k056230->irq_cb().set_inputline(m_maincpu, M68K_IRQ_3);
// Video hardware
screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER));
screen.set_refresh_hz(60);
screen.set_vblank_time(ATTOSECONDS_IN_USEC(0));
screen.set_size(64*8, 32*8);
screen.set_visarea(64, 64+368-1, 0, 32*8-1);
screen.set_visarea(64, 64+384-1, 0, 32*8-1);
screen.set_screen_update(FUNC(polygonet_state::screen_update));
GFXDECODE(config, m_gfxdecode, m_palette, gfx_plygonet);
PALETTE(config, m_palette).set_format(palette_device::xRGB_888, 32768);
K053936(config, m_k053936, 0);
@ -1099,7 +1104,7 @@ ROM_START( plygonet )
ROMX_LOAD( "305b06.18g", 0x000000, 0x20000, CRC(decd6e42) SHA1(4c23dcb1d68132d3381007096e014ee4b6007086), ROM_GROUPDWORD | ROM_REVERSE )
ROM_REGION32_BE( 0x40000, "gfx2", 0 ) // '936 tiles
ROMX_LOAD( "305b07.20d", 0x000000, 0x40000, CRC(e4320bc3) SHA1(b0bb2dac40d42f97da94516d4ebe29b1c3d77c37), ROM_GROUPDWORD )
ROM_LOAD( "305b07.20d", 0x000000, 0x40000, CRC(e4320bc3) SHA1(b0bb2dac40d42f97da94516d4ebe29b1c3d77c37) )
ROM_REGION( 0x200000, "k054539", 0 ) // Sound data
ROM_LOAD( "305b08.2e", 0x000000, 0x200000, CRC(874607df) SHA1(763b44a80abfbc355bcb9be8bf44373254976019) )
@ -1122,7 +1127,7 @@ ROM_START( polynetw )
ROMX_LOAD( "305a06.18g", 0x000000, 0x020000, CRC(4b9b7e9c) SHA1(8c3c0f1ec7e26fd9552f6da1e6bdd7ff4453ba57), ROM_GROUPDWORD | ROM_REVERSE )
ROM_REGION32_BE( 0x40000, "gfx2", 0 ) // '936 tiles
ROMX_LOAD( "305a07.20d", 0x000000, 0x020000, CRC(0959283b) SHA1(482caf96e8e430b87810508b1a1420cd3b58f203), ROM_GROUPDWORD )
ROM_LOAD( "305a07.20d", 0x000000, 0x020000, CRC(0959283b) SHA1(482caf96e8e430b87810508b1a1420cd3b58f203) )
ROM_REGION( 0x400000, "k054539", 0 ) // Sound data
ROM_LOAD( "305a08.2e", 0x000000, 0x200000, CRC(7ddb8a52) SHA1(3199b347fc433ffe0de8521001df77672d40771e) )

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@ -196,6 +196,7 @@ public:
m_audiocpu(*this, "audiocpu"),
m_dsp(*this, "dsp"),
m_watchdog(*this, "watchdog"),
m_k056230(*this, "k056230"),
m_k056800(*this, "k056800"),
m_workram(*this, "workram"),
m_k001005(*this, "k001005"),
@ -221,6 +222,7 @@ protected:
required_device<cpu_device> m_audiocpu;
required_device<adsp21062_device> m_dsp;
required_device<watchdog_timer_device> m_watchdog;
required_device<k056230_device> m_k056230;
required_device<k056800_device> m_k056800;
required_shared_ptr<uint32_t> m_workram;
required_device<k001005_device> m_k001005;
@ -506,8 +508,8 @@ void midnrun_state::main_memmap(address_map &map)
map(0x78040000, 0x7804000f).rw(m_k001006_1, FUNC(k001006_device::read), FUNC(k001006_device::write));
map(0x780c0000, 0x780c0007).rw(m_konppc, FUNC(konppc_device::cgboard_dsp_comm_r_ppc), FUNC(konppc_device::cgboard_dsp_comm_w_ppc));
map(0x7e000000, 0x7e003fff).rw(FUNC(midnrun_state::sysreg_r), FUNC(midnrun_state::sysreg_w));
map(0x7e008000, 0x7e009fff).rw("k056230", FUNC(k056230_device::read), FUNC(k056230_device::write)); // LANC registers
map(0x7e00a000, 0x7e00bfff).rw("k056230", FUNC(k056230_device::lanc_ram_r), FUNC(k056230_device::lanc_ram_w)); // LANC Buffer RAM (27E)
map(0x7e008000, 0x7e009fff).rw(m_k056230, FUNC(k056230_device::regs_r), FUNC(k056230_device::regs_w)); // LANC registers
map(0x7e00a000, 0x7e00bfff).rw(m_k056230, FUNC(k056230_device::ram_r), FUNC(k056230_device::ram_w)); // LANC Buffer RAM (27E)
map(0x7e00c000, 0x7e00c00f).rw(m_k056800, FUNC(k056800_device::host_r), FUNC(k056800_device::host_w));
map(0x7f800000, 0x7f9fffff).rom().region("prgrom", 0);
map(0x7fe00000, 0x7fffffff).rom().region("prgrom", 0);
@ -534,8 +536,8 @@ void jetwave_state::main_memmap(address_map &map)
map(0x78080000, 0x7808000f).rw(m_k001006_2, FUNC(k001006_device::read), FUNC(k001006_device::write));
map(0x780c0000, 0x780c0007).rw(m_konppc, FUNC(konppc_device::cgboard_dsp_comm_r_ppc), FUNC(konppc_device::cgboard_dsp_comm_w_ppc));
map(0x7e000000, 0x7e003fff).rw(FUNC(jetwave_state::sysreg_r), FUNC(jetwave_state::sysreg_w));
map(0x7e008000, 0x7e009fff).rw("k056230", FUNC(k056230_device::read), FUNC(k056230_device::write)); // LANC registers
map(0x7e00a000, 0x7e00bfff).rw("k056230", FUNC(k056230_device::lanc_ram_r), FUNC(k056230_device::lanc_ram_w)); // LANC Buffer RAM (27E)
map(0x7e008000, 0x7e009fff).rw(m_k056230, FUNC(k056230_device::regs_r), FUNC(k056230_device::regs_w)); // LANC registers
map(0x7e00a000, 0x7e00bfff).rw(m_k056230, FUNC(k056230_device::ram_r), FUNC(k056230_device::ram_w)); // LANC Buffer RAM (27E)
map(0x7e00c000, 0x7e00c00f).rw(m_k056800, FUNC(k056800_device::host_r), FUNC(k056800_device::host_w));
map(0x7f000000, 0x7f3fffff).rom().region("datarom", 0);
map(0x7f800000, 0x7f9fffff).rom().region("prgrom", 0);
@ -750,7 +752,8 @@ void zr107_state::zr107(machine_config &config)
EEPROM_93C46_16BIT(config, "eeprom");
K056230(config, "k056230", m_maincpu);
K056230(config, m_k056230);
m_k056230->irq_cb().set_inputline(m_maincpu, INPUT_LINE_IRQ2);
WATCHDOG_TIMER(config, m_watchdog);